Department of Electrical and Computer Engineering

Capstone Design Program: Electrical and

Computer Engineering
Northeastern University, Boston, Mass. Year 2007

EEG Brain-Computer Interface Project

Patrick Cunningham Keith Lang Brian Mearns
Northeastern University Northeastern University Northeastern University
Lee Russell Stephen Sanchez
Northeastern University Northeastern University

This paper is posted at IRis.

http://iris.lib.neu.edu/elec comp capstone/2
EEG Brain-Computer Interface Project

Patrick Cunningham
Keith Lang
Brian Mearns
Lee Russell
Stephen Sanchez

April 2007
Table of Contents

Table of Contents............................................................................................................ 2
1 Abstract ................................................................................................................... 3
2 Introduction............................................................................................................. 3
3 Background ............................................................................................................. 4
3.1 BCI.................................................................................................................. 4
3.2 EEG................................................................................................................. 4
3.3 EOG ................................................................................................................ 6
4 Hardware Overview ................................................................................................ 6
4.1 Modular EEG .................................................................................................. 7
4.2 Electrodes........................................................................................................ 8
4.3 ESD ................................................................................................................. 8
4.4 Instrumentation Amplifier / DRL ................................................................... 9
4.5 Amplifiers and Filters ................................................................................... 10
4.6 Power Regulation.......................................................................................... 12
4.7 Virtual Ground .............................................................................................. 13
4.8 External Device............................................................................................. 13
5 Software Overview ............................................................................................... 14
5.1 Analog to Digital Conversion (ADC) ........................................................... 14
5.2 Processing Options........................................................................................ 15
5.3 Electrooculogram Processing........................................................................ 15
5.4 Time Based Hysteresis.................................................................................. 17
5.5 Automatic Threshold Calibration ................................................................. 18
5.6 Digital Control Signals ................................................................................. 19
6 Final Project Budget ............................................................................................. 20
7 Conclusion ............................................................................................................ 21
8 Code Appendix ..................................................................................................... 22

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1 Abstract

The Brain Computer Interface (BCI) capstone project is a system involving an

Electroencephalograph (EEG) connected to a Digital Signal Processor (DSP) that sends a
signal to a relay to power any simple electronic device (Light bulbs, etc.)
Our design involves using an EEG to sense electronic signals from differential
electrode pairs on the frontal cortex (the forehead). An electrical signal from the brain
will trigger a voltage spike which will be sent from the EEG channel to an ADC. The
received voltage level is then checked by the DSP's flash memory program and, when a
signal is detected, the DSP will output a signal to the relay, which in turn will power any
electronic device we choose.
The BCI we are designing is unique in size and cost. The production of our
system was not costly, and the size of the combined hardware is relatively small. This
would make our BCI design useful for portability purposes, as it can be transported with
ease.

2 Introduction

When we all sat down as a team at the beginning of our Capstone adventure to
discuss possible projects we all knew one thing: we wanted to do something fun and
interesting. We had all heard of the possibility of controlling a computer interface using
only your brain while avoiding all physical interaction, but were not sure how feasible the
actual project would be. We also decided we wanted to do this because it had some real
world possibilities for helping people. The main objective would be to help quadriplegics
do certain tasks that they currently cannot do without physical help. We knew there were
devices in the real world already to assist quadriplegics, such as the sip-puff device and
the chin joystick, but we wanted to take our project beyond the physical limitations of
these devices. So we began to do some research into BCIs. We quickly discovered there
no real options for BCIs that involve no physical interaction. While researching the
possibility of the brain-controlled computer interface we kept in mind our time
constraints as well as our budget. After completing this initial research, we then knew
that it would be possible, but only on a relatively small scale given the time and budget
constraints. Under said constraints, we decided it would be the best idea to try to create a
brain-computer interface to control something small, such as a light bulb or a small RC
car. We decided the best way to do this would be to use an EEG machine. We chose
EEG because all other options for collecting signals from the brain, such as MRI and
CTScan, are too expensive and difficult to create and implement.

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3 Background
3.1 BCI
BCI stands for brain-computer interface. It is also often referred to as a direct
neural interface or a brain-machine interface. The main purpose of a BCI is to directly
connect a human or animal brain to almost any external device to allow for
communication between the two. Current methods of BCI in the real world include a sip-
puff device that allows quadriplegics some limited interaction with their surrounding.
Also, there is a chin joystick product on the market that serves the same purpose.
BCIs are often divided into three categories: invasive, partially-invasive, and non-
invasive. When a BCI is labeled as invasive, this means that the device is actually
implanted into the brain or head of the individual that it is designed for. An example of
an invasive BCI would be a vision BCI, which is implanted into the head of a blind
patient to allow for artificial vision. Partially-invasive means that certain parts of the
device need to be implanted into the person’s head while other parts of the device do not.
These semi-invasive devices are injected into the head to collect data while most of the
machine rests outside of the head. This allows for better signal recognition that a normal
non-invasive device, but is often much more dangerous and expensive. Non-invasive
indicates that the device does not need to penetrate the skin at all. This is the option that
we went for considering that creating an invasive device would be very dangerous and
difficult to do.

3.2 EEG
EEG stands for electroencephalography. It is the neurophysiologic measurement,
via the use of electrodes on the scalp, of the electrical activity of the brain. The
electrodes are carefully placed on certain areas of the brain in order to collect voltages.
The resulting traces of voltages from the brain are called an electroencephalogram. The
process of the EEG is non-invasive. Before electrodes are placed on the scalp, a
conductive gel is usually applied to the skin to reduce impedance. Normally, each pair of
electrodes is connected to the input of a differential amplifier which allows for
amplification of about 60-100 dB of voltage gain. The resulting voltage signal is then
passed through high-pass and low-pass filters, which are normally set at 0.5 Hz and 35-70
Hz, respectively. Electro galvanic signals are filtered out by the high-pass filter while
electromyography signals are filtered out by the low-pass filter. The final signal is then
displayed on a computer screen or oscilloscope.
Although it a very powerful method of collecting brain activity, EEG also a has
several limitations. Scalp electrodes are not sensitive enough to pick up individual action
potentials. Instead, they actually pick up the activity of large groups of neurons. This is
because the large groups of neurons emit larger voltage values that an individual neuron.
Another limitation of EEG is the fact that it has limited anatomical specificity. Other
methods, such as fMRI, allow for such specificity. One way to improve upon this
limitation would be to use a technique called EEG topography. This technique involves
the use of a large number of electrodes to triangulate the source of the electrical activity.
Aside from these limitations, EEG has several advantages as well. One advantage
is the time resolution. EEG’s time resolution is very high. While other methods, such as

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fMRI and CTScan, have time resolution between seconds and minutes, EEG has a
resolution down to a sub-millisecond. Also, EEG is also the only method to directly
measure electrical activity. Other methods rely on blood flow and metabolism. One
more major advantage, which helped lead to our decision to use EEG, is its relative
scalability. The other methods mentioned before, such as fMRI and CTScan, are not as
easily scalable to a smaller size that would allow for usefulness in the capstone lab.
There are four major types of continuous rhythmic sinusoidal EEG activity.
These are the four types:

¾ Delta is the frequency range of up to 4 Hz. These waves are often associated with
the very young as well as underlying lesions. These are often seen in stage 3 and
4 sleep.
o This is what delta waves look like:

¾ Theta is the frequency range from 4 Hz to 8 Hz. These are associated with
drowsiness, childhood, adolescence and young adulthood. It is also produced by
hyperventilation.
o This is what theta waves look like:

¾ Alpha (also known as Berger’s wave) is the frequency range from 8 Hz to 12 Hz.
These are normally found in persons under a relaxed, alert state of consciousness.
Alpha rhythms are best detected while the eyes are closed. Waves like these are
picked up by electrodes placed over the occipital cortex.
o Alpha waves look like this:

¾ Beta is the frequency range above 12 Hz. These waves are associated with active,
busy, or anxious thinking.
o Beta waves look like this:

A major issue with EEG and designing an EEG machine is the presence of
biological artifacts. Artifacts are signals in the EEG that are of non-cerebral origin. All

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EEGs in the world have to deal with this issue, and are nearly always contaminated by
such signals. The most common types of artifacts include eye artifacts, EKG artifacts,
EMG artifacts, and Glossokinetic artifacts. Eyeball artifacts are caused by potential
difference between cornea and retina. As long as the eyes are still, this is not a problem.
But keeping eyes still for extended periods of time can be extremely difficult, if not
impossible. Eye movements, which are caused by ocular muscles, generate
electromyographic potentials. This can cause problems in figuring out if you have are
collecting a real signal or not.
External artifacts also exist and cause problems within the EEG. External
artifacts are artifacts which originate from outside the patient. If the electrodes are
bumped or move for any reason, this could cause spikes originating from a momentary
charge in the impedance of a given electrode.

3.3 EOG
Electrooculography is technique for measuring the resting potential of the retina.
In order to properly collect this information, electrodes must be carefully placed either
above the eyes or to the left and right of the eyes.
Usually, pairs of electrodes are placed either above and below the eye or to the
left and right of the eye. If the eye is moved from the center position towards one
electrode, this electrode "sees" the positive side of the retina and the opposite electrode
"sees" the negative side of the retina. Consequently, a potential difference occurs
between the electrodes. Assuming that the resting potential is constant, the recorded
potential is a measure for the eye position.
EOGs are most commonly used to assess the function of the pigment epithelium.
In practice, the measurement is similar to the eye movement recordings. The patient is
asked to switch the eye position repeatedly between two points (usually to the left and
right of the center). Since these positions are constant, a change in the recorded potential
originates from a change in the resting potential.

4 Hardware Overview

Initially we imagined a project that would have an front end that would be able to
amplify brain waves to the point that we could feed the signals into some type of
processor, then use the processor to output signals that could be used to control external
devices. Using this directly for implementation into a wheelchair or to assist disabled
people would have been a long shot, but we knew that we could at least use the output to
turn on or off a light bulb, or a fan or anything of that nature. From there we knew that
future builds of this would be able to take it to the next step and directly apply this in any
electronics as people would have the need for. Our main focus of the hardware was
working on the initial stages of filtration and amplification of the signals rather then what
we would control at the end.
We looked at several different hardware designs for the brain-computer interface.
Something that realized that we would have to pay attention to is our monetary
constraints. We noticed that hospital quality EEGs sold for close to $10,000 obviously

6
this was out of the question. Another problem is that some of these units were big and
bulky and that was something we were looking to avoid. We also tried to look for used
EEGs, and we still did not find anything in our price range or size. Then we thought that
people could have made these possibly as “do it yourself” projects and that they would
hopefully be within our price range.
We surfed the web looking for projects and we came across a few different
models. Some of them used pricy designs, some of the projects had years of
development time put into them. We came across this open source EEG site which said
they gave out their designs for free as long as we didn’t try to sell anything. The site had
a bunch of different designs that people have tried over the years. They also had a lot of
software design options that we could have used as a real time output to the computer.
They had this hardware design build for an EEG called the Modular EEG.
The modular EEG had the schematics done for an analog and digital board. After
consulting with our advisors we learned that we were allowed to use the design since our
project was the interfacing of the system rather then designing a whole new schematic
from scratch. The site does have options to purchase populated boards but we decided to
just purchase the bare boards and we would hunt down the parts and populate the boards
ourselves. While the modular EEG design called for the use of a microcontroller and
supplied some firmware for it, we decided to bypass that system and use our own DSP to
process our signals. This allowed for us to have greater control over our output signals as
well as let us add to where the OpenEEG project had left off.

4.1 Modular EEG

The Modular EEG had a full hardware and software design to make a device
that could pick up microvolt signals and amplify them enough to feed into a
microcontroller. It was small enough to fit into a small enclosure and looked like the
total cost for components would be within our price range of around $500 dollars. The
Modular EEG consisted of 4 main components, the electrodes, an analog board, a digital
board, and the microcontroller on the digital board. As stated previously we decided not
to use the microcontroller, instead using our own DSP.
The following is a brief overview of how the Modular EEG functions. The
hardware was developed to take two channels of minute signals generated by electrical
impulses within the brain of the user and amplify them enough to feed into a processor.
The signals are picked up via electrodes placed on the forehead. These signals are sent
through an electro-static discharge (ESD) protection circuit and into a differential
amplifier. This Differential amplifier is referenced to a third electrode which is buffered
through a series of op amps, allowing for signals to be measured with reference the body
of the user as ground. Signals are then passed through several stages of amplification and
filtration which boost the signal further and eliminate some of the unwanted noise. This
is then sent to the ADC of the TI digital signal processor (we will discuss more about the
TI DSP in later sections) which generates an output signal. These independent control
signals drive two separate relays which are used to activate light sources.

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4.2 Electrodes

The first step of our design was to find which electrodes to use. The OpenEEG
site has a bunch of different designs, some active and some passive. They even had
electrodes that we could build from scratch. The active electrodes were designed with
amplifiers. This would have given us an advantage in our competition vs. the 60 Hz
noise in the circuit by amplifying the signal before it had to travel down the wires to the
amplification board. If we had more time to experiment with the designs of our project
this is something we could have looked at closer. But at a quick glance we thought that It
may not have been the best idea to have any external voltage source strapped to our head
while using saline solution for a better connection. We passed the active electrodes off
quickly and started researching passive electrodes.
Many companies provide medical electrodes which come in all shapes and sizes.
Big disk electrodes, small disk electrodes, gold plated electrodes etc. being electrical
engineers none of us really had much input into what type of electrodes we would need.
We called around to try to contact some doctors but that was basically no use. We then
called a few companies and they recommended using gold cup electrodes for EEG
measurements. So we took their advice and ordered 10.
After we completed the hardware design we noticed that the electrodes were very
sensitive to normal movements. And if any movements to the electrodes themselves
were enough to cause problems with the signals, it definitely wouldn’t be a good thing.
We searched around and saw some possible solutions. One of them is possibly using
sponges dipped into saline solution would give us a much better electrical connection
then we were previously getting. Also we saw that using shielded wires could help us
against the 60 Hz noise. We ended up cutting the electrode cable and splicing it to
shielded audio RCA cables. The cables added a little weight but did not affect the overall
design.
This did solve the problems of the signals generated by movement. But we did
realize though that with this design consumers would have to dip the sponge into a saline
solution before they could use the EEG. If people didn’t always have saline solution
available to them they may not be able to use the EEG. We saw that this could lead to a
problem. But due to the time constraints of the project we were not able to provide a
good alternative. As I mentioned before though using active electrodes or possibly
experiment with a different type of electrode could have possibly solved this problem.

4.3 ESD

After the electrodes our next step was the analog of the modular EEG. It has a
protection circuit to protect the user from having external voltages applied to the diodes
that could lead to shock. There is a right leg driver that is used to cancel out the common
noise between the electrodes. Then the signal goes through various stages of filtration
and amplification before it is sent to the digital board.
The protection circuit has two main functions. It protects the amplifier board
from any electro-static discharge that could build up on the gold plated electrodes since
they are sensitive to static charges. And second it protects the user from failed circuitry.

8
There is a disclaimer though saying to watch out for huge voltage spikes such as lighting
because the protection circuit would not help so much. The protection circuit is built out
of a bunch of resistors, capacitors and transistors. The theory behind it is that when there
is .2 volts on one of the transistors it will slightly conduct and when the transistor is at .7
volts the transistors fully conduct in theory sending all of the dc voltage to ground. The
resistors in the circuit prevent the transistors from saturating for most normal dc voltages.
But as stated before if there was a huge voltage spike, the circuit may not provide much
safety. The figure below shows the schematic of the protection circuit. We can see from
the schematic that the transistors won’t conduct unless there is a dc voltage at the gate.

4.4 Instrumentation Amplifier / DRL

After the signals pass through the protection circuit the signals are fed into a
instrumentation amplifier. The right leg driver is also fed into the instrumentation
amplifier. The purpose of the right leg driver is so that it picks up the same noise as the
electrodes while not having the brain signals. Then by feeding it into the instrumentation
amplifier we can cancel out the common noise between the right leg driver and the
electrodes on the brain. We connected the right leg driver to our hand rather then our
right leg. The right leg driver is just a common name used for the reference electrode. It
could be placed anywhere on the body that doesn’t have the brain signals. Preferably it
would be close to the other electrodes though so the noise would be common between the
two.
The instrumentation amplifier is needed because it not only amplifies the signal, it
is extremely accurate (compared to 741 operational amplifiers) and it lowers the input
impedance of the circuit so it is less sensitive to noise. The input signals can range from
+/- 250 micro volts so we can see that accuracy is something that is extremely important
when amplifying signals that small. And the input can handle about +/- 100 milliThe gain
is set to about 16. Theoretically we could have chosen a gain much higher but we see
that all of the noise and unwanted signals would be amplified as well. That is why the
total amplification is separated into 3 stages. The first stage is the instrumentation
amplifier. The second stage has is a tunable gain amplifier where we can adjust the gain
so we can match it to the input needed for the digital signal processor. Finally there is a
third stage with a gain of 16. The next section will be used to discuss the additional
amplifiers and filters.
1
Circuit Diagrams, Tables, and Hardware analysis data researched and found at
http://openeeg.sourceforge.net/doc/

9
4.5 Amplifiers and Filters

After the signal passes through the instrumentation amplifier the circuit goes
through a high pass filter where the cutoff frequency is set to around 1.6 Hz. This is here
to remove any dc offsets amplified by the instrumentation amplifier. After the high pass
filter the signal goes to the adjustable gain amplifier. The gain here can range from six to
one hundred by adjusting a 20K Ohm potentiometer. We configured the pot to give us a
gain of around 40. Once again there is another high pass filter with the same cutoff
frequency of 1.6 Hz to remove any DC bias amplified by the second stage amplifier.
Next the signal passes to the final amplifier. The amplifier is arranged in the non
inverting setup but it is also configured as a low pass filter. The low pass filters main use
here is to minimize any distortion from aliasing that may happen when the signal is
converted to digital bits. We will discuss more about the overall filtering in the next
section. The amplifier is configured to have a gain of 16. Adding up the total gain of all
3 amplifiers we have a gain of 7812.5. This gain will give us an output signal of just
under one volt peak to peak which is perfect to feed into the analog-digital converter of
the Texas Instruments digital signal processor. If there was a mismatch in voltage we
could just trim the potentiometer to attain the gain needed.
The three main parts of the filtering stages of the circuit are: the adjustable gain
amplifier, the two high pass filters, and the low pass filter/amplifier. The first two stages
of amplification give us a gain of 640 (56 dB) which we can see in the graphs below.
The low pass filter/amplifier has a cutoff frequency of around 59 Hz. This gives us
protection of frequencies much higher then 59 Hz, but does not attenuate 60 Hz as much
as we would like. The low pass filter is a combined low pass Butterworth & Bessel filter.
The group delay of the filter is flatter then what we would see from a normal Butterworth
filter. But we see a sharper drop off in frequency response then Bessel filter. The filter
has a drop of around 19.2 dB per octave (doubling of the frequency).
The filters between the amplification stages are needed to maintain the stability of
the signal, and to prevent any unwanted oscillations & noise. But as the stability of the
circuit increases there are a few drawbacks to the circuit. One is that as the stability goes
up, it is harder to protect against any aliasing effects at the input of the analog-digital
converter. Another drawback is that the filters can not be as sharp as we would like
which is why we were receiving a lot of 60 Hz noise. Currently 40 Hz signals were
damped by about 1 dB. We did design a notch filter that dropped the 60 Hz noise by
about 30 dB. It did add a little delay to the signal though. We see that any delays to our
circuit could give us more problems then we already have. After programming our dsp
we realized that the 60 Hz noise didn’t affect the output as much as we though it would
have so we dropped the filter. In future builds it seems like we could design digital filters
that could further enhance the performance of our circuit. After passing through the third
filter the signal is sent to the TI board where the signal is converted from analog to
digital.

Overall Filter Gain (dB)

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2

We notice the flat response in the frequency range of the brain waves 5-20 Hz which is
desirable.

Group Delay (Log scale)

We can see that the delay from 5-20 Hz is almost at the same level.

2
Circuit Diagrams, Tables, and Hardware analysis data researched and found at
http://openeeg.sourceforge.net/doc/

11
 Phase shift (log scale)

Once again we see almost the same phase shift from our desirable frequencies. If there
was any more filtering and amplification it would greatly affect our phase shift.

4.6 Power Regulation

The power regulation circuit of the modular EEG was designed to take an input
from 5v to 12v. A diode is used to prevent damage from reverse polarity if a battery is
placed in backwards. The signal is then passed to a 7805 voltage regulator which lowers
and stabilizes the input to 5v. Several capacitors and an inductor act to keep the current
steady to the input of the TMV0505 DC/DC converter. This device has the important job
of isolating the power for the rest of the circuit. This is especially important because the
hardware is directly attached to the user via electrodes. Because of this any spike in
power at the input could potentially injure the user if precautions are not taken.
The TMV0505 has ripple noise of about 120 mV at 50 KHz. In order to minimize
this noise 2 sets of LC filters are used. In this design capacitors of different sizes (47uf,
100nf, and 10nf) are used to remove the various frequency ranges of noise.
The digital voltage generated by the power regulation stage is not needed for the
EEG BCI. The Microcontroller and RS232 controller which was originally called for by
the Modular EEG design has been replaced by a Digital signal processor.

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 Figure 1

4.7 Virtual Ground

Since the op amps on the board need to be driven by a positive and negative
voltage rail, a virtual ground must me generated. In order to do so a resistor divider and
diode clamps are used to generate a 4V signal. This is then divided down to create a 2V
signal. This signal is put through an op amp which forces the virtual ground to hold 2
volts. Here again, several capacitors are used to regulate the output to cause it to work
more like a typical ground plane. Using this level as a “ground” reference the effective
rail voltages are +3v and -2v respectively.

Figure 1

4.8 External Device

After the signals are processed by the DSP they are passed to an external device.
Any device which can operate using a digital signal may be used. For the purposes of
this project a simple device was constructed using 2 relays to turn on 120VAC light

3
Circuit Diagrams, Tables, and Hardware analysis data researched and found at
http://openeeg.sourceforge.net/doc/

13
sources which operate independently. Due to difficulties driving a standard BJT with the
GPIO pins, a 555 timer IC was used to drive the relays. The ICs are powered are
powered by the same 9v input as the power regulation circuit. In standard 555 timer
designs the output is active while the input is over 2/3 of the rail voltage. The output is
pulled low when input signals are pulled below 1/3 of the rail voltage. This means that
the relays will be active for inputs of 6v and turn off for inputs of 3v or less. This causes
a problem because the maximum output of the GPIO pins are 3.5v. To solve this a zener
diode(6v) and potentiometer is used to clamp the control pin. The pot is then trimmed so
that the relay will activate for voltages over 2.5 volts and remain open for signals below 1
volt. This circuit allows for the control of any standard 120VAC device.

5 Software Overview

Our system uses a Texas Instruments Digital Signal Processor (DSP), the
TMS320F2812, to perform software analysis of the signals coming from the EEG device.
The DSP is also used to generate digital control signals for interfacing with a front end
device.

The TMS320F2812 includes a pair of on-chip Analog-to-Digital converters (ADCs)

which are used to convert the analog EEG signals into digital signals. The ADCs sample
the analog signals periodically, at approximately two kilohertz, and generate a digital
value representing the voltage level of the signal. The converted value is stored in a
register in the processor which is accessible through code running on the chip. In this
way, we are able to generate a discrete time sampled digital signal representing the EEG
signal.

After processing the digital signals, the general purpose input/output (GPIO) pins on the
DSP are used to transmit digital signals to an external device. These pins can be
configured from code to output either a digital high or digital low voltage signal, which
are used to interface to the front end device.

5.1 Analog to Digital Conversion (ADC)

In order to have our EEG communicate with the DSP, we needed to convert the
analog signal to a digital value which could be processed by our code. The
TMS320F2812 has built in ADC functionality which we used in order to take the raw
voltage values from our EEG.
There was not a great deal of code to write in order to operate the ADC on the
F2812. The DSP does however require a great deal of setup to allow for very
customizable ADC functionality, but Texas Instrument fortunately provided us with
example code which would require very little customization to meet our needs.
Using the example code provided by TI, we were able to activate a set of pins on
the board to retrieve and convert voltage samples from our EEG at 2KHz. The two
channels provided by the EEG were handled individually, being sampled at the same

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frequency and processed in the same manner. These digital samples would be processed
by code we had designed ourselves.

5.2 Processing Options

There were several option we considered for processing the digital EEG signals.
We initially considered performing a short time Fourier transform on the digital signal.
This would allow us to compute the relative amplitude of all component frequencies in
the signal over a brief period of time. To process the signals, we would look for a sudden
increase in the amplitude of certain frequencies, corresponding to the “brainwaves” that
the user is able to control.

After studying the EEG signals and the control which we were able to exert over
them, we determined that the signal patterns we were interested in were not well suited to
Fourier analysis. Instead, we opted for a more straightforward analysis of timing patterns
based on when the EEG signals crossed certain voltage thresholds. These thresholds and
patterns are based on experimental observation of the signals, and correspond to simple
eye movements performed by the user, as described below.

5.3 Electrooculogram Processing

In analyzing the signals from the EEG device, we determined that the signals relating to
eye movement were the most consistent and therefore offered the most reliable
processing. These signals are a subset of Electroencephalogram signals, known as
Electroculograms, or EOGs. EOGs remain at a relatively low and constant voltage level
when the eyes are still, and move to higher or lower voltage levels when the eyes move.
EOG signals measured over the left eye, for instance, jump to higher levels when the left
eye moves towards the left, and dips to negative voltage when the eye moves to the right.
EOG signals over the right eye are just the opposite, going high when the eye moves
right, and low when it moves left.

After studying these signals, we determined two distinct events which the user could
perform which we would be able to identify in the signal analysis. We call these events
glances, in which the user moves their eyes briefly in one direction, then back to center.
By using two pairs of electrodes, one pair over each eye, we are able to distinguish
glancing left and glancing right. An example illustration of a set of EOG signals is shown
below, depicting a glance-left event.

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The top signal represents the EOG signal measured over the left eye, and the bottom
signal represents the EOG signal for the right eye. The dashed lines show the zero voltage
level for each signal, and solid straight lines show the voltage threshold used to by
processing to identify the event.

This signal shows two separate events which together make up the glance left. The first is
when the eyes look towards the left. This can be seen by the sudden rise in the left eye
signal, and the dip in the right eye signal (as described above). The second half of the
glance in when the eyes move back to center which, for a glance-left, means moving
towards the right. This is shown in the figure by the left eye signal dipping low, and the
right eye signal rising up.

To search for these events, our software processing includes a threshold voltage for each
signal, which is used to determine when the signal is high and when it is low. The figure
below illustrates this by overlaying a binary signal on top of each analog signal, to
indicate when the analog signal is high (above threshold) and low (below threshold).

Notice that in the event of a glance, these binary signals go high in quick succession, but
do not remain high for long, and the eyes move first in one direction, and then in the
other. By studying the response of these signals to the glance-left and glance-right events,
we determined that there were three primary characteristics which need to be validated in

16
order to identify the signals as corresponding to these events. These characteristics are
shown in the figure below, and they are the time which each signal stays high, and the
amount of time between when the first signal goes high and the second signal goes high
(the delay).

The high time for each signal is important, and must be within an experimentally
determined range. Short term rises in either or both signals can be caused by various
disturbances or other eye movement, such as blinking. Long term rises in the signals can
be the result of a misplaced electrode or large scale movement on the part of the user or
the system. The range of acceptable rise times must exclude these cases in order to
minimize the chance of unintentional triggering (i.e., the chance of identifying a glance in
the signals, when no glance has actually occurred).

The delay time is equally important, and also has a range of acceptable values. Because
we are attempting to trigger on quick glances, the time between looking left (or right) and
looking back to center is relatively brief, and this should be considered in the processing.
A long delay between rise times could mean the user was actually looking in one
direction for an extended period of time, and was not intending to trigger the system.

The EOG and binary threshold signals were studied using a Tektronix digital storage
oscilloscope, in order to experimentally determine the appropriate ranges for each of
these three characteristics for the two events, glancing left and glancing right. While we
were able to determine general ranges for these values, in order to be more effective and
more accurate, this sort of calibration should be performed on a per user basis, in order to
narrow down the ranges and therefore further reduce the chance of an incorrect trigger.

5.4 Time Based Hysteresis

Because EEG and EOG signals are inherently unstable and high dependant on a
number of variables and environmental factors, a time-based hysteretic mechanism was
introduced into the analysis code. The primary purpose of this was to prevent brief

17
fluctuations in the voltage level of the signals—which can be caused by electrical
interference or unintentional actions by the user—from being interpreted as eye
movement. In studying the EOG signals, we noticed that actions such as chewing and
blinking can cause short term voltage spikes in the signals, sending them over threshold
for brief periods of time. To prevent our system from triggering on these, we replaced the
threshold based binary signals with hysterically controlled binary signals, and performed
out time based pattern matching on these new signals instead. These hysteretically
controlled signals were still based on the voltage level of the signal relative to the
threshold, but they were now also based on the recent history of signal. To do this, we
introduced hysteretic counters into the code, which are altered every time the ADC
samples the signal. If the sampled voltage is different from the current hysteretically
controlled state (e.g., the hysterically controlled state is high, but the signal is below
threshold), then the counter is incremented. Otherwise, the counter is reset to zero. If the
counter reaches a certain value—indicating that the EOG signal has been is disagreement
with the hysterically controlled state for a certain minimum amount of time—then the
state is toggled to match the signal. Therefore, if the EOG signal is low, but occasionally
spikes above threshold for brief periods of time (as is often the case with EEG signals),
these events will be ignored by the system and will not cause any misfires. Similarly, if
the signal is high, dips below threshold will be ignored if they do not last too long.

5.5 Automatic Threshold Calibration

In addition to calibrating the three time based characteristics of the system, the
threshold voltage must also be calibrated in order for the system to function properly. The
threshold is a voltage level which the DSP uses to determine if the EOG signal is high or
low, so if it is not calibrated correctly, the signal will be difficult to elevate above
threshold (making it difficult to trigger the external device), or it will remain above
threshold too frequently (causing false triggers). However, unlike the time based
variables, which should only need to be calibrated once per user, the threshold is very
dependent on a number of factors, such as precise placement of the electrodes, humidity
of the environment, and the current mental state of the user. The threshold must therefore
be calibrated each time the user begins using the system, and anytime major changes
occur in any of these factors.

To make this feasible, we added an automatic threshold calibration function to our

code, which can be activated and deactivated with a switch on the outside of the system.
To calibrate the threshold, the user should remain relatively still, especially their eyes,
and activate the function using the switch. Once activated, the auto-calibration computes
a sliding window average of the voltage level of each signal, and sets the threshold to be
a certain amount above this average (this offset was determined experimentally during
development). Calibration should be performed for about 15 seconds in order to give the
system enough time to generate an accurate average of the base level EOG signal.

18
5.6 Digital Control Signals
In order to control an external device, the system uses two digital binary control
signals. These signals are connected to two GPIO pins on the DSP and can be
programmatically set to high or low voltage levels (TTL levels), each independently of
each other. Each of these signals corresponds to one of the two events detectable by the
system; left-glance and right-glance. When the system detects one of these events, it
toggles the voltage level of the corresponding signal from low to high, or high to low.

These signals can be used to extends control of the system to any device with the
appropriate interface. For example, our demonstration illustrated the use of 555 timer ICs
and 120VAC relays to control two separate desk lamps with the system. The digital
signals from the system triggered the 555’s, which in turn triggered the relays to turn on
or off based on the state of the digital signal. The control signals could likewise be
connected to any other TTL level digital system.

19
6 Final Project Budget
EEG as BCI COSTS

Group 2

Group Leader: Keith Lang [email protected]

Cost Sub
Item Company Qty per Shipping total Tax Total
PCBs Olimex 2 $11.70 $9.00 $32.40 $0.00 $32.40
Radio
Extend cords Shack 2 $9.49 $0.00 $18.98 $0.95 $19.93
Radio
Relay Shack 1 $4.29 $0.00 $4.29 $0.21 $4.50
Radio
Relay Shack 1 $4.29 $0.00 $4.29 $0.21 $4.50
Radio
555 timer Shack 2 $1.49 $0.00 $2.98 $0.15 $3.13
Radio
PCB Shack 1 $1.79 $0.00 $1.79 $0.09 $1.88
Radio
Binding posts Shack 1 $3.99 $0.00 $3.99 $0.20 $4.19
Radio
9v bat holder Shack 1 $0.99 $0.00 $0.99 $0.05 $1.04
Radio
9v bat clips Shack 1 $1.99 $0.00 $1.99 $0.10 $2.09
Electrodes Cadwell 1 $84.00 $7.50 $91.50 $4.58 $96.08
Radio
Ext cord Shack 2 $3.99 $0.00 $7.98 $0.40 $8.38
Radio
Relay Shack 2 $4.29 $0.00 $8.58 $0.43 $9.01
Parts Newark 1 $60.45 $7.09 $67.54 $3.38 $70.92
Parts Digikey 1 $46.12 $6.00 $52.12 $2.61 $54.73
Parts Digikey 1 $46.39 $6.00 $52.39 $2.62 $55.01
Radio
PCB Shack 1 $3.29 $0.00 $3.29 $0.16 $3.45
Radio
PCB Shack 1 $1.79 $0.00 $1.79 $0.09 $1.88
DB25 Radio
connector Shack 1 $2.49 $0.00 $2.49 $0.12 $2.61
Radio
2N3906 Shack 1 $2.59 $0.00 $2.59 $0.13 $2.72

Total: $378.45

20
7 Conclusion

In conclusion, our capstone project was a great success in a couple of ways. It

was a success in that we completed a great device that accomplishes the task we set out to
do. It was also a success because we had fun doing it. Our project is something that can
be picked up in the future and improved upon into a device that becomes necessary for
most or all quadriplegics in the world to have. This is something we are all very proud
of.

21
8 Code Appendix

The following code contains all of the processing work done by our system, as well as the
code to control the GPIO pins for the digital binary control signals. The file was adapted
from example code generously provided by Texas Instruments for the TMS320F2812
DSP, as part of the application report "Running an Application from Internal Flash
Memory on the TMS320F28xx DSP," literature #SPRA958. The original file was named
main_nonBIOS.c, and was written by David Alter, of TI. The example code setup a
number of peripherals for the device, including the ADC. We have adapted this code
slightly to modify the way the ADC runs, as well as added all of the signal processing
code, which can be found in the ADC’s interrupt service routine, the zero-argument
function named adc_isr.

The system’s code base contains a number of other files, which were also provided by TI
as part of the example code. These files do not contain any code which processes the
EOG signals, and have not been modified for this project. They are therefore not included
in this paper.

#include "DSP281x_Device.h" //
Peripheral address definitions

#include "Queue.h"

#ifdef EXAMPLE_BIOS
#include "example_BIOS.h"
#endif

#ifdef EXAMPLE_NONBIOS
#include "example_nonBIOS.h"
#endif

//Used to time a [roughly] one hz pulsing LED on the eZdsp

board,
// so we know the board is alive and running our code.
Uint32 gOneHzDivider;
Uint32 gOneHzLimit;

//Our ADC signals

double gVoltage1, gVoltage2;
//and corresponding voltages
Uint16 gSignal1, gSignal2;

//Predicit (flag) tracks whether the signal are above

threshold
Uint16 gHighP1 = 0;
Uint16 gHighP2 = 0;

//Tracks highness with hysterics

Uint16 gHystHighP1 = 0;

22
Uint16 gHystHighP2 = 0;
Uint16 gOldHystHighP1 = 0;
Uint16 gOldHystHighP2 = 0;

//Threshold voltages
double gThresholdVoltage1 = 0.14;
double gThresholdVoltage2 = 0.14;

//Count how long the channels has been hysthigh

Uint16 gHighCount1 = 0;
Uint16 gHighCount2 = 0;

//Count how many cycles since the latest transsion high,

// even if it's not still high.
Uint16 gSinceRiseOf1;
Uint16 gSinceRiseOf2;

//Used to hold the delay between when one goes high and the
// other
Uint16 gDelayRise1to2;
Uint16 gDelayRise2to1;

//Hysteric counters
Uint32 gHystCount1 = 0;
Uint32 gHystCount2 = 0;
Uint32 gHystUp1 = 0;
Uint32 gHystUp2 = 0;

//Limit for hysterical counters.

Uint32 gHystLimit = 150;
Uint32 gHystUpLimit = 10;

//Maximum delay between one rise and next, to count as a

look
Uint32 gMaxDelay = 800;

Uint16 gDebugFlagP = 0;

//Queue stuff
double gQueue1 [QUEUE_LENGTH];
double gAverage1;
Uint16 gQidx1;

double gQueue2 [QUEUE_LENGTH];

double gAverage2;
Uint16 gQidx2;

//Indicates if we're calibrating the base line level

// of each signal
Uint16 gCalibratingBaseLineP;

//The multiplication factor to get the threshold from the

average
double gThresholdFactor = 2.2;

//When computing averages, values greater than the current

threshold

23
// are multipled by this. Bigger than 1 to make them more
important to
// the average (higher threshold), less than 0 to pay less
attention
// to them. 1.0 to treat them, same as everything else, and
0 to
// ignore them completely.
double gSpikeWeightFactor = 1.0;

interrupt void adc_isr(void);

/**********************************************************
************
* Function: main()
*
* Description: Main function for F281x example.
***********************************************************
***********/
void main(void)
{

Uint16 i;

//Initialize queues
for(i=0; i<(QUEUE_LENGTH); i++){
gQueue1[i] = 0;
gQueue2[i] = 0;
}
gQidx1 = gQidx2 = 0;
gAverage1 = gAverage2 = 0;

//Calibration flags
gCalibratingBaseLineP = 1;

/*** CPU Initialization ***/

InitSysCtrl(); //
Initialize the CPU (FILE: SysCtrl.c)

// For this example, set HSPCLK to SYSCLKOUT / 6

(25Mhz assuming 150Mhz SYSCLKOUT)
EALLOW;
SysCtrlRegs.HISPCP.all = 0x2; // HSPCLK = SYSCLKOUT/???
EDIS;

// InitXintf(); //
Initialize the external memory interface (FILE: Xintf.c)
// InitGpio(); //
Initialize the shared GPIO pins (FILE: Gpio.c)
InitPieCtrl(); //
Initialize and enable the PIE (FILE: PieCtrl.c)

/*** Copy all FLASH sections that need to run from RAM (use
memcpy() from RTS library) ***/

24
// Section secureRamFuncs contains user defined code that
runs from CSM secured RAM
memcpy( &secureRamFuncs_runstart,
&secureRamFuncs_loadstart,
&secureRamFuncs_loadend -
&secureRamFuncs_loadstart);

/*** Initialize the FLASH ***/

InitFlash(); //
Initialize the FLASH (FILE: SysCtrl.c)

/*** Peripheral Initialization ***/

// Interrupts that are used in this example are re-mapped

to
// ISR functions found within this file.
EALLOW; // This is needed to write to EALLOW protected
register
PieVectTable.ADCINT = &adc_isr;
EDIS; // This is needed to disable write to EALLOW
protected registers

InitAdc(); //
Initialize the ADC (FILE: Adc.c)
//InitEv(); //
Initialize the Event Manager (FILE: Ev.c)

/*** Enable interrupts ***/

//SetDBGIER(IER); //
Configure the DBGIER for realtime debug
//asm(" CLRC INTM, DBGM"); // Enable
global interrupts and realtime debug

// Enable ADCINT in PIE

PieCtrlRegs.PIEIER1.bit.INTx6 = 1;
IER |= M_INT1; // Enable CPU Interrupt 1
EINT; // Enable Global interrupt INTM
ERTM; // Enable Global realtime interrupt DBGM

// Configure ADC
AdcRegs.ADCMAXCONV.all = 0x0001; // Setup 2 conv's
on SEQ1
AdcRegs.ADCCHSELSEQ1.bit.CONV00 = 0x1; // Setup ADCINA0
as 1st SEQ1 conv.
AdcRegs.ADCCHSELSEQ1.bit.CONV01 = 0x0; // Setup ADCINA1
as 2nd SEQ1 conv.
AdcRegs.ADCTRL2.bit.EVA_SOC_SEQ1 = 1; // Enable EVASOC
to start SEQ1
AdcRegs.ADCTRL2.bit.INT_ENA_SEQ1 = 1; // Enable SEQ1
interrupt (every EOS)

// Configure EVA
// Assumes EVA Clock is already enabled in InitSysCtrl();

25
 EvaRegs.T1CMPR = 0x0080; // Setup T1
compare value
EvaRegs.T1PR = 0xFFFF; // Setup period
register
EvaRegs.GPTCONA.bit.T1TOADC = 1; // Enable EVASOC
in EVA
EvaRegs.T1CON.all = 0x1042; // Enable timer 1
compare (upcount mode)

//Configure GPIO
EALLOW;

//Bank G.4 for input

GpioMuxRegs.GPGMUX.all &= 0xFFEF; //Mask off bit 4,
for GPIO
GpioMuxRegs.GPGDIR.all &= 0xFFEF; //Mask off bit 4
for input

//Bank F.8, 11-13, and 14 (LED) for output

GpioMuxRegs.GPFMUX.all &= 0x86FF; //Mask off bits for
GPIO pins
GpioMuxRegs.GPFDIR.all |= 0x7900; //Maks on bits for
output pins

EDIS;

gOneHzDivider = 0;
gOneHzLimit = 0x100000;

// initQueue(avgQ);

/*** Main Loop ***/

while(1) //
Dummy loop. Wait for an interrupt.
{
gOneHzDivider++;
if(gOneHzDivider == gOneHzLimit){
gOneHzDivider = 0;
//Toggle LED on board (F14)
GpioDataRegs.GPFTOGGLE.all |= 0x4000;
}
}

} //end of main()

interrupt void adc_isr(void)

/*
* Sample Rate: 2.315kHz, 432us period.
* NOTE, that's timing is only when the debugger is
connected,

26
 * it might be faster running alone.
* Use of GPIO Bank G pin 4 for status: We set it high at
the beginning
* of the interrupt, and low right before we leave.
* This will generate a square wave on that pin, with an
* uneven duty cycle. The period of the square wave shows
us
* how frequently we're sampling from the ADC, and the
* duty cycle tells us how much time we have to spare in
the
* interrupt.
*/
{

double dq, adj;

//Toggle GPIOF8 for status

// GpioDataRegs.GPFSET.all |= 0x0100;

//Get the converted value

//EEG Channel 1
gSignal1 = AdcRegs.ADCRESULT0 >> 4;
gVoltage1 = (double)(gSignal1) * 3.0 / 4096.0;

//EEG Channel 2
gSignal2 = AdcRegs.ADCRESULT1 >> 4;
gVoltage2 = (double)(gSignal2) * 3.0 / 4096.0;

//Calibration, figure the average base signal.

//Test G(6?)
if((GpioDataRegs.GPGDAT.all & 0x0010) != 0){

//Don't include spikes, nothing over the

current threshold.

//Compute weighted value

adj = (gVoltage1)/((double)(QUEUE_LENGTH));
if(gVoltage1 > gThresholdVoltage1){
//Super charge spikes so they have a
bigger impact
// on the average. This will raise the
threshold so that
// it's harder to breach
adj *= gSpikeWeightFactor;
}

//Find the oldest value

dq = gQueue1[gQidx1];

//Insert new value (overwriting dequeued value)

gQueue1[gQidx1] = adj;

//Update average
gAverage1 = gAverage1 + adj - dq;

27
 //increment pointer
gQidx1++;
//Wrap around
if(gQidx1 == (QUEUE_LENGTH))
gQidx1 = 0;

//Upodate threshold
gThresholdVoltage1 = gThresholdFactor *
gAverage1;

//Repeat for channel 2

adj = (gVoltage2)/((double)(QUEUE_LENGTH));
if(gVoltage2 > gThresholdVoltage2){
adj *= gSpikeWeightFactor;
}
dq = gQueue2[gQidx2];
gQueue2[gQidx2] = adj;
gAverage2 = gAverage2 + adj - dq;
gQidx2++;
if(gQidx2 == (QUEUE_LENGTH))
gQidx2 = 0;
gThresholdVoltage2 = gThresholdFactor *
gAverage2;

}//end baseline calibration

else{
//Don't do processing while calibrating

//Test Channel 1
if(gVoltage1 > gThresholdVoltage1){

//If we're calling it high already, reset

hysteric counter
if(gHystHighP1){
gHystCount1 = 0;
gHystHighP1 = 1;
GpioDataRegs.GPFSET.all |= 0x2000;
}else{
//If we're not already calling it
high, incremement
// the other hysterical counter
gHystUp1++;
if(gHystUp1 >= gHystUpLimit){
gHystHighP1 = 1;
//Set GPIOF8 high for status
GpioDataRegs.GPFSET.all |=
0x2000;
}
}

//Set predicits (flags) high

gHighP1 = 1;

}else{

28
 //if we're calling it high, but the
signal is
// low, increment the hysterical counter
if(gHystHighP1){
//inc counter
gHystCount1++;
//See if it's breaches limit
if(gHystCount1 > gHystLimit){
//Call a cow a cow, it's low
gHystHighP1 = 0;

//Set GPIOF8 low

GpioDataRegs.GPFCLEAR.all |=
0x2000;
}
}else{
//It's low and we're calling it
low, so make sure it's low
//Set GPIOF8 low
GpioDataRegs.GPFCLEAR.all |=
0x2000;
}

//Reset hyst up counter

gHystUp1 = 0;

//Set raw predicit low

gHighP1 = 0;

//Test Channel 2
if(gVoltage2 > gThresholdVoltage2){

//If we're calling it high already, reset

hysteric counter
if(gHystHighP2){
gHystCount2 = 0;
gHystHighP2 = 1;
//GPF11
GpioDataRegs.GPFSET.all |= 0x1000;
}else{
//If we're not already calling it
high, incremement
// the other hysterical counter
gHystUp2++;
if(gHystUp2 >= gHystUpLimit){
//call it high
gHystHighP2 = 1;
//Set GPIOF11 high for status
GpioDataRegs.GPFSET.all |=
0x1000;
}
}

//Set predicit (flags) high

29
 gHighP2 = 1;

}else{
//if we're calling it high, but the
signal is
// low, increment the hysteric counter
if(gHystHighP2){
//inc counter
gHystCount2++;
//See if it's breaches limit
if(gHystCount2 > gHystLimit){
//Call a cow a cow, it's low
gHystHighP2 = 0;

//Set GPIOF11 low

GpioDataRegs.GPFCLEAR.all |=
0x1000;
}
}else{
//It's low and we're calling it
low, so make sure it's low
//Set GPIOF11 low
GpioDataRegs.GPFCLEAR.all |=
0x1000;
}

//Reset hyst up counter

gHystUp2 = 0;

//Set raw predicit low

gHighP2 = 0;

}
//We count the gHighCountn vars anytime the
// channel is high. We count the gSinceRiseOfn
// every time, regardless of the state of the
channel.
// However, if the channel is transitioning
high,
// we reset both counters. What we're looking
for
// is when each channel is high for a certain
range of
// time, and the time in between the two
transitions
// occurs within a certain amount of time. This
// corresponds to a look to the side, and which
// channel rises first indicates which way
you're
// looking.

//Always increment counter, counting since last

// transistion. If this is an edge, we'll reset
// the counter in a few lines.
gSinceRiseOf1++;
gSinceRiseOf2++;

30
 //see if 2 is high
if(gHystHighP2){

//See if we're transitioning high from

low
if(!gOldHystHighP2){
//Reset high counter
gHighCount2 = 0;

//reset "since-edge" counter

gSinceRiseOf2 = 0;

//Set the delay

gDelayRise1to2 = gSinceRiseOf1;

}else{
//inc high counter
gHighCount2++;
if(gHighCount2 == 100 &&
gHighCount1 > 100 && gDelayRise1to2 < gMaxDelay){
//Toggle GPIOF13-this is our
actual external control
GpioDataRegs.GPFTOGGLE.all |=
0x0800;
//Make sure the stuff we just
triggered on isn't
// shared by anything else
gDelayRise2to1 =
gDelayRise1to2 = 0x7FFF;
}
}

//see if 1 is high
if(gHystHighP1){

//See if we're transitioning high from

low
if(!gOldHystHighP1){
//Reset high counter
gHighCount1 = 0;
gDebugFlagP = 1;

//reset "since-edge" counter

gSinceRiseOf1 = 0;

//Set the delay

gDelayRise2to1 = gSinceRiseOf2;

}else{
//inc high counter
gHighCount1++;
if(gHighCount1 == 100 &&
gHighCount2 > 100 && gDelayRise2to1 < gMaxDelay){
//Toggle GPIOF12

31
 GpioDataRegs.GPFTOGGLE.all |=
0x0100;
//Make sure the stuff we just
triggered on isn't
// shared by anything else
gDelayRise2to1 =
gDelayRise1to2 = 0x7FFF;
}
}

gDebugFlagP = 0;

//Update old values

gOldHystHighP1 = gHystHighP1;
gOldHystHighP2 = gHystHighP2;
}

// Reinitialize for next ADC sequence

AdcRegs.ADCTRL2.bit.RST_SEQ1 = 1; // Reset
SEQ1
AdcRegs.ADCST.bit.INT_SEQ1_CLR = 1; // Clear
INT SEQ1 bit
PieCtrlRegs.PIEACK.all = PIEACK_GROUP1; //
Acknowledge interrupt to PIE

//Toggle GPIOF8 for status

// GpioDataRegs.GPFCLEAR.all |= 0x0100;
}

32