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Assignment of ARM Processor With Solution

This document contains 10 multiple choice questions from an assignment on embedded system design with ARM. The questions test understanding of ARM instructions like ADD, SUB, MVN, AND, EOR, LDR, STR and concepts like conditional execution and pulse width modulation. Sample solutions and explanations are provided for each question.

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Rahi Sarkar
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75% found this document useful (8 votes)
6K views

Assignment of ARM Processor With Solution

This document contains 10 multiple choice questions from an assignment on embedded system design with ARM. The questions test understanding of ARM instructions like ADD, SUB, MVN, AND, EOR, LDR, STR and concepts like conditional execution and pulse width modulation. Sample solutions and explanations are provided for each question.

Uploaded by

Rahi Sarkar
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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NPTEL Online Certification Courses

Indian Institute of Technology Kharagpur

Course Name: EMBEDDED SYSTEM DESIGN WITH ARM


Assignment- Week 2
TYPE OF QUESTION: MCQ/MSQ/SA
Number of questions: 10 Total mark: 10 x 1 = 10
______________________________________________________________________________

QUESTION 1:
If the registers r1, r2 and r3 contain the values 10, 20 and 30 respectively, what will be the
value in register r4 after execution of the following code segment?
ADD r4,r1,r3
SUB r4,r4,r2
RSB r4,r1,r4
a. 10
b. 20
c. 25
d. 30

Correct Answer: a

Detailed Solution:
First instruction :: r4 = r1 + r3 = 10 + 30 = 40
Second Instruction :: r4 = r4 – r2 = 40 – 20 = 20
Third instruction :: r4 = r4 – r1 = 20 – 10 = 10
Thus option (a) is a correct.
______________________________________________________________________________

QUESTION 2:
If the registers r1, r2 and r3 contain the values 0, 15 and 12 respectively, what will be the value
in register r4 after execution of the following code segment? Assume that the registers are 32-
bits in size.
MVN r0,r1
AND r4,r0,r2
EOR r4,r4,r3
a. 15
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Indian Institute of Technology Kharagpur

b. 3
c. 12
d. None of these.

Correct Answer: b

Detailed Solution:
Given r1=0, r2=15, r3=12
First instruction :: r0 = not of r1
r1 = 0000 0000 … 0000
r0 = not of r1 = 1111 1111 …. 1111
Second instruction :: r4 = Bitwise AND of r0 and r2
= 1111 1111 … 1111 AND 0000 0000 …1111
= 0000 0000 … 1111
Third instruction :: r4 = Bitwise XOR of r4 and r3
= 0000 0000 … 1111 XOR 0000 0000 … 1100
= 0000 0000 0011 = 3
Thus option (b) is correct.
______________________________________________________________________________

QUESTION 3:
If the register r5 contains the hexadecimal number AA55AA55, the hexadecimal value of the
number stored in register r2 after executing the following instruction will be:
MVN r2,r5
a. AA55AA55
b. FFFFFFFF
c. 55AA55AA
d. 00AA00AA

Correct Answer: c

Detailed Solution:
MVN r2, r5: r2 = not of r5
r5 = AA55AA55
r5 = AA55AA55 = 1010 1010 0101 0101 1010 1010 0101
not of r5 = 0101 0101 1010 1010 0101 0101 1010 = 55AA55AA
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After execution of the instruction, r2 = 55AA55AA


Thus option (c) is correct.
______________________________________________________________________________

QUESTION 4:
If registers r2, r5 and r8 contains (decimal) numbers 3, 7 and 8 respectively, the value of r10
after execution of the following instruction will be:
ADD r10,r8,r5,LSL r2
a. 56
b. 60
c. 64
d. None of these.

Correct Answer: c

Detailed Solution:
ADD r10, r8, r5, LSL r2 :: r10 = r8 + (r5 << r2)
r5 = 7
r5 << r2 = r5 << 3 = 56 (each left shift means multiply by 2)
r10 = 8 + 56 = 64
Thus (c) is the correct option.
______________________________________________________________________________

QUESTION 5:
What does the following ARM instruction compute?
MLA r10, r11, r12, r13
a. r10 = r11 + r12 + r13
b. r10 = r11 * r12 * r13
c. r10 = r11 * r12 + r13
d. r10 = r11 + r12 * r13

Correct Answer: c

Detailed Solution:
MLA rd, rm, rn, ra :: rd = rm * rn + ra
Thus option (c) is correct.
____________________________________________________________________________
NPTEL Online Certification Courses
Indian Institute of Technology Kharagpur

QUESTION 6:
Memory locations 1000, 1004 and 1008 contain the data 10, 20 and 30 respectively. If register
r1 is initialized with the value 1000, the contents of register r2 after execution of the following
code segment will be ____________.
LDR r5,[r1]
LDR r6,[r1,#4]
LDR r7,[r1,#8]
ADD r2,r5,r6
SUB r2,r2,r7

Correct Answer: 0

Detailed Solution:
First instruction :: r5 = Mem[r1] = 10
Second instruction :: r6 = Mem[r1+4] = Mem[1004] = 20
Third instruction :: r7 = Mem[r1+8] = Mem[1008] = 30
Fourth Instruction :: r2 = r5 + r6 = 10 + 20 = 30
Fifth instruction :: r2 = r2 – r7 = 30 – 30 =0
Thus correct answer will be 0.
_____________________________________________________________________________

QUESTION 7:
If the register r1 contains the value 1000, then the value of r1 after executing the following
instruction will be ___________.

LDR r5,[r1,#24]!

Correct Answer: 1004

Detailed Solution: The given instruction loads data from memory address r1+24 = 1000+24 =
1024, and then increments r1 by 4 to point to the next word. The new value of r1 will be 1000 +
4 = 1004.
______________________________________________________________________________

QUESTION 8:
Which of the following ARM instructions can be used to load a byte into a register?
a. LDR
b. LDRB
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c. LDRSH
d. LDRBYTE

Correct Answer: b

Detailed Solution:
LDR is used to load 32-bit value or address.
LDRB is used to load a byte into a register.
LDRSH is used to load a half-word into a register.
There is no such instruction in ARM called LDRBYTE.
Thus option (b) is correct option.
______________________________________________________________________________

QUESTION 9:
What are the advantages of conditional execution feature in ARM?
a. It helps reduce the number of branch instructions.
b. It helps to improve the code density.
c. It increases the number of instructions required.
d. All of these.

Correct Answer: a, b

Detailed Solution:

Conditional execution instructions reduce the number of branch instructions as single instruction
can perform other operations (ADD, SUB, etc) along with condition checking. As single
instruction can do multiple jobs, it reduces the code density as well.

Thus (a) and (b) are correct options.


____________________________________________________________________________

QUESTION 10:
Which of the following can be used to change the average value of a pulse width modulated
(PWM) digital signal?
a. Vary the time period keeping duty cycle unchanged.
b. Vary the duty cycle keeping the time period unchanged.
c. Vary the pulse width keeping the time period unchanged.
d. All of these.
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Indian Institute of Technology Kharagpur

Correct Answer: b, c

Detailed Solution:

Option (a) is incorrect as keeping duty cycle unchanged does not change the average value of the
signal. Both options (b) and (c) changes the duty cycle and hence the average value.

Thus options (b) and (c) are correct.


______________________________________________________________________________

************END*******

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