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Versions of Table Read and Table Write Instructions

This document describes various instruction types for the PIC18 microcontroller including: 1. Versions of table read and write instructions that can increment or decrement the TBLPTR registers before or after read/write operations. 2. Logic instructions like AND, OR, XOR as well as bit manipulation instructions like BCF, BSF, BTG. 3. Program flow instructions like GOTO, CALL, RETURN for branching and subroutines.

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0% found this document useful (0 votes)
89 views7 pages

Versions of Table Read and Table Write Instructions

This document describes various instruction types for the PIC18 microcontroller including: 1. Versions of table read and write instructions that can increment or decrement the TBLPTR registers before or after read/write operations. 2. Logic instructions like AND, OR, XOR as well as bit manipulation instructions like BCF, BSF, BTG. 3. Program flow instructions like GOTO, CALL, RETURN for branching and subroutines.

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Diwakar Arora
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as DOCX, PDF, TXT or read online on Scribd
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PIC 18: Instructions

Versions of table read and table write instructions:

The TBLPTR registers can be incremented or decremented before or after the read or write operations

Logic Instructions:
Using Program Loops to Create Time Delays Using Program Loops to Create Time Delays

 The PIC18 uses a crystal oscillator or a RC circuit to generate the clock signal needed to control
its operation.
 The instruction execution time is measured by using the instruction cycle clock. - One
instruction cycle is equal to four times the crystal oscillator clock period.
 Select an appropriate instruction that will take a multiple of 10 or 20 Select an appropriate
instruction that will take a multiple of 10 or 20 instruction cycles to execute.
 A desirable time delay is created by repeating the chosen instruction sequence for certain
number of times.

Write a program to create a time delay of 100 ms for the demo board that uses a 40 MHz crystal
oscillator to operate.
Rotate Instructions

1. rlcf f, d, a ; rotate left f through carry

2. rlncf f, d, a ; rotate left f ( not trough carry)

3. rrcf f, , d a ; g rotate right f through y

4. rrncf f, d, a ; rotate right f (not through carry)


Bit Operation Instructions
1. bcf f, b, a ; clear bit b of register f
2. bsf f, b, a ; set bit b of register f
3. btg f, b, a ; toggle bit b of register f

Introduction to PIC18 Instruction Set


 Includes 77 instructions

n 73 one-word (16-bit) long n Four two-words (32-bit) long

 Divided into seven groups


i. Move (Data Copy) and Load
 MOVLW 8-bit ;Load an 8-bit literal in WREG
 MOVWF F, a ;Copy WREG in File (Data) Reg. ; If a = 0, F is in Access Bank ;If a = 1, Bank is
specified by BSR
 MOVFF fs, fd ;Copy from one Data Reg. to ;another Data Reg
ii. Arithmetic
 ADDLW 8-bit ;Add 8-bit number to WREG
 ADDWF F, d, a ;Add WREG to File (Data) Reg. ;Save result in W if d =0 ;Save result in F if d = 1
 ADDWFC F, d, a ;Add WREG to File Reg. with ;Carry and save result in W or F
 SUBLW 8-bit ;Subtract WREG from literal
 SUBWF F, d, a ;Subtract WREG from File Reg.
 SUBWFB F, d, a ;Subtract WREG from File Reg. ;with Borrow o INCF F, d, a ;Increment File Reg.
 DECF F, d, a ;Decrement File Reg.
 COMF F, d, a ;Complement File Reg. o NEGF F, a ;Take 2s Complement-File Reg
 MULLW 8-bit ;Multiply 8-bit and WREG ;Save result in PRODH-PRODL
 MULWF F, a ;Multiply WREG and File Reg. ;Save result in PRODH-PRODL
 DAW ;Decimal adjust WREG for BCD ;Operations
iii. Logic
 ANDLW 8-bit ;AND literal with WREG
 ANDWF F, d, a ;AND WREG with File Reg. and ;save result in WREG/ File Reg.
 IORLW 8-bit ;Inclusive OR literal with WREG
 IORWF F, d, a ;Inclusive OR WREG with File Reg. ;and save result in WREG/File Reg.
 XORLW 8-bit ;Exclusive OR literal with WREG
 XORWF F, d, a ;Exclusive OR WREG with File Reg. ;and save result in WREG/File Reg.
iv. Program Redirection (Branch/Jump)
 BC n ;Branch if C flag = 1 within + or – 64 Words
 BNC n ;Branch if C flag = 0 within + or – 64 Words (NO CARRY)
 BZ n ;Branch if Z flag = 1 within + or – 64 Words
 BNZ n ;Branch if Z flag = 0 within + or – 64 Words
 BN n ;Branch if N flag = 1 within + or – 64 Words
 BNN n ;Branch if N flag = 0 within + or – 64 Words
 BOV n ;Branch if OV flag = 1 within + or – 64 Words
 BNOV n ;Branch if OV flag = 0 within + or – 64 Words
 GOTO Address: Branch to 20-bit address unconditionally

 Call and Return Instructions


 RCALL nn ;Call subroutine within +or – 512 words
 CALL 20-bit, s ;Call subroutine ;If s = 1, save W, STATUS, and BSR
 RETURN, s ;Return subroutine ;If s = 1, retrieve W, STATUS, and BSR
 RETFIE, s ;Return from interrupt ;If s = 1, retrieve W, STATUS, and BSR
v. Bit Manipulation
 BCF F, b, a ;Clear bit b of file register. b = 0 to 7
 BSF F, b, a;Set bit b of file register. b = 0 to 7 o BTG F, b, a ;Toggle bit b of file register. b = 0 to 7
 RLCF F, d, a ;Rotate bits left in file register through ; carry and save in W or F register
 RLNCF F, d, a ;Rotate bits left in file register ; and save in W or F register
 RRCF F, d, a ;Rotate bits right in file register through ; carry and save in W or F register
 RRNCF F, d, a ;Rotate bits right in file register ; and save in W or F register
vi. Table Read/Write
 TBLRD* ;Read Program Memory pointed by TBLPTR ;into TABLAT
 TBLRD*+ ;Read Program Memory pointed by TBLPTR ;into TABLAT and increment TBLPTR
 TBLRD*- ;Read Program Memory pointed by TBLPTR ;into TABLAT and decrement TBLPTR
 TBLRD+* ; Increment TBLPTR and Read Program ; Memory pointed by TBLPTR into TABLAT
 TBLWT* ;Write TABLAT into Program Memory pointed ;by TBLPTR
 TBLWT*+ ; Write TABLAT into Program Memory pointed ;by TBLPTR and increment TBLPTR
 TBLWT*- ; Write TABLAT into Program Memory pointed ;by TBLPTR and decrement TBLPTR
 TBLWT+* ; Increment TBLPTR and Write TABLAT into ; Program Memory pointed by TBLPTR
vii. Machine Control
 CLRWDT ;Clear Watchdog Timer: Helps recover from software malfunction; Uses its own free-
running on-chip RC oscillator; WDT is cleared by CLRWDT instruction
 RESET ;Reset all registers and flags n When voltage < a particular threshold, the device is held in
reset; Prevents erratic or unexpected operation
 SLEEP ;Go into standby mode
 NOP ;No operation
viii. Test and Skin Instructions
 BTFSC F, b, a ;Test bit b in file register and skip the ;next instruction if bit is cleared (b =0)
 BTFSS F, b, a ;Test bit b in file register and skip the ;next instruction if bit is set (b =1)
 CPFSEQ F, a ;Compare F with W, skip if F = W
 CPFSGT F, a ;Compare F with W, skip if F > W
 CPFSLT F, a ;Compare F with W, skip if F < W
 TSTFSZ F, a ;Test F; skip if F = 0
ix. Increment/Decrement and Skip Next Instruction
 DECFSZ F, b, a ;Decrement file register and skip the ;next instruction if F = 0
 DECFSNZ F, b, a ;Decrement file register and skip the ;next instruction if F ≠
 INCFSZ F, b, a ;Increment file register and skip the ;next instruction if F = 0
 INCFSNZ F, b, a ;Increment file register and skip the ;next instruction if F ≠ 0

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