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Authorization Date D1: 1997-02-28

Running on PCB: GBA 21230 F1-F3
Software Version: GAA30163AAA

Document Revision :

Date Author Comment

1996-12-19 G. Giannini Draft 0.1
1997-02-17 G. Giannini Original Version

Copyright 1995, OTIS GmbH Berlin

No part of this document may be copied or reproduced in any form or by any means without the prior written consent of OTIS GmbH.
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1 General Description ............................................................................4

1.1 Features ............................................................................................................4
1.2 Mechanical Dimensions ..................................................................................5
2 PCB Layout..........................................................................................6
2.1 High Voltage Areas ..........................................................................................6
2.2 Elevator Code Requirements ..........................................................................7
3 Functional Description .......................................................................8
3.1 Block Diagram..................................................................................................8
3.2 Power Supply and Voltage Supervisor ..........................................................9
3.2.1 Reset Generation ...........................................................................................9
3.2.2 Watchdog .......................................................................................................9
3.2.3 EEPROM Write Protection .............................................................................9
3.2.4 Power Fail ......................................................................................................9
3.3 IPC and System Bus ......................................................................................10
3.4 Memories ........................................................................................................10
3.4.1 Program........................................................................................................10
3.4.2 Data ..............................................................................................................10
3.5 Discrete Parallel Inputs/Outputs...................................................................10
3.5.1 I/O Connection for Call Buttons & Tell Tale Lights.......................................11
3.5.1.1 Input/Output Characteristics .....................................................................11
3.5.2 Control Inputs <24/28VDC> .........................................................................12
3.5.2.1 Input Characteristics .................................................................................12
3.5.3 Inputs <48/110VAC> ....................................................................................12
3.5.3.1 Input Characteristics <110V-range> .........................................................13
3.5.3.2 Input Characteristics <48V-range> ...........................................................13
3.5.4 Outputs 24/28VDC .......................................................................................14
3.5.4.1 Output Characteristics ..............................................................................14
3.5.5 Outputs 48/110V...........................................................................................14
3.5.5.1 Output Characteristics ..............................................................................14
3.5.6 Special Device..............................................................................................15
3.5.6.1 Phase Sequence Detector ........................................................................15
3.5.6.1.1 Principle.................................................................................................15
3.5.6.1.2 3-Phase Power Line System Requirements ..........................................15
3.5.6.1.3 Overvoltage Category............................................................................15
3.5.6.1.4 Creeping Distances for Power Lines .....................................................15
3.5.6.2 Motor Protection Circuit ............................................................................16
3.5.6.3 Brake Current Sensor ...............................................................................17
3.6 Serial Interfaces .............................................................................................18
3.6.1 Duplex Interface ...........................................................................................18
3.6.2 Service Tool Interface ..................................................................................18
3.6.3 REM (Remote Elevator Monitoring)..............................................................18
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3.7 Indications on the Board ...............................................................................19

4 External Connections .......................................................................20
4.1 Appropiate Connectors .................................................................................20
4.2 Connectors pin assignment..........................................................................21
4.2.1 Power Line....................................................................................................21
4.2.2 Control Inputs ...............................................................................................21
4.2.3 Safety Chain-110V .......................................................................................22
4.2.4 Safety Chain-48V .........................................................................................22
4.2.5 Motion Outputs .............................................................................................23
4.2.6 Position Indicator..........................................................................................23
4.2.7 Call Buttons and Tell Tale Lights .................................................................24
4.2.8 Duplex ..........................................................................................................24
4.2.9 Direction Indicator ........................................................................................25
4.2.10 Rem ..............................................................................................................25
4.2.11 Motor Protection ...........................................................................................25
4.2.12 Phase Sequence Detector and Brake Current Sensor .................................26
4.2.13 Service Tool .................................................................................................26
4.2.14 Additional I/O Controls .................................................................................27
4.2.15 Additional Call Buttons and Tell Tale Lights ................................................28
5 Interchangeability..............................................................................29
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The Logic Board II (LB_II) is a microprocessor controlled operational core and motion
command subsystem. It is used to control the operation of a single car.
On board circuitries allow to interface to motion control relay and hall / cabin fixture signals.
The control system works with the logic board as the basic unit wich may be extended with
the Multilight Board according to the requirements of a contract.
Two serial lines are provided to communicate with an Otis Service Tool or Information
Controller ( REM ) and with other controllers in a two car-group.
Power Line Sequence Detector, Motor Protection and Brake Current Sensor are integrated.
The LB_II is available in three assembly versions: GBA 21230 F1, -F2, -F3.

Version

F1 F2 F3
Processor : Z84C15 at 9.8MHz + + +
Memory : EPROM 60 / 56 Kbyte + + +
RAM 4 / 8 Kbyte + + +
EEPROM 256 byte + + +
Parallel Inputs : Safety Chain 48/110VAC 6 6 6
Control Signals 24VDC 16 16 10
Phase Sequence Detector 380 VAC + - +
Brake Current Sensor + - +
Motor Protection Circuit + - +
Parallel Inputs/Outputs : Call Buttons & Tell Tale Lights 24VDC 34 34 16
Parallel Outputs : Motion relay-contact-make 48/110V 8 8 8
Add. Cntr.Sign. - (open collector) 24VDC 6 6 -
Position Indicator (open collector) 24VDC 9 9 9
Direction Indicator (open collector) 24VDC 2 2 2
Serial Interface : Duplex Operation Interface RS422 + + +
Service Tool Interface Rs422 + + +
REM RS422 + + +
Service Switches : Addr/Data S1 + + +
Increment S2 + + +
Programming/Modes S3 + + +
Indicators : Installation Parameter 7-SEG DIS1 + + +
Information and Status Led’s 20 18 20
Supply Voltage Outputs : Fuse w/holder (1AT) 110VAC + + +
Power supply for Multilight-board 12VAC + + +
available : “+” = yes / “-” = no
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The board has to be fixed via 6 mounting holes and two support holes. The drawing below
shows the printed board outline and its dimensions. Insulated fastening material should be
used to ensure the clearances between conductors on board and the controller cabinet.
The maximum height of the assembly is 40mm.

207.6

4.2 220

6.4 6.4

82.55

6.35
152.4
309.25

7.62 315

all dimensions in mm view on components side

Mechanical dimensions of the LB_II

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!" # " $
The LB_II has been designed to operate with different voltage levels. Voltages which can
be harmful, like the one on the Power Line Sequence Detector (250VAC to earth), are iso-
lated by opto-couplers against the logic level area.
If the power line is connected to the phase sequence detector at P13, an insulated cover
must be mounted over the PCB to avoid unintentional touching of the power line voltage.

24VDC 24VDC Brake 380VAC

additional I/O controls Call Button &Tell Tale Lights Current Input Power Line Input

Cover this area

Power Supply

GND
24VDC
PTC Input
12VAC
12VAC
110VAC-IN REM Output
110VAC-OUT

HL1 Duplex Oper.

Interface Port

Direction Indicator
UP/DOWN

Motion Outputs
Relay
Contact-make

48/110VAC 24VDC 24VDC Outputs 24VDC Inputs/Outputs

Safety Chain Inputs Control Inputs Position Indicator Call Buttons & Tell Tale Lights

Voltage levels against GND / HL2 on LB_II

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% & ' ( )
The LB_II detects signals in the safety chain to control the operation of a car in an elevator
installation. Because bridging of points in the safety chain will cause dangerous situations,
the 48/110VAC input level converters area was laid out according to EN81. This area has
been certified by the German ‘TÜV’ and must not be modified!
If C_Circuit -relais are used, their common return lines must be connected to P3/P33.7
(CRET).

P1

Critical routing area!

Certified by the German “Tüv”

HL1 10

6*Safety Chain Inputs

110V ---> P3
48V ---> P33

P33

P3

1 LB_II

to common return of c-relais CRET

Principle of C-relais connection

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* + "

Memories

EPROM
60/56 Kbyte
RAM
4/8 Kbyte
EEPROM
256 Byte

P3 6 Safety Chain Inputs 48VDC / 110VAC 8

P2
P33 48/110V Motion Out Driver
CPU
10 Control Inputs Control Outputs 6
P4 CGC P2_EB
Discrete 24VDC 30VDC Open Collect.
PIO
P6 34 Call Button & Tell Tale 30V Open Collector 2
P8
P3_EB Light I/O Stages SIO Direction Ind. Driver

3 Phase Sequence CTC 30V Open Collector 10

P13 P5
Detector Position Ind. Driver
TIMER
2 Brake Current & RS422 Port to 4
P13 REGISTER P7
Control 2nd Car Controller

2 Motor Protection RS422 Port to 9

P12 (IPC) P14
Circuit Service Tool / REM
Intelligent
Peripheral
Service Switches Controller 20xLED’s, 1x7-SEG 2
P11
S1, S2, S3 For Info and Status
REM

12VAC Power Supply and Voltage Supervisor GND

6 HL1 Fuse 4AT MLB 4
P1 P1
24VDC 24VDC
110VAC-IN Fuse 1AT 110VAC-OUT

Block Diagram of LB_II

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* , - '# " - &

The 12VAC +/- 15% input line is fused by F2 (4AT) and rectified to supply the voltage VCC
on the board. The rectified voltage +UB is stabilized at 5VDC by a high efficiency switch
mode regulator Z15 in order to minimize power consumption and board space occupation.
The Logic Board_II provides a fuse F1 (1AT) for a 110V line between pin P1.7 / P1.8. The
fuse is provided to detect a short-circuit in the safety chain, even if there is a relative low
short-circuit current.
The 24V input line is supplied with a 24V bridge rectified voltage. The sine wave voltage at
this input is needed, because the line synchronization depends on the line crossing of this
voltage. The 24V/28V input signals have no phase difference to make shure, that the inputs
are sampled at the peak voltage level. The input line for the call buttons / TTL’s are pulled
up with 4.7 Kohm resistors on the board. To drive the 7-segment Position Indicator with the
logic board, a separated voltage is available at pin P1.3.

* (
The MAX691 (Z22) Reset* output ensure that the µP power-up in a known state and pre-
vents code-execution errors during power-down or brownout conditions. A reset pulse (Re-
set* = low) of 50 ms is generated by Z22 pin 15 if the watchdog timer has not been toggled
by WDCLK within a period of 100ms. The output Reset* is kept low as long as VCC is
lower than 4.6 V.

* . ' "
The operating software must ensure that WDCLK signal is toggled every 100 ms. If
WDCLK does not toggle within 600 ms after power-up, a 50 ms reset pulse (low active) is
issued by Z22 pin 15. WDCLK can be used to force a software controlled system reset.

* * %% (/ .
The LB_II provides a software and hardware controlled write protection. To ensure the in-
tegrity of data stored in the EEPROM (Z27) during power-up and -down, the write operation
is disabled if VCC is at an invalid level.

* 0 ,
Because the voltage regulator Z15 uses its own reservoir capacitor the circuitry can oper-
ated 50 ms after power fails. The threshold voltage is defined by the resistors R63, R69
and R72 to +UB = 12VDC. A power fail situation is indicated by a low signal of PFO*.
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** '-
The board is operated by a Z84C15 IPC (Z25), which works with a 9.83MHz Crystal Oscil-
lator resulting in a system clock of 4.91MHz. The Intelligent Peripheral Controller is a
CMOS 8-bit microprocessor integrated with the CTC, SIO, PIO, CSG and the WDT into a
single 100-pin Quad Flat Pack package.

*0

*0 "
The board is assembled with an 128K*8-bit UV erasable EPROM, (Z21) with an access
time <= 150ns.
The address space is from 0 to EFFF (60K).

*0
The board is equipped with a 32K*8-bit Static CMos RAM (Z20) with an access time <=
85ns as data memory.
The address space is from F000 to FFFF (4K).
The nonvolatile 1Kbit Electrically Erasable PROM (Z17) organized as 128*8-bits is used to
store the installation constants. The circuit needs 5V only operation for programming, a
minimum of 100.000 (typical 1.000.000) valid Erase/Write cycles is specified. Data are en-
tered serially via the I/O-Ports of the processor by using two buttons S1, S2. Switching S3
from position “1” (programming) to position “2” (normal) initiates a store pulse to program
the data electrically.

*1 2/
The controller provides 48/110VAC, 24V (28V for NAO Advanced Fixtures) rectified alter-
nating voltage for the inputs and outputs of the printed circuit board and only these volt-
ages are used for the level converter of the logic board.
To get the correct information from the 24V inputs with high noise margin, the IPC samples
the inputs at the peak voltage 5ms (50Hz supply) or 4.17ms (60Hz supply) after the zero
level of the 24V supply. It is necessary to maintain the rectified sine-wave voltage because
the line synchronization of the IPC depends on the line zero crossing.
No smoothing capacitor is allowed in the 24VDC line!
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The LB_II provides a number of programmable opto-isolated inputs and relay contactor
outputs. They are intended to be used to read in the status of the safety chain and to con-
trol relais and switches. The signals of the position reference system are detected via 24V
level converter with a reference to GND (HL2). Address decoder and latches are used to
interface between the IPC and the I/O -level converters.
The outputs are not protected against short-circuits. After installation, before power-up,
each output has to be checked that it is correctly connected to the load. Input level con-
verters have to be protected against voltages above the maximum ratings.

*1 2/ 3 "
The LB_II provides the connections for the Call Buttons / TTLs 1 to 34. Only one common
pin per button and the corresponding tell tale light is needed, so that no additional wires
are necessary in case of upgrading from SAPB to DCL for service applications.
Each I/O pin for a call button/TTL is connected to an input level converter to detect the
calls. A output level converter in parallel switches the corresponding tell tale light.

*1 2/

Parameter Value Unit

Min Typ Max

high level input voltage 15.00 35.00 VDC

low level input voltage 5.50 VDC
Input impedance 19.00 KOhm
Input filter delay 0.20 ms
switching voltage 35.00 VDC
saturation voltage 0.45 VDC
output current 0.50 A
signal line length 300.00 m
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*1 4 02 5# 6
The discrete input level converters are used for all car and hall calls as well as for the sig-
nals /1LS, /2LS, IPU, IPD, DZ, DOB, ISS, LNS, /DOL, RUN and signals LWO, CTL, PKS,
FSS, /ANS, /DCB, NU, NUSD-1, NUG-1.

*1

Parameter Value Unit

Min Typ Max

high level input voltage 9.00 50.00 VDC

low level input voltage 3.00 VDC
Input impedance 5.00 KOhm
Input filter delay 0.50 ms
signal line length 300.00 m

*1* 4052 7#$ 6

Up to six discrete level converters circuits connected at P33/P3 convert the 48VAC or
110VAC signals to the appropriate logic levels.This level converter provides internal over-
voltage protection and opto-isolation between the safety chain voltage and the processor
circuitries.
The level converters are used for the signals /INS, /ES, DFC, DW, EDP, Down- and Up
Inspection Buttons on the logic board.
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*1* 4 7#8 " 6

Parameter Value Unit

Min Typ Max

high level input voltage 60.00 130.00 VAC

low level input voltage 0.00 50.00 VAC
high level input current 8.50 mA
low level input current 3.00 mA
Input impedance 19.00 KOhm
Input filter delay 20.00 ms
signal line length 300.00 m

*1* 405#8 " 6

Parameter Value Unit

Min Typ Max

high level input voltage 32.00 50.00 VAC

low level input voltage 0.00 12.00 VAC
high level input current 8.50 mA
low level input current 2.00 mA
Input impedance 8.00 KOhm
Input filter delay 10.00 ms
signal line length 300.00 m
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*10 / 02 5#
The outputs level converters at are controlled transistors they are Open Drain low side
switches. ( Active- connect load to HL1 )
The level converters are used for the outputs CDDL, CUDL, NDG, NUG, NUSD, REV, OLS,
and for 7-segment Position indicators. A separated voltage, 24VDC is provided at pin P1.3
of the LB_II which is only used to supply the position indicator.

*10 /
Parameter Value Unit

Min Typ Max

switching voltage 50.00 VDC

output current 0.50 ADC
voltage saturation 0.45 VDC
signal line length 300.00 m

*11 / 052 7#
The logic board provides 8 relay stages with contact-make for operate the main switches U,
D, T, G/ST, 1A, 2A, and the door switches DO, DC in the controller.

*11 /
Parameter Value Unit

Min Typ Max

switching voltage DC/AC 150.00 V

switching current @ 50DC 2.00 A

switching current @ 150VAC 3.00 A

power rating DC (resistive load) 100.00 W

power rating AC (resistive load) 500.00 VA
For additional information refer to relay specification document: OTIS Data Sheet No. 47.613.087
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*19 - &

*19 - )

*19
The phase sequence detector circuit performes a simple analog to digital conversion. It
generates a digital signal for each phase-to-phase voltage,optically decoupled from the
power line side. The operating software of the logic board will sample the signals U1, U2
and U3 to check for an incorrect phase sequence or missing phase voltages.

*19 *8 , - ( )
The Phase Sequence Sequence Detector was designed to operate on a 3 Phase power
line distribution system using a grounded neutral star point.

*19 * /& & " "

The Logic board_II was designed to meet the overvoltage category III according to VDE
0160, part 1, section 5.7.2.1, table 4 with an operating altitude of up to 3,600m.

*19 0 " ,
The creeping distances (VDE0110, part1, section 5.5, table 4) of the LB_II layout (6mm)
were designed based on pollution degree 3 (acc. to VDE 0110 part 1, section 4.2) using
320Veff. versus earth as reference voltage (VDE 0110, part1, section 5.1, table 3b).
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*19

A PTC or a series of PTCs can be connected to P12 to provide a software controlled shut
down of the elevator drive system if the machine is in an overload condition. The motor
protection (MP) interface measures the resistance of the PTCs in the motor windings. The
comparator Z14 generates the logic signal MP* depending on the temperature behavior of
the machine. An over-temperature is indicated by the LED ‘MP’ with a low level of the sig-
nal MP*. The circuit has a build-in hysteresis to allow the motor to cool down (point C to D)
before it can re-start.
See the diagram below for the switching points as a function of the PTC-resistance (tem-
perature).
You may also apply a relay contact (N.O.) or a contact of a thermo-switch (N.O.) to P12.
Note that the switching voltage is about 2.5VDC only.

Motor
Protection

D C
on
Hysteresis Switching Points
Units min. max.
A KOhm 1.2 1.6
B KOhm 2.4 3.2
U_PTC = 2.5VDC max.

off

A B PTC-Resistance
@ Temperature
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*19* + -

The DC brake current sensor measures the flow of current through the brake coil. The sig-
nal BC* is switched to the active high state, indicated by the LED ‘BC’, if the threshold cur-
rent BCthr is reached. A high level of BC* indicates a dropped-in brake and will be used to
initiate a software controlled stop of the run in order to avoid any damage on the
drive/brake system.
The current flow is into P13.1 and out P13.2. The maximum loss of voltage is limited by the
diodes D2, D6 and D7 to 3.0VDC. Diode D1 works as a protection in case of a wrong con-
nection of P13. The opto-coupler OC1 isolates the brake voltage.

Symbol Min. Typ. Max. Unit Note

BCthr 0.15 ADC 1

BCmax 4.00 ADC 1
BV 150.00 VAC 2
BVdrop 3.00 VDC
Note 1 : average rectified current
Note 2 : AC supply voltage
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*9 -

*9 :
Group functions with a second controller can be managed using the opto-isolated asyn-
chronus full duplex serial interface at P7. The receiver is opto-isolated with a 6N139 to
eliminate common noise. The RS-422 driver 75176 is protected against overvoltage spikes
by suppressor diodes. The connection length (twisted pairs) to the other controller is limited
by the data trasmission rate and degree of electrical noise. A party line concept is not pos-
sible.
Format : Receive / Trasmission rate = 16.2KHz
One message in 10ms (50Hz) / 8.4ms (60Hz)
8-bit + odd parity + 2 stop bits per character

*9 - &
An asynchronous full duplex RS-422 serial interface provides communication to an OTIS
Service Tool using a 9-pol. Sub-D connector (P14). The connection length to the SVT is
limited to 2.5 m.

* 9 * (% ;( % & "<
REM messages holding information about the current controller state are transmitted conti-
nously over the serial duplex lines. Thus elevator operation can be monitored from a re-
mote station and in case of problems or malfunctions diagnostics can be performed off site.
For a more detailed description the REM specification manual should be referenced.
P11 is connected to the transmit lines TxA and TxB of the Service Tool Interface. The RS-
422 driver is capable to drive both receivers in the SVT and in the REM master/slave si-
multaneously.
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*= ' '

There are three rows of 20 LEDs on the logic board. 14 LEDs show the actual state of im-
portant input signals ( IPU, IPD, DZ, /1LS, /2LS, DOB, RUN, ISS, LNS, /DOL, DW/LDR,
DFC, /ES, INS/ERO, UIB and DIB ).
The LED “VLC” shows, that the board is working and the discrete level converters are
enabled.
The LED “DUP” is on, if the serial data link with a second logic board works normally for
duplex operation.
The LED “MP” shows the motor in over-load state. The LED “BC” indicate not current flow
at the brake.
The 7_segment DIS1 on the board shows status and information of the installation pa-
rameters. Addresses and data are selected by means of two push buttons ( S1, S2 ).
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0 %:

Three assembly version of the LB_II, GAA21230 F1, -F2 and -F3 allow a cost optimized
solution for each controller type. The following tables show the I/O configuration of the ver-
sions and the logical I/O names.

0 $

External connections to the logic board are made with WAGO female connectors. WAGO
provides 2 wiring methods:
- Factory = Crimp-Snap-In Contacts.
- Field = Cage-Clamp Spring.
See table below for appropriate Otis Part No.

Location Cage_Clamp Spring Crimp-Snap-In Contact Connector Type

AWG 26-12 (0.08- AWG 26-14(0.14-1.5mm )

2

1.5mm )
2

OTIS Part No.

OTIS Part No.

P1, P4, P5 GAA447 FG 9 GAA447 FH 8 10-pins / 5mm pin-spacing

P2 GAA447 FG 5 GAA447 FH 5 12-pins / 5mm pin-spacing
P3, P33 GAA447 FJ 4 GAA447 FK 4 7-pins / 7.5mm pin-spacing
P6, P2_EB, P3_EB GAA447 FG 10 GAA447 FH 9 16-pins / 5mm pin spacing
P7, P8 GAA447 FG 2 GAA447 FH 2 4-pins / 5mm pin-spacing
P11, P12 GAA447 FG 1 GAA447 FH 1 2-pins / 5mm pin-spacing
P13 GAA447 FG 4 GAA447 FH 4 8-pins / 5mm pin-spacing
 OTIS Logic Board_II Part: 4 - AA3

European and Transcontinental

( LB_II ) No.: GBA21230F
Vintage: 01 / 1
Operations
Page: 21 / 29
Engineering Center Basic Data Date: 11-Oct-2005
Berlin

0 "

0 ,

P1
Koding Pin-No. Function Versions
Key F1 F2 F3
1 MLB + + +
2 GND + + +
+ 3 24V ( PI ) + + +
4 24V + + +
5 12VAC + + +
6 12AC + + +
7 110VAC + + +
8 110VAC + + +
9 not connected
10 HL1 + + +
“+” / “-” = yes/not available

P4
Koding Pin-No. Function Versions
Key F1 F2 F3
1 /DOL + + +
2 ISS + + +
3 LNS + + +
4 LV2 or RUN + + +
+ 5 DOB + + +
6 LV1 or DZ + + +
7 IPD + + +
8 IPU + + +
9 /2LS + + +
10 /1LS + + +
“+” / “-” = yes/not available
 OTIS Logic Board_II Part: 4 - AA3

European and Transcontinental

( LB_II ) No.: GBA21230F
Vintage: 01 / 1
Operations
Page: 22 / 29
Engineering Center Basic Data Date: 11-Oct-2005
Berlin

0 * - 8 7#

P3
Koding Pin-No. Function Versions
Key F1 F2 F3
1 UIB + + +
2 /ES + + +
+ 3 DIB + + +
4 DFC + + +
5 /INS + + +
6 EDP or DW + + +
7 CRTN (HL1) + + +
“+” / “-” = yes/not available

0 0 - 805#

P33
Koding Pin-No. Function Versions
Key F1 F2 F3
1 UIB + - +
2 /ES + - +
3 DIB + - +
4 DFC + - +
+ 5 /INS + - +
6 EDP or DW + - +
7 CRTN (HL1) + - +
“+” / “-” = yes/not available
 OTIS Logic Board_II Part: 4 - AA3

European and Transcontinental

( LB_II ) No.: GBA21230F
Vintage: 01 / 1
Operations
Page: 23 / 29
Engineering Center Basic Data Date: 11-Oct-2005
Berlin

0 1 /

P2
Koding Pin-No. Function Versions
Key F1 F2 F3
1 /1A + + +
2 /DO + + +
3 /U + + +
4 /D + + +
5 /G or /ST + + +
6 /T or SR + + +
7 /2A + + +
8 /DC + + +
9 GND + + +
10 not connected
11 Support-Pin + + +
12 Support-Pin + + +
“+” / “-” = yes/not available

0 9 '

P5
Koding Pin-No. Function Versions
Key F1 F2 F3
1 /G or XDHL + + +
2 /E or INH + + +
3 /C + + +
4 /F or XUHL + + +
5 /b + + +
6 /C or D2 + + +
+ 7 /A or D0 + + +
8 /D or D3 + + +
9 /B or D1 + + +
10 /g + + +
“+” / “-” = yes/not available
 OTIS Logic Board_II Part: 4 - AA3

European and Transcontinental

( LB_II ) No.: GBA21230F
Vintage: 01 / 1
Operations
Page: 24 / 29
Engineering Center Basic Data Date: 11-Oct-2005
Berlin

0 = ' "

P6
Koding Pin-No. Function Versions
Key F1 F2 F3
1 /B /TTL 10 + + +
2 /B /TTL 12 + + +
+ 3 /B /TTL 14 + + +
4 /B /TTL 16 + + +
5 /B /TTL 9 + + +
6 /B /TTL 11 + + +
7 /B /TTL 13 + + +
8 /B /TTL 15 + + +
9 /B /TTL 2 + + +
10 /B /TTL 3 + + +
11 /B /TTL 6 + + +
12 /B /TTL 5 + + +
13 /B /TTL 7 + + +
14 /B /TTL 8 + + +
15 /B /TTL 4 + + +
16 /B /TTL 1 + + +
“+” / “-” = yes/not available

0 5 :

P7
Koding Pin-No. Function Versions
Key F1 F2 F3
1 RxA + + +
+ 2 RxB + + +
3 TxB + + +
4 TxA + + +
“+” / “-” = yes/not available
 OTIS Logic Board_II Part: 4 - AA3

European and Transcontinental

( LB_II ) No.: GBA21230F
Vintage: 01 / 1
Operations
Page: 25 / 29
Engineering Center Basic Data Date: 11-Oct-2005
Berlin

0 > '

P8
Koding Pin-No. Function Versions
Key F1 F2 F3
1 nc + + +
2 /CUDL + + +
3 /CDDL + + +
+ 4 not connected + + +
“+” / “-” = yes/not available

0 7 (

P11
Koding Pin-No. Function Versions
Key F1 F2 F3
1 TxA + + +
2 TxB + + +
“+” / “-” = yes/not available

P12
Koding Pin-No. Function Versions
Key F1 F2 F3
1 PTC + - +
+ 2 RTN + - +
“+” / “-” = yes/not available
 OTIS Logic Board_II Part: 4 - AA3

European and Transcontinental

( LB_II ) No.: GBA21230F
Vintage: 01 / 1
Operations
Page: 26 / 29
Engineering Center Basic Data Date: 11-Oct-2005
Berlin

0 - ) ' + -

P13
Koding Pin-No. Function Versions
Key F1 F2 F3
1 BC_IN + - +
2 BC_OUT + - +
3 nc + - +
4 U1 + - +
5 nc + - +
6 U2 + - +
7 nc + - +
8 U3 + - +
“+” / “-” = yes/not available

0 * - &

P14
Koding Pin-No. Function Versions
Key F1 F2 F3
1 VCC + + +
2 VCC + + +
3 SVTTxB + + +
4 SVTRxA + + +
5 GND + + +
6 VCC + + +
7 SVTTxA + + +
8 SVTRxB + + +
9 GND + + +
“+” / “-” = yes/not available
 OTIS Logic Board_II Part: 4 - AA3

European and Transcontinental

( LB_II ) No.: GBA21230F
Vintage: 01 / 1
Operations
Page: 27 / 29
Engineering Center Basic Data Date: 11-Oct-2005
Berlin

0 0 $'' 2/

P2_EB
Koding Pin-No. Function Versions
Key F1 F2 F3
1 /NUG-1 + + -
2 /NUSD-1 + + -
3 /NU + + -
4 EFO or FSS + + -
+ 5 CTL or PKS + + -
6 LWO + + -
7 nc
8 nc
9 /NDG + + -
10 /OLS + + -
11 /NUSD + + -
12 /NUG + + -
13 /B /TTL 34 + + -
14 /REV + + -
15 Reserve + + -
16 /B /TTL 33 + + -
“+” / “-” = yes/not available
 OTIS Logic Board_II Part: 4 - AA3

European and Transcontinental

( LB_II ) No.: GBA21230F
Vintage: 01 / 1
Operations
Page: 28 / 29
Engineering Center Basic Data Date: 11-Oct-2005
Berlin

0 1 $'' ' "

P3_EB
Koding Pin-No. Function Versions
Key F1 F2 F3
1 /B /TTL 26 + + -
2 /B /TTL 28 + + -
3 /B /TTL 30 + + -
4 /B /TTL 32 + + -
5 /B /TTL 25 + + -
6 /B /TTL 27 + + -
+ 7 /B /TTL 29 + + -
8 /B /TTL 31 + + -
9 /B /TTL 18 + + -
10 /B /TTL 19 + + -
11 /B /TTL 22 + + -
12 /B /TTL 21 + + -
13 /B /TTL 23 + + -
14 /B /TTL 24 + + -
15 /B /TTL 20 + + -
16 /B /TTL 17 + + -
“+” / “-” = yes/not available
 OTIS Logic Board_II Part: 4 - AA3

European and Transcontinental

( LB_II ) No.: GBA21230F
Vintage: 01 / 1
Operations
Page: 29 / 29
Engineering Center Basic Data Date: 11-Oct-2005
Berlin

1 "
The Logic Board II (LB_II) GBA 21230 F2 will be replace the Logic Board (LB) D9673 T and the

Extension Board (EB) A9673 W.