Operational Amplifier

Learning objectives:

• To understand the general op-amp circuit design

• To understand the ideal op-amp
• To understand inverting and Non-inverting amplifier
• To understand differential amplifier
• To understand cascaded differential amplifier
Operational Amplifier
Basics
 Operational amplifier

• Operational amplifier is a voltage control device or

voltage control voltage source (VCVS).
• Op-Amp is a multi stage amplifier.
• Operational amplifier (Op-amp) is made of many
transistors, diodes, resistors and capacitors in
integrated circuit technology.
• The name “operational amplifier” comes from the
fact that they were originally used to perform
mathematical operations such as integration and
differentiation
 Cont.…

Op-amps are used as generic “black box” building blocks in much

analog electronic design
• Amplification
• Analog filtering
• Buffering
• Threshold detection

• An Operational Amplifier (Op-Amp) is an integrated circuit

that uses external voltage to amplify the input through a very
high gain
Symbol of ideal and practical op-amp

Fig:- Ideal op-amp

Cont.…
An Electrical Representation of Op-Amp
Voltage Gain and transfer characteristics

Fig:- Transfer characteristics

 Operational Amplifier (OP AMP)
Basic and most common circuit building
device. Ideally,
1. No current can enter terminals V+ or V-.
A
Called infinite input impedance.
2. Vout=A(V+ - V-) with A →∞
Vo = (A V + - A V )
3. In a circuit V+ is forced equal to V-. This
-
= A (V+ - V )
-
is the virtual ground property
4. An opamp needs two voltages to
power it Vcc and -Vee. These are called
the Biases.
 Important points
1. It is a monolithic IC or a semiconductor chip fabricated with
VLSI by using epitaxial method.
2. In epitaxial method , entire IC is fabricated on a single crystal
of Si.
3. It is basically a Voltage controlled device or voltage amplifier
or VCVS.
4. Popularly used op-amp is IC-741, maximum power supply is +
15V.
5. It is originally invented to execute the mathematical
operations, hence called op-amp.
6. It is direct coupled high gain amplifier i.e open loop gain is
very high.
 Basic Block Diagram of Op-Amp
An Op-Amp can be conveniently divided in to four main blocks
1. An Input Stage or Input Diff. Amp.
2. Gain or Intermediate Stage
3. Level Shifting Stage
4. Output Stage

V1 Out put
Input Stage Gain Stage Level
I/P Shifter Stage VO
(Diff. Amp.) (CE Amp.)
V2 (Buffer)

Op-Amp IC
Op-amp pin diagram
 Basic Specifications
1. Input Offset Voltage
Input offset voltage is the voltage that is applied between
the two input terminals of the op-amp to null the output. The
figure is show below.
 Cont.…
2. Input Offset Current
Input Offset Current is the algebraic difference between
the currents into the inverting and non-inverting terminals.

Note:-The maximum input offset current value for 741 IC is

200nA. This value decreases as the matching between the two
input terminals is improved and may reduce down to almost
6nA.
 Cont.…
3. Input Bias Current
• Input bias current is the average value of the inverting and non-
inverting current.
• Input Bias Current, IB = (IB1 + IB2)/2
• Note:-Maximum input bias current is 500nA and minimum value
is ±7nA.
 Cont.…
4. Differential Input Resistance
• Differential Input Resistance is the equivalent resistance that
is measured from any one of the input terminals by keeping
the other terminal connected to ground.
• Note:-The value for 741 IC may go as high as 2 Megaohms.

5. Input Capacitance
• Input Capacitance is the equivalent capacitance that is
measured from any one of the input terminals by keeping
the other terminal connected to ground.
• Note:- The typical value for 741 IC is 1.4pF.
 Cont.…
6. Offset Voltage Adjustment Range
• The op-amp has pins 1 and 5 marked as offset null to determine the
offset voltage adjustment range.
• Can be adjusted by connecting a 10K POT. between the pin 1 and pin 5
and the wiper of the port should be connected to the ground.
• By changing the POT value, the output offset voltage can be reduced to
0V without applying any input.
• The range through which the POT is varied to get the input offset
voltage is the offset voltage adjustment range.
• Note:-For a 741 IC, typical value is ±15mV.
 Cont.…
7. Input Voltage Range

• The same voltage when applied to both the input terminals, is

called the common mode voltage and the op-amp is said to
have a common mode configuration.

• Note:- The input voltage range for a 741 IC is ±13V. This

indicate that the common mode voltage for a 741 IC can be as
high as +13V and as low as -13V without disturbing the proper
working of the IC.
 Cont.…
8. Common Mode Rejection Ratio (CMRR)

• CMRR is the ratio of the differential voltage gain to the

common mode voltage gain.

AD
CMRR 
ACM
• If the value of CMRR is high, there is better matching between
the 2 input terminals.

• Note:-For 741IC, CMRR is 90dB.

 Cont.…
9.Supply Voltage Rejection Ratio (SVRR)

• The change in the op-amp’s input offset voltage caused by

variations in supply voltage is called SVRR.

dVIO
SVRR 
dV

• Note:-For 741 IC, SVRR = 150µV/V. The lower the value of

SVRR, the better will be the op-amp performance.
 Cont.…
10. Large Signal Voltage Gain

• Large signal voltage gain is the ratio between the output

voltage and the voltage difference between the two input
terminals.
VO
A
VId

• Note:-Typical values of large signal voltage gain for 741 IC is

200,000.
 Cont.…
11. Output Voltage Swing
• The output voltage swing of the 741 IC is a 26 volt peak-to-
peak undisturbed as sine wave for ac input signals, for a load
resistance value greater than or equal to 2 kΩ.
• This range shows the values of positive and negative
saturation voltages of op-amp.
• The op-amp voltage swing value will not be greater than the
supply voltage +VCC and –VEE.
12. Output Resistance
• Output Resistance is the equivalent resistance that is
measured between the output terminal (Pin 6) and Ground.
• Note:-Typical values of output resistance of 741 IC is 75ohms.
 Cont.…
13. Output Short Circuit Current
• The op-amp has a short circuit protection built in for a certain
ancient value.
• Nobody would knowingly connect the output of the op-amp
to the ground.
• if something like that is done accidentally, the current flowing
through will have a high value. This is why short circuit
protection is provided.

• Note:-For 741 IC, this value is 25mA. But, for a higher current
the IC will fail.
 Cont.…
14. Supply Current
• The supply current is the current drawn by the IC from the
power supply.

• Note:-Typical value of supply for 741 IC is 2.8mA.

15. Power Consumption

• For the 741 IC to operate properly, a certain amount of
quiescent power must be consumed by the op-amp and this
power is called power consumption.

• Note:- Typical value is 85mW.

 Cont.…
16. Transient Response
• Transient response is a very important factor that is used for selecting an
op-amp in ac applications.
• Transient response along with steady state response constitutes that total
response of a practical network to a given input.
• The response portion where a fixed value is attained right before the
output is called transient response. Once reached, this fixed value remains
at that level and is thus called the steady state. The steady state response
does not depend on time and transient response is time invariant.
• Characteristics of transient response includes rise time and percentage of
overshoot.
• Transient response is inversely proportional to the unity gain bandwidth
of op-amp.
• The bandwidth will be high when the value of rise time is low.
 Cont.…
17. Slew Rate (SR)
• Slew Rate is one of the most important parameters for
selecting op-amps for high frequencies.
• SR is the maximum rate of change of output voltage per unit
of time and is expressed in volts per microseconds.
dVO
SR 
dt max imum

• Note:-In the case of the 741 IC the slew rate is 0.5V/µs, which
is very small.
 An IDEAL OP AMP
An ideal op amp has the following characteristics:

1. Infinite open-loop voltage gain, AV ≈ ∞.

2. Infinite input resistance, Ri ≈ ∞.
3. Zero output resistance, Ro ≈ 0.
4. Infinite CMRR, ρ =∞
5. The output voltage Vo=0; when Vd = V2-V1 = 0
6. Change of output with respect to input, slew rate = ∞
7. Change in out put voltage with Temp., ∂Vo/∂Vi=0
8. Infinite Bandwidth so that signal ranging from 0 to ∞ Hz to
can be amplified without attenuation
Equivalent Circuit of the Ideal Op Amp
 OP-AMP CHARACTERISTICS
1. SUPPLY VOLTAGE:
• Two types of supply are used for op amps, the dual and single
supply. Many op amps, especially older types use a dual supply
(+VS and -VS) often in the 12 to 18V range. This allows a zero
difference between the input terminals to produce a 0V output and
an output signal to swing both positive and negative with respect to
ground.

• Single voltage supplies have grown in popularity with the increase

in portable (battery operated and/or automotive) devices where
dual supplies, using multiple batteries are more expensive to
implement. A zero difference between the input terminals on these
devices will produce an output at half supply, allowing an output
signal to swing between supply and ground.
 Cont.…
2. FREQUENCY RESPONSE:
• Frequency response, in the ideal should be infinite, it will
amplify any and all frequencies equally.
• In practical amplifiers this is difficult/impossible to achieve,
and not always desirable, but op amps have extremely wide,
and easily variable bandwidths.
3. OPEN LOOP VOLTAGE GAIN:
• The open loop gain (with no feedback) at very low frequencies
is huge.
• Voltage gain is inversely proportional to the applied
frequency.
 Cont.…

Fig:-Typical Op Amp Frequency Response

 Cont.…
6. GAIN BANDWIDTH PRODUCT:
• Gain bandwidth product is always constant.
G*BW=Constant
• Either increase gain or bandwidth, both not possible to
increase at a same time.
 The 741 Op-Amp Circuit

• Schematic diagram of OP-AMP consists:

• The input stage
• The intermediate stage
• The output stage
• The biasing circuits
LM741 Operational Amplifier: Circuit
Architecture
 General Description

• 24 transistors, few resistors and only one capacitor

• Two power supplies
• Short-circuit protection
 The Input Stage

• The input stage consists of transistors Q1 through Q7.

• Q1-Q4 is the differential version of CC and CB configuration.
• High input resistance.
• Current source (Q5-Q7) is the active load of input stage. It
not only provides a high-resistance load but also converts
the signal from differential to single-ended form with no loss
in gain or common-mode rejection.
 The Intermediate Stage

• The intermediate stage is composed of Q16, Q17 and Q13B.

• Common-collector configuration for Q16 gives this stage a
high input resistance as well as reduces the load effect on
the input stage.
• Common-emitter configuration for Q17 provides high
voltage gain because of the active load Q13B.
 The Output Stage

• The output stage is the efficient circuit called class AB output

stage.
• Voltage source composed of Q18 and Q19 supplies the DC
voltage for Q14 and Q20 in order to reduce the cross-over
distortion.
• Q23 is the CC configuration to reduce the load effect on
intermediate stage.
 The Output Stage

(a)The emitter follower is a class A output stage.

(b)(b) Class B output stage.
The Output Stage
• Wave of a class B output stage fed with
an input sinusoid.
• Positive and negative cycles are unable
to connect perfectly due to the turn-on
voltage of the transistors.
• This wave form has the nonlinear
distortion called crossover distortion.
• To reduce the crossover distortion can
be implemented by supplying the
constant DC voltage at the base
terminals.
The Output Stage

• QN and QP provides
the voltage drop which
equals to the turn-on
voltages of QN and QP.
• This circuit is call Class
AB output stage.
 Short-circuit protection

• Short-circuit protection circuitry

Forward protection is implemented by R6 and
Q15.
Reverse protection is implemented by R7, Q21,
current source(Q24, Q22) and intermediate stage.
 The Biasing Circuits
• Reference current is generated by Q12, Q11 and R5.
• Wilder current provides biasing current in the order of μA.
• Q13B provides biasing current for intermediate stage, Q13A for
output stage.
• Q5, Q6 and Q7 is composed of the current source to be an
active load for input stage.
 Characteristics of operational amplifier
Characteristics Ideal op-amp Practical op-amp

Voltage gain, Av ∞ 10⁶

Input resistance, Ri ∞ 1MΩ

Output resistance, Ro 0 10-100 Ω

G*Bw ∞ 10⁶ Hz

BW ∞ 10⁶ Hz (For gain = 1)

CMRR ∞ 10⁶ or 120 dB

Slew Rate ∞ 80 V/μsec

 The Concept of the Virtual Short

• The op-amp with negative feedback forces the two inputs v+ and v- to
have the same voltage, even though no current flows into either input.

 This is sometimes called a “virtual short”

 As long as the op-amp stays in its linear region, the output will
change up or down until v- is almost equal to v+

 If vIN is raised, vOUT will increase just enough so that v- (tapped

from the voltage divider) increases to be equal to v+ (= vIN)

In vIN is lowered, vOUT lowers just enough to make v- = v+

 The negative feedback forces the “virtual short” condition to occur

 OP-AMP: COMPARATOR
Vout=A(Vin – Vref)
If Vin>Vref, Vout = +∞ but practically hits +ve
power supply = Vcc
If Vin<Vref, Vout = -∞ but practically hits –ve
A (gain) power supply = -Vee
very high

• Compare the voltage of one input with the voltage with other input
• Two types:
• Inverting Comparator when the reference voltage apply to the inverting
terminal
• Non Inverting Comparator when the reference voltage apply to the non
inverting terminal
Cont.…
 Cont.…
Zero-Level Detection
 When Vin> VREF ( Sine wave is positive)
• Vd = Vin- VREF
• Vd > 0V
• Vout = + Vout(max)
 When Vin<VREF ( Sine wave is negative)
• Vd = Vin- VREF
• Vd < 0V
• Vout = - Vout(max)
 Cont.…
Q.
 Cont.…
Q. Refer to the given figure. With the inputs shown, determine the
output voltage.

A. 7 V
B. –7 V
C. +Vsat
D. –Vsat
 OPAMP: VOLTAGE FOLLOWER

V+ = VIN.
By virtual ground, V- = V+
Thus Vout = V- = V+ = VIN
(a) The unity-gain buffer or follower amplifier.
(b) Its equivalent circuit model. 55
Inverting amplifier
 Inverting amplifier: configuration

• The positive input is

grounded.
• A “feedback network”
composed of resistors R1
and R2 is connected
between the inverting
input, signal source and
amplifier output node,
respectively.
 Inverting amplifier: Voltage gain
• The negative voltage gain
implies that there is a 1800
phase shift between both dc
and sinusoidal input and
output signals.
• The gain magnitude can be
greater than 1 if R2 > R1
• The gain magnitude can be less
than 1 if R1 > R2
• The inverting input of the op
amp is at ground potential
(although it is not connected
directly to ground) and is said
to be at virtual ground.
Cont.…
 Inverting Amplifier: Input and Output
Resistances
• Rout is found by applying a test current (or voltage) source to
the amplifier output and determining the voltage (or
current) after turning off all independent sources. Hence, vs
=0
 Cont.…

Since v- = 0, i1=0. Therefore vx = 0 irrespective of the

value of ix .
 Cont.…
Q. Write the transfer function (input/output equation) for an operational
amplifier with an open-loop voltage gain of 100,000, and the inverting
input connected directly to its output terminal. In other words, write an
equation describing the output voltage of this op-amp (Vout) for any given
input voltage at the non-inverting input (Vin(+)):

Then, once you have an equation written, solve for the over-all voltage
gain (AV = [(Vout)/(Vin(+))]) of this amplifier circuit, and calculate the
output voltage for a non-inverting input voltage of +6 volts.
 Cont.…
solution:-
Vout  100000(Vin (  )  Vout )
100000
Av   0.99999
100001
for an input voltage of  6V, the output voltage will be  5.99994V.

Note:-The over-all voltage gain of the op-amp radically attenuated from 100,000
to approximately 1. What is not so evident is just how stable this new voltage gain is,
which is one of the purposes for employing negative feedback.
Non-Inverting amplifier
Non-Inverting Configuration

• The non-inverting configuration.

• Series-shunt negative feedback.
Non-Inverting amplifier
 NON – INVERTING AMPLIFIER

1. V- = V+
2. As V+ = VIN, V- = VIN
3. As no current can enter V-
and from Kirchhoff's 1st
law, I1=I2.

4. I1 = VIN/R1
5. I2 = (VOUT - VIN)/R2 => VOUT = VIN + I2R2
6. VOUT = I1R1 + I2R2 = (R1+R2)I1 = (R1+R2)VIN/R1
7. Therefore VOUT = (1 + R2/R1)VIN
 Cont.…
Q. Calculate the overall voltage gain of this amplifier circuit
(AV), both as a ratio and as a figure in units of decibels (dB).
Also, write a general equation for calculating the voltage gain
of such an amplifier, given the resistor values of R1 and R2:
 Cont.…
Solution:-
Av  2  6.02
Rf
Av  1  (exp ressed as a ratio, not dB)
R1
Av (dB )  20 log(2)  6.02
Differential amplifier
 “Humming” Noise in Audio Amplifier
• Consider the amplifier below which amplifies an audio signal
from a microphone.
• If the power supply (VCC) is time-varying, it will result in an
additional (undesirable) voltage signal at the output,
perceived as a “humming” noise by the user.
 Supply Ripple Rejection
• Since node X and Y each see the voltage ripple, their voltage
difference will be free of ripple.

v X  Av vin  vr
vY  vr
v X  vY  Av vin
 Ripple-Free Differential Output
• If the input signal is to be a voltage difference between two
nodes, an amplifier that senses a differential signal is
needed.
 Common Inputs to Differential Amp.
• The voltage signals applied to the input nodes of a
differential amplifier cannot be in phase; otherwise, the
differential output signal will be zero.

v X  Av vin  vr
vY  Av vin  vr
v X  vY  0
 Differential amplifier
• Differential amplifier amplifies
the difference between two
input signals V1 and V2.
• Also referred to as a difference
amplifier.
• An arrangement of transistors
which allows the difference
between two signals source to
be amplified.
• The output is proportional to the
difference between these two
inputs.
• The best direct coupled stages
available to the IC designer.
Differential amplifiers are used in low and high frequency amplifiers,
analog modulators and digital logic states.
 DC analysis of differential amplifier
• For the DC analysis of differential amplifier circuit, all inputs
are set to zero as shown
 Modes of operation of differential
amplifier
Three possible input signal combination for differential
amplifier:
• Single ended mode – an active signal is applied to only one
input while the other is grounded.
• Differential mode – two opposite polarity active signals are
applied to the amplifier.
• Common mode
- Two signals of the same amplitude, frequency and phase
are applied to the differential amplifier.
- The output of the amplifier is ideally zero when
measured the difference between the output terminals.
 Definition

The input is applied and the output is

measured at one of the output
terminal.

The input is in differential mode and

the output is measured between the
differences of two output terminals.
Single ended differential amplifier
+VCC

RC RC

V0

Q1 Q2 Vi2=
+
0
Vi1
-
RT
-VEE

The input signal is applied to one

input with the other input is
connected to the ground.
 VO1 VO2
βIb
βIb
+
re RC RC re
VI1
-

RT

The ac equivalent circuit of single ended differential

amplifier
  VT
Assume: Ib1  Ib2  Ib , re 
I CQ
and β1  β 2  β
Assume R T is very large and using KVL we obtain
Vi1 - 2Ibre  0
Vi1  2Ibre
The output at the collector will be
Vo  -  IbR C
Therefore,
Voltage gain,
VO RC
Av  
Vi  V 
2 T 

 ICQ 
 Differential Mode
+VCC
The mode of this
operation is assumed
by letting a single sine RC RC
wave signal is
connected between the V0
two inputs (Double
ended differential Q1 Q2
amplifier circuit). + +
Vi1 Vi2
- -
RT
-VEE
 The ac equivalent circuit of differential mode

VO1 VO2
βIb
βIb +
+
re RC RC re VI2
VI1 -
-

RT
 Cont.…
Similarly as for the single ended operation,
Assume R T is very large and it becomes open circuit
Vi1 - Vi 2  Ibre  Ibre
Vi1 - Vi 2  Vd
Therefore, Vd  2Ibre
The output at the collector terminal,
Vo  -  IbR C
Therefore,
Differential voltage gain,
VO RC
Av  
Vd  VT 
2 

 ICQ 
Input impedance of differential amplifier

Vd
Input impedance Zi(diff ) 
Ii
Vd  2Ibre
and Ii  Ib
Therefore,
Zi(diff)  2re
 Common mode operation
• The same input signal is applied
to the two input terminals of + V CC
differential amplifier with the
same magnitude and phase. RC RC
• An ac connection showing
common input to both V 01
transistors. V CM
Q1 Q2
Ideal differential amplifier
• The output voltage Vo is
expected to be zero. R T
• Because the difference between - V EE
the two outputs at each collector
is opposite to each other and
they are cancels out each other.
 Cont.…
However… +VCC
practically there is an output at
the collectors but the value is RC
small.
To analyze, V01
Q1
• we treat the amplifier as
symmetry, that is RT is made +
VCM 2RT
to be parallel and be -
replaced with 2RT.
-VEE
 Cont.…
To determine the common mode gain, the ac equivalent circuit.
V V
CM o

re βIb

R
C
VCM  Vi  Ibre  IE 2R T 2R
T
 VT 
  Ib   2R T 
I 
 CQ 
and Vo  -  IbRC
Therefore, the common mode gain, A CM of the
differenti al amplifier,
VO RC R
A CM    C
Vi VT 2R T
 2R T
I CQ
 Common mode rejection ratio
The ratio of the magnitude of its differential gain, Ad to
the magnitude of its common mode gain, ACM.

Ad
CMRR 
A CM
The value of the CMRR is often given in dB,
Ad
CMRR (dB)  20 log10
A CM
 Question
The circuit given in Figure has the following parameters:
– hfe1 = hfe2 = 120, VT = 26mV, VBE1 = VBE2 = 0.7V
+10V

• Calculate: 3.9kΩ 3.9kΩ

– ICQ1, ICQ2 and VCE1
– Differential gain, Ad Vi1
V01
Vi2
– Common mode gain, ACM Q1 Q2

– CMRR in dB
– Differential input impedance, Zi(diff) 5.6kΩ
– Output impedance, Zo
-10V
 Cont.…

DC analysis:
• Since VB = 0, VE = -0.7V
• Using KVL around loop A:
VE – IERE + 10V = 0

• Then IE  10  VE  10  (-0.7)  1.66mA

RT 5.6k
 Cont.…
a) ICQ1, ICQ2  IE  0.83mA
2
VCE1  VCC - IC1RC1 - VE  0
 10  (0.83m)(3. 9k)  ( 0.7)
 7.46V
b) From the ac equivalent circuit of differential mode:
VO RC VT 26mV
Ad   ; but   31.32Ω
Vd  VT  IC 0.83mA
2 
 IC 
3.9k
Then A d    62.26
2(31.32)
 Cont.…
c) From the ac equivalent circuit of common mode:
VO RC
ACM  
Vi VT
 2R T
IC
3.9k
   0.35
31.32  2(5.6k)
Ad 62.26
d) CMRR(dB)  20log 10  20log 10  45dB
A CM 0.35
 VT 
e) Zi(diff)  2   2(120)(31. 32)  7.5kΩ
 IC 
f) ZO  RC  3.9kΩ
• Good differential amplifier should have high CMRR

• Ad
 CMRR 
A CM 
• High CMRR means the differential amplifier circuit has the
ability to reject common mode signal (noise).

• Ideally, ACM = 0 not amplify the noise signal.

• In practical way there is still small signal at the output
of common mode signal.
• to  CMRR, we have A CM 
 RC
 A CM 
VT
 2R T 
IC
• To reduce common mode gain, A CM  we can increase RT 
• Popular method to increase  R T is by using : Constant
Current Source
• Practical current source is a current supply with a
resistance.
 Constant current source
• An ideal current source, R=∞
• Whereas practical current source resistance, R is very large.
• An ideal current source provides a constant current regardless of
the load connected to it.

Practical Current
Source

IT RT
 Cont.…
• An op-amp has an open-loop gain of 90,000. Vsat = ±13 V. A
differential voltage of 0.1 V p-p is applied between the
inputs. What is the output voltage?
A.13 V
B.–13 V
C.13 Vp-p
D.26 Vp-p
 Cont.…
Q. For the differential amplifier of Figure 5.15, determine the
following:
+15V
a) ICQ, VCEQ
b) ACM 4.7kΩ 4.7kΩ

c) Ad V
V 0
Vi2
i1
Q Q
d) CMRR in dB 1 2

e) Differential input impedance, Zi(diff) 1.5kΩ

f) Output impedance, Zo Q 3

Given: rce = 1/1μS 1.2kΩ

β1 = β2 = β3 = 150
-15V
VT = 26mV
Figure 5.15
 Cont.…
a)DC analysis:
VZ  VBE
IE3   3.67mA
RE
IE3
ICQ   1.84mA
2
VCEQ  VC - VE
 VC - ICQR C - VE
 7.05V
VT
and  14.1Ω
ICQ
 Cont.…
VO - RC RC
b) ACM   -
Vi VT 2R
 2R T T
IC
Where R T  rce 3 1   
Then R T  80.635 MΩ
Therefore A CM  - 29.14  10 -6
 Cont.…
VO RC
c) Ad    -166.67
Vd  VT 
2 
 IC 
d) Ad
CMRR(dB)  20log10  135.147dB
A CM
e) Zi(diff)  2r  4.23kΩ
f)
ZO  RC  4.7kΩ