Lab Manual:

Digital Electronics
Using the Digilent Digital Electronics Board for NI ELVIS III

Lab 5: Karnaugh Maps

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Lab 5: Karnaugh Maps
The Karnaugh map (K-map) is a tool and procedure used for minimizing Boolean
functions. It is a graphical method that can be used for the manual design of simple
logic functions having a small number of variables. K-mapping usually requires fewer
steps than algebraic simplification and it always produces a minimum expression.

The Karnaugh map of a function is actually its truth table written as a grid. The rows and
the columns of the map correspond to the possible values of the inputs and each cell
represents the outputs of the function for the correlated inputs.

The simplified expressions are always in one of the two standard forms:

 Sum-of-Products
 Product-of-Sums

The cells are formed in a square or rectangle fashion and arranged such that
neighboring cells have a single variable difference, otherwise known as Gray code
ordering. For simplicity, the input values are placed as column and row labels. Each cell
corresponds to a row in the truth table.

Figure 1-1 Truth Table

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Learning Objectives

In this lab, students will:

1. Simplify a Boolean expression using Karnaugh maps

2. Use a circuit with inputs to derive:

o The output experimentally and using Boolean algebra

o The Karnaugh map
o Simplified Combinational Logic Circuit

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Required Tools and Technology
Platform: NI ELVIS III  View User Manual:
http://www.ni.com/en-
us/support/model.ni-elvis-
iii.html
 View Tutorials:
https://www.youtube.com/playl
ist?list=PLvcPIuVaUMIWm8zi
aSxv0gwtshBA2dh_M

Hardware: Digilent Digital Electronics  View NI DSDB Board Manual:

Board for NI ELVIS III http://www.ni.com/pdf/manuals
/376627b.pdf

Software: NI Multisim 14.0.1 Education  Install Multisim:

Version or newer http://www.ni.com/gate/gb/GB
_ACADEMICEVALMULTISIM/
US
 View Help:
http://www.ni.com/multisim/tec
hnical-resources/

Software: NI LabVIEW FPGA Vivado  Install:

2014.4 http://www.ni.com/download/la
bview-fpga-module-2015-
sp1/5920/en/

Note: Digilent Driver (The installer

above automatically downloads the
installer below onto your computer)

 Navigate to:
C:\NIFPGA\programs\Vivado2
014_4\data\xicom\cable_driver
s\nt64\digilent
 Install: install_digilent.exe

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Expected Deliverables

In this lab you will collect the following deliverables:

 Boolean expressions
 Analysis of gates for Combinational Logic Circuits
 Truth tables
 Conclusion questions

Your instructor may expect you to complete a lab report. Refer to your instructor for
specific requirements or templates.

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1.1 Theory and Background

Figure 1-2 Video. View the video here: https://youtu.be/hVifB2hvJic

Video Summary

 Karnaugh maps (K-maps) are used to simplify Boolean functions

 Simplified Boolean functions mean the number of logic gates needed is
minimized
 K-maps are built by taking a truth table and converting it into a grid
 K-maps are useful if the logic functions have a small number of variables

After transferring the truth table to a Karnaugh map, cells with common output values,
either all 0s or all 1s, are grouped into the largest possible rectangles. Cells are grouped
in functions of 2n either horizontally or vertically. Cells can be used more than once only
if this generates the least number of groups. Also, all cells sharing the chosen common
output must be contained within a grouping.

The groups generated can be converted to a Boolean expression. Each group

represents a minimal minterm (1s) or maxterm (0s). The term is minimized by
eliminating variables whose non-inverted and inverted forms appear within the same
cell group. The terms left are then converted to a Boolean expression and used to
derive an SOP or POS expression, which may then be converted to a combinational
logic circuit.

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When choosing the POS form, the variable combination is supposed to equal 0, as is
the case when deriving a POS from a truth table. Therefore, the variable’s inverse (1) is
used when determining a maxterm.

Figure 1-3 Karnaugh Map

Seven Segment Display

Karnaugh maps are useful for minimizing the number of logic gates needed in a circuit.
In a practical sense, this reduction also results in a decrease in cost for a manufacturer
since fewer components are needed to create an equivalent circuit.

A common way we work with Karnaugh maps is the Seven Segment Display (SSD). An
SSD is an electronic device used for displaying numerical values. The device typically
consists of seven segments arranged in a figure 8. Any digit, as well as some alphabet
letters, can be displayed when the correct segments are activated. An example of an
SSD as well as possible outputs can be seen in the image shown.

Figure 1-4 Seven segment display

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Truth Tables
The truth table for an SSD consists of four inputs and seven outputs:

Figure 1-5 SSD Truth Table

Looking at this table, we can make several observations:

 Inputs are noted by capital letters (A-D).

 Outputs are denoted by lower case letters (a-g).
 The Numeric Outputs correspond to the numbers visible on the display.
 For numbers 10-15, “X” values are visible in the table. These are known as don’t
care conditions.

The numerical outputs of 0-9 are necessary in an SSD, but outputs 10-15 are said to be
illegal. In a Karnaugh map, don’t care conditions can be treated either as 0 or a 1,
depending on which one produces a larger block. See below for an example.

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 Figure 1-6 Karnaugh Map

Note: Similar Karnaugh maps can be created for all other segments.

1-1 Create Boolean expressions (SOP and POS) from the Karnaugh map.

Figure 1-7 Karnaugh Map

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1-2 Identify how many and which gates are needed to create the simplified
Combinational Logic Circuit for the SOP expression.
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1-3 Identify how many and which gates are needed to create the simplified
Combinational Logic Circuit for the POS expression.
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1.2 Exercise: Creating a Karnaugh Map from a Combinational Logic Circuit

PLD Design

Create the following circuit as a PLD design in Multisim:

Figure 1-8 Circuit

 Export the circuit to the Digital Electronics Board.

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1-4 Vary the inputs as per the truth tables and fill in the output.

SW0 SW1 SW2 Outputs

0 0 0

0 0 1

0 1 0

0 1 1

1 0 0

1 0 1

1 1 0

1 1 1

 Simplify the Output using Karnaugh maps. Take a screen shot, take a picture, or
draw a sketch of your Karnaugh map and include it with your completed lab.
 Set up the simplified expression on Multisim. Take a screenshot, take a picture,
or draw a sketch of the expression and include it with your completed lab.

1-5 What is the resulting Output expression using Boolean algebra?

_____________________________________________________________________

_____________________________________________________________________

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1.3 Implement: Using Karnaugh Maps in Seven Segment Displays

Using Karnaugh Maps in Seven Segment Displays

 Using the truth table for a Seven Segment Display in the introduction, create
Karnaugh maps for segments a, b, and c.
 Take a screenshot, take a picture, or draw a sketch of the maps and include it
with your completed lab.

Figure 1-9 Image for Karnaugh maps

 Create the simplified circuit for the ‘a’ segment in Multisim. Take a picture or
screenshot and include it with your completed lab.
 Run the simulation in Multisim.

1-6 Does the behavior of the simplified circuit match the expected result? If not, make
sure your Karnaugh map is simplified correctly, and the circuit matches the K-map.

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_____________________________________________________________________

 Stop the simulation when you are done.

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1.4 Exercise: Simplified Circuits

Simplified Circuits
Instructions:

 Create the simplified circuit for the ‘b’ segment and repeat your test.
 Finally, create the simplified circuit for the ‘c’ segment and confirm its behavior.
 Take pictures or screenshots of these two circuits and include them with your
completed lab.

1-7 How would you connect the 3 circuits simultaneously to produce the number 7?
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 Create a circuit which will output 3 values to control the a, b, and c segments.
 Take a picture or screenshot and include this with your completed lab.

1-8 Would it be possible to simplify this circuit? If so, how?

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1.5 Conclusion

1-9 Did you find it easier to create a combinational logic circuit from a truth table or a
Karnaugh map? Explain.

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1-10 Is there another device that can be used to create a seven-segment display? (Hint:
Consider a BCD to Binary Decoder).

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_____________________________________________________________________

_____________________________________________________________________

1-11 What are Karnaugh maps (K-maps) used for?

A. Graphically minimizing Boolean functions

B. Taking simple expressions of Boolean functions and expanding them
C. Grouping opposite output values together (0’s and 1’s)
D. Determining product-of-sums only

1-12 How many cells can be grouped together in the simplification of Karnaugh maps?

A. No more than 4
B. 2
C. 2^n
D. As many as possible

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1-13 Creating Boolean expressions from Karnaugh maps typically leads to ______ in
the number of logic gates needed in a circuit.

A. An increase
B. A decrease
C. No change
D. None of the above

1-14 How are ‘don’t’ care conditions’ treated in Karnaugh maps?

A. They are ignored

B. They are combined with the value on their right
C. They can be treated as either a 0 or 1 depending on the situation
D. They are always given a value of 0

1-15 A Seven Segment Display (SSD):

A. Consists of seven segments arranged in a figure 8

B. Can display any number between 0 and 9 digitally
C. Can be simulated with logic gates or a clip
D. All of the above

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