8085 Microprocessor PPT and PDF Report
8085 Microprocessor PPT and PDF Report
General Topics
PDF Report
Sumit Thakur January 4, 2017 ECE Seminars No Comment Custo
Address Bus: The 16-bit address upper half appears on the address Lear
bus or address lines (A8 – A15). These lines are only used for the most
important eight bits of the 16-bit address.
Data Bus: The eight-bit data bus (D0 – D7) is multiplexed with the 16
bit’s lower half address bus (A0 – A7).
I0/, S0, and S1: The signal I0/ states an opinion that whether input/
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output operation or memory operation is being done, whereas S0
and S1tells the about the machine cycle in progress.
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READY: This signal is used by the microprocessor to know whether a
peripheral is set or not to send the data. If it is not ready the
processor waits and is used to make the slower peripherals of
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microprocessor agree or occur in time.
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4. Interrupt Signals: The 8085 has ve hardware interrupts or externally
initiated signals and they are: RST 5.5, RST 6.5, RST 7.5, TRAP and INTR
(interrupt), show that the processor has an interrupt. Earn From StudyMa a By
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5. Serial Data Transfer: SID and SOD are used to accept and transmit the
data in bit by bit format.
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6. DMA Controllers: HOLD and HLDA are the two DMA signals.
7. Reset Signals: The two reset signals are RESET IN and RESET OUT.
8. Power Supply and Clock: It requires a power supply of 5V and CLK OUT
is used as a system clock.
ARCHITECTURE OF 8085:
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9. Serial I/O Control: This provides two signals namely SID and SOD
which are used to receive and transmit the information serially.
10. Address and Data Bus: 8085 microprocessor’s data bus is eight bit
long and eight bits of information can be transmitted over it. In a case
of 16 bits of information, the most important bits of an address are
sent through (A8 TO A15) and the remaining bits are sent through
AD0 to AD7.
TIMING DIAGRAMS:
The 8085 microprocessor has seven basic machine cycles. They are:
2. Memory Read Cycle: Availed to search one byte of memory and 3T-
states are needed.
3. Memory Write Cycle: Availed to send one byte of memory and 3T-
states are needed.
4. I/O Read Cycle: Availed to search one byte of memory from I/O port
and 3T- states are needed.
5. I/O Write Cycle: Availed to write one byte of memory from I/O port
and 3T- states are needed.
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Introduction
Features
Architecture 0f 8085
Instruction Set
Addressing Modes
Timing diagrams
Reference
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