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Surya Resume PDF

Surya Teja Mannem is a certified advanced VLSI design and verification engineer with experience as a program analyst trainee. He possesses strong analytical skills for engineering innovative VLSI approaches and a solid understanding of VLSI design, IP verification, and corporate leadership. His experience includes product performance and functional testing as well as software development cycle documentation.

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212 views1 page

Surya Resume PDF

Surya Teja Mannem is a certified advanced VLSI design and verification engineer with experience as a program analyst trainee. He possesses strong analytical skills for engineering innovative VLSI approaches and a solid understanding of VLSI design, IP verification, and corporate leadership. His experience includes product performance and functional testing as well as software development cycle documentation.

Uploaded by

BEST MOVIES DHAMAKA
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Surya Teja Mannem

Certified Advanced VLSI Design and Verification Engineer with an experience as a Program Analyst
trainee at a leading American IT company. Posses the analytical skills necessary for engineering
innovative approaches in VLSI field. Solid understanding of VLSI design and IP verification, industry-
standard VLSI projects and corporate leadership environment.

WORK EXPERIENCE
[email protected]
Program Analyst Trainee
9885885143 Cognizant Technology Solutions
01/2019 – 04/2019 Hyderabad
Achievements/Tasks
New Delhi
One Stop Solution Team - Search and find hospitals at any part of the country within an
integrated one stop solution health service platform. Worked along with a team of 3.
linkedin.com/in/surya-teja- Solid Understanding of Mysql and Microsoft Visual Studio.
mannem-49b706127
Evaluated the product performance testing and functional testing.
Documentation of the software development cycle in the comany repository.
SKILLS
Digital Electronics
CERTIFICATES
Verilog HDL VHDL Certified Advanced VLSI Design and Verification Engineer (06/2019 – Present)
Futurewiz, Noida

System Verilog UVM


ACHIEVEMENTS
Questasium NCC Cadet (2016 – 2019)
C Certificate in Army Wing

Xilinx ISE C Runner-up in Quiz-Wiz and Brain Marathon -Analytical Skills (2017)
School of Professional Enhancement, Lovely Professional University

C Sharp Express PCB


PROJECTS
Linux Perl OOPS Advance High Performance Bus(AHB) in AMBA (12/2019 – 01/2020)
Front-end design, verification and simulation of a AHB-lite bus interface that supports a single bus master
and provides high bandwidth operation.
Emotional Intelligence
Interfacing of SPRAM as slave with AHB Interface on Questasium.

Bidirectional Memory designing Using Verilog HDL (2019)


LANGUAGES Designing of Single port memory read and write operations in Verilog HDL.
Telugu
Native or Bilingual Proficiency FIFO Memory (2019)
Design of First-In-First-out memory using Verilog HDL
English
Full Professional Proficiency
Video Steganography using Image Processing in MATLAB (2018)
Hindi Encryption of data in the video frame and extraction of the data from the video frame using LSB technique
Professional Working Proficiency

Punjabi
Limited Working Proficiency EDUCATION
Bachelor's in Electronics and Communication Engineering - Hons
INTERESTS Lovely Professional University, Punjab
2015 – 2019 7.89 CGPA
Cooking Minors
Psychology Internet of Things(IOT)
Social Activities

Yoga Traveling Intermediate Education (12th)- Maths, Physics, Chemistry


Sri Chaitanya Junior Kalasala, Guntur
2013 – 2015 92%

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