Iphone6 Plus PDF
Iphone6 Plus PDF
Iphone6 Plus PDF
CK
1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%. APPD
REV ECN DESCRIPTION OF REVISION
2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.
3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ. Fri May 9 13:11:49 2014 6 0002780389 ENGINEERING RELEASED 2014-05-09
DATE
2 SOC:MAIN
TABLE_ALT_HEAD
N61_MLB 11/01/2013
TABLE_5_HEAD
PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) CRITICAL BOM OPTION PART NUMBER ALTERNATE FOR BOM OPTION REF DES COMMENTS:
3
TABLE_TABLEOFCONTENTS_ITEM
3 PART NUMBER
SOC:I/OS N61_MLB 11/01/2013 TABLE_5_ITEM
TABLE_ALT_ITEM
4
TABLE_TABLEOFCONTENTS_ITEM
5 5
TABLE_ALT_ITEM
TABLE_TABLEOFCONTENTS_ITEM
7 SOC:CAM,LCD,LPDP,PCIE
TABLE_5_ITEM
N61_MLB 11/01/2013 825-6838 1 EEEE FOR 639-6157 32GB EEEE_FRR9 CRITICAL EEEE_32G
197S0392 197S0369 ALTERNATE Y1200 ESPON ALT XTAL
TABLE_ALT_ITEM
8
TABLE_TABLEOFCONTENTS_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
10
TABLE_TABLEOFCONTENTS_ITEM
11 11
TABLE_ALT_ITEM
TABLE_TABLEOFCONTENTS_ITEM
CAMERA:FRONT FLEX CONN 825-6838 1 EEEE FOR 639-00196 16GB NON-TDD-LTE EEEE_G166 CRITICAL EEEE_16G_DTD
N61_MLB 11/01/2013 TABLE_5_ITEM
152S2034 152S2033 ALTERNATE L1209,L1211,L1213
CYNTEC 1.0UH 1.2MM
12
TABLE_TABLEOFCONTENTS_ITEM
13 POWER:ADI(2/2)
TABLE_5_ITEM
N61_MLB 11/01/2013 825-6838 1 EEEE FOR 639-00195 64GB NON-TDD-LTE EEEE_G165 CRITICAL EEEE_64G_DTD
152S00004 152S2049 ALTERNATE L1210,L1212,L1214
CYNTEC 0.47UH 1.2MM
TABLE_ALT_ITEM
14
TABLE_TABLEOFCONTENTS_ITEM
TABLE_ALT_ITEM
17 17
TABLE_ALT_ITEM
TABLE_TABLEOFCONTENTS_ITEM
19 BLANK
20 20
N/A N/A NAND BOM OPTIONS 155S0885 155S0610 ALTERNATE FL0802,FL1803 TY,150OHM,FERRITE
TABLE_ALT_ITEM
C
TABLE_TABLEOFCONTENTS_ITEM
DISPLAY:FLEX CONN
C 21
TABLE_TABLEOFCONTENTS_ITEM
TABLE_ALT_ITEM
NOT ALL REFERENCE DESIGNATORS LISTED.
USED 9 TIMES IN DESIGN.
24 TOUCH:CUMULUS,MESON
TABLE_ALT_ITEM
26
TABLE_TABLEOFCONTENTS_ITEM
27 TABLE_5_ITEM
28
TABLE_TABLEOFCONTENTS_ITEM
29 BLANK
TABLE_ALT_ITEM
30 CELL:ALIASES TABLE_ALT_ITEM
32
TABLE_TABLEOFCONTENTS_ITEM
33
TABLE_TABLEOFCONTENTS_ITEM
34 BASEBAND (1 OF 2) N56_RADIO_MLB 05/07/2014 138S0917 WILL NOT BE USED AT THE CARRIER BUILD AND WILL BE REPLACED BY 138S0831 AT DVT.
35
TABLE_TABLEOFCONTENTS_ITEM
37 37
TABLE_ALT_ITEM
TABLE_TABLEOFCONTENTS_ITEM
NOT ALL REFERENCE DESIGNATORS LISTED.
RF TRANSCEIVER (1 0F 3) N56_RADIO_MLB 05/07/2014 138S00019 138S0917 ALTERNATE C0204 KYOCERA,2.2UF,0201
38
TABLE_TABLEOFCONTENTS_ITEM
39
TABLE_TABLEOFCONTENTS_ITEM
41
B 2G PA N56_RADIO_MLB 05/07/2014 B
TABLE_5_ITEM
VERY LOW BAND PAD N56_RADIO_MLB 05/07/2014 335S1038 335S0992 ALTERNATE U0604 NAND HYNIX 16GB
43
TABLE_TABLEOFCONTENTS_ITEM
44 MID BAND PAD N56_RADIO_MLB 05/07/2014 BOSCH ACCEL/GYRO 335S1040 335S1000 ALTERNATE U0604 NAND HYNIX 64GB
TABLE_ALT_ITEM
45
TABLE_TABLEOFCONTENTS_ITEM
46
TABLE_TABLEOFCONTENTS_ITEM
46 PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) CRITICAL BOM OPTION 335S00009 335S1000 ALTERNATE U0604 NAND SANDISK 64GB TLC
ANTENNA SWITCH N56_RADIO_MLB 05/07/2014 TABLE_ALT_ITEM
TABLE_5_ITEM
47
TABLE_TABLEOFCONTENTS_ITEM
47 HIGH BAND SWITCH 338S00028 1 IC,CARBON,BMI162BC,LGA16 U2203 CRITICAL BOSCH_GYRO 335S00014 335S1000 ALTERNATE U0604 NAND TOSHIBA 64GB TLC
N56_RADIO_MLB 05/07/2014
48
TABLE_TABLEOFCONTENTS_ITEM
48 RX DIVERSITY
TABLE_5_ITEM
TABLE_ALT_ITEM
N56_RADIO_MLB 05/07/2014 132S0395 1 CAP,CER,0.1UF,10%,6.3V,X6S,0201 C2211 CRITICAL BOSCH_GYRO 335S00015 335S00010 ALTERNATE U0604 NAND TOSHIBA 128GB
49
TABLE_TABLEOFCONTENTS_ITEM
52
TABLE_TABLEOFCONTENTS_ITEM
51
52
ANTENNA FEEDS N56_RADIO_MLB 05/07/2014 ST ACCEL/GYRO BOM DEVIATIONS
WIFI/BT: MODULE AND FRONT END N56_RADIO_MLB 05/07/2014
TABLE_5_HEAD
53
TABLE_TABLEOFCONTENTS_ITEM
TABLE_5_ITEM
54
TABLE_TABLEOFCONTENTS_ITEM
55
TABLE_TABLEOFCONTENTS_ITEM
A BRD 820-3675 A
MCO 056-6398 DRAWING TITLE
SCHEM,MLB,N56
DRAWING NUMBER SIZE
BOM 639-4924 (16GB) BOM 639-00196 (16GB,DTD) Apple Inc. 051-0517 D
REVISION
BOM 639-6157 (32GB) BOM 639-00194 (32GB,DTD) R
6.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
BOM 639-6158 (64GB) BOM 639-00195 (64GB,DTD) THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
BOM 639-00150 (128GB) BOM 639-00197 (128GB,DTD) I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
SHEET
1 OF 55
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED 1 OF 55
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
FIJI: JTAG,USB,HSIC,XTAL
ROOM=SOC
ROOM=SOC
1 C0212
VDD18_EFUSE1 J7 CKPLUS_WAIVE=PWRTERM2GND
PP3V3_USB 12 26
0.1UF
20%
ROOM=SOC
ROOM=SOC 2 4V
X5R
C0202 1 1 C0205 01005
0.22UF 0.1UF
20% 20%
6.3V
X5R 2 PP1V2_SDRAM 4 12 23 26 2 6.3V
X5R-CERM
0201 01005
AD14
AN24
VDDA18_CPU_TSADC AE15
ROOM=SOC
VDD12_UH2_HSIC1 AN4
M16
V19
VDDA18_SOC0_TSADC V17
VDD18_XTAL E14
VDD12_CKE_DDR0 D16
1 C0211
VDD12_UH0_HSIC0 D7
VDDA18_SOC1_TSADC G7
VDDH_USB E2
VDD33_USB E1
VDD12_CKE_DDR1 N5
0.1UF
20%
VDDA12_PLL_SOC
VDDA12_PLL_MG
VDDA12_PLL_CPU
VDDA12_PLL_LPDP
4V
2 X5R
01005
C 24MA
3.3V C
0.95V
1.2V
ACTUAL HEIGHT IS 1.08MM - MCO NEEDS TO BE UPDATED
U0201
POP-FIJI-1GB-DDR-B0 PLACE NEAR SOC.
PP0201 NC
C1 UH1_HSIC0_DATA
BGA ROOM=SOC
P4MM-NSM C2 UH1_HSIC0_STB
SM
1 NC SYM 1 OF 13 PP0203
PP
P2MM-NSM
AR4 ROOM=SOC 1
REMOVE PP IF
SPACE IS NEEDED
PP0202 BASEBAND
30 50_AP_BI_BB_HSIC1_DATA
AP4
UH2_HSIC1_DATA N/C OK PER SEG 5/14/12 (N51)
ANALOGMUXOUT D15 NC PP SM
P4MM-NSM 30 50_AP_BI_BB_HSIC1_STB UH2_HSIC1_STB
SM
PP
1 USB_DP F5 90_AP_BI_TRISTAR_USB0_P 17
K4 90_AP_BI_TRISTAR_USB0_N
JTAG_SEL USB_DM E5 17
5%
I2C ADDRESS MAP R02021 Y0201 16V
3
45_XTAL_24M_I CERM
2 4
1.00M 1.60X1.20MM-SM 01005 PCB: PLACE THIS XW
45_XTAL_24M_O 1% 24.000MHZ-30PPM-9.5PF-60OHM AT U1, NEAR XI/XO
1/32W
I2C0 MF
R0207 C0210 XW0204
1
01005 2 12PF SHORT-10L-0.1MM-SM
DEVICE BINARY 7-BIT HEX 8-BIT HEX 1
1.33K2 1 2 1 2
45_XTAL_24M_O_R 45_XTAL_24M_O_GND
ADI PMU: 1110100X 0X74 0XE8 1% MF ROOM=SOC
1/32W 01005 5%
LM3534 BL DRIVER #1: 1100011X 0X63 0XC6 16V
TRISTAR: 0011010X 0X1A 0X34 CERM
CHESTNUT: 0100111X 0X27 0X4E 01005
I2C1
TIGRIS CHARGER: 1110101X 0X75 0XEA
LINEAR VIBE: 1011010X 0X5A 0XB4
CS35L19B AMP: 1000000X 0X40 0X80
LM3534 BL DRIVER #2: 1100011X 0X63 0XC6
MESA EEPROM (MEMORY): 1010110X 0X56 0XAC
MESA EEPROM (ID): 1011110X 0X5E 0XBC
I2C2
DISPLAY EEPROM: 1010001X 0X51 0XA2
CT814 ALS: 0101001X 0X29 0X52
RCAM I2C
A OPEL STROBE DRIVER:
REAR FACING CAM:
1100011X
0010000X
0X63
0X10
0XC6
0X20 SYNC_MASTER=N61_MLB SYNC_DATE=11/01/2013 A
VCM AF DRIVER: 0001110X 0X0E 0X1C PAGE TITLE
VCM AF DRIVER: 0001111X 0X0F 0X1E SOC:MAIN
DRAWING NUMBER SIZE
FCAM I2C 051-0517 D
FRONT FACING CAM: 0010000X 0X10 0X20
Apple Inc. REVISION
R
6.0.0
NOTE: ACCEL, GYRO, COMPASS ALL USING SPI (VIA OSCAR) FOR AP COMMUNICATION. NOTICE OF PROPRIETARY PROPERTY: BRANCH
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
2 OF 55
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 2 OF 55
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
GRP3
U32 BGA Y31
13 8 BUTTON_TO_AP_VOL_UP_L AC3 GPIO2 POP-FIJI-1GB-DDR-B0 10 CODEC_TO_AP_ASP_I2S0_DIN I2S0_DIN I2C1_SCL AP_TO_I2C1_SCL 14 15 16 21
BGA U33 SYM 3 OF 13 Y30
13 8 BUTTON_TO_AP_VOL_DOWN_L AC4 GPIO3 CODEC ASP 10 AP_TO_CODEC_ASP_I2S0_DOUT I2S0_DOUT I2C1_SDA AP_BI_I2C1_SDA 14 15 16 21
GRP2
ROOM=SOC ROOM=SOC 16 AP_TO_SPKAMP_RESET_L AD3 GPIO6 TMR32_PWM1 AM4 AP_TO_VIBE_TRIG 14
30 I2S1_BCLK 11 20
GRP4
R03141 R03131 30 AP_TO_BT_WAKE
AD4 TMR32_PWM2 AN3 NC BLUETOOTH 30 AP_TO_BT_I2S1_LRCLK T30 I2S1_LRCK
GRP2
GPIO7 I2C3_SCL AN1 NC
220K 392K AG30 BT_TO_AP_I2S1_DIN R31 I2S1_DIN
30 AP_TO_BB_RST_L
30
5% 1% GPIO8 I2C3_SDA AN2 NC
1/32W 1/32W AG31 ROOM=SOC AP_TO_BT_I2S1_DOUT T31 I2S1_DOUT
MF MF 30 AP_TO_WLAN_JTAG_SWCLK GPIO9 UART0_RXD AL2 TRISTAR_TO_AP_DEBUG_UART0_RXD 30
01005 2 01005 2
30 AP_TO_WLAN_JTAG_SWDIO
AG32 GPIO10 UART0_TXD AL1 AP_TO_TRISTAR_DEBUG_UART0_TXD
17
R0311 DWI_CLK AL29 45_AP_TO_PMU_AND_BL_DWI_CLK 13 15
P2MM-NSM
17 33.2 2 D25
1
PP SM PP0305
21 13 BUTTON_TO_AP_MENU_KEY_L Y3 GPIO11 16 45_AP_TO_SPKAMP_I2S2_MCLK 1 45_AP_TO_SPKAMP_I2S2_MCLK_R I2S2_MCK
1% 45_AP_TO_CODEC_XSP_I2S2_BCLK N30 I2S2_BCLK DWI_DO AL30 45_AP_TO_PMU_AND_BL_DWI_DO P2MM-NSM
13 8 BUTTON_TO_AP_HOLD_KEY_L Y4 GPIO12 UART1_CTSN H30 BT_TO_AP_UART1_CTS_L 16 10 13 15
1
13 PMU_TO_AP_IRQ_L AK31 GPIO13 UART1_RTSN H31 AP_TO_BT_UART1_RTS_L
30
30
1/32W
MF 16 10 AP_TO_CODEC_XSP_I2S2_LRCLK N31 I2S2_LRCK PP SM PP0304
GRP4
01005
AE1 H32 CODEC_TO_AP_XSP_I2S2_DIN P32 I2S2_DIN
30 BB_TO_AP_IPC_GPIO1 BT_TO_AP_UART1_RXD 16 10
GPIO14 UART1_RXD 30 BLUETOOTH
AF30 H33 CODEC XSP & SPKR AMP AP_TO_CODEC_XSP_I2S2_DOUT P33 I2S2_DOUT
30 AP_TO_BB_WAKE_MODEM AP_TO_BT_UART1_TXD 16 10
GPIO15 UART1_TXD 30
AE2
BOARD_ID3 NC
AE3
GPIO16
AL31
PP0303
P2MM-NSM ALS_TO_AP_INT_L AA2 I2S3_MCK
30 AP_TO_STOCKHOLM_SIM_SEL GPIO17 UART2_CTSN BB_TO_AP_UART2_CTS_L 30 SM
11
GRP3
BOOT_CONFIG0 NC GPIO18 UART2_RTSN 30 PP
GRP2
AA3
C 13 AP_TO_PMU_KEEPACT
NC
AK32
AF3
GPIO19
GPIO20
UART2_RXD
UART2_TXD
AL32
AL33
BB_TO_AP_UART2_RXD
AP_TO_BB_UART2_TXD
17 30
17 30
BASEBAND ROOM=SOC 30
30
AP_TO_BB_I2S3_LRCLK
BB_TO_AP_I2S3_DIN Y1
I2S3_LRCK
I2S3_DIN
C
AF4 BASEBAND AP_TO_BB_I2S3_DOUT Y2 I2S3_DOUT
30 BB_TO_AP_DEVICE_RDY
30
GPIO21
GRP2
GRP4
GPIO23 UART3_RTSN 30
AD29 G31 STOCKHOLM 45_AP_TO_CODEC_VSP_I2S4_BCLK AB33 I2S4_BCLK
30 BB_TO_AP_RESET_DET_L STOCKHOLM_TO_AP_UART3_RXD 10
GPIO24 UART3_RXD 30
GRP3
AJ2 G32 CODEC VSP AP_TO_CODEC_VSP_I2S4_LRCLK AA30 I2S4_LRCK
27 BOOT_CONFIG1 AP_TO_STOCKHOLM_UART3_TXD 10
BOOT_CONFIG1 GPIO25 UART3_TXD 30
AK33 CODEC_TO_AP_VSP_I2S4_DIN AA32 I2S4_DIN SEP_I2C_SCL AR31 AP_TO_EEPROM_I2C_SCL
25 FORCE_DFU
10 3
GPIO26
AJ30 AE31 WLAN_TO_AP_UART4_CTS_L 30 10 AP_TO_CODEC_VSP_I2S4_DOUT AA33 I2S4_DOUT SEP_I2C_SDA AP31 AP_BI_EEPROM_I2C_SDA 3
DFU STATUS NC GPIO27 UART4_CTSN
AJ3 AF31 SEP_SPI_SCLK AN30
AP_TO_WLAN_UART4_RTS_L 30 NC
GRP3
NC GPIO28 UART4_RTSN
GRP3
BOOT_CONFIG2 AJ4 AE32 WIFI UART SEP_SPI_SSIN AN31
BOARD_ID4 NC GPIO29 UART4_RXD WLAN_TO_AP_UART4_RXD 30 NC MESA
AD30 AE33 SEP_SPI_MISO AN33
10 CODEC_TO_AP_INT_L GPIO30 UART4_TXD AP_TO_WLAN_UART4_TXD 30 NC
AP_TO_RADIO_ON_L AC30 BOARD_ID2 BOARD_ID2 AG1 SPI0_MISO SEP_SPI_MOSI AN32
30 GPIO31 27 26
NC
BOARD_ID1 AG2 AM30
GRP2
BB_JTAG_TCK AC31 GPIO32 UART5_RTXD AG4 AP_TO_TIGRIS_SWI GAS GAUGE BOARD_ID1 27 SPI0_MOSI SEP_GPIO0 NC
NC 14 PP1V8 2 3 5 6 7 10 11 12 13 15 20 23
BOARD_ID0 AG3 SPI0_SCLK 24 26 27
BB_JTAG_TMS NCAB29 GPIO33 NC ISP_UART0_RXD C32 OSCAR_TO_AP_ISP_UART_RXD
GRP4
22
BOARD_REV3 AK1 AH3 SPI0_SSIN
NC
GRP2
GRP1
BOARD_REV0 BOARD_REV0 AK4 GPIO37 UART6_RXD AM2 TRISTAR_TO_AP_ACC_UART6_RXD 10 SPI1_MOSI MF
27
GRP3
10 SPI1_SSIN 13
GRP4
14 AP_TO_VIBE_EN AL3 GPIO42 UART8_RXD AF2 OSCAR_TO_AP_UART_RXD 22 GRAPE 24 SPI2_MOSI
AF1 AP_TO_TOUCH_SPI_CLK E32 SPI2_SCLK
UART8_TXD AP_TO_OSCAR_UART_TXD 22 24
PP1V8_SDRAM
GRP2
3 4 10 12 13 14 15
24 AP_TO_TOUCH_SPI_CS_L E31 SPI2_SSIN CLK32K_OUT AB1 45_AP_TO_TOUCH_CLK32K_RESET_L 24 17 26 30
NOSTUFF
CPU_SLEEP_STATUS AH30
B R0340
21
MESA_TO_AP_SPI_MISO AD33
AD32
SPI3_MISO NC NO CONNECTED ON MLB 1
R0307
10K
B
AP_TO_MESA_SPI_MOSI
GRP3
21 SPI3_MOSI 5%
0.00 2 AD31 1/32W
21 AP_TO_MESA_SPI_CLK 1 AP_TO_MESA_SPI_CLK_R SPI3_SCLK
NAND_SYS_CLK AB4 NC USED FOR PCIE NAND MF
0% MF 21 MESA_TO_AP_INT AE30 SPI3_SSIN 2 01005
1/32W 01005
ROOM=SOC
ROOM=SOC R0312
0.00 2
1 AP_TO_PMU_SOCHOT1_L 13
0% MF
1/32W 01005
ROOM=SOC
ANTI-ROLLBACK EEPROM
ONSEMI EEPROM
APN:335S0894
PP1V8 2 3 5 6 7 10 11 12 13 15 20 23
24 26 27
1 C0301
A1
1
1
R0316 1.0UF
20%
R0317
2.2K VCC 6.3V 2.2K
5% 2 X5R 5%
1/32W
1/32W
MF U0301 0201-1
ROOM=E_SE MF
2 01005 CAT24C08C4A 2 01005
ROOM=E_SE
ROOM=E_SE WLCSP
3 AP_TO_EEPROM_I2C_SCL B1 SCL SDA B2 AP_BI_EEPROM_I2C_SDA 3
A SYNC_MASTER=N61_MLB SYNC_DATE=11/01/2013 A
PAGE TITLE
VSS
ROOM=E_SE
SOC:I/OS
A2
FIJI: VDDCA,VDD1/2,VDDQ,VDD,VDD_FIXED,VDD_CPU,VDD_GPU
VDDCA, VDD1/2, VDDQ VDD VDD_CPU, VDD_GPU
25 17 15 13 2 RESET_1V8_L
D17 DDR0_CKEIN R11 PP_GPU
26 12
NOTE: CKEIN CONFIRMED 1.8V TOLERANT N4 DDR1_CKEIN R13 26 12 7 PP0V95_FIXED_SOC
ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC
R15
R17 ROOM=SOC ROOM=SOC ROOM=SOC
1 C0464 1 C0442 C0445 C0448 C0418 C0419 C0420 C0463
10UF 10UF 4.3UF 4.3UF 1UF 1UF 0.47UF 4.3UF
C0435 C0438 C0439
D 45_DDR0_ZQ_CA A17 DDR0_ZQ_CA
R19
R2
4.3UF
20%
4.3UF
20%
4.3UF
20%
AA16
AA18
L12
L14
20%
6.3V
2 CERM-X5R
20%
6.3V
2 CERM-X5R
20%
4V
CERM
20%
4V
CERM
20%
4V
CERM
20%
4V
CERM
20%
6.3V
CERM
20%
4V
CERM
D
4V
CERM
4V
CERM
4V
CERM AA22 U0201 L16
0402-9 0402-9 0402 0402 0402 0402 0402 0402
45_DDR1_ZQ_CA M1 DDR1_ZQ_CA R21 POP-FIJI-1GB-DDR-B0 1 3 1 3 1 3 1 3 1 3 1 3
0402 0402 0402
45_DDR0_ZQ_DQ AR13 R23 AA6 BGA L26
DDR0_ZQ_DQ 1 3 1 3 1 3
L33 R25 AB10 L8 2 4 2 4 2 4 2 4 2 4 2 4
45_DDR1_ZQ_DQ DDR1_ZQ_DQ SYM 10 OF 13
A18 R27 2 4 2 4 2 4 AB23 M11
4 45_DDR0_VREF_CA DDR0_VREF_CA
P1 R29 AB25 ROOM=SOC M13
4 45_DDR1_VREF_CA DDR1_VREF_CA
1 1 1 1 AC14 M15
R0401R0402R0411 R0412 4 45_DDR0_VREF_DQ AR15 DDR0_VREF_DQ R3
AC16 M17
240 240 240 240 4 45_DDR1_VREF_DQ N33 DDR1_VREF_DQ R32
1% 1% 1% 1% AC18 M9
1/32W 1/32W 1/32W 1/32W R4
MF MF MF MF
A20 ROOM=SOC R5 AC27 N10 PP_CPU AA10 AA17
2 01005
ROOM=SOC 2 01005
ROOM=SOC 2 01005
ROOM=SOC 2 01005
ROOM=SOC
26 12
AC7 N12 ROOM=SOC ROOM=SOC ROOM=SOC AA14 AA19
B17 U0201 R6
ROOM=SOC AD13 N14 C0443 C0446 C0444 AA8 U0201 AA21
C14 POP-FIJI-1GB-DDR-B0 R7 POP-FIJI-1GB-DDR-B0
BGA
ROOM=SOC
C0405 AD19 N16
0.47UF 0.47UF 1UF AB11 AA23
(DDR IMPEDANCE CONTROL)
H1
SYM 7 OF 13
R9 C0404 1UF
20%
6.3V
20%
6.3V
20%
4V
BGA
N1 T10 1UF 20% AD21 N26 CERM CERM CERM AB13 SYM 13 OF 13 AA25
VDDCA 20% 4V 0402 0402 0402
U1 T12 4V CERM AD25 N8 AB15 AB16
CERM 0402 1 3 1 3 1 3
V1 T14 0402 AD6 P11 AB9 ROOM=SOC AB18
1 3
T16 1 3 AE10 P13 2 4 2 4 2 4 AC10 AB20
T18 2 4 AE11 P15 AC12 AB22
26 23 12 4 2 PP1V2_SDRAM 2 4 AE16 P17 AC8 AB24
AA1 T2
ROOM=SOC ROOM=SOC ROOM=SOC
AF33 T20 AE22 P9 ROOM=SOC ROOM=SOC ROOM=SOC AD11 AB26
C0453 1 C0454 1 C0455 1
AP25 T22 AF13 R10 C0409 C0411 C0414 AD15 AC17
1.0UF 1.0UF 1.0UF
20% 20% 20%
AP6 T24 ROOM=SOC AF17 R12 4.3UF 4.3UF 4.3UF AD9 AC19
6.3V 6.3V 6.3V 20% 20% 20%
X5R 2
0201-1
X5R 2
0201-1
X5R 2
0201-1 AR17 T26
C0406 AF23 R14 4V
CERM
4V
CERM
4V
CERM
AE12 AC21
0.47UF AF25 R16 0402 0402 0402 AE14 AC23
B15 T28 20%
VDD2 6.3V
AF27 R18 1 3 1 3 1 3 AE8 VDD_CPU AC25
B19 T29 CERM
1.2V 0402 0.775V - 1.0V
ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC B7 T3 AF7 R26 AF11 AD16
VSS 1 3 2 4 2 4 2 4 TBD: 7.6A? @ 105C
C C0402
1UF
C0422
1UF
C0401
1UF
C0429
4.3UF
E33 T4 AG14
AG16
R8
T11
AF15
AF9
AD18
AD20
C
20% 20% 20% 20% G1 T7 2 4
4V 4V 4V 4V AG18 T13 AG10 AD22
CERM CERM CERM CERM K33 T8 ROOM=SOC ROOM=SOC ROOM=SOC
0402 0402 0402 0402 AG6 T15 AG12 AD24
1 3 1 3 1 3 1 3
R1 U11
AH10 T17
C0408 C0410 C0413 AG8 AD26
T32 U13 VDD_FIXED VDD_FIXED 4.3UF 4.3UF 1UF
20% 20% 20%
Y32 U15 AH20 T19 4V 4V 4V AH11 AE17
2 4 2 4 2 4 2 4 0.95V CERM CERM CERM
U17 AH7 TBD: 3.3A? @ 105C T9 0402 0402 0402 AH13 AE19
U19 AJ14 U10 1 3 1 3 1 3 AH15 AE21
ROOM=SOC ROOM=SOC
U2 AJ16 U12 AH9 AE23
U21
1 C0465 1 C0466 AJ24 U14 2 4 2 4 2 4 AJ10 AE25
TP FOR UAT PAC 10UF 10UF
20% AJ27 U16 AJ12 AF18
PP0404 U23
2 6.3V
20%
6.3V
P4MM U25
CERM-X5R 2 CERM-X5R AJ6 U18 AJ7 AF20
SM 0402-9 0402-9 VDD_GPU
1 AJ9 U26 ROOM=SOC ROOM=SOC ROOM=SOC AJ8 AF22
PP U27 0.8V - 0.95V
U29 AK12 U8 C0458 C0459 C0460 TBD: 3.45A? @ 105C AF24
AK18 V11
4.3UF 1UF 1UF AF26
PP1V8_SDRAM A19 U3 20% 20% 20%
30 26 17 15 14 13 12 10 3 4V 4V 4V
AG33 U4 AK20 V13 CERM CERM CERM AA12 VDD_CPU_SENSE AG17
ROOM=SOC ROOM=SOC ROOM=SOC 0402 0402 0402
1 C0450 1 C0451 1 C0452 AR16 U5 USING VDD_SOC CAPS FROM N51
AK22 V15
1 3 1 3 1 3
AG19
2.2UF 2.2UF 2.2UF AR25 U6 AK25 V9 AG21
20%
6.3V
20%
6.3V
20%
6.3V
FOR VDD_FIXED ON N61
2 X5R 2 X5R 2 X5R AR7 U7 F26 W10 2 4 2 4 2 4 AG23
0201-1 0201-1 0201-1
B16 VDD1 U9 F7 W12 AG25
1.8V G10 W14 AH16
B8
D33 G12 W16 AH18
K1 G14 W18 AH22
G16 W21 AH24
T1
G18 W8
1 C0415 1 C0447 1 C0468 AH26
T33 10UF 10UF 10UF
20% 20% 20% AJ17
W1 G20 Y11 6.3V 6.3V 6.3V
2 CERM-X5R 2 CERM-X5R 2 CERM-X5R
AJ19
B G22
G8
Y13
Y15
0402-9
ROOM=SOC
0402-9
ROOM=SOC
0402-9
ROOM=SOC AJ21 B
26
PP1V2 AC33 H11 Y19 AJ23
5 4 2
12 11 H13 Y23 AJ25
ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC AR11
ROOM=SOC ROOM=SOC
C0431 C0449 C0427 C0430 AR14 H15 Y25
1 C0461 1 C0462
W17
4.3UF 4.3UF 1UF 0.47UF AR19 H9 Y27 Y16
20% 20% 20% 20% 2.2UF 2.2UF
4V 4V 4V 6.3V J10 Y7 20% 20% Y18
CERM CERM CERM CERM AR22 6.3V
2 X5R 2 6.3V
1
0402
3 1
0402
3 1
0402
3 1
0402
3
AR24 J12 Y9 PP0403
P2MM-NSM 0201-1
X5R
0201-1
Y20
AR6 J14 SM Y22
VDD_FIXED_SENSE
12 V7 45_BUCK5_FB 1
VDDQ J26 PP Y24
2 4 2 4 2 4 2 4 AR8
J8 ROOM=SOC Y26
G33
J33 K11
VDD_GPU_SENSE
12 AG27 45_BUCK1_FB
M33 K13 45_BUCK0_FB
12
ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC
R33 K15
1 C0456 1 C0457 1 C0426 1 C0467 V33 K9
1.0UF 1.0UF 15PF 10UF PP0401
20%
6.3V 20% 5% 20% Y33 L10 P2MM-NSM PP0402
P2MM-NSM
SM
2 X5R 2 6.3V
X5R 2 16V 2 6.3V
CERM-X5R 1 SM
0201-1 NP0-C0G-CERM PP 1
0201-1 01005 0402-9 PP
ROOM=SOC ROOM=SOC
26 12 11 5 4 2 PP1V2
26 23 12 4 2 PP1V2_SDRAM
A 1 C0423 1
R0403 1 C0433
1
R0405 1 C0436
1
R0407 1 C0440
1
R0409
4.7K
SYNC_MASTER=N61_MLB SYNC_DATE=10/03/2013 A
0.01UF 10K 10K 4.7K 0.01UF 1% PAGE TITLE
10% 1% 0.01UF 1% 0.01UF 1% 10% 1/32W
2 6.3V
X5R
1/32W
MF
10%
6.3V
2 X5R
1/32W
MF
10%
6.3V
2 X5R
1/32W
MF
2 6.3V
X5R MF SOC:VDDCA,VDD1/2,VDD,VDD_CPU,VDD_GPU
01005 01005 2 01005
ROOM=SOC 2 01005 ROOM=SOC 01005 2 01005
ROOM=SOC 01005 2 01005
ROOM=SOC ROOM=SOC ROOM=SOC DRAWING NUMBER SIZE
ROOM=SOC
45_DDR1_VREF_CA
ROOM=SOC
45_DDR1_VREF_DQ Apple Inc. 051-0517 D
45_DDR0_VREF_CA 4 4
45_DDR0_VREF_DQ 4
4
REVISION
R
1 C0424 1
R0404 1 C0434 1
R0406 1 1 C0441
1
R0410 6.0.0
0.01UF 10K 0.01UF 10K
1 C0437 R0408 0.01UF 4.7K NOTICE OF PROPRIETARY PROPERTY: BRANCH
10% 1% 10% 1% 0.01UF 4.7K 10% 1%
2 6.3V
X5R 1/32W 2 6.3V 1/32W 10% 1%
1/32W 2 6.3V
1/32W
MF
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
01005 MF X5R MF 6.3V X5R
01005 2 X5R MF 01005 2 01005 THE POSESSOR AGREES TO THE FOLLOWING: PAGE
ROOM=SOC 2 01005 2 01005 2 01005 ROOM=SOC
ROOM=SOC ROOM=SOC ROOM=SOC 01005
ROOM=SOC ROOM=SOC
ROOM=SOC I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
4 OF 55
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 4 OF 55
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
FIJI: VDDIOD,VDDIO18,VDD_VAR_SOC
JUST A FEW GNDS VDD_SRAM, VDD_SOC
A1 AJ15 C22 J29 V10
A2 AJ18 C23 J30 V12
U0201 C24 U0201 J31 U0201 V14
A32 AJ20 POP-FIJI-1GB-DDR-B0 POP-FIJI-1GB-DDR-B0
POP-FIJI-1GB-DDR-B0 C25 J32 V16
D
A33
AA11
BGA
SYM 11 OF 13
AJ22
AJ26 C26
BGA
SYM 12 OF 13 J9
BGA
SYM 8 OF 13 V18 D
AA15 AJ28 C27 K10 V2
AA20 ROOM=SOC AJ5 C28 ROOM=SOC K12 V20
26 12
PP_VAR_SOC G24
AA24 AK10 C3 K14 V22
ROOM=SOC G26
AA26 AK14 C4 K17 ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC V24
H16
AA27 AK16 C5 K18 1 C0511 C0503 C0504 C0509 C0510 V26
10UF 4.3UF 4.3UF 1UF 0.47UF H19
AA28 AK24 C6 K20 20% 20% 20% 20% 20% V28
6.3V 4V 4V 4V 6.3V H21
C9 K22 2 CERM-X5R CERM CERM CERM CERM V29
AA31 AK27 H23
0402-9 0402 0402 0402 0402
AA5 AK28 D10 K24 V3
1 3 1 3 1 3 1 3 H25
AA7 AK29 D12 K26 V30
J15 ROOM=SOC
AA9 AK6 D13 K28 2 4 2 4 2 4 2 4 V31
J17
AB12 AK8 D18 K29 V32
J18
AB14 AL11 D19 K30 V4
J20
AB17 AL13 D20 K31 V5
J22
AB19 AL15 D21 K32 V6
J24
AB21 AL17 D22 K6 V8
K16
AB27 AL19 D23 K8 W11
K19
AB28 AL21 D24 L1 W13
K21
AB6 AL23 D27 L11 W15
K23
AB7 AL25 D4 L13 W19
K25
AB8
AC11
AL27
AL6
D5
D6
L15
L17
VDDIOD, VDDIO18 L18
W2
W23
L20
AC13 AL7 D8 L19 W25
CAPS FOR VDDIOD ARE SHARED WITH VDDQ L22 VDD_VAR_SOC
AC15 AL9 D9 L2 VSS W27
L24 0.90V - 0.95V
AC20 AM10 E11 L21 W29
M19 1.8A @ 105C
AC22 AM11 E15 L23 W3
PP1V2 E16 VDDIOD_DDRCA VDDIO18_GRP1 J6 PP1V8 M21
C AC24
AC26
AM12
AM13
E17
E19
L25
L27
26 12 11 4 2
E18 VDDIOD_DDRCA
1
ROOM=SOC
C0512 1
ROOM=SOC
C0513 1
ROOM=SOC
C0514
2 3 6 7 10 11 12 13 15 20 23
24 26 27
M23
W30
W31
C
F15 VDDIOD_DDRCA M25
AC28 AM14 E21 L29 1.0UF 1.0UF 10UF W32
F17 VDDIOD_DDRCA 20% 20% 20% N18
E23 L30 W33
AC32 AM15 K7 VDDIOD_DDRCA 2 6.3V
X5R 2 6.3V
X5R 2 6.3V
CERM-X5R N20
AC5 AM16 E24 L31 VDDIO18_GRP2 AB5 0201-1 0201-1 0402-9 W6
L6 VDDIOD_DDRCA N22
AC6 AM17 E25 L32 VDDIO18_GRP2 AE5 W7
VSS M7 VDDIOD_DDRCA N24
AC9 AM18 E26 L5 VDDIO18_GRP2 AH5 W9
VSS N6 VDDIOD_DDRCA P19
E27 L7 VDDIO18_GRP2 T6 Y10
AD10 AM19 P7 VDDIOD_DDRCA U0201 W5
P21
AD12 AM20 E28 L9 POP-FIJI-1GB-DDR-B0 VDDIO18_GRP2 Y12
P23
AD17 AM21 E6 M10 BGA Y14
VDDIO18_GRP3 AA29 P25
AD23 AM22 E7 M12 SYM 9 OF 13 Y17
AK11 VDDIOD_DDR0DQ VDDIO18_GRP3 AC29 R20
AD27 AM23 E9 M14 Y21
AK19 VDDIOD_DDR0DQ ROOM=SOC 1.8V VDDIO18_GRP3 AF29 R22
AD28 AM24 F10 VSS M18 Y28
VSS AK21 VDDIOD_DDR0DQ VDDIO18_GRP3 AJ29 R24
AD5 AM26 F12 M2 Y29
AK23 VDDIOD_DDR0DQ T21
AD7 AM28 F14 M20
AK7 VDDIO18_GRP4 F25 T23
Y5
VDDIOD_DDR0DQ
AD8 AM5 F16 M22
AK9 VDDIO18_GRP4 F28 T25
Y6
VDDIOD_DDR0DQ
AE13 AM6 F18 M24
AL10 1.2V VDDIO18_GRP4 H28 U20
Y8
F20 M26 VDDIOD_DDR0DQ
AE18 AM7 AL12 U22 AA13
AE20 AM8 F22 M28
AL18
VDDIOD_DDR0DQ
U24
VSS_SENSE PP0501
VDDIOD_DDR0DQ P2MM-NSM
AE24 AM9 F24 M29 SM
AL20 VDDIOD_DDR0DQ V21 CPU_VSS_SENSE PP 1
AE26 AN25 F27 M3
AL22 VDDIOD_DDR0DQ V23 ROOM=SOC
AE27 AN26 F29 M30
AL8 VDDIOD_DDR0DQ V25
AE28 AN27 F31 M31 GRP7 POWERS GPIO11,12 (BUTTONS)
W20
AE29 AN28 F6 M32 K27 VDDIOD_DDR1DQ VDDIO18_GRP7 T5 PP1V8_ALWAYS 3 12 14 26
W22
AE6 AN29 F8 M4 L28 VDDIOD_DDR1DQ AK13 W24
AE7 AN5 G11 M5 M27 VDDIOD_DDR1DQ
VDDIO18_PPN
AK15
1 C0520
G13 M6 N28 VDDIO18_PPN 0.1UF 45_BUCK2_FB W26 VDD_VAR_SOC_SENSE
B AE9
AF10
AN6
AP1 G15 M8 P27
VDDIOD_DDR1DQ
VDDIOD_DDR1DQ
VDDIO18_PPN
VDDIO18_PPN
AK17
AL14
20%
4V
2 X5R
01005
12
B
AF12 AP10 G17 N11 R28 VDDIOD_DDR1DQ ROOM=SOC
VDDIO18_PPN AL16
AF14 AP12 G19 N13 T27 VDDIOD_DDR1DQ
AF16 AP14 G21 N15 U28 VDDIOD_DDR1DQ
AF19 AP17 G23 N17 V27 VDDIOD_DDR1DQ
AF21 AP19 G25 N19 W28 VDDIOD_DDR1DQ
AF28 AP2 G27 N2
AF32 AP21 G28 N21
AF5 AP24 G6 N23
AF6 AP3 G9 N25
AF8 AP32 H10 N27
AG11 AP33 H12 N29
AG13 AP5 H14 N3
AG15 AP7 H17 N32
AG20 AR1 H18 N7
AG22 AR2 H2 N9
AG24 AR3 H20 P10
AG26 AR32 H22 P12
AG28 AR33 H24 P14
AG5 AR5 H26 P16
AG7 B1 H27 P18
AG9 B18 H29 P2
AH12 B2 H5 P20
AH14 B20 H6 P22
AH17 B32 H7 P24
A AH19
AH21
B33
C10
H8
J11
P26
P28 SYNC_MASTER=N61_MLB SYNC_DATE=10/08/2013 A
PAGE TITLE
AH23 C11 J13 P29
AH25 C15 J16 P3 SOC:GND,VDDIO18,VDDIOD,VDD_VAR_SOC
AH27 C16 J19 P31 DRAWING NUMBER SIZE
D D
PP3V0_NAND 12 26
OMIT_TABLE OMIT_TABLE OMIT_TABLE OMIT_TABLE OMIT_TABLE OMIT_TABLE NOSTUFF
1 C0623 1 C0622 1 C0609 1 C0602 1 C0604 1 C0610 1 C0611 1 C0613 1 C0614 1 C0633 1 C0626 1 C0627
100PF 220PF 0.47UF 1.0UF 1.0UF 15UF 15UF 15UF 15UF 15UF 15UF 15UF
5% 10% 10% 20% 20% 20% 20% 20% 20% 20% 20% 20%
16V 10V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
2 NP0-C0G 2 X7R-CERM 2 CERM-X5R 2 X5R 2 X5R 2 X5R 2 X5R 2 X5R 2 X5R 2 6.3V
X5R
6.3V
2 X5R 6.3V
2 X5R
01005 01005 0201 0201-1 0201-1 0402-1 0402-1 0402-1 0402-1 0402-1 0402-1 0402-1
ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND
27
PP1V8 2 3 5 6 7 10 11 12
13 15 20 23 24 26
26 PP1V2_NAND_VDDI 1 C0603 1 C0605 1 C0606 1 C0612 1 C0616 1 C0617 1 C0620 1 C0621 1 C0629 1 C0628
2.2UF 15UF 15UF 10UF 10UF 10UF 100PF 220PF 100PF 100PF
1 C0625 1 C0624 1 C0601 1 C0615 20% 20% 20% 20% 20% 20% 5% 10% 5% 5%
100PF 220PF 1.0UF 1.0UF 1000MA 500MA 2 6.3V
X5R 2 6.3V
X5R 2 6.3V
X5R 2 6.3V
CERM-X5R 2 6.3V
CERM-X5R 2 6.3V
CERM-X5R 2 16V
NP0-C0G 2 10V
X7R-CERM 16V
2 NP0-C0G
16V
2 NP0-C0G
5% 10% 20% 20% 0201-1 0402-1 0402-1 0402-9 0402-9 0402-9 01005 01005
2 16V
NP0-C0G 2 10V
X7R-CERM 2 6.3V
X5R 2 6.3V
X5R ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND 01005
ROOM=NAND
01005
ROOM=NAND
01005 01005 0201-1 0201-1
ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND
OB8
OC8
OD8
OE0
OF8
OA8
THE TOTAL INDUCTANCE SEEN BY THE NAND SHOULD BE <2NH
B6
F2
M6
N1
N7
G0
PP1V8 2 3 5 6 7 10 11 12 13 15 20 23
24 26 27
VDDI
1 C0640 1 C0641
VCC VCCQ 1.0UF 1.0UF
OMIT_TABLE 20% 20%
23 20 15 13 12 11 10 7 6 5 3 2PP1V8 ROOM=NAND 6.3V
2 X5R
6.3V
2 X5R
27 26 24 1 G3
R0608 6 AP_BI_NAND_ANC0_IO<0> IO0-0
CE0* A5 AP_TO_NAND_ANC0_CEN0_L 0201-1 0201-1
R06071 U0201 5%
100K 6 AP_BI_NAND_ANC0_IO<1> H2 IO1-0 U0604 CLE0 A3 AP_TO_NAND_ANC0_CLE
6
ROOM=NAND ROOM=NAND
POP-FIJI-1GB-DDR-B0 1/32W AP_BI_NAND_ANC0_IO<2> J3 IO2-0 LGA 6
100K BGA MF
6
ALE0 C1 AP_TO_NAND_ANC0_ALE 6
5% K2
NAND-1YNM-128GX8-TLC-PPN1.5-128G
2 01005 6 AP_BI_NAND_ANC0_IO<3> IO3-0 NOTE: C0640, C0641 ADDED TO N56 AND N61 FOR UF NEEDS.
1/32W E3
C MF
01005 2
ROOM=SOC
SYM 4 OF 13
ROOM=SOC
ROOM=SOC
6
6
AP_BI_NAND_ANC0_IO<4>
AP_BI_NAND_ANC0_IO<5>
L5
K6
IO4-0
IO5-0
WE0* AP_TO_NAND_ANC0_WE_L 6
C
J5 RE0 B4 NC
6 AP_BI_NAND_ANC0_IO<6> IO6-0
6 AP_TO_NAND_ANC0_CEN0_L AN16 PPN0_CEN0 PPN1_CEN0 AN8 AP_TO_NAND_ANC1_CEN0_L 6 RE0* C7 45_AP_TO_NAND_ANC0_RE_L 6
6 AP_BI_NAND_ANC0_IO<7> H6 IO7-0
AP16 PPN0_CEN1 PPN1_CEN1 AN7 NC
NC
AN22 AN9 G1 DQS0 H4 45_AP_BI_NAND_ANC0_DQS 6
6 AP_BI_NAND_ANC0_IO<0> PPN0_IO0 PPN1_IO0 AP_BI_NAND_ANC1_IO<0> IO0-1
DQS0* F4 NC
6 AP_BI_NAND_ANC0_IO<1> AP22 PPN0_IO1 PPN1_IO1 AN10 AP_BI_NAND_ANC1_IO<1> J1 IO1-1 PP0600
6 AP_BI_NAND_ANC0_IO<2> AN21 PPN0_IO2 PPN1_IO2 AN11 AP_BI_NAND_ANC1_IO<2> L1 IO2-1 P2MM-NSM
AN20 AP11 N3 R/B0* E5 NAND_TO_PP_RB 1
PP SM
6 AP_BI_NAND_ANC0_IO<3> PPN0_IO3 PPN1_IO3 AP_BI_NAND_ANC1_IO<3> IO3-1
ROOM=NAND
6 AP_BI_NAND_ANC0_IO<4> AN19 PPN0_IO4 PPN1_IO4 AN12 AP_BI_NAND_ANC1_IO<4> N5 IO4-1
CE1* C5 AP_TO_NAND_ANC1_CEN0_L 6
6 AP_BI_NAND_ANC0_IO<5> AN18 PPN0_IO5 PPN1_IO5 AN14 AP_BI_NAND_ANC1_IO<5> L7 IO5-1
CLE1 C3 AP_TO_NAND_ANC1_CLE 6
6 AP_BI_NAND_ANC0_IO<6> AP18 PPN0_IO6 PPN1_IO6 AN15 AP_BI_NAND_ANC1_IO<6> J7 IO6-1
ALE1 D2 AP_TO_NAND_ANC1_ALE 6
6 AP_BI_NAND_ANC0_IO<7> AN17 PPN0_IO7 PPN1_IO7 AP15 AP_BI_NAND_ANC1_IO<7> G7 IO7-1
WE1* E1 AP_TO_NAND_ANC1_WE_L 6
RE1 D4 NC
6 AP_TO_NAND_ANC0_ALE AP23 PPN0_ALE PPN1_ALE AP9 AP_TO_NAND_ANC1_ALE 6 RE1* D6 45_AP_TO_NAND_ANC1_RE_L 6 PP1V8 2 3 5 6 7 10 11 12 13 15 20 23
6 AP_TO_NAND_ANC0_CLE AN23 PPN0_CLE PPN1_CLE AP8 AP_TO_NAND_ANC1_CLE 6 24 26 27
1
6 AP_TO_NAND_ANC0_WE_L AR23 PPN0_WEN PPN1_WEN AR9 AP_TO_NAND_ANC1_WE_L 6 DQS1 M4 45_AP_BI_NAND_ANC1_DQS 6 R0603
6 45_AP_TO_NAND_ANC0_RE_L AP20 PPN0_REN PPN1_REN AN13 45_AP_TO_NAND_ANC1_RE_L DQS1* K4 1 C0607 50K
6
NC 1%
R0601 6 45_AP_BI_NAND_ANC0_DQS AR18 PPN0_DQS PPN1_DQS AP13 45_AP_BI_NAND_ANC1_DQS 6
R0602 0.01UF 1/32W
240 240 ROOM=NAND R/B1* E7 NC
10% MF
1 2 45_AP_PPN0_ZQ AR20 PPN0_ZQ PPN1_ZQ AR12 45_AP_PPN1_ZQ 1 2
PP0604 2 6.3V
X5R 2 01005
ROOM=SOC
1% 1% P2MM-NSM 01005
1/32W 1/32W 1 VREF G5 6 AP_TO_NAND_ANC_DQVREF ROOM=SOC
MF MF SM PP
01005 01005
ROOM=SOC ROOM=SOC NAND_TO_PP_TCKC OA0 TCKC ZQ A1 45_NAND_PPN_ZQ
PP0605 OB0 TMSC 1 C0608 1
6 AP_TO_NAND_ANC_DQVREF AR21 PPN0_VREF PPN1_VREF AR10 AP_TO_NAND_ANC_DQVREF 6 P2MM-NSM
NAND_TO_PP_TMSC VSS VSSQ
0.01UF
R0604
1 1
ROOM=NAND
10%
50K
SM PP
R0609 1%
B 6.3V
B
B2
F6
L3
A7
M2
OC0
OD0
OE8
OF0
G8
ROOM=NAND 2 X5R 1/32W
243 01005 MF
1% ROOM=SOC 2 01005
ROOM=SOC
1/32W
MF
2 01005
NOTE: NAND PADS SHOULD BE SHIELDED FROM TRACES WITH A GROUND PLANE
NOTE: IO<6> PREFERRED BY MATT BYOM (N51)
PP0601 (IS A STATUS READY BIT)
P4MM-NSM
SM
1 AP_BI_NAND_ANC0_IO<6> 6
ROOM=SOC PP
PP0602
P4MM-NSM
SM
1 45_AP_TO_NAND_ANC0_RE_L 6
ROOM=SOC PP
PP0603
P4MM-NSM
SM
PP
1 45_AP_BI_NAND_ANC0_DQS 6
ROOM=SOC
A SYNC_MASTER=N61_MLB SYNC_DATE=11/01/2013 A
PAGE TITLE
SOC:NAND
DRAWING NUMBER SIZE
VDD18_MIPID E10
VDD18_MIPID F11
VDD18_MIPIC0 E22
VDD18_MIPIC1 F23
VDD10_MIPIC E20
VDD10_MIPIC F19
VDD10_MIPIC F21
C0714 1 1 C0701 C0702 1 1 C0715 1.0UF 0.1UF
VDD10_MIPID E8
VDD10_MIPID F9
0.1UF 0.1UF 0.1UF 0.1UF 20% 20%
6.3V 4V
20% 20% 20% 20% 2 X5R 2 X5R
4V 4V 4V 4V
AL24
AL26
AM25
AM27
X5R 2 2 X5R X5R 2 2 X5R 0201-1 01005
VDD095_VPTX0_PCIE E13
VDD095_VPTX1_PCIE D11
VDD095_VP_PCIE E12
VDDA10_REFCLK_PCIE D14
VDD18_VPH_PCIE F13
01005 01005 01005 01005 ROOM=SOC ROOM=SOC
ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC
VDDA10_LPDP0
VDDA10_LPDP1
VDDA10_LPDP2
VDDA10_LPDP3
PP1V8 2 3 5 6 7 10 11 12 13 15 20 23
24 26 27
23
90_RCAM_TO_AP_MIPI_DATA0_P
90_RCAM_TO_AP_MIPI_DATA0_N
A21
B21
MIPI0C_DPDATA0
MIPI0C_DNDATA0
SYM 5 OF 13
ISP0_SCL E29
ISP0_SDA E30
AP_TO_RCAM_I2C_SCL
AP_BI_RCAM_I2C_SDA
16 23
16 23
NC
AR27 LPDP_TX1P
ULPI_DATA4
ULPI_DATA5 G2
NC
NC
C
ROOM=SOC NC 1.0V 0.95V 1.0V 1.8V ULPI_DATA6 F3
AP27 LPDP_TX1N 24MA NC
90_RCAM_TO_AP_MIPI_DATA1_P A22 NC U0201 ULPI_DATA7 F4 TOUCH_TO_AP_INT_L 24
23 MIPI0C_DPDATA1
B22 AR28 LPDP_TX2P POP-FIJI-1GB-DDR-B0
23 90_RCAM_TO_AP_MIPI_DATA1_N MIPI0C_DNDATA1 NC G5 OSCAR_TO_PMU_HOST_WAKE 13 22
VDDIO18_GRP4
11
X5R
01005
20%
4V
ROOM=SOC
90_AP_TO_WLAN_PCIE1_REFCLK1_C_N
AB3
PCIE_REF_CLK1_M
PCIE_REF_PAD_CLK_M C12
AK5
NC B
20 90_AP_TO_LCM_MIPI_CLK_P A5 MIPI0D_DPCLK PCIE_CLKREQ1_N GPIO39/PCIE_PERST0_N NC
GPIO43/PCIE_PERST1_N AL4 AP_TO_WLAN_PCIE1_RST_L
20 90_AP_TO_LCM_MIPI_CLK_N B5 MIPI0D_DNCLK MIPI1C_DPCLK A27 90_FCAM_TO_AP_MIPI_CLK_P 11 45_PCIE_RESREF A8
30
ROOM=SOC PCIE_RESREF
MIPI1C_DNCLK B27 90_FCAM_TO_AP_MIPI_CLK_N 11
45_LCM_REXT A7 MIPI0D_REXT C0720 1
0.1UF 1 R0719
1 30 90_AP_TO_WLAN_PCIE1_REFCLK1_P 1 2 R0710 100K
1 R0703 X5R 20% 200 5%
R0701 1
R0702 4.02K 01005 4V 1%
1/32W
1/32W
MF
4.02K 4.02K 1% MF
1% 2 01005
1/32W
MF
1%
1/32W
1/32W
MF C0721 2 01005
ROOM=SOC
01005 2 MF 2 01005 0.1UF
ROOM=SOC 2 01005
ROOM=SOC
ROOM=SOC
30 90_AP_TO_WLAN_PCIE1_REFCLK1_N 1 2
X5R 20%
01005 4V
ROOM=SOC
23 20 15 13 12 11 10 7 6 5 3 2 PP1V8
27 26 24
1
R0711
100K
5%
1/32W
MF
2 01005
ROOM=SOC
30 WLAN_TO_AP_PCIE1_CLKREQ_L
A SYNC_MASTER=N61_MLB SYNC_DATE=11/01/2013 A
PAGE TITLE
SOC:CAM,LCD,LPDP,PCIE
DRAWING NUMBER SIZE
BUTTON FLEX (BUTTONS, ANC REF MIC, STROBE, STROBE_NTC, WIFI FLEX PAC)
J0801
D FL0813 AA25D-S010VA1
F-ST-SM D
120-OHM-210MA 12
2 1 CODEC_TO_REARMIC2_BIAS_CONN 11
26 10 PP_CODEC_TO_REARMIC2_BIAS 8
01005
ROOM=BUTTON 1 C0827 26 16 8 PP_STRB_DRIVER_TO_LED_WARM 2 1 RCAM_TO_STROBE_NTC_CONN 8
100PF 4 3 REARMIC2_TO_CODEC_P_CONN 8
MIC2 (ANC REF MIC): 5%
MIC2/4 BIAS, 2 16V
NP0-C0G
6 5
01005 REARMIC2_TO_CODEC_N_CONN 8 7
MIC2_P,_N ROOM=BUTTON 8
8 CODEC_TO_REARMIC2_BIAS_CONN 10 9 BUTTON_TO_AP_HOLD_KEY_CONN_L 8
FL0801 13 PP_STRB_DRIVER_TO_LED_COOL 8
120-OHM-210MA 16 26
14
9 REARMIC2_TO_CODEC_P 2 1 REARMIC2_TO_CODEC_P_CONN 8
01005
ROOM=BUTTON
1 C0801
56PF
5%
16V
2 NP0-C0G
01005
ROOM=BUTTON
LEFT BUTTON FLEX B2B
APN: 516S1317 (RCPT)
FL0802
120-OHM-210MA J0802
REARMIC2_TO_CODEC_N 2 1 REARMIC2_TO_CODEC_N_CONN 505066-0610
9 8
F-ST-SM
01005 8 7
ROOM=BUTTON 1 C0802
56PF
5% 8 BUTTON_TO_AP_VOL_DOWN_CONN_L 2 1
16V
2 NP0-C0G 4 3
01005
C ROOM=BUTTON
8 BUTTON_TO_AP_VOL_UP_CONN_L 6 5 BUTTON_TO_AP_RINGER_A_CONN 8 C
10 9
XW0801
SM
10 BUTTON_CONN_GND 1 2
ROOM=BUTTON
FL0819
120-OHM-210MA
13 3 BUTTON_TO_AP_HOLD_KEY_L 1 2 BUTTON_TO_AP_HOLD_KEY_CONN_L 8
01005
ROOM=BUTTON
1
C0810 1
0201
27PF
5% 5.5V-6.2PF
6.3V
NP0-C0G 2 DZ0810
0201 2 ROOM=BUTTON
ROOM=BUTTON
FL0810
120-OHM-210MA
13 3 BUTTON_TO_AP_RINGER_A 1 2 BUTTON_TO_AP_RINGER_A_CONN 8 PP_STRB_DRIVER_TO_LED_WARM 8 16 26
01005 STROBE: 1 C0824
ROOM=BUTTON
1 LED WARM C0822 1
27PF
C0819 1 100PF 5%
5% 16V
27PF 16V 2 NP0-C0G
B 5%
6.3V
NP0-C0G 2
0201
5.5V-6.2PF
DZ0811
NP0-C0G 2
01005
ROOM=BUTTON
01005
ROOM=BUTTON
B
0201
ROOM=BUTTON 2 ROOM=BUTTON
26 16 8 PP_STRB_DRIVER_TO_LED_COOL
STROBE:
C0826 1 1 C0825
BUTTONS: 100PF 27PF
LED COOL 5%
16V 5%
RINGER, HOLD, FL0811 NP0-C0G 2
01005
2 16V
NP0-C0G
120-OHM-210MA ROOM=BUTTON 01005
VOL_UP/DOWN, 1 2
ROOM=BUTTON
13 3 BUTTON_TO_AP_VOL_DOWN_L BUTTON_TO_AP_VOL_DOWN_CONN_L 8
01005
C0820 1
ROOM=BUTTON
1 DZ0812
100PF 12V-33PF
5% 01005-1
10V
NP0-C0G 2
01005
2 ROOM=BUTTON FL0817
ROOM=BUTTON
120-OHM-210MA NOTE: STROBE_NTC
16 RCAM_TO_STROBE_NTC 1 2 RCAM_TO_STROBE_NTC_CONN 8
A SYNC_MASTER=N61_MLB SYNC_DATE=11/01/2013 A
PAGE TITLE
C0922
0.1UF
1 2
20% X5R
4V 01005
ROOM=CODEC
18 9 LOWERMIC1_TO_CODEC_P
VOICE MIC C0923
18 9 LOWERMIC1_TO_CODEC_N
0.1UF
NOSTUFF NOSTUFF 1 2
1 C0927 1 C0930 20% X5R
56PF 56PF 4V 01005
5% 5% ROOM=CODEC
16V 16V
2 NP0-C0G 2 NP0-C0G
01005 01005
ROOM=CODEC ROOM=CODEC
ROOM=CODEC
R0915 ROOM=CODEC
1
1.33K2
18 9 CODEC_TO_HPHONE_HS4
1%
1/32W
C0920 U0900
MF 0.1UF WLCSP
01005 1 2 SYM 1 OF 3
C NO_XNET_CONNECTION=TRUE LOWERMIC1_TO_AIN1_P G2 AIN1+ PRIMARY AOUT1+ K7 CODEC_TO_RCVR_P 11 C
CS42L67-CWZR-A1
20% X5R
ROOM=CODEC 4V 01005 LOWERMIC1_TO_AIN1_N G1 AIN1- (VOICE) MIC AOUT1- L7 CODEC_TO_RCVR_N 11
C0904 1 EXTMIC_TO_CODEC_P ROOM=CODEC
HEADPHONE MIC 220PF
10%
EXTMIC_TO_AIN2_P F4 AIN2+ HEADPHONE AOUT2+ L5 CODEC_TO_HAC_P 11
EXTMIC_TO_CODEC_N C0921
10V EXTMIC_TO_AIN2_N F3 AIN2- MIC AOUT2- K5 CODEC_TO_HAC_N
X7R-CERM 2 11
NO_XNET_CONNECTION=TRUE 0.1UF
1 2 F2 AIN3+ ANALOG LINEOUT_REF K8
NC MIC IN
ROOM=CODEC 20% X5R F1 AIN3-
4V 01005 NC LINEOUTA J8
R0950 ROOM=CODEC NC
1.33K2 01005
NC E4 AIN4+ ANC
REF MIC2 LINEOUTB H8 NC
18 9 CODEC_TO_HPHONE_HS3 1
E3 AIN4-
1% NC HPOUTA J9 CODEC_TO_HPHONE_L 18
1/32W
MF REARMIC2_TO_AIN5_P E1 AIN5+ ANC HPOUTB K9 CODEC_TO_HPHONE_R 18
01005
NO_XNET_CONNECTION=TRUE REARMIC2_TO_AIN5_N E2 AIN5- REF MIC1 NOSTUFF
HS3 K1 CODEC_TO_HPHONE_HS3 NOSTUFF
C0940 D1 AIN6+ ANC
9 18
C0950 1 C0951 1
0.1UF FRONTMIC3_TO_AIN6_P 56PF 56PF
D2 AIN6- ERROR MIC HS4 L2 CODEC_TO_HPHONE_HS4 9 18
5% 5%
1 2 FRONTMIC3_TO_AIN6_N 16V 16V
NP0-C0G 2 NP0-C0G 2
20% X5R D3 AIN7+ ANALOG HS3_REF L9 CODEC_TO_HPHONE_HS3_REF 18 01005 01005
4V 01005 NC
ROOM=CODEC D4 LINEIN HS4_REF L8 CODEC_TO_HPHONE_HS4_REF 18 ROOM=CODEC ROOM=CODEC
9 8 REARMIC2_TO_CODEC_P NC AIN7-
ANC REF MIC HPDETECT G8 HPHONE_TO_CODEC_DET 18
9 8 REARMIC2_TO_CODEC_N C0941 NC
C1 AIN8+ ANALOG
LINEIN
0.1UF C2 AIN8- DN G10
NOSTUFF NOSTUFF 1 2 NC
1 C0942 1 C0943 LOWERMIC1_TO_DIN1_SD A6 DMIC1_SD DP F10 ROOM=CODEC
20% X5R
56PF 56PF 4V 01005 LOWERMIC1_TO_DIN1_SCLK B6 DMIC1_SCLK C0952
5% 5% ROOM=CODEC MBUS_REF F11
2 16V 2 16V 100PF
NP0-C0G NP0-C0G
01005 01005 MIC2MIC3_TO_DIN2_SD A3 DMIC2_SD 1 2
ROOM=CODEC ROOM=CODEC
MIC2MIC3_TO_DIN2_SCLK A2 DMIC2_SCLK
5%
C0944 R0902 10V
NP0-C0G
0.1UF 1
20.0 2 01005
B 1
20%
2
X5R 90_CODEC_BI_TRISTAR_MIKEYBUS_L67_N
5%
1/32W
MF
01005 1
ROOM=CODEC
C0953 90_CODEC_BI_TRISTAR_MIKEYBUS_N 17
B
4V 01005 ROOM=CODEC 100PF
ROOM=CODEC 90_CODEC_BI_TRISTAR_MIKEYBUS_L67_P 5% NOSTUFF
11 9 FRONTMIC3_TO_CODEC_P R0903 10V
2 NP0-C0G
90_CODEC_BI_TRISTAR_MIKEYBUS_P 17
ROOM=SOC
NO_XNET_CONNECTION=TRUE
R09412 NOSTUFF
18 9 LOWERMIC1_TO_CODEC_P 1
0.00 01005
R0942
ROOM=SOC
18 9 LOWERMIC1_TO_CODEC_N NO_XNET_CONNECTION=TRUE 1 2 NOSTUFF
0.00 01005
ROOM=SOC
NO_XNET_CONNECTION=TRUE
R09432 NOSTUFF
9 8 REARMIC2_TO_CODEC_P 1
A 0.00
R0944
01005
SYNC_MASTER=N61_MLB SYNC_DATE=11/01/2013 A
ROOM=SOC PAGE TITLE
FRONTMIC3_TO_CODEC_P NO_XNET_CONNECTION=TRUE 1 2 NOSTUFF
11 9
0.00
ROOM=SOC
01005 AUDIO:L67 CODEC (1/2)
DRAWING NUMBER SIZE
R09452
9 8 REARMIC2_TO_CODEC_N NO_XNET_CONNECTION=TRUE 1
0.00
NOSTUFF
01005 Apple Inc. 051-0517 D
REVISION
R0946
ROOM=SOC
R
6.0.0
FRONTMIC3_TO_CODEC_N NO_XNET_CONNECTION=TRUE 1 2 NOSTUFF
11 9
0.00 01005 NOTICE OF PROPRIETARY PROPERTY: BRANCH
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
9 OF 55
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 9 OF 55
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
ROOM=CODEC
A1
40 32 30 26 23 17 16 15 14 12
53 52 49
PP_VCC_MAIN
ROOM=CODEC 3 45_AP_TO_CODEC_I2S0_MCLK A9 MCLK U0900 C5
WLCSP
1 C1074 1 C1022 1 C1031 1 C1075 WEAK INT PD
SYM 3 OF 3 B1
2.2UF 0.1UF 2.2UF
CS42L67-CWZR-A1
2.2UF 3 45_AP_TO_CODEC_ASP_I2S0_BCLK C10 ASP_SCLK
20% 20% 20% 20% F9
6.3V
2 X5R 6.3V 6.3V
2 X5R-CERM 6.3V
2 X5R 3 AP_TO_CODEC_ASP_I2S0_LRCLK B11 ASP_LRCK
2 X5R D5
0201-1 0201-1 01005 0201-1 3 AP_TO_CODEC_ASP_I2S0_DOUT C9 ASP_SDIN
ROOM=CODEC ROOM=CODEC ROOM=CODEC D7
PP1V8 PCB: C1021 AT U0921.L6 3 CODEC_TO_AP_ASP_I2S0_DIN A8 ASP_SDOUT
23 20 15 13 12 11 7 6 5 3 2
27 26 24 ALL ASP PINS:WEAK INT PD
E5
1 C1013 3 45_AP_TO_CODEC_VSP_I2S4_BCLK E9 VSP_SCLK E6
0.1UF 3 AP_TO_CODEC_VSP_I2S4_LRCLK E8 VSP_LRCK/FSYNC E7
20% GND
4V AP_TO_CODEC_VSP_I2S4_DOUT D10 F5
2 X5R 3 VSP_SDIN
01005 CODEC_TO_AP_VSP_I2S4_DIN D11 F6
ROOM=CODEC 3 VSP_SDOUT
ALL VSP PINS:WEAK INT PD
F7
30 26 17 15 14 13 12 10 4 3 PP1V8_SDRAM 16 3 45_AP_TO_CODEC_XSP_I2S2_BCLK B8 XSP_SCLK F8
1 C1014 1 C1016 16 3 AP_TO_CODEC_XSP_I2S2_LRCLK B7 XSP_LRCK/FSYNC G7
10UF 0.1UF 16 3 AP_TO_CODEC_XSP_I2S2_DOUT C7 XSP_SDIN/DAC2B_MUTE
20% 20% H3
2 6.3V
CERM-X5R 2 4V
X5R 16 3 CODEC_TO_AP_XSP_I2S2_DIN A7 XSP_SDOUT
ALL XSP PINS:WEAK INT PD H4
0402-9 01005
ROOM=CODEC ROOM=CODEC J3
PP1V8_VA_L19_L67 3 AP_TO_CODEC_SPI_CS_L B5 CS*
26 16 12 J4
C B4
C
VCP G11
A11
B10
VPROG_CP H11
3 AP_TO_CODEC_SPI_CLK CCLK
C1012
VA J1
VL B9
VP L6
1
ROOM=CODEC AP_TO_CODEC_SPI_MOSI B3 CDIN
2.2UF PP1V8_SDRAM
3
20% 30 26 17 15 14 13 12 10 4 3 CODEC_TO_AP_SPI_MISO A4 CDOUT
VD
6.3V 3
2 X5R WEAK INT PD
0201-1 KEEP THESE CAPS AT CODEC PINS ROOM=CODEC L67 WEAK INT PD = 550K - 2450K
1
10 CODEC_AGND ROOM=CODEC
ROOM=CODEC
R1045 3 CODEC_TO_AP_INT_L G4 INT*
1 C1032 1.00K
5%
U0900 FLYP J11 26 PP_CODEC_VHP_FLYP
2.2UF
20%
1/32W
MF 13 CODEC_TO_PMU_MIKEY_INT_L G5 WAKE*
WLCSP 6.3V
2 X5R 2 01005
D8
SYM 2 OF 3 G9 26 PP_CODEC_VHP_FLYC 0201-1 G3 D9
CODEC_RESET_L RESET*
CS42L67-CWZR-A1
FLYC ROOM=CODEC
H10 1 C1033 KEEP THESE CAPS AT CODEC PINS E10
B2
J10 PP_CODEC_VHP_FLYN 2.2UF ROOM=CODEC NC E11 TSTI C3
KEEP THESE CAPS AT CODEC PINS 26 20%
PP_CODEC_TO_MIC1_BIAS J5 FLYN H9 6.3V
2 X5R 1 C1025 NC C4
26 18 MIC1_BIAS A5
ROOM=CODEC 0201-1 4.7UF NC C11
C1020 1 C1021 +VCP_FILT K11 26 PP_CODEC_VCPFILT+ XW1048 20%
6.3V
2 X5R-CERM1 NC
C6 TSTO
ROOM=CODEC 1.0UF 4.7UF SM C8
1 20% 2 1 MIC1_BIAS_FILT J6 MIC1_BIAS_FILT
402 NC
R1000 6.3V 18 MIC1_BIASFILT_RET GNDCP0 K10 PGND_CODEC_GNDCP 1 2 D6
X5R 2 ROOM=CODEC NC
2.21K 0201-1 20% GNDCP1 L11 ROOM=CODEC
1%
1/32W CODEC_AGND 10
6.3V 1 C1029
MF X5R-CERM1
402 -VCP_FILT L10 26 PP_CODEC_VCPFILT- 4.7UF TSTO MUST BE NC
2 01005 20%
6.3V
26 PP_EXTMIC_BIAS_IN L4 MIC2_BIAS_IN SPEAKER_VQ J7 26 PP_CODEC_SPKR_VQ
ROOM=CODEC
2 X5R-CERM1
ROOM=CODEC 402
1 C1037 26 PP_EXTMIC_BIAS L3 MIC2_BIAS
1 C1034 ROOM=CODEC
402 20%
ROOM=CODEC 6.3V REARMIC2_TO_CODEC_RET_FILT H5 MIC4_BIAS_FILT
A10 GNDD
A SYNC_MASTER=N61_MLB SYNC_DATE=11/01/2013 A
PAGE TITLE
37
AA22L
F-ST-SM
41 ROOM=CG_B2B
38
11 CODEC_TO_RCVR_CONN_P 3 4 CODEC_TO_HAC_CONN_N 11
26 11 PP1V8_FCAM_CONN 5 6 PP1V2_FCAM_VDDIO_CONN 11 26
26 11 PP2V85_FCAM_AVDD_CONN 7 8
D FL1123
VF = 1.65 +/- 0.05V
SPECIAL Z = 0.60 MM MAX
9
11
10
12
90_FCAM_TO_AP_MIPI_DATA0_CONN_N
90_FCAM_TO_AP_MIPI_DATA0_CONN_P
11
11
D
FERR-22-OHM-1A-0.055OHM IRLED = 104-128MA 13 14
26 12 11 PP3V0_PROX_IRLED 11 45_AP_TO_FCAM_CLK_CONN 90_FCAM_TO_AP_MIPI_CLK_CONN_P 11
PP1V8 1 2 PP1V8_FCAM_CONN
15 13 12 10 7 6 5 3 2 11 26
11 AP_TO_FCAM_SCL_CONN 15 16 90_FCAM_TO_AP_MIPI_CLK_CONN_N 11
27 26 24 23 20
0201
1 C1107
1 C1103 1 C1144 1 C1101 1 C1114 1 C1106 AP_TO_FCAM_SHUTDOWN_CONN 17 18 90_FCAM_TO_AP_MIPI_DATA1_CONN_P
ROOM=CG_B2B
0.1UF
1 C1104 5%
100PF
20%
0.1UF
20%
2.2UF
20%
2.2UF 4.3UF
20%
11
AP_BI_FCAM_SDA_CONN 19 20 90_FCAM_TO_AP_MIPI_DATA1_CONN_N
11
100PF 11 11
20% 5% 2 16V 2 4V 2 6.3V 2 6.3V 2 4V 21 22
2 4V
X5R 16V
2 NP0-C0G
NP0-C0G
01005
X5R
01005
X5R
0201-1
X5R
0201-1
X5R-CERM
0610-1
01005 ROOM=CG_B2B ROOM=CG_B2B ROOM=CG_B2B ROOM=CG_B2B ROOM=CG_B2B 26 11 PP3V0_PROX_CONN
23 24
ROOM=CG_B2B
01005
ROOM=CG_B2B 25 26
11 CUMULUS_TO_PROX_RX_EN_1V8_CONN 45_PROX_TO_CUMULUS_RX_CONN 11 24
11 PGND_IRLED_K 27 28 PP3V0_PROX_IRLED 11 12 26
FL1166 29 30 PP3V0_ALS_CONN 11 26
FERR-22-OHM-1A-0.055OHM 11 AP_BI_I2C2_SDA_ALS_CONN 31 32 ALS_TO_AP_INT_CONN_L 11
26 12 5 4 2 PP1V2 2 1 PP1V2_FCAM_VDDIO_CONN 11 26
FL1104 11 AP_TO_I2C2_SCL_ALS_CONN 33 34 FRONTMIC3_TO_CODEC_N_CONN 11
120-OHM-25%-250MA-0.5DCR
0201 5 MA PP_CODEC_TO_FRONTMIC3_BIAS_CONN 35 36 FRONTMIC3_TO_CODEC_P_CONN
ROOM=CG_B2B 1 C1167 1 C1166 26 12 PP3V0_PROX_ALS 2 1 PP3V0_PROX_CONN 11 26
26 11 11
2.2UF 01005
20%
6.3V 2
5%
16V
2 NP0-C0G
20%
6.3V
2 X5R-CERM
C1108 1 C1109 1 C1113 1 ROOM=CG_B2B 1 C1163 1 C1100 ROOM=CG_B2B 1 DZ1115
X5R 01005 01005
4.3UF 2.2UF 2.2UF 100PF 0.1UF 6.8V-100PF
01005
0201-1 20% 20% 20% 5% 20%
ROOM=CG_B2B ROOM=CG_B2B 4V 6.3V 6.3V
ROOM=CG_B2B X5R-CERM 2 X5R 2 X5R 2
16V
2 NP0-C0G
6.3V
2 X5R-CERM 2 ROOM=CG_B2B
C 0610-1
ROOM=CG_B2B
0201-1
ROOM=CG_B2B
0201-1
ROOM=CG_B2B
01005
ROOM=CG_B2B
01005
ROOM=CG_B2B ROOM=CG_B2B C
FL1164
70-OHM-25%-0.28A
FL1113 2 1
120-OHM-25%-250MA-0.5DCR 9 CODEC_TO_HAC_N CODEC_TO_HAC_CONN_N 11
PROX_RX SIGNAL MUST BE TREATED WITH CARE 01005
7 45_AP_TO_FCAM_CLK 1 2 45_AP_TO_FCAM_CLK_CONN 11
NO_XNET_CONNECTION=TRUE
01005 1 DZ1118
ROOM=CG_B2B 1 C1198 FL1158 12V-33PF
01005-1
56PF
5% 24 CUMULUS_TO_PROX_RX_EN_1V8 1 2 CUMULUS_TO_PROX_RX_EN_1V8_CONN 11 2 ROOM=CG_B2B
16V
2 NP0-C0G
01005 ALS, 120-OHM-210MA 1 C1158
ROOM=CG_B2B
CAMERA ROOM=CG_B2B 01005
ROOM=CG_B2B 56PF
FL1165
70-OHM-25%-0.28A
FL1112 PROX
5%
16V
2 NP0-C0G 2 1
120-OHM-25%-250MA-0.5DCR
01005 AUDIO 9 CODEC_TO_HAC_P
01005
CODEC_TO_HAC_CONN_P 11
7 AP_TO_FCAM_SHUTDOWN 1 2 AP_TO_FCAM_SHUTDOWN_CONN 11
ROOM=CG_B2B NO_XNET_CONNECTION=TRUE
01005 1 DZ1119
ROOM=CG_B2B 1 C1102 45_PROX_TO_CUMULUS_RX_CONN
12V-33PF
01005-1
56PF 24 11
5% 2 ROOM=CG_B2B
16V
2 NP0-C0G 1 C1162
01005 56PF ROOM=CG_B2B
ROOM=CG_B2B 5%
FL1115 16V
2 NP0-C0G
FL1151
01005
70-OHM-25%-0.28A
120-OHM-25%-250MA-0.5DCR ROOM=CG_B2B
CODEC_TO_RCVR_N 1 2 CODEC_TO_RCVR_CONN_N
7 AP_TO_FCAM_I2C_SCL 1 2 AP_TO_FCAM_SCL_CONN 11 FL1102 9
01005 NO_XNET_CONNECTION=TRUE
11
01005
ROOM=CG_B2B 1 C1192 20 3 AP_BI_I2C2_SDA 1 2 AP_BI_I2C2_SDA_ALS_CONN 11
1 DZ1116
12V-33PF
56PF 120-OHM-210MA 01005-1
5%
16V 01005
1 C1111 2 ROOM=CG_B2B
2 NP0-C0G ROOM=CG_B2B 56PF
01005 5%
16V
ROOM=CG_B2B 2 NP0-C0G ROOM=CG_B2B
B FL1114
120-OHM-25%-250MA-0.5DCR FL1120
01005
ROOM=CG_B2B
FL1152
70-OHM-25%-0.28A
B
1 2 CODEC_TO_RCVR_P 1 2 CODEC_TO_RCVR_CONN_P
7 AP_BI_FCAM_I2C_SDA AP_BI_FCAM_SDA_CONN 11
20 3 AP_TO_I2C2_SCL 1 2 AP_TO_I2C2_SCL_ALS_CONN
9 11
11
01005 01005 NO_XNET_CONNECTION=TRUE
ROOM=CG_B2B 1 C1196 120-OHM-210MA 1 DZ1117
56PF
01005
ROOM=CG_B2B
1 C1110 12V-33PF
5% 56PF 01005-1
16V 5%
2 NP0-C0G 2 16V 2 ROOM=CG_B2B
01005 NP0-C0G
01005
ROOM=CG_B2B ROOM=CG_B2B ROOM=CG_B2B
L1139
65-OHM-0.1A-0.7-2GHZ FL1157 FL1103
TAM0605
SYM_VER-1
120-OHM-210MA
3 ALS_TO_AP_INT_L 2 1 ALS_TO_AP_INT_CONN_L 11
90_FCAM_TO_AP_MIPI_DATA0_N 4 1 FRONTMIC3_TO_CODEC_N 1 2 FRONTMIC3_TO_CODEC_N_CONN 11
7 90_FCAM_TO_AP_MIPI_DATA0_CONN_N 11
9
120-OHM-210MA 01005
01005 1 C1112 NO_XNET_CONNECTION=TRUE
90_FCAM_TO_AP_MIPI_DATA0_P 3 2
ROOM=CG_B2B
5%
56PF 1 DZ1114
7 90_FCAM_TO_AP_MIPI_DATA0_CONN_P 11 16V 6.8V-100PF
ROOM=CG_B2B 2 NP0-C0G 01005
01005 2 ROOM=CG_B2B
L1140
65-OHM-0.1A-0.7-2GHZ
11 PGND_IRLED_K ROOM=CG_B2B
ROOM=CG_B2B
TAM0605
SYM_VER-1 FL1101
7
90_FCAM_TO_AP_MIPI_DATA1_P 4 1 90_FCAM_TO_AP_MIPI_DATA1_CONN_P 11 3 120-OHM-210MA
Q1101 ROOM=CG_B2B 9 FRONTMIC3_TO_CODEC_P 2 1 FRONTMIC3_TO_CODEC_P_CONN 11
D NO_XNET_CONNECTION=TRUE
01005
90_FCAM_TO_AP_MIPI_DATA1_N 3 2 90_FCAM_TO_AP_MIPI_DATA1_CONN_N 11 DMN3730UFB4
7
G
DFN1006H4-3
1 DZ1113
ROOM=CG_B2B 1 CUMULUS_TO_PROX_TX_EN_BUFF 24 6.8V-100PF
S 01005
L1135
65-OHM-0.1A-0.7-2GHZ SYM_VER_1 1
R1185 2 ROOM=CG_B2B
TAM0605 1.00M
SYM_VER-1
2 5%
7 90_FCAM_TO_AP_MIPI_CLK_P 4 1 90_FCAM_TO_AP_MIPI_CLK_CONN_P 11 1/32W
A MF
2 01005
ROOM=CG_B2B SYNC_MASTER=N61_MLB SYNC_DATE=11/01/2013 A
PAGE TITLE
90_FCAM_TO_AP_MIPI_CLK_N 3 2 90_FCAM_TO_AP_MIPI_CLK_CONN_N 11
7
ROOM=CG_B2B CAMERA:FRONT FLEX CONN
DRAWING NUMBER SIZE
H7 VDD1(BUCK3)=0.045A
SAME POLARITY
L1209 ROOM=PMU L1216 +
ADI PMU 1UH-3.0A-0.059OHM 1.0UH-20%-2.4A-0.075HM
BUCK3_SW1=0.500A
1 2 0V775/0V95/1V0 PP_CPU
BUCK3_SW3=0.?A
BUCK3_SW2=0.?A
4 26 1 2 PP1V8_SDRAM 3 4 10 13 14 15 17
26 30
PIFA20161B
TOTAL=0.545A
PIFE20161T-SM
1 1 1 1 ROOM=PMU NOSTUFF
L1210 ROOM=PMU C1290 C1292 C1294 C1235 1 C1299 1 C1296 1 C1297 1 C1293 1 C1243
(BUCK, LDO, VIBE DRIVER, 32K, CHARGER) 0.47UH-20%-3.3A-0.065OHM 15UF 15UF 15UF 15UF XW1218
SHORT-10L-0.1MM-SM 100PF 100PF 100PF 15UF 15UF
H7 VDD_CPU
20% 20% 20% 20% 5% 5% 5% 20% 20%
1 2 2 6.3V
X5R 2 6.3V
X5R 2 6.3V
X5R 2 6.3V
X5R
1 2 16V
2 NP0-C0G
16V
2 NP0-C0G
16V
2 NP0-C0G
6.3V
2 X5R
6.3V
2 X5R
9.0A MAX
NOTE: L1210, L1212 BOMOPTIONS MCMK2012TR47M-SM
0402-1 0402-1 0402-1 0402-1 ROOM=PMU 01005 01005 01005 0402-1 0402-1
REVISIT VCC_MAIN CAPS CONTROLLED ON PAGE1 ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU
L1211 ROOM=PMU
MAX
MAX
MAX
MAX
MAX
APN: 338S1251 (ADI AZ) 1UH-3.0A-0.059OHM
D U1202 ROOM=PMU
1
PIFA20161B
2
1 C1222 1 C1245 1 C1262 1 C1228 D
15UF 15UF 15UF 15UF
D2186AZE0FJAVAC
FCCSP-N56-N61
L1212 ROOM=PMU 20%
2 6.3V
20%
2 6.3V
20%
2 6.3V
20%
2 6.3V
0.47UH-20%-3.3A-0.065OHM X5R X5R X5R X5R
0402-1 0402-1 0402-1 0402-1
SYM 1 OF 3 1 2 ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU
N16 VBUS_OVP_OFF A7 26 PP_BUCK0_LX0 MCMK2012TR47M-SM
NC DIDT=TRUE
B7
NOSTUFF M20 BUCK0_LX0
NC C7
M21 VCENTER
R1201 NC A9 26 PP_BUCK0_LX1
PP5V0_USB 1
470 2 26 PP5V0_USB_TO_PMU N20 B9 DIDT=TRUE
26 25 18 17 14
BUCK0_LX1
5% N21 C9
1/32W
MF-LF P20 VBUS A12 26 PP_BUCK0_LX2
01005 DIDT=TRUE SAME POLARITY
P21 B12
BAT/USB
ROOM=PMU BUCK0_LX2
C12 L1213 ROOM=PMU L1217 +
1UH-3.0A-0.059OHM
BUCK4_SW2=0.100A
BUCK4_SW1=1.000A
1.0UH-20%-2.4A-0.075HM
H20 A14 26 PP_BUCK0_LX3 ROOM=PMU
NC
(BUCK4)=0.500A
1 2 0V9/0V95 PP_GPU
H7 VDD_GPU
H7 VDDCA,VDD2
H21 IBAT B14 DIDT=TRUE 4 26 1 2 PP1V2_SDRAM 2 4 12 23 26
NC BUCK0_LX3
TOTAL=1.600A
PIFA20161B PIFE20161T-SM
4.16A MAX
C14
CHARGER_VBATT_SNS K10 VBAT L1214 ROOM=PMU 1 C1203 1 C1227 1 C1210 1 C1226 XW1220 1 C1288 1 C1214 1 C1216
25 14 0.47UH-20%-3.3A-0.065OHM 15UF 15UF 15UF 15UF SHORT-10L-0.1MM-SM 100PF 15UF 15UF
20% 20% 20% 20% 1 2 5% 20% 20%
1 2 2 6.3V
X5R 2 6.3V
X5R 2 6.3V
X5R 2 6.3V
X5R 2 16V
NP0-C0G 2 6.3V
X5R 2 6.3V
X5R
L16 ACT_DIO BUCK0_FB E7 45_BUCK0_FB 4
ROOM=PMU
NC MCMK2012TR47M-SM 0402-1 0402-1 0402-1 0402-1 01005 0402-1 0402-1
ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU
L20 A3 26 PP_BUCK1_LX0
NC DIDT=TRUE
MAX
MAX
MAX
MAX
L21 CHG_LX BUCK1_LX0 B3
NC
C3
40 32 30 26 23 17 16 15 14 10 PP_VCC_MAIN J20
53 52 49 A5 26 PP_BUCK1_LX1
J21 VCC_MAIN DIDT=TRUE
1 C1220 1 C1200 1 C1217 1 C1218 1 C1250 K7 VCC_MAIN_S BUCK1_LX1 B5
10UF 10UF 10UF 10UF 10UF C5
20% 20% 20% 20% 20%
2 6.3V 2 6.3V 2 6.3V 2 6.3V 2 6.3V
C CERM-X5R
0402-9
ROOM=PMU
CERM-X5R
0402-9
ROOM=PMU
CERM-X5R
0402-9
ROOM=PMU
CERM-X5R
0402-9
ROOM=PMU
CERM-X5R
0402-9
ROOM=PMU
A4
B4
L1215ROOM=PMU
1.0UH-20%-2.4A-0.075HM L1218 ROOM=PMU C
BUCK
VDD_BUCK1 BUCK1_FB E4 45_BUCK1_FB 4
1.0UH-20%-2.4A-0.075HM
C4 1 2 0V9/0V95 PP_VAR_SOC 5 26
1.8A MAX
H7 VAR
VDD_SRAM_SOC
1 2 PP0V95_FIXED_SOC
H7 VDD_SRAM,
4 7 26
F1 PIFE20161T-SM
G1 PP_BUCK2_LX PIFE20161T-SM
BUCK INPUT
26
F2 VDD_BUCK2 DIDT=TRUE 1 C1223 1 C1275 1 C1289
BUCK2_LX G2 L1219 ROOM=PMU 1 C1240 1 C1202 1 C1209 1 C1241
3.3A MAX
K1 15UF 15UF 15UF 0.47UH-30%-2.7A-0.065OHM 15UF 15UF 15UF 15UF
20% 20% 20%
1 C1251 1 C1225 1 C1260 1 C1263 1 C1267 K2 VDD_BUCK3 2 6.3V
X5R 2 6.3V
X5R 2 6.3V
X5R 1 2
20%
6.3V
20%
6.3V
20%
6.3V
20%
6.3V
10UF 10UF 10UF 10UF 10UF E20 BUCK2_FB F4 45_BUCK2_FB 5 0402-1 0402-1 0402-1
2 X5R 2 X5R 2 X5R 2 X5R
20% 20% 20% 20% 20% ROOM=PMU ROOM=PMU ROOM=PMU MCKK2012-SM 0402-1 0402-1 0402-1 0402-1
2 6.3V
CERM-X5R 2 6.3V
CERM-X5R 2 6.3V
CERM-X5R 2 6.3V
CERM-X5R 2 6.3V
CERM-X5R E21 VDD_BUCK4 ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU
0402-9 0402-9 0402-9 0402-9 0402-9 J1
ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU A17 26 PP_BUCK3_LX
BUCK3_LX J2 DIDT=TRUE
B17
VDD_BUCK5 BUCK3_FB K6 45_BUCK3_FB
C17
P5 PP1V8 2 3 5 6 7 10 11 13 15 20 23 24
N9 VDD_BUCK6 26 27
BUCK3_SW1 N5
N8 VDD_BYP_BUCK6 P6 PP1V8_GRAPE
1 C1285 1 C1298 REMOVED C1211 1 C1264 1 C1266 A8 BUCK3_SW2 R6
24 26
0201-1
ROOM=PMU R12 VIB BUCK5_LX0
NC C16
N12 VIB_PWM_EN
A18 26 PP_BUCK5_LX1
C1 XTAL1 B18 DIDT=TRUE
XTAL
BUCK5_LX1
D1 XTAL2 C18
G9 VSS_RTC BUCK5_FB C21 45_BUCK5_FB 4
TO DO: REVIEW ALL LDO ASSIGNMENTS
DIDT=TRUE (CHECK VDD_LDO INPUT SOURCE,
CHECK CURRENT RATING FOR LDO OUT
BUCK6_LX R9 26 PP_BUCK6_LX
SOC USB PHY (25 MA) VS. LOAD REQUIREMENT AT DESTINATION, ETC)
BUCK6_FB L11 45_BUCK6_FB
SPEAKER AMP, CODEC VA (2.5 MA L1419, 3MA L67)
BUCK6_BYP R8 NC TRISTAR VDH, WIFI_FLEX PAC (? MA) NOTE: 3V +/- 5% PER EUGENE
45_PMU_TO_XTAL_OSC32
GYRO, ACCEL, COMPASS (? MA)
ROOM=PMU VLDO1 F18 2.5-3.3V +/-77.5MV PP3V3_USB 2 26
LDO
VPUMP R5 45_PMU_VPUMP
N61 USES 2.2UF FOR PP3V3_ACC.
N56 HAS SPACE FOR 2X 1UF Apple Inc. 051-0517 D
FOR COST SAVINGS. REVISION
R
6.0.0
SPEC REQUIRES 10NF, 1 C1208 1 C1270 1 C1229 1 C1212 1 C1284 1 C1205 1 C1206
1 C1207 1 C1242 1 C1232 1 C1291 1 C1219 NOTICE OF PROPRIETARY PROPERTY: BRANCH
VPUMP RUNS AT 4.6V 0.1UF 2.2UF 2.2UF 1.0UF 1.0UF 1.0UF 1.0UF 2.2UF 1.0UF 2.2UF 0.1UF 2.2UF THE INFORMATION CONTAINED HEREIN IS THE
20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% PROPRIETARY PROPERTY OF APPLE INC.
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 4V 6.3V THE POSESSOR AGREES TO THE FOLLOWING: PAGE
VPUMP CAP: 2 X5R-CERM 2 X5R 2 X5R 2 X5R 2 X5R 2 X5R 2 X5R 2 X5R 2 X5R 2 X5R 2 X5R 2 X5R
30% DERATED. 01005
ROOM=PMU
0201-1
ROOM=PMU
0201-1
ROOM=PMU
0201-1
ROOM=PMU
0201-1
ROOM=PMU
0201-1
ROOM=PMU
0201-1 0201-1
ROOM=PMU
0201-1
ROOM=PMU
0201-1
ROOM=PMU
01005
ROOM=PMU
0201-1
ROOM=PMU
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
12 OF 55
ROOM=PMU SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED 12 OF 55
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
ADI PMU
(AMUX, GPIO, BUTTONS, ADC, THERMISTORS, SYSTEM I/F, GND)
D D
ROOM=PMU
R1316
1
200K 2
1% MF
1/20W 201 ROOM=PMU
ROOM=PMU R1331
C1317 1
6.34K2
TRISTAR_TO_PMU_USB_BRICKID 17
0.1UF MF 1%
1 2 01005 1/32W
10% CERM-X5R
6.3V 0201 1 C1326
ROOM=PMU
0.01UF
10%
C1318 2 6.3V
X5R
APN: 338S1251 (ADI AZ) 1.0UF 01005
1 2 ROOM=PMU
20% X5R
ROOM=PMU 6.3V 0201-1 ROOM=PMU
AMUX VOLTAGE LIMIT IS APPROX. = VDD_REF = PP_VCC_MAIN U1202 ROOM=PMU
U1202
D2186AZE0FJAVAC D2186AZE0FJAVAC
FCCSP-N56-N61 C1319 CHESTNUT_TO_PMU_ADCIN7 13 15 FCCSP-N56-N61
1.8V ---> 0.1UF
NC A1 AMUX_A0 SYM 2 OF 3 IREF F6 45_PMU_IREF
1 2
SYM 3 OF 3
1.8V ---> B1 AMUX_A1 VREF G5 26 PP_PMU_VREF A15 G13
NC 10% CERM-X5R
1.8V ---> BUTTON_TO_AP_RINGER_A D2 E5 26 PP_PMU_VDD_REF 6.3V 0201 B15 G14
13 8 3 AMUX_A2 VDD_REF 1 C1323
ADC/REFS
VSS_BUCK0_5
1.8V ---> E2 F7 1000PF C15 H8
C 1.8V --->
8 3 BUTTON_TO_AP_VOL_UP_L
8 3 BUTTON_TO_AP_VOL_DOWN_L E1
AMUX_A3
AMUX_A4
VDD_RTC
FIXED 2.5V, +/-2%
BRICK_ID N17
26 PP_PMU_VDD_RTC
13 TRISTAR_TO_PMU_USB_BRICKID_R
10%
6.3V
2 X5R-CERM
A2 H9 C
20 15 LCM_TO_CHESTNUT_PWR_EN H6 AMUX_A5 01005 B2 H10
3.33V ---> ADC_IN7 N18 ROOM=PMU VSS_BUCK1
13 TRISTAR_TO_PMU_USB_BRICKID_R H5 AMUX_A6 C2 H11
15 13 CHESTNUT_TO_PMU_ADCIN7 H4 AMUX_A7 ADC_REF E6 NC A6 H12
FOREHEAD NTC G4 ACC_ID N19 NC B6 H13
AMUX
25 PMU_TO_TP_AMUX_AY AMUX_AY PP1V8_SDRAM 3 4 10 12 14 15 17 26 30
VSS_BUCK01
BASEBAND ---> 30 RADIO_TO_PMU_ADC_SMPS1 J5 AMUX_B0 C6 H14
NO_XNET_CONNECTION=TRUE 1 NO_XNET_CONNECTION=TRUE ROOM=PMU
J6 1 G20 J8
ROOM=PMU_ ROOM=PMU_ 30 RADIO_TO_PMU_ADC_PP_LDO11_VDDIO AMUX_B1
TMPR_DET F5
NC
R1330 VSS_BUCK4
C1359 1 R1308 NC K5 AMUX_B2
ACC_DET R18 5%
100K G21 J9
FOREHEAD_NTC_P 1.8V ---> K8 AMUX_B3 1/32W A19 J10
100PF 10KOHM-1% NC BUTTON1 D21 BUTTON_TO_AP_MENU_KEY_L 3 21 MF
BUTTONS/DETECT
5% FOREHEAD_NTC_N 1.8V ---> 13 45_PMU_TO_WLAN_CLK32K L8 AMUX_B4 B19 J11
2 01005
30 100-300K INT PD
6.3V D20 BUTTON_TO_AP_HOLD_KEY_L VSS_BUCK5
CERM 2 01005 BASEBAND ---> K9 BUTTON2 3 8
C19 J12
01005 30 RADIO_TO_PMU_ADC_PP_LDO5_SIM AMUX_B5 100-300K INT PD
2 BUTTON3 B20 BUTTON_TO_AP_RINGER_A 3 8 13
2 AP_TO_PMU_TEST_CLKOUT
L9 AMUX_B6 100-300K INT PD P9 VSS_BUCK6 J13
BUTTON4 C20
30 RADIO_TO_PMU_ADC_SMPS4 L10 AMUX_B7 100-300K INT PU NC A10 J14
PCB: MAKE XW1328, XW1329 ACCESSIBLE!
100PF IS NEEDED FOR SAMPLING CAP IN ADC IN PMU 25 PMU_TO_TP_AMUX_BY L4 AMUX_BY KEEPACT L7 AP_TO_PMU_KEEPACT 3 A11 J15
NO INT PULL
SHDN N10 NC ROOM=PMU B10 K11
J4 NOTE: NEED TO UPDATE IO SS TO 1
17 15 13 3 AP_TO_I2C0_SCL
K4
SCL 100-300K INT PD
REFLECT GPIO2 BEING ACTIVE LOW. R1387 B11 VSS_BUCK012 K12
CAMERA NTC 17 15 3 AP_BI_I2C0_SDA SDA OUT_32K E8 45_PMU_TO_WLAN_CLK32K 13 30 1.00M C10 K13
SM 5%
1 P2MM-NSM K15
ROOM=PMU PP1300 PP 1 P2MM-NSM
15 3 45_AP_TO_PMU_AND_BL_DWI_CLK
J16
DWI_CK
100-300K INT PD GPIO1 F17 CHG_TO_PMU_INT_L 14
ROOM=PMU 1/32W
MF C11 K14
PP1301 PP 15 3 45_AP_TO_PMU_AND_BL_DWI_DO
R1312
AP<->PMU
1 NO_XNET_CONNECTION=TRUE ROOM=PMU DWI_DI F16 2 01005 H1 K17
NO_XNET_CONNECTION=TRUE
ROOM=PMU_ 100-300K INT PD GPIO2 BB_TO_PMU_HOST_WAKE_L 30 VSS
SM K16 DWI_DO 1.00K2
ROOM=PMU_ NC GPIO3 E15 PMU_TO_BB_RST_R_L 1 PMU_TO_BB_RST_L 30 H2 VSS_BUCK23 L12
PP1V8 PMU_TO_AP_PRE_UVLO_L F8
C1367 1 R1310 CAM_NTC_P
23 20 15 12 11 10 7 6 5 3 2
27 26 24
3
P3
PRE_UVLO
GPIO4 F15 TRISTAR_TO_AP_INT 3 17 5% L13
100PF 10KOHM-1% CAM_NTC_N ROOM=PMU 2 AP_TO_PMU_RESET_IN RESET_IN1 G17 STOCKHOLM_TO_PMU_HOST_WAKE
1/32W
MF G8 L14
5% 100-300K INT PD GPIO5 30 VSSA_BUCK0
6.3V
CERM 2 01005 NO_XNET_CONNECTION=TRUE
R13011 ACTIVE HIGH 17 TRISTAR_TO_PMU_HOST_RESET R3
P4
RESET_IN2
100-300K INT PD GPIO6 E17 PMU_TO_OSCAR_RESET_CLK32K_L 22
01005
G6 VSSA_BUCK1 M1
01005 ROOM=PMU 100K 3 AP_TO_PMU_SOCHOT1_L RESET_IN3
GPIO
2 XW1304 1 2 SHORT-10L-0.1MM-SM 5%
R4
100-300K INT PU TO LDO12 GPIO7 E16 WLAN_TO_PMU_HOST_WAKE 30 H7 VSSA_BUCK2 N14
1/32W 25 17 15 4 2 RESET_1V8_L RESET*
NO_XNET_CONNECTION=TRUE MF NO INT PULL GPIO8 E14 CODEC_TO_PMU_MIKEY_INT_L 10
J7 VSSA_BUCK3 P1
ROOM=PMU 01005 2 3 PMU_TO_AP_IRQ_L P2 IRQ*
XW1309 1 2 SHORT-10L-0.1MM-SM NO INT PULL GPIO9 H16 PMU_TO_BT_REG_ON 30 H15 VSSA_BUCK4 P11
B 100PF IS NEEDED FOR SAMPLING CAP IN ADC IN PMU NO_XNET_CONNECTION=TRUE
XW1306 1
ROOM=PMU
2 SHORT-10L-0.1MM-SM
20 PMU_TO_PHOTON_ALIVE N1
L15
SYS_ALIVE
GPIO10 G16
F14
BT_TO_PMU_HOST_WAKE 30 G15
P8
VSSA_BUCK5 P13
P15
B
FOREHEAD_TO_PMU_NTC TDEV1 GPIO11 PMU_TO_WLAN_REG_ON 30 VSSA_BUCK6
NTC
NO_XNET_CONNECTION=TRUE
ROOM=PMU CAM_TO_PMU_NTC R17 TDEV2 GPIO12 F13 AP_TO_I2C0_SCL P16
XW1311 1 2 SHORT-10L-0.1MM-SM 3 13 15 17
NO_XNET_CONNECTION=TRUE
XW1314 1 2 SHORT-10L-0.1MM-SM 5% 0.1% GPIO18 E9 PMU_TO_ACC_SW_ON 17 B21
NO_XNET_CONNECTION=TRUE
1 6.3V 1/20W
ROOM=PMU_ NO_XNET_CONNECTION=TRUE
ROOM=PMU CERM 2 MF GPIO19 F11 G7 VSS
ROOM=PMU_ XW1315 1 2 SHORT-10L-0.1MM-SM 01005 2 0201 NC
ROOM=PMU F9 G10
C1322 1 R1390 PA_NTC_P
PLACE THESE XWS AT PMU
ROOM=PMU GPIO20
F10
NC
G11
100PF 10KOHM-1% PA_NTC_N GPIO21 NC
5% G12
6.3V 2 01005
CERM
01005
2
ADI OTP:
100PF IS NEEDED FOR SAMPLING CAP IN ADC IN PMU
SEE RADAR 14032884
H7P NTC
NO_XNET_CONNECTION=TRUE
NO_XNET_CONNECTION=TRUE
1
ROOM=PMU_
ROOM=PMU_
C1368 1 R1357 SOC_NTC_P
100PF 10KOHM-1% SOC_NTC_N
5%
6.3V
CERM 2 01005
A 01005 2
SYNC_MASTER=N61_MLB SYNC_DATE=11/01/2013 A
PAGE TITLE
ROOM=CHARGER
1 C1450 1 C1451 1 C1411 1 C1415 1 C1417 1 C1418
220PF 100PF 10UF 2.2UF 10UF 2.2UF
10% 5% 20% 20% 20% 20%
CHARGER_LDO 26
2 10V 2 16V 2 6.3V 2 6.3V 2 6.3V 2 6.3V
X7R-CERM NP0-C0G CERM-X5R X5R CERM-X5R X5R
01005 01005 0402-9 0201-1 0402-9 0201-1
ROOM=CHARGER ROOM=CHARGER ROOM=CHARGER ROOM=CHARGER ROOM=CHARGER ROOM=CHARGER ROOM=CHARGER
26 PMID_CAP 1 C1403 1 C1410
A2
B2
D2
C2
NOSTUFF ROOM=CHARGER 100PF 2.2UF
A2
A3
B1
B2
B3
1 C1407 1 C1409 1 C1453 1 C1452 5% 20% CHARGER DESENSE CAPS. CHARGER CAPS
VDD_MAIN
VDD_MAIN
VDD_MAIN
VDD_MAIN
16V 6.3V PLACE BY L1401.
4.2UF 4.2UF 100PF 100PF 2 NP0-C0G 2 X5R
01005 0201-1
S
10%
16V
2 X5R-CERM
10%
16V
2 X5R-CERM
5%
25V
2 NP0-C0G
5%
25V
2 NP0-C0G
Q1403
0402-1 0402-1 01005 01005
A1
CSD68815W15
ROOM=CHARGER ROOM=CHARGER ROOM=CHARGER ROOM=CHARGER BGA
ROOM=CHARGER G
F5 PMID U1401 LDO G4 C1402 1
NOSTUFF
0.033UF R1401
A5 SN2400B0YFF 2 10%
26 25 18 17 12 PP5V0_USB VBUS WCSP BOOT G5 1 100K D
B5 16V X5R 5%
NOSTUFF VBUS
C1
C2
C3
1/32W
1 C1408 1 C1470 1 C1471 D5 VBUS
BUCK_SW A4 CHG_BOOT 402 L1401 MF ROOM=CHARGER
PGND
PGND
PGND
PGND
HDQ_GAUGE F2 BATTERY_SWI 25
R1454
A3
B3
D3
C3
USB_VBUS_DETECT
68.1K2
1
2
1%
1/32W
MF
01005
PP_BATT_VCC
14 16 25 26 41 46 47
B 1 C1433 B
C2
ROOM=VIBE_DRIVER
10UF
20%
6.3V
VDD
2 CERM-X5R
0402-9
ROOM=VIBE_DRIVER
U1400
DRV2604YZF
21 16 15 14 3 AP_BI_I2C1_SDA B2 SDA BGA OUT+ A3 VIBE_DRIVE_P 18
01005 01005
5% 5% ROOM=VIBE_DRIVE ROOM=VIBE_DRIVE
1/32W 1/32W
MF MF
2 01005 2 01005
ROOM=VIBE_DRIVER ROOM=VIBE_DRIVER
A A
PAGE TITLE
POWER:TIGRISR,VIBE DRIVER
DRAWING NUMBER SIZE
1 C1547 1
10UF
20%
L1519 6.3V
CERM-X5R 2 U1501
26 PP_CHESTNUT_CP
1.5UH-20%-1.8A-0.118OHM 0402-9
LQE2MRT1R5MG0-SM ROOM=CHESTNUT TPS65730A0PYFF 1 C1554
ROOM=CHESTNUT BGA CF1 C4 10UF
D1 VIN ROOM=CHESTNUT CF2 E4 20%
2 10V
2 X5R-CERM
26 PP_CHESTNUT_LXP B2 SW 26 PP_CHESTNUT_CN 0402-8
ROOM=CHESTNUT
A2 SYNC LCMBST B3
NO INT PULL 26 PP6V0_LCM_BOOST
D3 SCL CPUMP B4
17 15 13 3 AP_TO_I2C0_SCL
D2 SDA 1 C1502
1 C1529
17 15 13 3 AP_BI_I2C0_SDA VNEG E3 10UF
PN5V7_SAGE_AVDDN 20 24 26
10UF 20%
20% 10V
20 13 LCM_TO_CHESTNUT_PWR_EN C3 LCM_EN VNEG(SUB) E2 10V 2 X5R-CERM
2 X5R-CERM 0402-8
RESET_1V8_L
200K INT PD
C2 RESET* HVLDO1 A4 PP5V7_SAGE_AVDDH 24
1 C1504 0402-8
ROOM=CHESTNUT
ROOM=CHESTNUT
25 17 13 4 2
NO INT PULL
26
10UF
20%
CHESTNUT_TO_PMU_ADCIN7 E1 ADCMUX HVLDO2 A3 PP5V7_LCM_AVDDH 20 10V
B1 PGND1
D4 PGND2
13 26 2 X5R-CERM
C1 AGND
0402-8
HVLDO3 A1 PP5V1_GRAPE_VDDH 24 26
ROOM=CHESTNUT
C C
BACKLIGHT DRIVERS
L1503
15UH-20%-0.72A-0.9OHM
1 2
PITA32251T-SM NOTE: D1501 IS 30V DIODE FOR N61 AND 20V FOR N56.
ROOM=BACKLIGHT ROOM=BACKLIGHT
D1501
NSR0620P2XXG
26 PP_WLED_LX A K 1 C1505
10UF
SOD-923-HF 20%
PP_VCC_MAIN 2 25V
32 30 26 23 17 16 15 14 12 10
53 52 49 40
C1552 1 1 C1597
X5R-CERM
0603
ROOM=BACKLIGHT
MESA BOOST
10UF 10UF
20% 20% ROOM=BACKLIGHT
6.3V 2 6.3V
CERM-X5R 2 CERM-X5R PP_LCM_BL_ANODE 20 26
0402-9
ROOM=BACKLIGHT
0402-9
ROOM=BACKLIGHT
U1502
LM3534TMX-A1
A3 SW BGA OVP D1
1 C1513
100PF
C3 IN 5%
PP_LCM_BL_CAT1
B 17 15 13 3 AP_BI_I2C0_SDA A1 SDA
ILED1 D3
ILED2 D2 PP_LCM_BL_CAT2
20 26
20 26
25V
2 NP0-C0G
01005
ROOM=BACKLIGHT
APN: 353S3978
VENDOR: TI
B
17 15 13 3 AP_TO_I2C0_SCL A2 SCL
SCK B2 45_AP_TO_PMU_AND_BL_DWI_CLK 3 13 15
ROOM=MESA
PP1V8 C1 VIO_SPI SDI C2 45_AP_TO_PMU_AND_BL_DWI_DO
23 20 15 13 12 11 10 7 6 5 3 2
27 26 24
3 13 15
ROOM=MESA U1503
30 26 17 15 14 13 12 10 4 3
PP1V8_SDRAM B1 HWEN L1500 LM3638
1.0UH-20%-0.4A-0.53OHM BGA
GND 53 52
PP_VCC_MAIN 1 2 26 PP18V0_MESA_SW B1 SW
17 16 15 14 12 10
49 40 32 30 26 23 0403
B3
10UF
20%
6.3V
30 26 17 12 PP3V0_TRISTAR B2 EN_M 1 C1503 1 C1500
CERM-X5R 2 25 21 MESA_TO_BOOST_EN A3 EN_S 100PF 2.2UF
0402-9 5% 20%
VOLTAGE=17.0V 25V 25V
ROOM=BACKLIGHT ROOM=MESA C2 LDOIN 2 NP0-C0G
PMID C1 26 P17V0_MOJAVE_LDOIN 2 X5R
A1 PGND
B3 AGND
L1589 D1589 01005
ROOM=MESA 0402-3
15UH-20%-0.72A-0.9OHM NSR0530P2T5G
ROOM=MESA
1 2 26 PP_WLED34_LX A K 1 C1501
2.2UF
PITA32251T-SM 20%
ROOM=BACKLIGHT SOD-923-1 1 C1587 25V
2 X5R
10UF 0402-3
20% ROOM=MESA
32 30 26 23 17 16 15 14 12 10 PP_VCC_MAIN 25V
2 X5R-CERM
53 52 49 40
0603
C1585 1 1 C1586 ROOM=BACKLIGHT
10UF 10UF
20% 20% ROOM=BACKLIGHT
6.3V 6.3V PP_LCM_BL34_ANODE
CERM-X5R 2 2 CERM-X5R 20 26
0402-9
ROOM=BACKLIGHT
0402-9
ROOM=BACKLIGHT
U1580
LM3534TMX-A1
A3 SW BGA OVP D1
1 C1588
100PF
A C3 IN
A1
ILED1 D3 PP_LCM_BL_CAT3 20 26
5%
25V
2 NP0-C0G SYNC_MASTER=N61_MLB SYNC_DATE=11/01/2013 A
21 16 14 3 AP_BI_I2C1_SDA SDA ILED2 D2 PP_LCM_BL_CAT4 20 26
01005
ROOM=BACKLIGHT PAGE TITLE
AP_TO_I2C1_SCL A2
21 16 14 3 SCL
SCK B2 45_AP_TO_PMU_AND_BL_DWI_CLK 3 13 15
DISPLAY:CHESTNUT,BACKLIGHT DRIVER
23 20 15 13 12 11 10 7 6 5 3 2 PP1V8 C1 VIO_SPI SDI C2 45_AP_TO_PMU_AND_BL_DWI_DO 3 13 15
DRAWING NUMBER SIZE
27 26 24
A1
B1
F5
C1
D1
A4
A5
20% X5R-CERM X5R-CERM X5R-CERM ROOM=SPKR_AMP 1 2 1 2
6.3V 0402-8 0603-1 0201 V = 1.0V C= 1UF MIN
2 CERM-X5R ROOM=SPKR_AMP ROOM=SPKR_AMP ROOM=SPKR_AMP 0402 FERRITE_GND2
0402-9 VA
ROOM=SPKR_AMP VBST VP NOSTUFF
1 C1629 C1640 1
2.2UF 4.7UF
L1604 U1601 20% 20%
1.2UH-2.88A-0.082OHM 2 6.3V
X5R
6.3V
X5R-CERM1 2 ROOM=SPKR_AMP
CS35L19B-XWZR-C0 0201-1 402
1 2 26 PP_SPKAMP_SW A2 WLCSP FILT+
26 F2 PP_SPKAMP_FILT ROOM=SPKR_AMP R16042
1 SPEAKER_TO_SPKAMP_VSENSE_N
PIFE25201T-SM B2 SW VER1 LDO_FILT
26 C5 PP_SPKAMP_LDO_FILT 0.00 01005
18
C1632 1 ROOM=SPKR_AMP
1
NOSTUFF
C1606 1
NOSTUFF
10UF AP_BI_I2C1_SDA D5
SDA C1604
20% 21 15 14 3
VSENSE- E3 SPKAMP_VSENSE_N 220PF 220PF NO_XNET_CONNECTION=TRUE
6.3V 10%
CERM-X5R 2 21 15 14 3 AP_TO_I2C1_SCL D6
SCL VSENSE+ E2 SPKAMP_VSENSE_P 2 10V
10%
10V
0402-9 X7R-CERM 2 X7R-CERM
ROOM=SPKR_AMP 01005 01005 ROOM=SPKR_AMP
SPKAMP_TO_AP_INT_L A7 ISENSE- F1 SPKAMP_ISENSE_N
3 INT*
NO INT PULLS R16052
ISENSE+ E1 SPKAMP_ISENSE_P 1 SPEAKER_TO_SPKAMP_VSENSE_P
C 3 AP_TO_SPKAMP_RESET_L
1
A6 RESET*
D7 ALIVE
100K INT PD
OUT+ D2 SPKAMP_TO_SPEAKER_OUT_P
ROOM=SPKR_AMP
R1601 1
NOSTUFF
C1605
0.00 01005
18
C
R1629 3 AP_TO_SPKAMP_BEE_GEES 39.2 1 2 NO_XNET_CONNECTION=TRUE
NO INT PULLS OUT- C2 220PF
100K C7 ADO 1/32W 1% MF 01005 10%
5%
1/32W 1M INT PD IREF+ B7 SPKAMP_IREF C1601 1
NO_XNET_CONNECTION=TRUE 2 10V
X7R-CERM
MF (LEFT CONFIG) 0.1UF 01005
45_AP_TO_SPKAMP_I2S2_MCLK E7 MCLK
2 01005 3
1
20%
6.3V
ROOM=SPKR_AMP
ROOM=CHARGER
45_AP_TO_CODEC_XSP_I2S2_BCLK E6 SCLK
1M INT PD
R1635 X5R-CERM 2
01005 39.2 1R16022
10 3 44.2K NO_XNET_CONNECTION=TRUE
AP_TO_CODEC_XSP_I2S2_LRCLK
1M INT PD
F6 LRCK/FSYNC
1%
1/32W
1/32W 1% MF 01005 R1603
10 3
1M INT PD
MF CKPLUS_WAIVE=MISS_N_DIFFPAIR 1
0.1002
2 01005
SPKAMP_TO_SPEAKER_OUT_CONN_P 18
10 3 AP_TO_CODEC_XSP_I2S2_DOUT F7 SDIN ROOM=SPKR_AMP
1%
1M INT PD 1/4W ~700MA RMS @ 4.1W INTO 8OHM
10 3 CODEC_TO_AP_XSP_I2S2_DIN E5 SDOUT MF
0402
1M INT PD
GNDP GNDA SPKAMP_TO_SPEAKER_OUT_CONN_N 18
C1600 C1602
A3
B3
B4
B5
B6
C3
C4
D3
D4
C6
E4
F3
F4
1 1
C1660 1 C1663 1 1000PF 1000PF
1000PF 1000PF 10% 10%
10% 10% 10V 2 2 10V
10V 10V X5R X5R
X5R 2 X5R 2 01005 01005
01005 01005 ROOM=SPKR_AMP ROOM=SPKR_AMP
ROOM=SPKR_AMP ROOM=SPKR_AMP
B
STROBE DRIVER B
TI: APN 353S3899
ROOM=STROBE
PP_LED_BOOST_OUT
40 32 30 26 23 17 15 14 12 10
53 52 49
PP_VCC_MAIN U1602 26
30 BB_TO_LEDDRV_GSM_BLANK E4 LED2 D4
E2
TX
INT 200K PD AGND
C1608 1 C1673 1
23 7 AP_BI_RCAM_I2C_SDA SDA 100PF 100PF
5%
23 7 AP_TO_RCAM_I2C_SCL D2 SCL TEMP E1 16V 5%
NP0-C0G 2 16V
GND AGND 01005 NP0-C0G 2
01005
ROOM=STROBE ROOM=STROBE
A1
B1
C1
A RCAM_TO_STROBE_NTC 8
SYNC_MASTER=N61_MLB SYNC_DATE=11/01/2013 A
PAGE TITLE
AUDIO:SPKR AMP,STROBE
DRAWING NUMBER SIZE
TRISTAR2
D D
PP_VCC_MAIN 10 12 14 15 16 23 26 30 32 40
49 52 53
A1
SM NOSTUFF
1 12C ADDRESS: 0011010X
PP P2MM-NSM
1 VCC
PP1705 SM PP
U1703
LM34904
30 26 15 12 PP3V0_TRISTAR USMD
13 PMU_TO_ACC_SW_ON B2 ENABLE ACC_PWR A2 PP3V3_ACC 12 17 26
PP1V8_SDRAM
1 C1700 1 C1754 30 26 15 14 13 12 10 4 3
C1
1.0UF 0.1UF 1 C1739 C2 ACC_DET* POK*
20% 20%
C 6.3V
2 X5R
4V
2 X5R 0.01UF
10%
GND
C
B1
0201-1 01005 2 6.3V
ROOM=TRISTAR ROOM=TRISTAR X5R
01005 PP3V3_ACC 12 17 26
ROOM=TRISTAR
ACC_PWR
VDD_1V8 F3
VDD_3V0 F4
ACC_PWR D5
ROOM=TRISTAR
U1700
CBTL1610A2UK
C3 WLCSP
9 90_CODEC_BI_TRISTAR_MIKEYBUS_P DIG_DP P_IN F6 PP_TRISTAR_PIN 17 26
C4
9 90_CODEC_BI_TRISTAR_MIKEYBUS_N DIG_DN ACC1 C5 PP_E75_TO_TRISTAR_ACC1 18 26 1 C1704 PIN FOR HANDSHAKE
SOC USB
2 90_AP_BI_TRISTAR_USB0_P
B3
USB0_DP
DN2 B4 90_TRISTAR_BI_E75_PAIR2_N 18 25 1
SM PP1722
2 90_AP_BI_TRISTAR_USB0_N USB0_DN PP P2MM-NSM
E2 CON_DET_L E3 E75_TO_TRISTAR_CON_DETECT 18
ROOM=TRISTAR
3 AP_TO_TRISTAR_ACC_UART6_TXD UART0_TX
ACCESSORY UART E1
3 TRISTAR_TO_AP_ACC_UART6_RXD UART0_RX POW_GATE_EN* D6 TRISTAR_TO_PMU_OVP_SW_EN_L 14
F2
3 AP_TO_TRISTAR_DEBUG_UART0_TXD UART1_TX SWITCH_EN E4 RESET_1V8_L 2 4 13 15 25
DEBUG UART F1
3 TRISTAR_TO_AP_DEBUG_UART0_RXD UART1_RX HOST_RESET B6 TRISTAR_TO_PMU_HOST_RESET 13
HOST_RESET
BB_TO_AP_UART2_RXD D2 D3 AP_BI_I2C0_SDA 3 13 ACTIVE HIGH
RX IS WRT SOC (BB TX) --> 30 3 UART2_TX SDA 15
DVSS
DVSS
DVSS
1
1.0UF
20%
6.3V
2 X5R
F5
C1
A6
0201-1
ROOM=TRISTAR
PP_TRISTAR_PIN 17 26
2
R1710 S
10K
1
5%
2 REVERSE_GATE 1
G
Q1701
1/32W
MF
CSD68822F4
01005 0402
D
3
PP5V0_USB
A 12 14 18 25 26
SYNC_MASTER=N61_MLB SYNC_DATE=11/01/2013 A
PAGE TITLE
IO:TRISTAR2
DRAWING NUMBER SIZE
D 16V
2 NP0-C0G
01005
14 VIBE_DRIVE_P 2
01005
1 VIBE_DRIVE_P_CONN 18
18 CODEC_TO_HPHONE_L_CONN 1 2 HPHONE_TO_CODEC_DET_CONN 18 D
FL1882 ROOM=DOCK_B2B
ACCESSORY: ROOM=DOCK_B2B 1 C1875 18 CODEC_TO_HPHONE_HS3_CONN 3 4 CODEC_TO_HPHONE_HS3_REF_CONN 18
LOWER MIC1 120-OHM-210MA 100PF 18 CODEC_TO_HPHONE_HS4_CONN 5 6 CODEC_TO_HPHONE_HS4_REF_CONN 18
5%
(PRIMARY 9 LOWERMIC1_TO_CODEC_P 2 1 LOWERMIC1_TO_CODEC_P_CONN 18
VIBE 16V
2 NP0-C0G 7 8 AP_TO_HEADSET_HS4_CTRL_CONN 18
VOICE MIC)
01005
ROOM=DOCK_B2B 1 C1890 DRIVE 01005
ROOM=DOCK_B2B 18 CODEC_TO_HPHONE_R_CONN 9 10 AP_TO_HEADSET_HS3_CTRL_CONN 18
11 12
56PF FL1820 18 LOWERMIC1_TO_CODEC_N_CONN LOWERMIC1_TO_CODEC_P_CONN 18
5%
16V 120-OHM-210MA 26 18 PP_CODEC_TO_MIC1_BIAS_CONN 13 14 MIC1_BIASFILT_RET 10
2 NP0-C0G 15 16
01005 VIBE_DRIVE_N 2 1 VIBE_DRIVE_N_CONN 25 18 E75_TO_TRISTAR_CON_DETECT_CONN NOTE: SHOULD BB_GPIO1 BE CONNECTED?
FL1855 ROOM=DOCK_B2B
14
01005
18
26 25 18 PP_E75_TO_TRISTAR_ACC1_CONN 17 18 PP_BB_VDD_2V7_CONN 18 26
120-OHM-210MA ROOM=DOCK_B2B 1 C1876 19 20 BB_GPIO4_CONN 18
26 10 PP_CODEC_TO_MIC1_BIAS 2 1 PP_CODEC_TO_MIC1_BIAS_CONN 18 26 100PF 90_TRISTAR_BI_E75_PAIR1_P 21 22 BB_GPIO3_CONN 18
5% 25 17
01005 16V
ROOM=DOCK_B2B 1 C1855 2 NP0-C0G
01005
25 17 90_TRISTAR_BI_E75_PAIR1_N 23 24 BB_GPIO2_CONN 18
56PF ROOM=DOCK_B2B 25 26
5%
16V 90_TRISTAR_BI_E75_PAIR2_N 27 28 PP_E75_TO_TRISTAR_ACC2_CONN 18 25
2 NP0-C0G 25 17 26
01005 90_TRISTAR_BI_E75_PAIR2_P 29 30 BB_GPIO0_CONN 18
25 17
ROOM=DOCK_B2B
18 16 SPKAMP_TO_SPEAKER_OUT_CONN_N 31 32 SPKAMP_TO_SPEAKER_OUT_CONN_P 16 18
R1801 18
SPEAKER_TO_SPKAMP_VSENSE_N_CONN 33 34 SPEAKER_TO_SPKAMP_VSENSE_P_CONN 18
1
3.3K 2 18
VIBE_DRIVE_P_CONN 35 36 VIBE_DRIVE_N_CONN 18
9 HPHONE_TO_CODEC_DET HPHONE_TO_CODEC_DET_CONN 18
01005 5% MF 1/32W PP5V0_USB 12 14 17 18 25 26
ROOM=DOCK_B2B 1 C1816 PP5V0_USB 39 40 PP5V0_USB
5%
56PF 1 C1834 1 C1833 1 C1812 1 C1817 26 25 18 17 14 12 12 14 17 18 25 26
ANTENNA
5%
16V
2 NP0-C0G
B
ROOM=DOCK_B2B 01005
SPKAMP_TO_SPEAKER_OUT_CONN_N
1 C1808 16 18 ROOM=DOCK_B2B
100PF
5%
10V
C1802 1 1 DZ1813 FL1877
2 NP0-C0G 100PF 12V-33PF 120-OHM-210MA
01005 5% 01005-1
16V
FL1802 01005 ROOM=DOCK_B2B NP0-C0G 2 2 NO_XNET_CONNECTION=TRUE
30 BB_GPIO3 1 2 BB_GPIO3_CONN 18
01005 ROOM=DOCK_B2B
150OHM-25%-200MA-0.7DCR 01005
ROOM=DOCK_B2B ROOM=DOCK_B2B
3 AP_TO_HEADSET_HS4_CTRL 1 2 AP_TO_HEADSET_HS4_CTRL_CONN 18
1 C1814
ROOM=DOCK_B2B 56PF
5%
1 C1805 2 16V
100PF R1830 NP0-C0G
01005
5% 17 E75_TO_TRISTAR_CON_DETECT 1/32W 2 1 E75_TO_TRISTAR_CON_DETECT_CONN 18 25 ROOM=DOCK_B2B
2 10V
NP0-C0G 5%
01005 MF 1.00K
01005 1 C1870 FL1878
ROOM=DOCK_B2B 120-OHM-210MA
ROOM=DOCK_B2B 27PF
5% 30 BB_GPIO4 1 2 BB_GPIO4_CONN 18
16V
2 NP0-C0G
L1801 01005
01005
ROOM=DOCK_B2B 1 C1873
FERR-33-OHM-0.8A-0.09-OHM FL1854 ROOM=DOCK_B2B
56PF
1 2
10-OHM-1.1A 5%
9 CODEC_TO_HPHONE_L CODEC_TO_HPHONE_L_CONN 18
TRISTAR PP_E75_TO_TRISTAR_ACC1 1 2 PP_E75_TO_TRISTAR_ACC1_CONN 18 2 16V
NP0-C0G
0201 26 17 25 26
ROOM=DOCK_B2B 1 DZ1811 01005
1 C1871
01005
ROOM=DOCK_B2B
6.8V-100PF ROOM=DOCK_B2B
01005 100PF
CODEC TO 2 ROOM=DOCK_B2B
NO_XNET_CONNECTION=TRUE
5%
16V
NP0-C0G
HEADPHONE 2
01005
ROOM=DOCK_B2B
L1802 FL1853
FERR-33-OHM-0.8A-0.09-OHM 10-OHM-1.1A
CODEC_TO_HPHONE_R 1 2 CODEC_TO_HPHONE_R_CONN 18 PP_E75_TO_TRISTAR_ACC2 1 2 PP_E75_TO_TRISTAR_ACC2_CONN 18
A 9
0201
ROOM=DOCK_B2B 1 DZ1810
26 17
01005
ROOM=DOCK_B2B 1 C1872
25 26
SYNC_MASTER=N61_MLB SYNC_DATE=10/08/2013 A
100PF PAGE TITLE
6.8V-100PF
01005
2 ROOM=DOCK_B2B
NO_XNET_CONNECTION=TRUE 2
5%
16V
NP0-C0G
IO:DOCK FLEX CONN
01005 DRAWING NUMBER SIZE
ROOM=DOCK_B2B
Apple Inc. 051-0517 D
REVISION
R
6.0.0
XW1813
SM
NOTICE OF PROPRIETARY PROPERTY: BRANCH
THE INFORMATION CONTAINED HEREIN IS THE
9 CODEC_MBUS_REF 1 2 PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
ROOM=DOCK_B2B I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
18 OF 55
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 18 OF 55
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D D
C C
B B
A SYNC_MASTER=N/A SYNC_DATE=N/A A
PAGE TITLE
BLANK
DRAWING NUMBER SIZE
2 1 90_AP_TO_LCM_MIPI_CLK_P 1 4 90_AP_TO_LCM_MIPI_CLK_CONN_P
26 15 PP_LCM_BL_ANODE PP_LCM_BL_ANODE_CONN 20 25 26
7 20
D 0201-2
ROOM=LCM_B2B 1 C2017 26 25 20 PP_LCM_BL_CAT3_CONN
PP_LCM_BL34_ANODE_CONN
2
4
1
3
PP_LCM_BL_CAT4_CONN 20 25 26
2 3
D
100PF 26 25 20
7 90_AP_TO_LCM_MIPI_CLK_N 90_AP_TO_LCM_MIPI_CLK_CONN_N 20
5% 26 25 20 PP_LCM_BL_ANODE_CONN 6 5 90_AP_TO_LCM_MIPI_DATA3_CONN_N 20
2 25V ROOM=LCM_B2B
NP0-C0G
01005 26 25 20 PP_LCM_BL_CAT2_CONN 8 7 90_AP_TO_LCM_MIPI_DATA3_CONN_P 20 L2043
65-OHM-0.1A-0.7-2GHZ
ROOM=LCD_B2B 26 25 20 PP_LCM_BL_CAT1_CONN 10 9
TAM0605
SYM_VER-1
25 20 LCD_TO_AP_PIFA_CONN 12 11 90_AP_TO_LCM_MIPI_DATA2_CONN_N 20
90_AP_TO_LCM_MIPI_DATA0_P 1 4 90_AP_TO_LCM_MIPI_DATA0_CONN_P
FL2025 NC 14 13 90_AP_TO_LCM_MIPI_DATA2_CONN_P 20
7 20
240-OHM-0.2A-0.8-OHM 20 PMU_TO_PHOTON_ALIVE_CONN 16 15
2 1 LCM_TO_AP_HIFA_BSYNC_CONN 18 17 90_AP_TO_LCM_MIPI_CLK_CONN_N 2 3
26 15 PP_LCM_BL_CAT1 PP_LCM_BL_CAT1_CONN 20 25 26
20 20
7 90_AP_TO_LCM_MIPI_DATA0_N 90_AP_TO_LCM_MIPI_DATA0_CONN_N 20
0201-2 20 AP_TO_LCM_RESET_CONN_L 20 19 90_AP_TO_LCM_MIPI_CLK_CONN_P 20
ROOM=LCM_B2B
ROOM=LCM_B2B 1 C2018 20 LCM_TO_CHESTNUT_PWR_EN_CONN 22 21
L2042
100PF AP_TO_I2C2_SCL_CONN 24 23 90_AP_TO_LCM_MIPI_DATA1_CONN_N 65-OHM-0.1A-0.7-2GHZ
5% 20 20 TAM0605
25V SYM_VER-1
2 NP0-C0G 20 AP_BI_I2C2_SDA_CONN 26 25 90_AP_TO_LCM_MIPI_DATA1_CONN_P 20
01005 90_AP_TO_LCM_MIPI_DATA1_P 1 4 90_AP_TO_LCM_MIPI_DATA1_CONN_P
ROOM=LCD_B2B 20 SAGE_TO_TOUCH_VCPL_REF_CONN 28 27 7 20
20 SAGE_TO_TOUCH_VCPH_REF_CONN 30 29 90_AP_TO_LCM_MIPI_DATA0_CONN_N 20
FL2026 26 20 PP5V7_LCM_AVDDH_CONN 32 31 90_AP_TO_LCM_MIPI_DATA0_CONN_P 20 90_AP_TO_LCM_MIPI_DATA1_N 2 3 90_AP_TO_LCM_MIPI_DATA1_CONN_N
240-OHM-0.2A-0.8-OHM 34 33
7 20
26 20 PN5V7_LCM_AVDDN_CONN ROOM=LCM_B2B
PP_LCM_BL_CAT2 2 1 PP_LCM_BL_CAT2_CONN
26 15
0201-2
20 25 26
20 TOUCH_TO_SAGE_VCM_IN_CONN 36 35 PP1V8_LCM_CONN 20 26 L2041
65-OHM-0.1A-0.7-2GHZ
ROOM=LCM_B2B 1 C2019 TAM0605
SYM_VER-1
100PF 40 39
5% 7 90_AP_TO_LCM_MIPI_DATA2_P 1 4 90_AP_TO_LCM_MIPI_DATA2_CONN_P 20
2 25V
NP0-C0G 42
01005
ROOM=LCD_B2B ROOM=LCM_B2B
7 90_AP_TO_LCM_MIPI_DATA2_N 2 3 90_AP_TO_LCM_MIPI_DATA2_CONN_N 20
ROOM=LCM_B2B
20 90_AP_TO_LCM_MIPI_DATA3_CONN_P 4 1 90_AP_TO_LCM_MIPI_DATA3_P 7
2 1 AP_BI_I2C2_SDA 2 1 AP_BI_I2C2_SDA_CONN
26 15 PP_LCM_BL34_ANODE PP_LCM_BL34_ANODE_CONN 20 25 26
11 3 20
0201-2 01005
ROOM=LCM_B2B
1 C2020 ROOM=LCM_B2B 1 C2089 90_AP_TO_LCM_MIPI_DATA3_CONN_N 3 2 90_AP_TO_LCM_MIPI_DATA3_N
100PF 56PF 20 7
5% 5% ROOM=LCM_B2B
25V 16V
2 NP0-C0G 2 NP0-C0G
01005 01005
ROOM=LCD_B2B ROOM=LCM_B2B
56PF 01005
5%
100PF 5%
16V
ROOM=LCM_B2B
1 C2001
2 NP0-C0G 56PF
2 16V
NP0-C0G 01005 5%
01005 16V
ROOM=LCM_B2B 2 NP0-C0G
ROOM=LCM_B2B 01005
70-OHM-300MA 120-OHM-210MA 0%
1/32W
PN5V7_SAGE_AVDDN 2 1 PN5V7_LCM_AVDDN_CONN PMU_TO_PHOTON_ALIVE 2 1 PMU_TO_PHOTON_ALIVE_CONN MF
26 24 15 20 26 13 20 01005
01005-1 01005 ROOM=LCM_B2B
ROOM=LCM_B2B 1 C2044 ROOM=LCM_B2B 1 C2095
100PF 56PF
5% 5%
16V 16V
2 NP0-C0G 2 NP0-C0G
01005 01005
ROOM=LCM_B2B ROOM=LCM_B2B
FL2037
80-OHM-0.2A-0.4-OHM
A 26 15 PP5V7_LCM_AVDDH 2
0201-2
1 PP5V7_LCM_AVDDH_CONN 20 26 LCD_TO_AP_PIFA_CONN 20 25
SYNC_MASTER=N61_MLB SYNC_DATE=11/01/2013 A
PAGE TITLE
C2070 1 C2051 1 C2050 1 ROOM=LCM_B2B 1 C2071 1 C2094 1 C2058
2.2UF
20%
2.2UF
20%
2.2UF
20%
2.2UF
20% 5%
100PF
5%
56PF DISPLAY:FLEX CONN
6.3V 6.3V 6.3V 6.3V 16V 16V DRAWING NUMBER SIZE
X5R 2 X5R 2 X5R 2 2 X5R 2 NP0-C0G 2 NP0-C0G
0201-1 0201-1 0201-1 0201-1 01005
ROOM=LCM_B2B
01005
Apple Inc. 051-0517 D
ROOM=LCM_B2B ROOM=LCM_B2B ROOM=LCM_B2B ROOM=LCM_B2B ROOM=LCM_B2B REVISION
R
6.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
20 OF 55
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 20 OF 55
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
MESA CONNECTOR
D D
R2167
681
3 MESA_TO_AP_INT 1 2 MESA_TO_AP_INT_CONN 21
1%
1/32W
MF
01005 C2149 1
56PF
5%
16V
NP0-C0G 2
01005
ROOM=MAMBA_MESA_B2B
R2166
MESA_TO_BOOST_EN 1
681 2 MESA_TO_BOOST_EN_CONN
25 15 21
1%
1/32W
MF
01005
C2116 1
56PF
5%
16V
01005 2
ROOM=MAMBA_MESA_B2B
516S1319 (RECEPTACLE)
01005 FL2132 J2118
120-OHM-210MA
BB35S-RB15-XA
2 1 F-ST-SM
AP_TO_MESA_SPI_MOSI AP_TO_MESA_SPI_MOSI_CONN
C 3
ROOM=MAMBA_MESA_B2B
21
21
MESA_TO_BOOST_EN_CONN 18
17
C
C2198 1
56PF
5% 1 2
16V 21 AP_BI_I2C1_SDA_MESA_CONN AP_TO_I2C1_SCL_MESA_CONN 21
01005 2 3 4
ROOM=MAMBA_MESA_B2B 21 BUTTON_TO_AP_MENU_KEY_L_CONN PP3V0_MESA_CONN 21 26
21 MESA_TO_AP_INT_CONN 5 6 PP16V5_MESA_CONN 21 26
ROOM=MAMBA_MESA_B2B 7 8 PP1V8_MESA_CONN 21 26
R21602 9 10 AP_TO_MESA_SPI_CLK_CONN 21
13 3 BUTTON_TO_AP_MENU_KEY_L 1 BUTTON_TO_AP_MENU_KEY_L_CONN 21
MENU 0.00 01005 11 12 AP_TO_MESA_SPI_MOSI_CONN 21
13 14
01005 FL2150 BUTTON 1
MESA_TO_AP_SPI_MISO_CONN 21
120-OHM-210MA C2167 1 NOSTUFF 15 16
INT,EN,SPI,I2C 56PF
5%
16V
01005 2
ROOM=MAMBA_MESA_B2B
ROOM=MAMBA_MESA_B2B
ROOM=MAMBA_MESA_B2B
FL2156
R2163 70-OHM-300MA
1
0.00 2 1 2
3 AP_TO_MESA_SPI_CLK AP_TO_MESA_SPI_CLK_CONN 21 26 25 15 PP16V5_MESA PP16V5_MESA_CONN 21 26
0% MF 01005-1
1/32W 01005
ROOM=MAMBA_MESA_B2B C2126 1 C2110 1
100PF
56PF 5%
B 5%
16V
01005 2
ROOM=MAMBA_MESA_B2B
25V
NP0-C0G 2
01005
B
ROOM=MAMBA_MESA_B2B
FL2159 MESA:
120-OHM-210MA POWER NOTE: 0.45OHM DCR
FL2179
120-OHM-210MA
AP_TO_I2C1_SCL 2 1 AP_TO_I2C1_SCL_MESA_CONN
16 15 14 3 21 MESA 1.8V LDO
01005
ROOM=MAMBA_MESA_B2B U2100 RDAR://16114459 FL2133
70-OHM-300MA
LP5907UVX-1.8
C2179 1
A1 VIN DSBGA 1 2
56PF VOUT A2 26 PP1V8_MESA PP1V8_MESA_CONN 21 26
5% 01005-1
16V
NP0-C0G 2
01005
1 C2180 B1 VEN
1 C2181 ROOM=MAMBA_MESA_B2B
C2184 1
ROOM=MAMBA_MESA_B2B
1.0UF ROOM=MAMBA_MESA_B2B
GND 2.2UF 100PF
20% 20% 5%
2 6.3V
X5R 6.3V 16V
B2
2 X5R NP0-C0G 2
A 0201-1
ROOM=MAMBA_MESA_B2B
0201-1
ROOM=MAMBA_MESA_B2B
01005
ROOM=MAMBA_MESA_B2B
A
353S4262 PAGE TITLE
OSCAR + SENSORS
OSCAR VDDIO = 1.8V ALWAYS ON (NEED TO WAKE HOST & RUN PLL)
OSCAR CORE = 1.2V ALWAYS ON (NEED TO RUN IN S2RAM)
26 22 12 PP1V8_OSCAR PP1V2_OSCAR 12 26
E12
D13
4V
X5R 2
6.3V
X5R 2 X5R 2 X5R 2 PP2201SM
B2
C1
0201-1 01005
D VDDIO VDDC
PP2202SM
P2MM-NSM 1 AP_TO_OSCAR_UART_TXD 3 22
D
U2201 ROOM=OSCAR PP INVENSENSE, APN 338S00017, C2211=0.1UF (132S0395)
LPC18B1UK/CPA0-00 PP2203SM 1
BOSCH, APN 338S00028, C2211=0.1UF (132S0395)
WLCSP P2MM-NSM OSCAR_BI_AP_TIME_SYNC_HOST_INT
ROOM=OSCAR ROOM=OSCAR PP
3 22
ST, APN 338S00029, C2211=0.01UF,25V (132S0391)
PP2204SM
C11 U0_TXD/GPIO0[15] F5 P2MM-NSM 1 IMU_TO_OSCAR_SPI_MISO
22 3 OSCAR_TO_AP_UART_RXD CLKOUT/GPIO0[0] OSCAR_BI_AP_TIME_SYNC_HOST_INT 3 22 PP 22
ROOM=OSCAR
AP_TO_OSCAR_UART_TXD A9 U0_RXD/GPIO0[16] GPIO0[7] E4 GYRO_TO_OSCAR_INT1 22 PP1V8_OSCAR 12 22 26
22 3
GPIO0[8] D3 COMPASS_TO_OSCAR_INT 22
PP2205SM 1
30 OSCAR_TO_RADIO_CONTEXT_A E10 U1_RXD/GPIO0[22] P2MM-NSM PP GYRO_TO_OSCAR_INT2 22
C2248 1 C2245 1 C2247 1
NMI/GPIO0[24] A13 GYRO_TO_OSCAR_INT2 22 ROOM=OSCAR
OSCAR_TO_RADIO_CONTEXT_B F11 U1_TXD/GPIO0[23] 0.1UF 0.1UF 2.2UF
30
GPIO0[26] A3
NC PP2206SM 20%
6.3V
20%
6.3V
20%
6.3V 2
AP_ISP_TO_OSCAR_UART_TXD F1 U2_RXD/GPIO0[5] A11 P2MM-NSM 1 GYRO_TO_OSCAR_INT1 22 X5R-CERM 2 X5R-CERM 2 X5R
3 SWO/GPIO0[27] NC ROOM=OSCAR PP 01005 01005 0201-1
OSCAR_TO_AP_ISP_UART_RXD F3 U2_TXD/GPIO0[6] WDFLAG/GPIO1[2] D11 ROOM=GYRO ROOM=GYRO ROOM=GYRO
3
NC
ALARM1/GPIO1[3] D5
16
OSCAR_TO_BB_UART_TXD F9 U3_TXD/GPIO0[1] NC
1
30
ALARM0/GPIO1[4] C3 OSCAR_TO_PMU_HOST_WAKE 7 13
30 BB_TO_OSCAR_UART_RXD F13 U3_RXDGPIO0[2]
SWDIO/GPIO0[19] B10 AP_BI_OSCAR_SWDIO_1V8 7 VDD VDDIO
OSCAR_TO_IMU_SPI_SCLK A7 SPI0_SCK/GPIO0[12] SWCLK/GPIO0[20] B8 AP_TO_OSCAR_SWDCLK_1V8 7
22
U2203
IMU_TO_OSCAR_SPI_MISO A5 SPI0_MISO/GPIO0[13] CLK32K/GPIO0[21] E2
22
NC MPU-6700-12-COMBO
22 OSCAR_TO_IMU_SPI_MOSI B6 SPI0_MOSI/GPIO0[14] LGA
OSCAR_TO_GYRO_SPI_CS_L D9 I2C0_SDAP/GPIO0[10] B12 NC
22 SPI0_SSEL0/GPIO0[3] OSCAR_TO_GYRO_SPI_CS_L 5 CS SCL/SPC 2 OSCAR_TO_IMU_SPI_SCLK 22
B4 I2C0_SCL/GPIO0[11] A1 NC 22
22 OSCAR_TO_PHOSPHORUS_SPI_CS_L SPI0_SSEL1/GPIO0[18] 8 FSYNC/GND SDA/SDI 3 OSCAR_TO_IMU_SPI_MOSI 22
OSCAR_TO_COMPASS_SPI_CS_L D7 SPI0_SSEL2/GPIO0[4] I2C1_SDA/GPIO0[9] E6 14 REGOUT/GND_CAP
22
NC GYRO_PUMP SA0/SDO 4 IMU_TO_OSCAR_SPI_MISO 22
C5 SPI0_SSEL3/GPIO0[25] I2C1_SCL/GPIO0[17] E8
NC NC
F7 RESET* GYRO_TO_OSCAR_INT2 7 INT/INT2 DRDY/INT1 6 GYRO_TO_OSCAR_INT1
26 22 12 PP1V8_OSCAR I2C2_SDA/GPIO1[0] C9 NC
22 22
9 GND1
10 GND2
11 GND3
12 GND4
13 GND5
15 GND6
6.3V
1/32W 2 X6S
D1
C13
MF 0201
2 01005 ROOM=GYRO
NOSTUFF
13 PMU_TO_OSCAR_RESET_CLK32K_L
NOSTUFF
1 C2204
56PF
5%
16V
2 01005
ROOM=OSCAR
COMPASS
12 22 26
C2250 1 1 C2251
1.0UF 0.1UF
20% 20%
6.3V 2 2 4V
X5R X5R
0201-1 01005
ROOM=PHOSPHORUS ROOM=PHOSPHORUS
26 12 PP3V0_IMU PP1V8_OSCAR 12 22 26
B NOSTUFF NOSTUFF
B
6
1 C2205 1 C2206 C2207 1 C2200 1
VDD VDDIO
2.2UF 100PF 100PF 0.1UF
5% 20%
20% 5% 16V 4V U2204
2 6.3V
X5R 2 16V
NP0-C0G NP0-C0G 2 X5R 2 BMP282AC
0201-1 01005 01005 01005 OSCAR_TO_IMU_SPI_MOSI 3 SDI LGA SDO 5 IMU_TO_OSCAR_SPI_MISO
22 22
ROOM=COMPASS ROOM=COMPASS ROOM=COMPASS ROOM=COMPASS
4 SCK
2 CS*ROOM=PHOSPHORUS NOSTUFF
OSCAR_TO_IMU_SPI_SCLK
GND 1 C2255
22
56PF
B1
C4
1
7
NOSTUFF 22 OSCAR_TO_IMU_SPI_SCLK 5%
16V
VDD VID C2244 1 2 01005
ROOM=PHOSPHORUS
56PF
U2202 5%
16V
AK8963C 01005 2
ROOM=COMPASS 22 OSCAR_TO_PHOSPHORUS_SPI_CS_L
CSP
D1 CAD0ROOM=COMPASS
SCL/SK A3 OSCAR_TO_IMU_SPI_MOSI 22
NOSTUFF NOSTUFF NOSTUFF
D2 CAD1 SDA/SI A4
NOSTUFF 1 C2256 1 C2241 1 C2201
C2243 1 56PF 56PF 56PF
5% 5% 5%
56PF 2 16V 2 16V 2 16V
C2 TST1 5% 01005 01005 01005
NC CSB* A2 16V ROOM=PHOSPHORUS ROOM=PHOSPHORUS ROOM=PHOSPHORUS
01005 2
ROOM=COMPASS
B3 RSV SO B4
NC OSCAR_TO_COMPASS_SPI_CS_L 22
C3 TRG NOSTUFF
NC DRDY A1
C2264 1
PP1V8_OSCAR
56PF
26 22 12 D4 RST* 5%
16V
VSS 01005 2
ROOM=COMPASS
C1
IMU_TO_OSCAR_SPI_MISO 22
A NOSTUFF
C2242 1 SYNC_MASTER=N61_MLB SYNC_DATE=10/08/2013 A
PAGE TITLE
56PF
5%
16V SENSORS:OSCAR,CARBON,PHOS,MAGNESIUM
01005 2
ROOM=COMPASS DRAWING NUMBER SIZE
C2265 1 6.0.0
56PF NOTICE OF PROPRIETARY PROPERTY: BRANCH
5% THE INFORMATION CONTAINED HEREIN IS THE
16V
01005 2 PROPRIETARY PROPERTY OF APPLE INC.
ROOM=COMPASS THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
22 OF 55
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 22 OF 55
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
1 90_RCAM_TO_AP_MIPI_DATA3_CONN_P 23
5%
16V
2 NP0-C0G
AA21-S034VA1
F-ST-SM
D
01005
ROOM=RCAM_B2B 36 35
ROOM=RCAM_B2B
26 23 PP_RCAM_AF_CONN 6 5 90_RCAM_TO_AP_MIPI_DATA3_CONN_N 23
TAM0605 01005-1
SYM_VER-1
ROOM=RCAM_B2B 8 7
90_RCAM_TO_AP_MIPI_DATA2_P 4 1 90_RCAM_TO_AP_MIPI_DATA2_CONN_P
1 C2387
7 23
56PF 10 9 90_RCAM_TO_AP_MIPI_DATA2_CONN_P 23
5% 12 11
16V
2 NP0-C0G 23 AP_BI_RCAM_I2C_SDA_CONN 90_RCAM_TO_AP_MIPI_DATA2_CONN_N 23
7 90_RCAM_TO_AP_MIPI_DATA2_N 3 2 90_RCAM_TO_AP_MIPI_DATA2_CONN_N 23
RCAM: 01005 23 AP_TO_RCAM_I2C_SCL_CONN 14 13
PP1V2_RCAM_CONN 18 17 90_RCAM_TO_AP_MIPI_CLK_CONN_N
65-OHM-0.1A-0.7-2GHZ 70-OHM-300MA 26 23 23
4-LANE MIPI ROOM=RCAM_B2B
TAM0605
SYM_VER-1
(I2C,CTRL,CLK) AP_TO_RCAM_SHUTDOWN 1 2 AP_TO_RCAM_SHUTDOWN_CONN
20 19
7 23
4 1 22 21 90_RCAM_TO_AP_MIPI_DATA1_CONN_P
7 90_RCAM_TO_AP_MIPI_CLK_P 90_RCAM_TO_AP_MIPI_CLK_CONN_P 23 01005-1
23
1 90_RCAM_TO_AP_MIPI_DATA0_CONN_P 23
ROOM=RCAM_B2B
FL2322
120-OHM-210MA
C
16 RCAM_TO_LEDDRV_STROBE_EN 1 2 RCAM_TO_LEDDRV_STROBE_EN_CONN 23
90_RCAM_TO_AP_MIPI_DATA0_N 3 2 90_RCAM_TO_AP_MIPI_DATA0_CONN_N
7 23 01005
1 C2300
56PF
5%
2 16V
NP0-C0G
01005
ROOM=RCAM_B2B
0.07 OHMS
ROOM=RCAM_B2B
U2301 ENSURE >0.005 OHMS ON LDO OUTPUT. FL2343
10-OHM-750MA
LP5907UVX2.925-S
DSBGA 1 2
40 32 30 26 17 16 15 14 12 10 PP_VCC_MAIN A1 VIN VOUT A2 26 11 PP2V85_CAM_VDD PP2V85_RCAM_AVDD_CONN 23 26
53 52 49
01005-1
1 C2301 B1 VEN
ROOM=RCAM_B2B C2345 1 C2363 1 1 C2303 1 C2304
2.2UF GND
2.2UF 2.2UF 0.1UF 100PF
20% 20% 20% 20% 5%
6.3V 6.3V
2 6.3V X5R X5R 2 6.3V 2 16V
B2
X5R 2 2 X5R-CERM NP0-C0G
0201-1 0201-1 0201-1 01005 01005
ROOM=RCAM_B2B ROOM=RCAM_B2B ROOM=RCAM_B2B ROOM=RCAM_B2B ROOM=RCAM_B2B
7 CAM_EXT_LDO_EN
B B
RCAM: FERR-22-OHM-1A-0.055OHM
L2329
POWER: PP_RCAM_AF 1 2 PP_RCAM_AF_CONN
(1.8V DOVDD) 26 12
0201
23 26
FL2320
120-OHM-210MA
12 45_BUCK6_FB 1 2
01005
ROOM=RCAM_B2B
L2318
FERR-22-OHM-1A-0.055OHM
24 20 15 13 12 11 10 7 6 5 3 2 PP1V8 1 2 PP1V8_RCAM_CONN 23 26
27 26
0201
ROOM=RCAM_B2B 1 C2390 1 C2395
1.0UF 100PF
20% 5%
6.3V 16V
2 X5R 2 NP0-C0G
0201-1 01005
A ROOM=RCAM_B2B ROOM=RCAM_B2B
SYNC_MASTER=N61_MLB SYNC_DATE=11/01/2013 A
PAGE TITLE
26 12 4 2 PP1V2_SDRAM 1 2 PP1V2_RCAM_CONN 23 26
Apple Inc. 051-0517 D
0201 REVISION
C2302 1 ROOM=RCAM_B2B
1 C2389 1 C2305 1 C2392 R
6.0.0
1.0UF 2.2UF 2.2UF 100PF
20% 20% 5% NOTICE OF PROPRIETARY PROPERTY: BRANCH
20% 6.3V 6.3V
6.3V 2 X5R 16V
X5R 2 2 X5R 2 NP0-C0G THE INFORMATION CONTAINED HEREIN IS THE
0201-1 0201-1 0201-1 01005 PROPRIETARY PROPERTY OF APPLE INC.
ROOM=RCAM_B2B ROOM=RCAM_B2B ROOM=RCAM_B2B ROOM=RCAM_B2B THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
23 OF 55
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 23 OF 55
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
26 20 15 PN5V7_SAGE_AVDDN
26 24 15 PP5V7_SAGE_AVDDH PP1V8 2 3 5 6 7 10 11 12 13 15 20 23
26 27
VDDIO K1
D2
D4
F3
G6
G3
AVDDL G2
VDDIO_OSC J1
VDDIO N3
APN: 343S0638
Turn on is later than PP1V8_GRAPE P2MM-NSM
AVDDH1
AVDDH2
AVDDH3
AVDDH4
AVDDH5
1
Turn off is same time as PP1V8_GRAPE PP2403 SM PP AP_TO_TOUCH_SPI_CS_L 3 24
24 TOUCH_TO_SAGE_SENSE_IN<14> E5 SNS_IN0 DRV_OUT0 G7 SAGE_TO_TOUCH_VSTM_OUT<27> 24
24
24 TOUCH_TO_SAGE_SENSE_IN<1> A7 SNS_IN5
U2402 DRV_OUT5 L7 SAGE_TO_TOUCH_VSTM_OUT<10>
24
24
C2402 1 C2432 1 C2433 1 1 C2403 P2MM-NSM TOUCH_TO_SAGE_SENSE_IN<0> A9 SNS_IN6
MESON-A1 DRV_OUT6 M7 SAGE_TO_TOUCH_VSTM_OUT<6>
10UF 4.7UF 4.7UF 1.0UF 1
24
CSP
24
20%
10V
20%
6.3V
20%
6.3V
20%
6.3V PP2408 SM PP TP_CUMULUS_GPIO 24
24 TOUCH_TO_SAGE_SENSE_IN<6> B7 SNS_IN7 DRV_OUT7 N7 SAGE_TO_TOUCH_VSTM_OUT<2> 24
X5R-CERM 2 X5R-CERM1 2 X5R-CERM1 2 2 X5R
TOUCH_TO_SAGE_SENSE_IN<3> C7 SNS_IN8 DRV_OUT8 G8 SAGE_TO_TOUCH_VSTM_OUT<21>
VDDANA B1
VDDCORE C1
VDDH C8
C5
F4
VDDLDO A1
0402-8 402 402 0201-1 24 24
P2MM-NSM
1 TOUCH_TO_SAGE_SENSE_IN<10> D7 SNS_IN9 DRV_OUT9 H8 SAGE_TO_TOUCH_VSTM_OUT<25>
PP2410 SM PP CUMULUS_TO_MESON_VSTM_OUT_N 24
24
24
Follow Touch routing guidelines VDDIO
P2MM-NSM 24 TOUCH_TO_SAGE_SENSE_IN<2> B9 SNS_IN11 DRV_OUT11 K8 SAGE_TO_TOUCH_VSTM_OUT<9> 24
Cumulus sense nets are sensitive 1
220PF
PP2411 SM PP CUMULUS_TO_MESON_VSTM_OUT_P 24
24 TOUCH_TO_SAGE_SENSE_IN<7> C9 SNS_IN12 DRV_OUT12 L8 SAGE_TO_TOUCH_VSTM_OUT<5> 24
24 SAGE_TO_CUMULUS_IN<5> C2417 1 2 C_IN0 B9 IN0_0 U2401 VSTM_0 E9 24 TOUCH_TO_SAGE_SENSE_IN<9> D9 SNS_IN13 DRV_OUT13 M8 SAGE_TO_TOUCH_VSTM_OUT<3> 24
220PF NC
24 SAGE_TO_CUMULUS_IN<0> 10V X7R-CERM 10% 01005 C2425 1 2 C_IN1 B8 IN1_0 CUMULUS-C1 VSTM_1 E5
NC
P2MM-NSM 24 TOUCH_TO_SAGE_SENSE_IN<12> E9 SNS_IN14 DRV_OUT14 N8 SAGE_TO_TOUCH_VSTM_OUT<15> 24
1
24 SAGE_TO_CUMULUS_IN<2> C2418 1 2 220PF 10V X7R-CERM 10% 01005 C_IN2 A9 IN2_0 WLBGA VSTM_2 F7
NC
PP2412 SM PP
45_AP_TO_TOUCH_CLK32K_RESET_L 3 24
E6 DRV_OUT15 K9 SAGE_TO_TOUCH_VSTM_OUT<7> 24
220PF SAGE_TO_CUMULUS_IN<14> SNS_OUT0
SAGE_TO_CUMULUS_IN<6> 10V X7R-CERM 10% 01005 C2426 1 2 C_IN3 B7 IN3_0 VSTM_3 E6 24
DRV_OUT16 G9 SAGE_TO_TOUCH_VSTM_OUT<20>
24
220PF 10V X7R-CERM NC SAGE_TO_CUMULUS_IN<11> D6 SNS_OUT1
24
24 SAGE_TO_CUMULUS_IN<1> 10V X7R-CERM 10% 01005 C2427 1 2 C_IN5 A8 IN5_0 VSTM_5 F8 CUMULUS_TO_MESON_VSTM_OUT_P 24
24
DRV_OUT18 J9 SAGE_TO_TOUCH_VSTM_OUT<13> 24
220PF 10V X7R-CERM SAGE_TO_CUMULUS_IN<4> B6 SNS_OUT3
24 SAGE_TO_CUMULUS_IN<10> C2420 1 2 10% 01005 C_IN6 B5 IN6_0 VSTM_6 G9 CUMULUS_TO_MESON_VSTM_OUT_N 24
24
DRV_OUT19 G10 SAGE_TO_TOUCH_VSTM_OUT<19> 24
220PF SAGE_TO_CUMULUS_IN<5> A4 SNS_OUT4
SAGE_TO_CUMULUS_IN<11> 10V X7R-CERM 10% 01005 C2428 1 2 C_IN7 B4 IN7_0 VSTM_7 D6 24
DRV_OUT20 L9 SAGE_TO_TOUCH_VSTM_OUT<8>
24
220PF 10V X7R-CERM NC SAGE_TO_CUMULUS_IN<1> A6 SNS_OUT5
24
24
SAGE_TO_CUMULUS_IN<9>
SAGE_TO_CUMULUS_IN<12> E10
SNS_OUT13
SNS_OUT14
DRV_IN P L6
DRV_IN N K6
CUMULUS_TO_MESON_VSTM_OUT_P
CUMULUS_TO_MESON_VSTM_OUT_N
24 C
24 3
NC 24
01005 2 A2 PLDO_SUP_IN 0% 0%
PBKG K5 1/32W 1/32W
26 24 PP_SAGE_VBST_OUTH B1 VBST_OUTH MF MF
PBKG N6 01005 2
26 24 PN_SAGE_VBST_OUTL E1 VBST_OUTL 2 01005
26 24 PP_SAGE_LX C1 LX
26 24 PP_SAGE_LY D1 LY VCM_IN_0 E4 TOUCH_TO_MESON_VCM_IN0
No decoupling on previous projects F1 NLDO_SUP_IN VCM_IN_1 J5 TOUCH_TO_MESON_VCM_IN1
Touch B2B 26 24 12 PP1V8_GRAPE
24 20 SAGE_TO_TOUCH_VCPH_REF B2 VCPH_REF_EN
GO F8 MESON_TO_TOUCH_GUARD 24
F2
MLB APN : 516S1183 (Receptacle) R24071 24 20 SAGE_TO_TOUCH_VCPL_REF
G1
VCPL_REF_EN
Flex APN: 516S1182 (Plug) 100K 26 24 PN_SAGE_TO_TOUCH_VCPL_FILT VCPL AUX_BUF_IN M4
5
5%
B J2401
1/32W
MF
01005 2
VCC
26 24
26 24
PP_SAGE_TO_TOUCH_VCPH
PN_SAGE_VCPL_F
A3
E2
VCPH
VCPL_F
AUX_BUF_OUT M5 NC B
AA21-S054VA1 U2403 AUX_PLDO_OUT N5 NC
F-ST-SM 74AUP2G3404GN K3 I2C_SLV_ADDR0 AUX_NLDO_OUT N4
56 55 SOT1115 NC
AGND2
AGND2
AGND3
AGND3
AGND4
AGND4
AGND4
AGND5
K2 I2C_SLV_ADDR1
DGND
DGND
24 20 7 LCM_TO_AP_HIFA_BSYNC 1 1A 1Y 6 LCM_TO_AP_HIFA_BSYNC_BUFF 24
C2
C4
F7
E3
L5
F9
H6
M6
G4
J4
N2
Meson decoupling
24 TOUCH_TO_SAGE_SENSE_IN<13> 6 5 TOUCH_TO_SAGE_SENSE_IN<12> 24 GND 1
R2488 1 2 255K OIC_RIGHT_NET 8 7 TOUCH_TO_SAGE_SENSE_IN<14> 24
R2406 26 24 PP_SAGE_VBST_OUTH
100K
2
1% 1/32W MF 01005
10 9 5%
SAGE_TO_TOUCH_VSTM_OUT<16> 12 11 SAGE_TO_TOUCH_VSTM_OUT<12>
1/32W
MF
Tantalums solved singing caps C2438 1 C2410 1 Meson VCPL rail:
24 24
issue. Validate issue is resolved 0.33UF 1000PF
14 13 2 01005 20% 10% FL2486 Effective impedance of 3 Ohms,
24 SAGE_TO_TOUCH_VSTM_OUT<0> SAGE_TO_TOUCH_VSTM_OUT<13> 24
20V 2 25V
with Meson and replace with TANT X7R-CERM 2 10-OHM-750MA
24 SAGE_TO_TOUCH_VSTM_OUT<1> 16 15 SAGE_TO_TOUCH_VSTM_OUT<14> 24
0402 0201 at 115 kHz with 12 V bias.
0402 ceramics. 1 2
24 SAGE_TO_TOUCH_VSTM_OUT<2> 18 17 SAGE_TO_TOUCH_VSTM_OUT<15> 24 26 24 PN_SAGE_TO_TOUCH_VCPL_FILT PN_SAGE_TO_TOUCH_VCPL 24 26
PP5V7_SAGE_AVDDH 01005-1
24 SAGE_TO_TOUCH_VSTM_OUT<3> 20 19 SAGE_TO_TOUCH_VSTM_OUT<4> 24 R2412 26 24 15
1 C2405 1 C2408 1 C2441
SAGE_TO_TOUCH_VSTM_OUT<5> 22 21 SAGE_TO_TOUCH_VSTM_OUT<6> 0.00 2 2.2UF 1UF 0.1UF
24
SAGE_TO_TOUCH_VSTM_OUT<7> 24 23 SAGE_TO_TOUCH_VSTM_OUT<8>
24
26 24 PP_SAGE_TO_TOUCH_VCPH_CONN 1 PP_SAGE_TO_TOUCH_VCPH 24 26 26 24 PN_SAGE_VBST_OUTL 1 C2490 20% 10% 10%
24 24
0% 100PF 25V
2 X5R
16V
2 X6S-CERM
16V
2 X5R-CERM
24 SAGE_TO_TOUCH_VSTM_OUT<9> 26 25 SAGE_TO_TOUCH_VSTM_OUT<10> 24
1/32W
MF I2C pull-ups C2407 2 C2411 1 5%
2 25V 0402-3 0402 0201
SAGE_TO_TOUCH_VSTM_OUT<11> 28 27 SAGE_TO_TOUCH_VSTM_OUT<23> 01005 1UF-10OHM 1000PF NP0-C0G
24 24 20% 10% 01005
30 29 PP1V8_GRAPE 25V 25V
24 SAGE_TO_TOUCH_VSTM_OUT<24> SAGE_TO_TOUCH_VSTM_OUT<22> 24 26 24 12
TANT 1 X7R-CERM 2
24 SAGE_TO_TOUCH_VSTM_OUT<25> 32 31 SAGE_TO_TOUCH_VSTM_OUT<17> 24
R2411 1 1
0603-LLP2 0201
1
0.00 2 R2420 R2421
SAGE_TO_TOUCH_VSTM_OUT<26> 34 33 SAGE_TO_TOUCH_VSTM_OUT<18> PN_SAGE_TO_TOUCH_VCPL_CONN PN_SAGE_TO_TOUCH_VCPL
24
36 35
24 26 24
0%
24 26
1.8K 1.8K L2401
24 SAGE_TO_TOUCH_VSTM_OUT<27> SAGE_TO_TOUCH_VSTM_OUT<19> 24
1/32W
5%
1/32W
5%
1/32W
10UH-20%-0.23A-1.56OHM
SAGE_TO_TOUCH_VSTM_OUT<0> 38 37 SAGE_TO_TOUCH_VSTM_OUT<20> MF MF MF
24 24
01005 SAGE_TO_TOUCH_VCPH_REF PP_SAGE_LX 2 1 PP_SAGE_LY
40 39 2 01005 2 01005 24 20 26 24 24 26
SAGE_TO_TOUCH_VSTM_OUT<21> 24
SAGE_TO_TOUCH_VCPL_REF PSB1614FE
24 20
24 MESON_TO_TOUCH_GUARD_CONN 42 41 R2433 TOUCH_I2C_SDA
A R2495 1
1% 1/32W
2 255K
MF 01005 OIC_LEFT_NET
44
46
43
45
PN_SAGE_TO_TOUCH_VCPL_CONN
PP_SAGE_TO_TOUCH_VCPH_CONN
24 26
24 MESON_TO_TOUCH_GUARD_CONN 1
0.00 2
MESON_TO_TOUCH_GUARD 24
24
24 TOUCH_I2C_SCL
C2436
0.01UF
1 C2437
0.01UF
1
SYNC_MASTER=N/A SYNC_DATE=N/A A
24 26
1% 10% 10% PAGE TITLE
6.3V 6.3V
24
24
TOUCH_TO_SAGE_SENSE_IN<7>
TOUCH_TO_SAGE_SENSE_IN<6>
48
50
47
49
TOUCH_TO_SAGE_SENSE_IN<3>
TOUCH_TO_SAGE_SENSE_IN<2>
24
24
1/20W
MF
0201
X5R 2
01005
X5R 2
01005 TOUCH:CUMULUS,MESON
DRAWING NUMBER SIZE
TOUCH_TO_SAGE_SENSE_IN<5> 52 51 TOUCH_TO_SAGE_SENSE_IN<1>
24 24
58 57
11 45_PROX_TO_CUMULUS_RX_CONN 1 2 45_PROX_TO_CUMULUS_RX_C 1 45_PROX_TO_CUMULUS_RX_IN 24 26 24 PN_SAGE_VCPL_F 6.0.0
1% NOTICE OF PROPRIETARY PROPERTY: BRANCH
10%
6.3V
1/32W
MF
1 C2416 C2404 1 C2440 1 THE INFORMATION CONTAINED HEREIN IS THE
X5R-CERM 01005 27PF 0.01UF 1.0UF PROPRIETARY PROPERTY OF APPLE INC.
01005 5% 10% 20% THE POSESSOR AGREES TO THE FOLLOWING: PAGE
16V 25V 16V
2 NP0-C0G X5R-CERM 2 X5R-CERM 2
01005 0201 0201
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
24 OF 55
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 24 OF 55
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D
SCHEMATIC SYMBOL(PIN ORDER) IS WIERD !!
J2523
RCPT-BATT-2BLADES-0.90
FL2511
120-OHM-210MA
POWER TP MOJAVE TP D
F-ST-SM
11
1 2 BATTERY_SWI 14
PP5V0_USB TP2501
1 MESA_TO_BOOST_EN TP2569
1
01005 26 18 17 14 12
A VBUS 21 15
A
8 7 C2579 1
ROOM=BATTERY TP-P6 TP-P55
56PF
5%
5 1 16V
NP0-C0G 2
25 BATTERY_SWI_CONN 2 3 25 BATTERY_SWI_CONN 01005 TP2502
1 PP16V5_MESA TP2570
1
6 4
ROOM=BATTERY A POWER GROUND (SUPERSIZE) 21 15
26 A
PP_BATT_VCC PP_BATT_VCC TP-P80 TP-P55
47 46 41 26 25 16 14 14 16 25 26 41 46 47
SHORT-10L-0.25MM-SM
C2561 1 C2525 1 C2523 1 10 9
2 1 C2522 1 C2560 1 C2509 1 C2575
220PF 100PF 15PF 12 33PF 56PF 100PF 220PF TP2512
1
10% 5% 5% XW2512 5% 5% 5% 10% 47 46 41 26 25 16 14 PP_BATT_VCC A VBAT (SUPERSIZE)
10V
X7R-CERM 2
01005
ROOM=BATTERY
16V
NP0-C0G 2
01005
ROOM=BATTERY
16V
NP0-C0G-CERM 2
01005
ROOM=BATTERY
ROOM=BATTERY
1
PCB: PLACE XW2512
AT BATT CONN, PIN 7
2 16V
NP0-C0G-CERM
01005
ROOM=BATTERY
2 16V
NP0-C0G
01005
ROOM=BATTERY
2 16V
NP0-C0G
01005
ROOM=BATTERY
2 10V
X7R-CERM
01005
ROOM=BATTERY
TP-P80
TP2533
1
A
E75 - USB/UART/ID/POWER
TP-P80
90_TRISTAR_BI_E75_PAIR1_P TP2521
1
TP2539
1
18 17
A
CHARGER_VBATT_SNS 12 14
A TP-P55
TP-P80
90_TRISTAR_BI_E75_PAIR1_N TP2522
1
18 17
A
SH2508 TP-P55
SHIELDS SHLD-SNOUT-N61
SM
TP2523
1
CKPLUS_WAIVE=TERMSHORTED
TP2534
1 18 17 90_TRISTAR_BI_E75_PAIR2_P 1
A
2
A POWER GROUND (SUPERSIZE) TP-P55
806-9269 TP-P80
TP2524 C
C 1
18 17 90_TRISTAR_BI_E75_PAIR2_N 1
TP-P55
A
SH2501 604-00416
FIDUCIALS SM SUPER TP 26 18 PP_E75_TO_TRISTAR_ACC1_CONN
TP2526
1
A ACCESSORY ID AND POWER
TP-P55
FD2501 FD2511 SHLD-X145-EMI-LOWER-BACK
FID
0P5SM1P0SQ-NSP
1
FID
0P5SQ-SMP3SQ-NSP
1 1
OMIT_TABLE
RF CLIPS 13 PMU_TO_TP_AMUX_AY
TP2506
1
TP-P55
A ANALOG MUX A OUTPUT 26 18 PP_E75_TO_TRISTAR_ACC2_CONN
TP2527
1
A
SH2502 604-8159 RETENTION-COAX-N61
TP-P55
SM
FD2502 FD2512
FID FID 1 CL2502 PMU_TO_TP_AMUX_BY TP2507
1
0P5SM1P0SQ-NSP 0P5SQ-SMP3SQ-NSP
SHLD-X145-EMI-LOWER-FRONT SM
13
A ANALOG MUX B OUTPUT
1 1 TP-P55
OMIT_TABLE
FD2503 FD2513
FID FID 1
0P5SM1P0SQ-NSP
1
0P5SQ-SMP3SQ-NSP
1
SH2503
SM
806-00401
RETENTION-COAX-N61
1 CL2501
SM
RESET
FD2504 FD2514
FID FID SHLD-X145-EMI-UPPER-BACK
0P5SM1P0SQ-NSP 0P5SQ-SMP3SQ-NSP OMIT_TABLE
806-8699 RESET_1V8_L TP2508
1
1 1 17 15 13 4 2 A H6P & BB RESET
TP-P55
1
FD2505 FD2515 SH2504
FID FID
SM 604-8158 CL2503 E75_TO_TRISTAR_CON_DETECT_CONN TP2510
1
0P5SM1P0SQ-NSP 0P5SQ-SMP3SQ-NSP TH-NSP 18 A FOR DIAGS
1
FD2506
1
FD2516
SHLD-X145-EMI-UPPER-FRONT
OMIT_TABLE
1
SL-1.20X0.40-1.50X0.70-NSP
DFU TP-P55
A 1 C2510 1 C2511 1 C2512 1 C2513 1 C2514 1 C2515 BS2505 BS2506 SYNC_MASTER=N/A SYNC_DATE=N/A A
220PF 56PF 39PF 22PF 4.7PF 220PF STDOFF-2.70OD1.84ID-0.63H-SM STDOFF-2.70OD1.84ID-0.63H-SM PAGE TITLE
10% 5% 5% 5% +/-0.1PF 10%
2 10V
X7R-CERM 2 16V
NP0-C0G 2 16V
NP0-C0G 2 16V
CERM 2 16V
NP0-C0G 2 10V
X7R-CERM
1
860-7863
1
860-7863 POWER:BATT CONN,TPS,PD FEATURES
01005 01005 01005 01005 01005 01005 DRAWING NUMBER SIZE
BS2507 6.0.0
STDOFF-2.70OD1.84ID-0.88H-TH NOTICE OF PROPRIETARY PROPERTY: BRANCH
THE INFORMATION CONTAINED HEREIN IS THE
1 PROPRIETARY PROPERTY OF APPLE INC.
860-7862 THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
25 OF 55
. III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 25 OF 55
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
VOLTAGE PROPERTIES
VOLTAGE=3.3V PP3V3_USB 2 12
VOLTAGE=5.0V PP_LED_DRV_LX 16
I55 I1
VOLTAGE=1.8V PP1V8_VA_L19_L67 10 12 16 VOLTAGE=5.0V PP_LED_BOOST_OUT 16
I56 I2
D I57
I58
VOLTAGE=3.0V
VOLTAGE=3.0V
PP3V0_TRISTAR
PP3V0_IMU
12 15 17 30
12 22 I4
VOLTAGE=2.7V PP_BB_VDD_2V7_CONN 18
D
VOLTAGE=3.0V PP3V0_NAND 6 12
I60
VOLTAGE=3.0V PP3V3_ACC 12 17
VOLTAGE=1.8V PP_CODEC_TO_MIC1_BIAS_CONN 18
I59 I5
VOLTAGE=3.0V PP3V0_PROX_ALS 11 12 VOLTAGE=4.6V PP_E75_TO_TRISTAR_ACC2 17 18
I61 I7
VOLTAGE=3.0V PP2V9_LDO9 12
VOLTAGE=4.6V PP_E75_TO_TRISTAR_ACC2_CONN 18 25
I62 I8
VOLTAGE=4.6V PP_VCC_MAIN 10 12 14 15 16 17 23 30 32
VOLTAGE=1.8V PP1V8_LCM_CONN 20
I64 40 49 52 53 I10
VOLTAGE=1.0V PP1V0 7 12
VOLTAGE=22.0V PP_LCM_BL_ANODE_CONN 20 25
I65 I11
VOLTAGE=3.0V PP3V0_PROX_IRLED 11 12 VOLTAGE=-5.7V PN5V7_LCM_AVDDN_CONN 20
I67 I12
VOLTAGE=1.8V PP1V8_ALWAYS 3 5 12 14
VOLTAGE=5.7V PP5V7_LCM_AVDDH_CONN 20
I66 I13
VOLTAGE=3.0V PP3V0_MESA 12 21
VOLTAGE=2.95V PP_LDO13_GPS 51
I68 I14
VOLTAGE=1.1V PP_CPU 4 12
I70
VOLTAGE=1.1V PP_GPU 4 12
VOLTAGE=1.8V PP1V8_MESA 21
I69 I16
VOLTAGE=16.5V PP16V5_MESA_CONN 21
I17
VOLTAGE=1.2V PP1V2_SDRAM 2 4 12 23
I71 VOLTAGE=5.0V PP_TRISTAR_PIN 17
VOLTAGE=1.8V PP1V8_SDRAM 3 4 10 12 13 14 15 17 30
I143
I72
VOLTAGE=1.8V PP1V8 2 3 5 6 7 10 11 12 13 15 20 23
I73 24 27
VOLTAGE=1.8V PP1V8_GRAPE 12 24
I77
VOLTAGE=1.8V PP1V8_OSCAR 12 22
I76
VOLTAGE=1.2V PP1V2_NAND_VDDI 6
I75
I74
VOLTAGE=1.8V PP_EXTMIC_BIAS_FILT_IN 10 I20
VOLTAGE=1.2V PP1V2_RCAM_CONN 23
N56 SPECIFIC VOLTAGE PROPERTIES
VOLTAGE=1.8V BOARD_ID2 3 27
VOLTAGE=1.8V PP1V8_RCAM_CONN 23
I78 I21
VOLTAGE=1.2V PP1V2 2 4 5 11 12
I79
VOLTAGE=5.0V PP_E75_TO_TRISTAR_ACC1_CONN 18 25 VOLTAGE=3.0V PP2V85_CAM_VDD 11 23 VOLTAGE=22.0V PP_WLED34_LX 15
I80 I23 I151
C I81
VOLTAGE=5.0V
VOLTAGE=22.0V
PP_E75_TO_TRISTAR_ACC1 17 18
PP_LCM_BL_ANODE 15 20
I24
VOLTAGE=1.8V
VOLTAGE=1.8V
PP2V85_RCAM_AVDD_CONN 23
PP_CUMULUS_VDDCORE 24
I152
VOLTAGE=22.0V
VOLTAGE=22.0V
PP_LCM_BL34_ANODE 15 20
PP_LCM_BL34_ANODE_CONN 20 25
C
I82 I25 I153
VOLTAGE=0.2V PP_LCM_BL_CAT2 15 20
VOLTAGE=1.2V PP_CUMULUS_VDDANA 24 VOLTAGE=0.2V PP_LCM_BL_CAT3 15 20
I83 I26 I154
VOLTAGE=0.2V PP_LCM_BL_CAT1 15 20
VOLTAGE=13.5V PP_SAGE_TO_TOUCH_VCPH_CONN 24 VOLTAGE=0.2V PP_LCM_BL_CAT4 15 20
I87 I27 I155
VOLTAGE=0.2V PP_LCM_BL_CAT2_CONN 20 25
VOLTAGE=-12V PN_SAGE_TO_TOUCH_VCPL_CONN 24 VOLTAGE=0.2V PP_LCM_BL_CAT3_CONN 20 25
I86 I28 I157
VOLTAGE=0.2V PP_LCM_BL_CAT1_CONN 20 25
VOLTAGE=13.5V PP_SAGE_TO_TOUCH_VCPH 24 VOLTAGE=0.2V PP_LCM_BL_CAT4_CONN 20 25
I85 I30 I156
VOLTAGE=-12V PN_SAGE_TO_TOUCH_VCPL 24
I29
VOLTAGE=-12V PN_SAGE_TO_TOUCH_VCPL_FILT 24
VOLTAGE=-5.7V PN5V7_SAGE_AVDDN 15 20 24
I158
I88
VOLTAGE=1.2V PP1V2_OSCAR 12 22
VOLTAGE=2.0V PP_RCAM_AF 12 23
I89 VOLTAGE=-12V PN_SAGE_VCPL_F 24
I160
VOLTAGE=3.0V PP3V0_MESA_CONN 21
I33
I90 VOLTAGE=5.7V PP_SAGE_LX 24 VOLTAGE=2.0V PP_RCAM_AF_CONN 23
VOLTAGE=6V PP6V0_LCM_BOOST 15
I35 I159
I91 VOLTAGE=17.0V PP_SAGE_LY 24
PP_STRB_DRIVER_TO_LED_WARM I34
VOLTAGE=5.0V 8 16
I92
VOLTAGE=5.0V PP_STRB_DRIVER_TO_LED_COOL 8 16 VOLTAGE=-14.0V PN_SAGE_VBST_OUTL 24
I96 VOLTAGE=1.8V PP_PMU_VREF 13 I161
I38 VOLTAGE=-5.7V PN5V7_SAGE_AVDDN_FILT
VOLTAGE=14V PP_SAGE_VBST_OUTH 24 I162
I37
VOLTAGE=2.0V PP_BUCK6_LX 12
I163
VOLTAGE=5.0V PP_TIGRIS_VBUS_DET 14
I40
VOLTAGE=1.8V PP_CODEC_TO_MIC1_BIAS 10 18
I93
VOLTAGE=1.8V PP_EXTMIC_BIAS_IN 10
I97
VOLTAGE=1.8V PP_EXTMIC_BIAS_FILT 10
I98 VOLTAGE=2.5V PP_PMU_VDD_REF 13
VOLTAGE=1.8V PP_CODEC_TO_FRONTMIC3_BIAS 10 11 I41
I99 VOLTAGE=1.8V PP_EXTMIC_BIAS 10
VOLTAGE=1.8V PP_CODEC_TO_REARMIC2_BIAS I42
8 10
I100 VOLTAGE=1.8V PP1V8_XTAL 2
VOLTAGE=1.8V PP_CODEC_FILT+ 10 I43
I101 VOLTAGE=1.8V PP_PMU_VDD_RTC 13
VOLTAGE=2.2V PP_CODEC_SPKR_VQ 10 I44
I103
VOLTAGE=2.5V PP_CODEC_VCPFILT- 10
I140 VOLTAGE=3.80V PP_BATT_VCC 14 16 25 41 46 47
VOLTAGE=2.5V PP_CODEC_VCPFILT+ 10 I46
I104 VOLTAGE=1.8V PP1V8_MESA_CONN 21
B I106
I105
VOLTAGE=2.5V
VOLTAGE=0.2V
PP_CODEC_VHP_FLYN 10
PP_CODEC_VHP_FLYC 10
I48
I47
VOLTAGE=3.0V PP3V0_PROX_CONN 11 B
VOLTAGE=2.5V PP_CODEC_VHP_FLYP 10
I107
VOLTAGE=1.8V PP1V8_FCAM_CONN 11
I108
VOLTAGE=3.0V PP2V85_FCAM_AVDD_CONN 11 VOLTAGE=1.0V
I109 I50 PP0V95_FIXED_SOC 4 7 12
VOLTAGE=1.8V PP_CODEC_TO_FRONTMIC3_BIAS_CONN 11
I110 VOLTAGE=1.0V PP0V95_FIXED_SOC_PCIE 7
VOLTAGE=3.0V PP3V0_ALS_CONN 11 I51
I111
VOLTAGE=1.2V VOLTAGE=1.2V PP1V2_PLL
I113 PP1V2_FCAM_VDDIO_CONN 11 I52 2
A I131
VOLTAGE=22.0V
VOLTAGE=18.0V
PP_WLED_LX 15
PP18V0_MESA_SW 15
A
I132 PAGE TITLE
VOLTAGE=17.0V
I133
I134
VOLTAGE=16.5V
P17V0_MOJAVE_LDOIN 15
PP16V5_MESA 15 21 25
SYSTEM:VOLTAGE PROPERTIES
VOLTAGE=8.0V PP_SPKAMP_SW 16 DRAWING NUMBER SIZE
I136
VOLTAGE=8.0V PP_L19_VBOOST 16 Apple Inc. 051-0517 D
I135
VOLTAGE=1.8V REVISION
PP_SPKAMP_FILT 16 R
I137
VOLTAGE=1.8V PP_SPKAMP_LDO_FILT 16
6.0.0
I138
NOTICE OF PROPRIETARY PROPERTY: BRANCH
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
26 OF 55
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
IV ALL RIGHTS RESERVED 26 OF 55
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
N56 SPECIFIC
D D
C C
A A
PAGE TITLE
SYSTEM:N56 SPECIFIC
DRAWING NUMBER SIZE
D D
C C
B B
A A
PAGE TITLE
BLANK
DRAWING NUMBER SIZE
D D
C C
B B
A A
PAGE TITLE
BLANK
DRAWING NUMBER SIZE
D D
RFFE_VIO_S2R 54
3
BB_TO_AP_RESET_DET_L
MAKE_BASE=TRUE
MAKE_BASE=TRUE
I45
I48 BB_RESET_DET_L
31 33
31 36
WLAN/BT HOUSE KEEPING I3
13
PMU_TO_BB_RST_L MAKE_BASE=TRUE
I47 RF_PMIC_RESET_L 31 33 13
45_PMU_TO_WLAN_CLK32K MAKE_BASE=TRUE CLK32K_AP 31 52
I5
3
AP_TO_BB_RST_L MAKE_BASE=TRUE BB_RST_L 31 33 13
PMU_TO_WLAN_REG_ON MAKE_BASE=TRUE WLAN_REG_ON 31 52
I4
I190 13
WLAN_TO_PMU_HOST_WAKE MAKE_BASE=TRUE HOST_WAKE_WLAN 31 52
I6
3
AP_TO_BB_WAKE_MODEM MAKE_BASE=TRUE
I50 AP_WAKE_MODEM 36 13
PMU_TO_BT_REG_ON MAKE_BASE=TRUE BT_REG_ON 31 52
I8
13
BB_TO_PMU_HOST_WAKE_L MAKE_BASE=TRUE
I51 BB_WAKE_HOST_L 31 36 3
AP_TO_BT_WAKE MAKE_BASE=TRUE WAKE_BT 31 52
I7
3
BB_TO_AP_IPC_GPIO MAKE_BASE=TRUE
I52 BB_IPC_GPIO 36 13
BT_TO_PMU_HOST_WAKE MAKE_BASE=TRUE HOST_WAKE_BT 52
16
BB_TO_LEDDRV_GSM_BLANK MAKE_BASE=TRUE
I53 GSM_TXBURST_IND 36
3
BB_TO_AP_IPC_GPIO1 MAKE_BASE=TRUE BB_IPC_GPIO1 36
2
50_AP_BI_BB_HSIC1_DATA MAKE_BASE=TRUE
I54 50_BB_HSIC_DATA 31 35 3 AP_TO_WLAN_JTAG_SWDIO MAKE_BASE=TRUE
I10 WLAN_JTAG_SWDIO 31 52
50_AP_BI_BB_HSIC1_STB I56 50_BB_HSIC_STROBE WLAN_PCIE_WAKE_L
C 2
3
AP_TO_BB_HOST_RDY
MAKE_BASE=TRUE
MAKE_BASE=TRUE
I57 BB_HOST_RDY
31 35
31 36
13
3
WLAN_TO_PMU_PCIE_WAKE_L
AP_TO_WLAN_DEVICE_WAKE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
I14
I13 PCIE_DEV_WAKE
31 52
31 52
C
3
BB_TO_AP_DEVICE_RDY MAKE_BASE=TRUE
I58 BB_DEVICE_RDY 31 36 7 90_WLAN_TO_AP_PCIE1_RXDP_P MAKE_BASE=TRUE
I12 90_WLAN_PCIE_TDP 31 52
3
BB_TO_AP_GPS_SYNC MAKE_BASE=TRUE BB_GPS_SYNC 31 36 7 90_WLAN_TO_AP_PCIE1_RXDP_N MAKE_BASE=TRUE
I16 90_WLAN_PCIE_TDN 31 52
7 90_AP_TO_WLAN_PCIE1_TXDP_P MAKE_BASE=TRUE
I15 90_WLAN_PCIE_RDP 31 52
90_WLAN_PCIE_RDN
UART IPC I60
7
7
90_AP_TO_WLAN_PCIE1_TXDP_N
90_AP_TO_WLAN_PCIE1_REFCLK1_P
MAKE_BASE=TRUE
MAKE_BASE=TRUE
I17
I19 90_WLAN_PCIE_REFCLK_P
31 52
52
3
AP_TO_BB_UART2_RTS_L MAKE_BASE=TRUE
I59 BB_UART_CTS_L 31 36 7 90_AP_TO_WLAN_PCIE1_REFCLK1_N MAKE_BASE=TRUE
I18 90_WLAN_PCIE_REFCLK_N 52
3
BB_TO_AP_UART2_CTS_L MAKE_BASE=TRUE
I62 BB_UART_RTS_L 31 36 7 WLAN_TO_AP_PCIE1_CLKREQ_L MAKE_BASE=TRUE
I20 WLAN_PCIE_CLKREQ_L 31 52
17 3
AP_TO_BB_UART2_TXD MAKE_BASE=TRUE
I61 BB_UART_RXD 31 36 7 AP_TO_WLAN_PCIE1_RST_L MAKE_BASE=TRUE WLAN_PCIE_PERST_L 31 52
17 3
BB_TO_AP_UART2_RXD MAKE_BASE=TRUE BB_UART_TXD 31 36
3
BB_TO_AP_I2S3_DIN
MAKE_BASE=TRUE
MAKE_BASE=TRUE
I65
I66 BB_I2S_TXD
31 36
31 36
WLAN HSIC IPC
3
AP_TO_BB_I2S3_LRCLK MAKE_BASE=TRUE BB_I2S_WS 31 36 I21
3
WLAN_TO_AP_UART4_RXD MAKE_BASE=TRUE WLAN_UART_TXD 31 52
I24
AP_TO_WLAN_UART4_TXD MAKE_BASE=TRUE WLAN_UART_RXD
OSCAR UART I67
3
3
WLAN_TO_AP_UART4_CTS_L MAKE_BASE=TRUE
I23
I22 WLAN_UART_RTS_L
31 52
31 52
22
OSCAR_TO_BB_UART_TXD MAKE_BASE=TRUE
I68 BB_OTHER_RXD 31 36 3
AP_TO_WLAN_UART4_RTS_L MAKE_BASE=TRUE WLAN_UART_CTS_L 31 52
22
BB_TO_OSCAR_UART_RXD MAKE_BASE=TRUE BB_OTHER_TXD 31 36
3
AP_TO_BT_UART1_TXD MAKE_BASE=TRUE
I27
I28
BT_UART_RXD
52
31 52
B
3 I72 31 36
3
BT_TO_AP_UART1_RXD MAKE_BASE=TRUE BT_UART_TXD 31 52
13
PMU_TO_BB_VBUS_DET MAKE_BASE=TRUE
I74 BB_USB_VBUS 31 35
90_TRISTAR_BI_BB_USB_N MAKE_BASE=TRUE
I73 90_BB_USB_N
17
17
90_TRISTAR_BI_BB_USB_P MAKE_BASE=TRUE 90_BB_USB_P
31 35
31 35
BT AUDIO PCM I29
3
45_AP_TO_BT_I2S1_BCLK MAKE_BASE=TRUE BT_PCM_CLK 52
I30
RADIO ANTENNA CONTROL I75
3
3
AP_TO_BT_I2S1_DOUT
BT_TO_AP_I2S1_DIN
MAKE_BASE=TRUE
MAKE_BASE=TRUE
I31
BT_PCM_IN
BT_PCM_OUT
52
52
PP_BB_VDD_2V7 MAKE_BASE=TRUE PP_LDO14_RFSW I32
18 32 42 43 51
3
AP_TO_BT_I2S1_LRCLK MAKE_BASE=TRUE BT_PCM_SYNC 52
18
BB_GPIO2 MAKE_BASE=TRUE
I79 BB_LAT_GPIO2
36
36
OSCAR STATES I34
18
BB_GPIO3 MAKE_BASE=TRUE
I80 BB_LAT_GPIO3 36 OSCAR_TO_RADIO_CONTEXT_A MAKE_BASE=TRUE OSCAR_CONTEXT_A
22 52
BB_GPIO4 BB_LAT_GPIO4 I33
18
MAKE_BASE=TRUE
36
22
OSCAR_TO_RADIO_CONTEXT_B MAKE_BASE=TRUE OSCAR_CONTEXT_B 52
13
RADIO_TO_PMU_ADC_PP_LDO11_VDDIO MAKE_BASE=TRUE
I84 ADC_PP_LDO11 31 3
AP_TO_STOCKHOLM_UART3_RTS_L MAKE_BASE=TRUE
I37 STOCKHOLM_CTS_L 31 53
13
RADIO_TO_PMU_ADC_PP_LDO5_SIM MAKE_BASE=TRUE
I85 ADC_PP_LDO5 31 3
STOCKHOLM_TO_AP_UART3_RXD MAKE_BASE=TRUE
I39 STOCKHOLM_UART_TXD 31 53
13
RADIO_TO_PMU_ADC_SMPS4 MAKE_BASE=TRUE ADC_SMPS4 31 3
AP_TO_STOCKHOLM_UART3_TXD MAKE_BASE=TRUE
I38 STOCKHOLM_UART_RXD 31 53
7
AP_TO_STOCKHOLM_DWLD_REQ MAKE_BASE=TRUE
I41 STOCKHOLM_FW_DWLD_REQ 53
13
STOCKHOLM_TO_PMU_HOST_WAKE MAKE_BASE=TRUE
I40 STOCKHOLM_HOST_WAKE 31 53
MAKE_BASE=TRUE
STOCKHOLM_ENABLE
STOCKHOLM_VDD_MUX_3V0
53
30 26 17 15 12 55
PP3V0_TRISTAR MAKE_BASE=TRUE PAC_VDD_3V0
A 30 26 17 15 12 54
3
25
AP_TO_STOCKHOLM_SIM_SEL
AP_TO_STOCKHOLM_ANT
MAKE_BASE=TRUE
MAKE_BASE=TRUE
STOCKHOLM_SIM_SEL
STOCKHOLM_ANT
55
53
A
PAGE TITLE
CELL:ALIASES
DRAWING NUMBER SIZE
C PP3156_RF
P2MM
WIFI_BT
PP3165_RF
P4MM
SM
PP3111_RF
P4MM
SM
PP3139_RF
P4MM
SM
PP3150_RF
P4MM
SM
PP3182_RF
P4MM
SM RFFE2_CLK_BUFFER
C
SM
1 WLAN_PCIE_WAKE_L PP
1 DSDS_SIM_CLK 35 55 PP
1 SPMI_DATA 33 35 PP
1 90_BB_USB_N 30 35 PP
1 BB_RST_L 30 33 PP
1 36 54
PP 30 52
SIM_DEBUG SIM_DEBUG SIM_DEBUG SIM_DEBUG RF_DEBUG
WIFI_BT
PP3183_RF PP3112_RF PP3140_RF PP3151_RF PP3185_RF
PP3157_RF P4MM P4MM P4MM P4MM P4MM
P2MM SM
1
SM
1 SPMI_CLK
SM
1 90_BB_USB_P SM
1 BOOT_HSIC SM
1 RFFE2_DATA_BUFFER
SM DSDS_SIM_RESET 35 55 33 35 30 35 31 36 36 54
1 WLAN_PCIE_PERST_L 30 52
PP
SIM_DEBUG
PP
SIM_DEBUG
PP
SIM_DEBUG
PP
SIM_DEBUG
PP
RF_DEBUG
PP
WIFI_BT PP3184_RF
PP3158_RF P4MM
P2MM
SM
SM
1 DSDS_SIM_DATA
PP
1 WLAN_PCIE_CLKREQ_L 30 52
PP
SIM_DEBUG
35 55
WIFI_BT
PP3186_RF
PP3159_RF P4MM
P4MM SM
1
SM DSDS_SIM_DETECT 35
PP
1 PCIE_DEV_WAKE 30 52
PP
SIM_DEBUG
TABLE_ALT_HEAD
WIFI_BT PART NUMBER ALTERNATE FOR BOM OPTION REF DES COMMENTS:
PP3160_RF PP3187_RF PART NUMBER
P2MM P4MM
SM SM TABLE_ALT_ITEM
SIM_DEBUG
WIFI_BT
138S1103 138S0719 ALTERNATE C4007_RF 4.7UF CAPACITOR PP_LDO11
PP3163_RF 40 39 38 36 35 34 32 31
P2MM TABLE_ALT_ITEM
PP_3184_RF
P2MM-NSM
SM
1
SIM CARD ESD PROTECTION
PP PP_LDO5 31 32 34 55
PP3166_RF
P4MM DZ3102_RF
SM 5.5V-6.2PF
PP
1 90_WLAN_PCIE_RDN 30 52
WIFI_BT BB_SIM_DETECT 1 2
36 31
PP3167_RF
P4MM
SM
1 90_WLAN_PCIE_RDP 0201 VR3101_RF
PP
PP3168_RF
P4MM-NSM
WIFI_BT
30 52
GND
PP3169_RF
P4MM-NSM 1 1 DZ3101_RF BB_SIM_RESET 2 3 BB_SIM_CLK
SM C3101_RF 36 31 31 36
1 90_WLAN_PCIE_TDP 1
PP
WIFI_BT
30 52 R3101_RF 2.2UF 12V-33PF
01005-1
15.00K 20%
2 6.3V
1
1% X5R 2
5
1/32W 0201-1
DIFF-PAIR PROBE POINTS LOCATED OPPOSITE DC-BLOCKS VCC MF
A J3101_RF 201005
SYNC_MASTER=N56_RADIO_MLB SYNC_DATE=05/07/2014 A
BB_SIM_RESET 2 RSTSIMCARD-RCPT-N61I/O 7 BB_SIM_DATA PAGE TITLE
36 31 IN F-ST-SM BI 31 36
XW3101_RF
SHORT-10L-0.1MM-SM
AP INTERFACE & DEBUG CONNECTORS
36 31 IN
BB_SIM_CLK 3 CLK DETECT 12 BB_SIM_DETECT
OUT 31 36 DRAWING NUMBER SIZE
VREG_SMPS1_0V90 1 2 ADC_SMPS1
34 32
XW3102_RF
OUT 30
BASEBAND PMU (1 OF 2)
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
RADIO_PMIC RADIO_PMIC RADIO_PMIC RADIO_PMIC RADIO_PMIC RADIO_PMIC RADIO_PMIC RADIO_PMIC RADIO_PMIC RADIO_PMIC RADIO_PMIC RADIO_PMIC RADIO_PMIC
1 C3230_RF 1 C3232_RF 1 C3234_RF 1 C3236_RF 1 C3250_RF 1 C3252_RF 1 C3257_RF 1 C3238_RF 1 C3240_RF 1 C3241_RF 1 C3243_RF 1 C3254_RF 1 C3256_RF
20UF
20%
2.2UF
20%
2.2UF
20%
2.2UF
20%
2.2UF
20%
2.2UF
20%
2.2UF
20%
20UF
20%
2.2UF
20%
2.2UF
20%
2.2UF
20%
2.2UF
20%
2.2UF
20%
2 6.3V
CERM-X5R 2 6.3V
X5R 2 6.3V
X5R 2 6.3V
X5R 2 6.3V
X5R 2 6.3V
X5R 2 6.3V
X5R 2 6.3V
CERM-X5R 2 6.3V
X5R 2 6.3V
X5R 2 6.3V
X5R 2 6.3V
X5R 2 6.3V
X5R
0402 0201-1 0201-1 0201-1 0201-1 0201-1 0201-1 0402 0201-1 0201-1 0201-1 0201-1 0201-1
C VREG_RF_CLK_BYP C
AVDD_BYP
1 RADIO_PMIC
C3228_RF
SWITCHERS BULK CAPS REF_BYP
U_PMICRF
PM8019
20%
2 10V
1.0UF
1 RADIO_PMIC X5R-CERM
1 RADIO_PMIC
C3226_RF
C3227_RF BGA 0201-1
0.1UF SYM 5 OF 5
1.0UF 20% 26 VDD_INT_BYP VREG_RFCLK 91
53 52
PP_VCC_MAIN VBATT_S1 20% 2 4V
2 10V
17 16 15 14 12 10 32 21
49 40 32 30 26 23 IN MAKE_BASE=TRUE
X5R-CERM
X5R
01005 REF_BYP REG VREG_XO 74 VREG_XO_PMIC
15 L3201_RF
VBATT_S1 32
0201-1
GND_REF
VREG_S1 27 2.2UH-20%-1.5A-0.16OHM
MAKK2016-SM
22 PP_VSW_S1 1235MA VREG_SMPS1_0V90
1 RADIO_PMIC 32 VBATT_S1 VDD_S1 VSW_S1_1 11 1 2
OUT 31 32 34
C3217_RF VOLTAGE=4.50V
15UF 88 VSW_S1_2 16
20% 32 VBATT_S2 VDD_S2 L3203_RF
2 6.3V
X5R
94 VDD_S2 VREG_S2 82 2.2UH-20%-1.5A-0.16OHM
MAKK2016-SM
0402-1 PP_VSW_S2 1100MA VREG_SMPS2_1V25
47 VSW_S2 93 1 2
OUT 32
32 VBATT_S3 VDD_S3 VOLTAGE=4.50V L3204_RF
VREG_S3 62
2.2UH-20%-1.5A-0.16OHM
VBATT_S4 1 MAKK2016-SM 1350MA
53 52
17 16 15 14 12 10 IN PP_VCC_MAIN VBATT_S2 32
32 VDD_S4
VSW_S3_1 53 PP_VSW_S3 1 2 VREG_SMPS3_0V95 OUT 32
MAKE_BASE=TRUE
49 40 32 30 26 23
92 VOLTAGE=4.50V
32 VREG_SMPS2_1V25 VDD_L1 VSW_S3_2 58
VBATT_S2 32 L3202_RF RADIO_PMIC
32 31 VREG_SMPS4_2V075 2 VDD_L2_3 VREG_S4 23
2.2UH-20%-1.2A-0.15OHM
1 RADIO_PMIC PP_VSW_S4 1 2 0806 550MA VREG_SMPS4_2V075
C3218_RF 4 VSW_S4_1 6 OUT 31 32
15UF
20%
VDD_L7_8_11
VSW_S4_2 12
VOLTAGE=4.50V
VREG_SMPS4_2V075
2 6.3V
32 31 77
X5R VDD_L9 VREG_RX VOLTAGE=1.225V
0402-1 VREG_L1 86 PP_LDO1 OUT 34 38 39
72 VDD_L10 VOLTAGE=1.80V
VREG_L2 7 PP_LDO2 OUT 34
2 6.3V
X5R
17
12
16
10 PP_VCC_MAIN 43 VIN_VPH1 VOLTAGE=1.90V
0402-1 15
26
14
23
IN
VREG_L7 10 PP_LDO7 OUT 34 36
49 40 54 VIN_VPH2 VREG_TX VOLTAGE=2.05V
VREG_L8 3 PP_LDO8 OUT 38 39
VOLTAGE=1.20V
53 52
17 16 15 14 12 10 IN PP_VCC_MAIN
MAKE_BASE=TRUE
VBATT_S4 32 VREG_L9 71 PP_LDO9 OUT 34
49 40 32 30 26 23
VOLTAGE=0.90V
VBATT_S4 32 VREG_L10 83 PP_LDO10 OUT 34
VREG_IO VOLTAGE=1.80V
1 RADIO_PMIC VREG_L11 9 PP_LDO11 OUT 31 34 35 36 38 39 40
C3220_RF
15UF
20% VREG_L12 33
VOLTAGE=0.95V
PP_LDO12 OUT 34
2 6.3V
X5R VOLTAGE=2.95V
0402-1 VREG_L13 34 PP_LDO13 OUT 34 51
VOLTAGE=2.70V
VREG_L14 28 PP_LDO14_RFSW OUT 30 42 43 51
1 RADIO_PMIC
RADIO_PMIC
1 RADIO_PMIC
C3201_RF1 C3202_RF
RADIO_PMICRADIO_PMICRADIO_PMICRADIO_PMICRADIO_PMIC
RADIO_PMIC
1RADIO_PMIC
C3203_RF1 C3204_RF1 C3205_RF1 C3206_RF1 C3207_RF1 C3208_RF1 C3209_RF 1RADIO_PMIC
C3210_RF C3211_RF1 RADIO_PMIC
RADIO_PMIC
C3212_RF1 C3213_RF1 RADIO_PMICRADIO_PMIC
C3214_RF1 C3215_RF
1.0UF 10UF 1.0UF 1.0UF 1.0UF 1.0UF 1.0UF 1.0UF 10UF 10UF 10UF 1.0UF 10UF 1.0UF 1.0UF
20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20%
2 10V 2
6.3V
X5R-CERM 2 10V
CERM-X5R 2 10V
X5R-CERM2 10V 2 10V
X5R-CERM 2 10V
X5R-CERM 2 10V
X5R-CERM 2
6.3V
2
X5R-CERM
6.3V
2
6.3V
X5R-CERM 2 CERM-X5R CERM-X5R CERM-X5R
10V
X5R-CERM
6.3V
2 CERM-X5R
10V
2 X5R-CERM 10V
2 X5R-CERM
0201-1 0402-9 0201-1 0201-1 0201-1 0201-1 0201-1 0201-1 0402-9 0402-9 0402-9 0201-1 0402-9 0201-1 0201-1
A A
PAGE TITLE
BASEBAND PMU (1 0F 2)
DRAWING NUMBER SIZE
Y3301_RF
19.2MHZ-10PPM-7PF-80OHM
2.0X1.6-SM
1 3 33 XTAL19M_IN U_PMICRF RADIO_PMIC
RADIO_PMIC PM8019 RADIO_PMIC
34 33 32 IN
PP_LDO3 4 2 BGA C3303_RF
1000PF R3309_RF
90
SYM 2 OF 5
64 50_A0_PMCLK 1 2 1
100 2 50_RF_CLK
C 1
R3305_RF
39K
U_PMICRF XTAL19M_OUT 84
XTAL_19M_IN
XTAL_19M_OUT
CLOCK
XO_OUT_A0
PP_LDO3 32 33 34
1 RADIO_PMIC
R3311_RF
100K
1%
1/32W
MF
2 01005
VINYL 33
DEFAULT CONFIGURATION
SUPPORTS VINYL
B 1 RADIO_PMIC
R3312_RF B
100K
1% U_PMICRF
1/32W PM8019
MF
2 01005 BGA
NOSTUFF SYM 3 OF 5
5 GND_S1 GND 36
87 INPUT_PWR 40
GND_S2 GND
U_PMICRF 63 GND_S3 GND 41
PM8019 17 GND_S4 GND 50
RADIO_PMIC BGA 51
R3301_RF SYM 1 OF 5 GND
1.00K2 30 RADIO_ON_L 70 CBL_PWR* OPT 66 GND 60
31 30 BB_RST_L 1 31 IN
31 CONTROL NC
IN
PON_TRIG GND 61
1% MF GND 89 69
1/32W01005
RADIO_PMIC 75 GND
35 31 OUT PMIC_RESOUT_L PON_RST*
R3307_RF GND 56
20.0K2 65
35 IN PS_HOLD 1 31 PS_HOLD_PMIC PS_HOLD GND 45
5% MF 20
1/32W0100531 30 IN RF_PMIC_RESET_L RESIN*
35 31 SPMI_CLK 81 SPMI_CLK
BI
35 31 SPMI_DATA 76 SPMI_DATA
BI
A A
PAGE TITLE
VDD_DDR_CORE_1P2 H1
H12 VDD_MODEM
VDD_DDR_CORE_1P2 P1
H13 VDD_MODEM
VDD_DDR_CORE_1P2 P20
J7 VDD_MODEM
J8 VDD_MODEM VDD_QFPROM_PRG W8 (QFUSE PP_LDO3
PROGRAMMING)
32 33 34
IN
J11 VDD_MODEM
J12 VDD_MODEM
K6 VDD_MODEM
K7 VDD_MODEM
K11 VDD_MODEM
L6 VDD_MODEM
B B
(MSM CORE) (EBI1 PAD) (HSIC PAD) (USB 1.8V) (GPS ADC) (LPDDR2)
RADIO_BB RADIO_BB RADIO_BB RADIO_BB RADIO_BB RADIO_BB
34 32 IN PP_LDO10 34 32 IN PP_LDO9 34 32 IN PP_LDO9 34 32 IN PP_LDO2 39 38 34 32 IN PP_LDO1 39 38 36 35 34 32 31 IN PP_LDO11
RADIO_BB RADIO_BB RADIO_BB RADIO_BB RADIO_BB RADIO_BB RADIO_BB RADIO_BB RADIO_BB RADIO_BB RADIO_BB RADIO_BB 40 RADIO_BB
1 C3401_RF 1 C3404_RF 1 C3407_RF 1 C3410_RF 1 C3413_RF 1 C3416_RF 1 C3419_RF 1 C3422_RF 1 C3424_RF 1 C3427_RF 1 C3430_RF 1 C3432_RF 1 C3435_RF
2.2UF 2.2UF 2.2UF 2.2UF 2.2UF 2.2UF 2.2UF 2.2UF 2.2UF 2.2UF 0.1UF 2.2UF 2.2UF
20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20%
2 4V
X5R-CERM 2 4V
X5R-CERM 2 4V
X5R-CERM 2 4V
X5R-CERM 2 4V
X5R-CERM 2 4V
X5R-CERM 2 4V
X5R-CERM 2 4V
X5R-CERM 2 4V
X5R-CERM 2 4V
X5R-CERM 2 4V
X5R 2 4V
X5R-CERM 2 4V
X5R-CERM
0201 0201 0201 0201 0201 0201 0201 0201 0201 0201 01005 0201 0201
NOSTUFF
(MSM MEMORY) (SDC1 PAD) (SDC/UIM) (COMBO DAC/BBRX) (PLL) (LPDDR2 CORE)
RADIO_BB
PP_LDO12 RADIO_BB
PP_LDO13 NOSTUFF RADIO_BB
VDDPX_BIAS RADIO_BB
PP_LDO7 RADIO_BB
PP_LDO10 RADIO_BB
PP_LDO9
34 32 IN 51 34 32 IN 34 33 IN 36 34 32 IN 34 32 IN 34 32 IN
RADIO_BB RADIO_BB RADIO_BB RADIO_BB RADIO_BB RADIO_BB RADIO_BB RADIO_BB RADIO_BB RADIO_BB RADIO_BB RADIO_BB RADIO_BB
1 C3402_RF 1 C3405_RF 1 C3408_RF 1 C3411_RF 1 C3414_RF 1 C3417_RF 1 C3420_RF 1 C3425_RF 1 C3428_RF 1 C3431_RF 1 C3433_RF 1 C3436_RF 1 C3438_RF
2.2UF 2.2UF 2.2UF 2.2UF 2.2UF 2.2UF 2.2UF 0.1UF 2.2UF 2.2UF 2.2UF 2.2UF 2.2UF
20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20%
4V
2 X5R-CERM 4V
2 X5R-CERM 4V
2 X5R-CERM 4V
2 X5R-CERM 4V
2 X5R-CERM 4V
2 X5R-CERM 4V
2 X5R-CERM 4V
2 X5R 4V
2 X5R-CERM 4V
2 X5R-CERM 4V
2 X5R-CERM 4V
2 X5R-CERM 4V
2 X5R-CERM
0201 0201 0201 0201 0201 0201 0201 01005 0201 0201 0201 0201 0201
NOSTUFF NOSTUFF NOSTUFF
(PLL) (QFUSE)
(MODEM SUB SYSTEM) (GENIO PAD) (USB CORE) (BBRX) RADIO_BB
PP_LDO3 RADIO_BB
PP_LDO3
RADIO_BB RADIO_BB RADIO_BB RADIO_BB 34 33 32 IN 34 33 32 IN
34 32 31 IN VREG_SMPS1_0V90 39 38 36 35 34 32 31 IN PP_LDO11 34 32 IN PP_LDO12 39 38 34 32 IN PP_LDO1 RADIO_BB RADIO_BB
RADIO_BB RADIO_BB RADIO_BB RADIO_BB RADIO_BB RADIO_BB 40 RADIO_BB RADIO_BB RADIO_BB RADIO_BB
1 C3434_RF 1 C3437_RF
1 C3403_RF 1 C3406_RF 1 C3409_RF 1 C3412_RF 1 C3415_RF 1 C3418_RF 1 C3421_RF 1 C3423_RF 1 C3426_RF 1 C3429_RF
2.2UF 2.2UF
2.2UF 2.2UF 2.2UF 2.2UF 2.2UF 2.2UF 2.2UF 2.2UF 2.2UF 2.2UF 20% 20%
20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 2 4V 2 4V
2 4V
X5R-CERM 2 4V
X5R-CERM 2 4V
X5R-CERM 2 4V
X5R-CERM 2 4V
X5R-CERM 2 4V
X5R-CERM 2 4V
X5R-CERM 2 4V
X5R-CERM 2 4V
X5R-CERM 2 4V
X5R-CERM
X5R-CERM
0201
X5R-CERM
0201
0201 0201 0201 0201 0201 0201 0201 0201 0201 0201 NOSTUFF
A A
PAGE TITLE
D D
40 39 38 36 35 34 32 31
PP_LDO11
A2
VP
36 35 BB_SWD_ENABLE B2 IN1 IN2 C1 BB_SWD_ENABLE 35 36
U_JTAGRF
TS5A2066
35 31 30 90_BB_USB_P B1 COM1 BGA COM2 C2 90_BB_USB_N 30 31 35
GND
D1
RADIO_SIMCARD
PP_LDO11 31 32 34 35 36 38 39 40
RADIO_BB
1
R3509_RF
10K
C 1%
1/32W
MF
C
010052
NOSTUFF DSDS_SIM_DETECT 31 35
RADIO_BB
U_BB_RF
ASIC-MDM9625M-333P
PMIC_RESOUT_L W14 BGA V17
33 31 IN RESIN* RESOUT* NC
N2 SYM 1 OF 6 W18 RADIO_BB
31 IN BB_JTAG_RST_L SRST* DIGITAL PS_HOLD PS_HOLD OUT 33
VCC
1 1
U_EEP_RF R3507_RF R3508_RF
CAT24C08C4A 10K
1%
10K
1%
WLCSP 1/32W 1/32W
36 35
B1
BB_EEPROM_SCL SCL SDA B2 BB_EEPROM_SDA 35 36 MF MF
2 01005 201005
VSS
36 35 BB_EEPROM_SCL
A2
BB_EEPROM_SDA
A 36 35
A
PAGE TITLE
D D
PP_LDO11 31 32 34 35 36 38 39 40
RADIO_BB
1 RADIO_BB
R3601_RF
10K U_BB_RF
1%
1/32W
ASIC-MDM9625M-333P
MF BGA
01005 2 R18 SYM 3 OF 6 H5
31 OUT BB_SIM_DATA GPIO_0 GPIO_38 GSM_TXBURST_IND OUT 30
WFR_BB_PRX_I_P B5
BBRX_QM_CH1
BBRX_IP_CH2
TX_DAC1_VREF
TX_DAC1_IP A8
31 30
30
OUT
OUT BB_I2S_CLK U8
GPIO_14
GPIO_15
GPIO_52
GPIO_53 T3 BB_COEX_UART_RXD
OUT
IN
31 52
31 52
C
39 IN M18 GPIO_16 GPIO_54 E2 WTR_SSBI_TX_GPS
WFR_BB_PRX_I_N A5 BBRX_IM_CH2 TX_DAC1_IM B8 NC OUT 37
39 IN M16 GPIO_17 GPIO_55 D1 WTR_SSBI_PRX_DRX
WFR_BB_PRX_Q_P B4 BBRX_QP_CH2 TX_DAC1_QP A7 NC BLSP5 SSBI IN 37
39 IN N16 GPIO_18 GPIO_56 D2
WFR_BB_PRX_Q_N A4 BBRX_QM_CH2 TX_DAC1_QM B7 NC NC
39 IN L16 GPIO_19 GPIO_57 E1 WFR_SSBI 39
C4 C7 NC OUT
WFR_BB_DRX_I_P BBRX_IP_CH3 ET_DAC_M ET_DAC_N BB_OTHER_TXD D18 GPIO_20 GPIO_58 T1 BB_DEBUG_SYNC (DEV)
39 IN OUT 40 31 30 OUT NC
39 WFR_BB_DRX_I_N C5 BBRX_IM_CH3 ET_DAC_P E7 ET_DAC_P 40 31 30 BB_OTHER_RXD C18 GPIO_21 GPIO_59 R6 GSM_TX_PHASE_D1 37
IN OUT IN OUT
WFR_BB_DRX_Q_P B3 BB_EEPROM_SDA E19 BLSP6 R3 GSM_TX_PHASE_D0
39 IN BBRX_QP_CH3 V16 35 BI GPIO_22 GPIO_60 OUT 37
A3 DNC NC E18 U7
39 IN WFR_BB_DRX_Q_N BBRX_QM_CH3 W16 35 BI BB_EEPROM_SCL GPIO_23 GPIO_61 BB_CORE_DUMP IN 30 31
DNC
C15 D4
NC 31 30 OUT BB_RESET_DET_L P16 GPIO_24 GPIO_62 V8 BB_DEBUG_STATUS OUT 31
37 IN WTR_BB_GPS_I_P GNSS_BB_IP DNC NC L18 W4
C16 C3 30 IN AP_WAKE_MODEM GPIO_25 GPIO_63 BB_DEBUG_ERROR OUT 31
37 IN WTR_BB_GPS_I_N GNSS_BB_IM DNC NC L5 W3
B16 30 OUT BB_LAT_GPIO0 GPIO_26 GPIO_64 BB_SWD_ENABLE OUT 35
37 IN WTR_BB_GPS_Q_P GNSS_BB_QP M3 U6
A16 BB_LAT_GPIO1 NC GPIO_27 GPIO_65 BB_IPC_GPIO BI 30
37 IN WTR_BB_GPS_Q_N GNSS_BB_QM K3 T2
30 OUT BB_LAT_GPIO2 GPIO_28 GPIO_66 BB_HOST_RDY IN 30 31
37 36
WTR_TX_IDAC 36 33 VREF_DAC_BIAS
RADIO_BB RADIO_BB RADIO_BB
B 1 C3601_RF
0.1UF
1 C3603_RF
2200PF
1 C3604_RF
2200PF
B
10% 10% 10%
2 6.3V 2 6.3V 2 6.3V
X7R X5R-CERM X5R-CERM
0201 01005 01005
36 34 32 PP_LDO7 NOSTUFF
U_BUFFER
RF5129
BGA
49 47 46 36 31 RFFE2_CLK A1 SCLK SDATA A2 RFFE2_DATA 31 36 46 47 49
54 31 RFFE2_CLK_BUFFERB3 SCLK_A
B1 GND
R3602_RF
40 39 38 36 35 34 32 31 PP_LDO11 1
0.002 RFFE_VIO 36 41 42 44 45 46 47 49
1% VOLTAGE=1.80V
1/20W
MF
0201
A A
PAGE TITLE
RFFE2_DATA
MOBILE DATA MODEM (2 OF 2) DRAWING NUMBER SIZE
5%
22PF R
6.0.0
2 16V
CERM NOTICE OF PROPRIETARY PROPERTY: BRANCH
01005 THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
36 OF 55
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 36 OF 55
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
C802
WTR TRANSCEIVER (1 OF 2)
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
R802
L800
U803
D D
U_WTR_RF U_WTR_RF
WTR1625 WTR1625
BGA BGA
U_WTR_RF
WTR1625
BGA
WTR_BB_TX_I_P 151 TX_BB_IP SYM 3 OF 5 TX_LB1_OUT 162
36
NC
36 WTR_BB_TX_I_N 160 TX_BB_IM TX_LB2_OUT 153 50_LB_2G_WTR_TX_OUT 41
4.75K 71
1 2 WTR_RTUNE RTUNE TX_HB2_OUT 121 50_B40_B38_B41_WTR_TX_OUT 45
1% 140
1/32W GND ADC_IN 109
MF
01005 55 GND PDET_RFFB 117 50_FWD_OR_REV_RF 46
118 GND
105 GND 122
36 WTR_SSBI_TX_GPS SSBI_TX_GNSS
36 WTR_SSBI_PRX_DRX 95 SSBI_PRX_DRX
156 GND
131 XO_IN
39 33 50_RF_CLK
RADIO_WTR
1 C3702_RF
100PF
5%
10V
A 2 NP0-C0G
01005
NOSTUFF
A
PAGE TITLE
34 32
39
MAKE_BASE=TRUE
PP_LDO1
MAKE_BASE=TRUE
VREG_1P3V
38 39
38 39 WTR DECOUPLINGL3801_RF
CAPS
RADIO_WTR 22NH-3%-0.25A
39 38 VREG_2V MAKE_BASE=TRUE VDD_DRX_BB_2V 38 39 38 VREG_1P3V MAKE_BASE=TRUE 1 2 VDD_PRX_PLL_1P3V VREG_1P3V MAKE_BASE=TRUE VDD_PRX_LO_HB_1P3V 38
D RADIO_WTR WTR DECOUPLING SHARED WITH C3808_RF
1 C3812_RF
0201
RADIO_WTR
RADIO_WTR
1 C3820_RF
RADIO_WTR
1 C3830_RF
D
1 RADIO_WTR
C3801_RF 100PF 0.1UF 1 RADIO_WTR
C3808_RF 0.1UF
5% 20% 20%
10UF 2 10V 2 4V 10UF 2 4V U_WTR_RF
20% NP0-C0G X5R 20% X5R
2 6.3V
CERM-X5R
01005 01005 2 6.3V
CERM-X5R
01005
90 WTR1625
0402 NOSTUFF NOSTUFF 0402 38 VDD_PRX_VCO_1P3V VDD_RF1_P_VCO BGA
38 VDD_PRX_VCO_2V 80 VDD_RF2_P_VCO SYM 4 OF 5 VDD_RF2_T_DA 129 VDD_TX_DA_2V 38
RADIO_WTR RADIO_WTR 72
1 C3813_RF 1 C3821_RF 38 VDD_PRX_LB_1P3V VDD_RF1_P_LB VDD_RF1_T_UPC 136 VDD_TX_UPC_1P3V 38
100PF
5%
0.1UF
20% 38 VDD_PRX_HBMB_1P3V 34 VDD_RF1_P_HMB VDD_RF1_T_LO 135 VDD_TX_LO_1P3V 38
2 10V
NP0-C0G 2 4V
X5R 57 VDD_RF1_P_HMB_LO
01005 01005 38 VDD_PRX_LO_HBMB_1P3V VDD_RF2_T_BB 126 VDD_TX_BBF_2V 38
R3802_RF
0.00 2 VDD_SHDR_VCO_2V
1 38 VDD_PRX_VCO_1P3V 38
VDD_DRX_LO1_1P3V 38
1%
1/20W
RADIO_WTR RADIO_WTR
MF 1 C3816_RF 1 C3809_RF
0201
0.1UF
20% DELETED C3805 PR REVIEW FEEDBACK 0.1UF
20%
2 4V
X5R 2 4V
X5R
01005 01005
R3803_RF 89
1
0.00 2
VDD_TX_VCO_2V 38 VDD_PRX_LO_HBMB_1P3V 38 VDD_DRX_MB_1P3V 38
GND U_WTR_RF
56 GND WTR1625
1% RADIO_WTR RADIO_WTR 83 BGA GND 111
1/20W GND
MF 1 C3817_RF 1 C3806_RF
0201 82 SYM 5 OF 5 GND 101
0.1UF
20%
0.1UF
20% 58
GND
GND
2 4V
X5R 2 4V
X5R GND 110
01005 01005 35 GND
GND 145
8 GND
GND 144
26 GND
GND 143
64 GND
VDD_TX_PLL_2V 38 VDD_TX_SYNTH_1P3V 38 VDD_DRX_HB_1P3V 38 GND 128
42 GND
RADIO_WTR RADIO_WTR GND 120
41 GND
1 C3802_RF 1 C3824_RF RADIO_WTR GND 119
81
B 0.1UF
20%
0.1UF
20%
1
R3807_RF
GND
GND 106 B
2 4V
X5R 2 4V
X5R 0.00 21 GND GND 150
01005 01005 1% 6 134
1/20W GND GND
NOSTUFF MF 24
20201 GND
GND 159
39
R3808_RF GND
GND 142
0.00 2 10 125
1 VDD_XO_2V 38 VDD_TX_LO_1P3V 38 VDD_GPS_LNA_1P3V 38 GND GND
0% RADIO_WTR RADIO_WTR RADIO_WTR MAKE_BASE=TRUE 3 GND GND 124
1/32W 23 148
MF 1 C3803_RF 1 C3825_RF 1 C3828_RF GND GND
01005
0.1UF
10%
0.1UF
20%
0.1UF
20%
46 GND GND 158
2 10V
X5R-CERM 2 4V
X5R VDD_GPS
MAKE_BASE=TRUE
2 4V
X5R 49 GND 133
0201 01005 01005 GND 112
69 GND
GND 132
88 GND
GND
70 GND GND 45
VDD_FBRX_2V 38 VDD_TX_UPC_1P3V 38 VDD_GPS_BB_1P3V 38 63 GND GND 66
RADIO_WTR RADIO_WTR 40 GND GND 84
I175 1 C3818_RF 1 C3826_RF VDD_GPS_PLL_1P3V 38 GND 75
47
VDD_PRX_2V 38 0.1UF
20%
100PF
5% RADIO_WTR MAKE_BASE=TRUE 87
GND
GND GND 164
2 4V
X5R 2 10V
NP0-C0G
1 C3829_RF
77
01005 01005 0.1UF
20% 96
GND
RADIO_WTR GND
2 4V
X5R
01005
R3806_RF
PP_LDO11 VDD_MSM_1P8V 38
0.00 2
39 36 35 34 32 31
MAKE_BASE=TRUE 1 VDD_TX_VCO_1P3V
40
RADIO_WTR RADIO_WTR 1%
1/20W
RADIO_WTR
1 C3811_RF 1 C3819_RF MF 1 C3807_RF VDD_GPS_VCO_1P3V 38
0201
A 1.0UF 0.1UF 0.1UF
10%
2 6.3V
X5R-CERM
20%
2 4V
X5R
20%
2 4V
X5R PAGE TITLE
A
0201-1 01005
NOSTUFF
L3802_RF
01005
RF TRANSCEIVER (2 OF 3) DRAWING NUMBER SIZE
8.2NH-3%-0.19A-1.6OHM
Apple Inc. 051-0517 D
1 2 VDD_TX_DA_1P3V 38 REVISION
01005 RADIO_WTR
1 C3827_RF
R
6.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
100PF
5% THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
2 10V
NP0-C0G THE POSESSOR AGREES TO THE FOLLOWING: PAGE
01005
NOSTUFF
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
38 OF 55
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 38 OF 55
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
C1019
WFR TRANSCEIVER
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
R1016
L1000
U1002
U_WFR_RF
WFR1620
D BGA
SYM 1 OF 2
GND 1 D
MB1 DC 22 61
38 32 PP_LDO8 VREG_2V 38 39 44 50_B25_PRX_WFR_IN PRX_MB1_IN RX_OTHER GND
MAKE_BASE=TRUE
RADIO_WFR 50_B1_B4_PRX_WFR_IN 16
MB2 NO DC 44 PRX_MB2_IN
38 34 32 PP_LDO1 VREG_1P3V 38 39
6 SSBI_PRX_DRX 13 WFR_SSBI 36
MAKE_BASE=TRUE R3903_RF 44 50_B3_PRX_WFR_IN PRX_MB3_IN
MB3 DC 34
VREG_1P3V VDD_DIG_1P3V 39 39 38 VREG_2V
0.00 2 VDD_PRX_VCO_WFR_2V 27 GND
39 38
MAKE_BASE=TRUE 1 39 50_WFR_PRX_HB_CA_IN NC PRX_HB_CA_IN
MAKE_BASE=TRUE
RADIO_WFR 1% RADIO_WFR 3 PRX_MB_CA_OUT 5 50_WFR_PRX_MB_CA_OUT OUT 37
1 C3904_RF 1/20W
1 C3912_RF 37 IN 50_WFR_PRX_LB_CA_IN PRX_LB_CA_IN
MF
1 RADIO_WFR 0.1UF 1 RADIO_WFR 0201
0.1UF MB1 DC 49 DRX_MB_CA_OUT 65 50_WFR_DRX_MB_CA_OUT OUT 37
C3901_RF 20% C3903_RF 20% 48 50_B25_DRX_WFR_IN DRX_MB1_IN
10UF
20% 2 4V
X5R
10UF
20% 2 4V
X5R MB2 NO DC 48 50_B1_B4_DRX_WFR_IN 54 DRX_MB2_IN PRX_BB_IP 29 WFR_BB_PRX_I_P 36
VDD_DRX_LB_WFR_1P3V 39
37 33 50_RF_CLK
RADIO_WFR
1 C3919_RF
100PF
C 5%
2 10V
NP0-C0G
C
01005
NOSTUFF
I113
VDD_DRX_MB_HB_FE_1P3V VDD1_DRX_BB_2V 39
RADIO_WFR RADIO_WFR
1 C3907_RF 1 C3915_RF
0.1UF
20%
0.1UF
20%
2 4V
X5R 2 4V
X5R
01005 01005
NOSTUFF U_WFR_RF
WFR1620
I114 BGA
VDD_PRX_MBHB_FE_1P3V VDD1_PRX_BB_2V 39 37
39 VDD_PRX_VCO_WFR_2V VDD_RF2_P_VCO SYM 2 OF 2 GND 46
RADIO_WFR RADIO_WFR PWR_GND
1 C3908_RF 1 C3916_RF 39
33 VDD_RF1_P_VCO
VDD_PRX_VCO_WFR_1P3V GND 35
0.1UF
20%
0.1UF
20% VDD_PRX_LO_WFR_1P3V31 VDD_RF1_P_LO GND 42
2 4V 2 4V
39
X5R X5R
01005 01005 39
44 VDD_RF1_P_PLL
VDD_PRX_PLL_WFR_1P3V GND 53
NOSTUFF
39 VDD_PRX_LB_FE_1P3V 15 VDD_RF1_P_LB_FE GND 20
39
10 VDD_RF1_P_MHB_FE
VDD_PRX_MBHB_FE_1P3V GND 41
B RADIO_WFR GND 18 B
R3902_RF 39 VDD_DRX_LB_WFR_1P3V39 VDD_RF1_D_LB_FE GND 9
0.00 2VDD_PRX_VCO_WFR_1P3V 59 VDD_RF1_D_MHB_FE
1 39 40 38 36 35 34 32 31 PP_LDO11 VDD1_1P8V 39 39 VDD_DRX_MB_HB_FE_1P3V GND 11
1% RADIO_WFR MAKE_BASE=TRUE
RADIO_WFR 24
1/20W
1 C3910_RF 1 C3917_RF 39 VDD_DIG_1P3V VDD_RF1_DIG GND 21
MF
0201
0.1UF
20%
0.1UF
20%
14 GND GND 32
4V
2 X5R 4V
2 X5R VDD1_1P8V 2 VDD_DIO GND 4
01005 01005 39
GND 55
VDD_PRX_PLL_WFR_1P3V 39
GND 40
RADIO_WFR
1 C3911_RF GND 60
0.1UF
20% GND 48
2 4V
X5R
01005 GND 58
GND 26
GND 8
VDD_PRX_LO_WFR_1P3V 39
RADIO_WFR GND 12
1 C3902_RF
0.1UF
20%
4V
2 X5R
01005
A A
PAGE TITLE
D D
XW4001_RF
SHORT-10L-0.25MM-SM
32 30 26 23 17 16 15 14 12 10
53 52 49 40
PP_VCC_MAIN 1 2 VBATT_SW 40
L4002_RF U_QPOET
NOSTUFF RADIO_QPOET 22-OHM-25%-1800MA QFE1100
SHOULD BE PLACED PP_VCC_MAIN QPOET_BATT BGA PP_VCC_MAIN
MAX 0.25MM AWAY 1 C4001_RF 40 32 30 1 2 14 BYP_BATT VDD_BATT 15
FROM QPOET 14 12 10
26 23 17 16 15
10 12 14 15 16 17 23 26 30 32
40 49 52 53
10UF 53 52 49
45 44 43 42 40 VPA_ET 0201 10 BYP_LOAD VDD_BATT 16
20%
XW4002_RF 2 6.3V 28
SHORT-10L-0.25MM-SM CERM-X5R
0402 40 VBATT_SW VDD_BUCK VDD_AMP 5 APT_VINPUT 40
1 2 SW_GROUND 40
SW_GROUND 27 GND_BUCK VDD_1P8 17 PP_LDO11
NOSTUFF 40 31 32 34 35 36 38 39 40
BOTH XW’S QPOET_VSW 1.5UH-1.95A-0.111OHM
> 1.0MM ET_DAC_P 7 AMP_INP VSW_BUCK 23 1 2
PSB25201T-SM
TO CREATE 36 IN
RADIO_QPOET
INDUCTANCE 36 ET_DAC_N 2 AMP_INM L4003_RF
IN
AMP_OUT 4 VPA_ET 40 42 43 44 45 VPA_ET 40 42 43 44 45
45 44 43 42 41 36 31 RFFE1_DATA 26 SDATA
C_BUCK 11
BI VPA_APT 40 VPA_APT
45 41 RADIO_QPOET
45 44 43 42 41 36 31 RFFE1_CLK 21 SCLK C_BUCK 12 RADIO_QPOET
BI 1 C4008_RF
1 C4007_RF
PA_CTL_QFE 13 C_SW_BUCK 8 470PF
33
BST_L MPP1 4.7UF 10% X5R
C_SW_BUCK 9 20% 2 10V 01005
C 32 30 26 23 17 16 15 14 12 10
53 52 49 40
PP_VCC_MAIN 1
0805
2 20 VSW_BOOST
C_GSM 6 GSM_CAP 40 GSM_CAP
2 10V
X5R-CERM
0402 VPA_ET_FILTER C
2.2UH-20%-0.7A-0.23OHM 19 USID_LSB (USID) 1 RADIO_QPOET
RADIO_QPOET
R4001_RF
22 PA_VBAT 18 VPA_BATT 42 43 44 2.2
GND 45 RADIO_QPOET RADIO_QPOET 5%
CRITICAL TO STAY 1/32W
24 VOUT_BOOST 25 VOUT_BOOST 40 1 C4005_RF @ 4.7UF TO MEET
QPOET TIMING
MF
GND_BOOST 20UF 2 01005
L4001_RF GND 1 20%
2 6.3V
CERM-X5R
PP_VCC_MAIN GND_AMP 3 0402
30 32 40 49
10 12 14 15
16 17 23 26
52 53
(CAN BE CHANGED TO 20UF)
RADIO_QPOET
1 C4010_RF
470PF
VOUT_BOOST_GND 40
10% X5R
2 10V 01005
B B
BOOST FILTER
I/O @ 1.8V
L4004_RF
22-OHM-25%-1800MA
35 34 32 31 PP_LDO11 40 VOUT_BOOST 1 2 APT_VINPUT 40
40 39 38 36
0201
RADIO_QPOET
1 C4002_RF RADIO_QPOET
1 C4003_RF 1 RADIO_QPOET
C4006_RF
10UF 10UF 10UF
20% 20% 20%
2 6.3V
CERM-X5R 2 6.3V
CERM-X5R 2 6.3V
CERM-X5R
0402 0402 0402
40 VOUT_BOOST_GND
2
XW4004_RF
SHORT-10L-0.25MM-SM
NOSTUFF
1
A A
PAGE TITLE
D D
47 46 26 25 16 14 PP_BATT_VCC VPA_APT 40 45
RADIO_2G
1 C4107_RF RADIO_2G RADIO_2G
56PF
5%
1 C4108_RF 1 C4109_RF 1 C4112_RF 1 C4119_RF
2 16V 2.2UF 2.2UF 100PF 220PF
NP0-C0G 20% 20% 5% 2%
01005 2 6.3V
2 6.3V
2 16V
2 50V
X5R X5R NP0-C0G C0G
RADIO_2G 0201-1 0201-1 01005 0201
C4103_RF NOSTUFF
100PF
37 50_HB_2G_WTR_TX_OUT 1 2 L4102_RF
3.0NH+/-0.1NH-0.6A
5%
16V 1 2 50_HB_2G_ASM_IN 46
NP0-C0G
10
RADIO_2G
01005 0201
4
RADIO_2G
1 C4113_RF 1 C4117_RF
VBATT V2G 0.8PF 12PF
5%
U_2GPARF +/-0.05PF
25V
2 C0G 25V
2 NP0-C0G-CERM
SKY77356-11 0201 0201-2
50_HB_2G_PA_IN5 HB_RF_IN LGA HB_RF_OUT 12 50_HB_2G_PA_OUT
C 50_LB_2G_PA_IN6 LB_RF_IN LB_RF_OUT 7 50_LB_2G_PA_OUT
NOSTUFF
C
VIO 3 RFFE_VIO 36 42 44 45 46
47 49
SCLK 1 RFFE1_CLK
SDATA 2 RFFE1_DATA
31
44
36 40 42 43
45 L4101_RF
31
44
36 40 42 43
45 6.2NH-3%-0.4A
GND THRM
1 2 50_LB_2G_ASM_IN 46
RADIO_2G RADIO_2G
PAD 0201
1 C4118_RF
C4104_RF
8
9
11
13
100PF 1.2PF
+/-0.1PF
37 50_LB_2G_WTR_TX_OUT 1 2 25V
2 C0G-CERM
0201
5%
16V
NP0-C0G
01005
B B
A A
PAGE TITLE
2G PA
DRAWING NUMBER SIZE
D 1
01005
2 50_B28A_ASM_TRX 46 D
1
1 C4211_RF
L4207_RF 2.4PF
45 44 43 40 VPA_ET 18NH-3%-140MA +/-0.1PF
01005 16V
2 NP0-C0G
NOSTUFF 01005-1
RADIO_VLB_PAD RADIO_VLB_PAD
1 2
1 C4209_RF 1 C4208_RF
RADIO_VLB_PAD C4229_RF 68PF
47PF 12PF 5%
5%
C4204_RF
2 16V 5%
16V 2 16V
NP0-C0G
100PF CERM
01005
2 CERM 01005 L4217_RF
1
50_B28_WTR_TX_OUT 2 NOSTUFF 01005
42 8.2NH-3%-0.19A-1.6OHM
45 44 43 40 VPA_BATT PLACE INDUCTOR CLOSE TO PA 1 2
5%
10V
50_B28B_ASM_TRX 46
NP0-C0G 1 C4228_RF 01005
01005
1PF RADIO_VLB_PAD
+/-0.1PF
2
16V 1 C4207_RF 1
NP0-C0G 1 C4213_RF
01005 1.0UF
20% 1.0PF
2 10V
X5R-CERM L4208_RF +/-0.1PF
0201-1 18NH-3%-140MA 2 16V
NP0-C0G
01005 01005
RADIO_VLB_PAD RADIO_VLB_PAD RADIO_VLB_PAD
NOSTUFF
35
29
28
FL_B17LP
2 BAND17 RADIO_VLB_PAD
RADIO_VLB_PAD VBAT VCC1 VCC2 LFL15710MTCTD717
B28A_ANT 22 50_B28A_PAD_ANT L4222_RF 0402
C4205_RF C4226_RF
100PF 50_B28_PAD_IN 40 B28_IN B28B_ANT 11 50_B28B_PAD_ANT 6.8NH-3%-0.210A 100PF
42
1
50_B17_FILTER_TX_OUT 2 50_B17_PAD_IN 39 B17_IN U_VLBPAD B17_ANT 25 50_B17_PAD_ANT
PLACE INDUCTOR CLOSE TO PA 1 2 4
50_B17_PAD_LPF_IN IN OUT 2 1 2 50_B17_ASM_TRX 46
B29_RX_IN 17 50_B29_PAD_ANT
1 C4227_RF GND
50_B17_PAD_LPF_OUT 5%
10V
NP0-C0G
C
01005 42 3 SW1
CTRL_VLB_BAND_SELECT_1 1.0PF 01005
1
3
L4204_RF +/-0.1PF
22NH-5%-0.1A 42 4 SW2
CTRL_VLB_BAND_SELECT_2 L4224_RF 2 16V
NP0-C0G
01005 22-OHM-25%-0.2A-0.9DCR 01005
NOSTUFF 15 RX_OUT 31 1 2 RADIO_VLB_PAD
VIO
43 LB_VLB_VIO RFFE_VIO 36 41 44 45 46 47 49
1
2
5
6
7
10
9
12
13
14
16
18
19
20
21
23
24
26
27
30
34
36
38
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
5% 2 16V
10V 1 NP0-C0G-CERM +/-0.1PF
NP0-C0G
01005
01005
2 16V
NP0-C0G
RADIO_VLB_PAD 01005
L4205_RF RADIO_VLB_PAD
22NH-5%-0.1A NOSTUFF
01005
NOSTUFF PLACE INDUCTOR CLOSE TO PA
L4221_RF
5.1NH-3%-0.250A
1 2 50_B29_ASM_TRX 46
01005
1
NOSTUFF
B RADIO_VLB_PAD
L4206_RF
B
18NH-3%-140MA
01005
2
C4221_RF L4211_RF
100PF 22NH-3%-0.25A
1 2 50_B13_B17_B28_B29_PRX_WTR_IN
50_B13_B17_B28_B29_PAD_RX 50_B13_B17_B28_B29_MCH_RX 1 2 37
0201
42 CTRL_VLB_BAND_SELECT_1 5%
16V
NP0-C0G RADIO_WTR
PP_LDO14_RFSW 30 32 43 51
01005 1 C4219_RF
42 CTRL_VLB_BAND_SELECT_2 1.0PF
RADIO_VLB_PAD +/-0.1PF
1 C4201_RF 2 16V
RADIO_VLB_PAD RADIO_VLB_PAD NP0-C0G
1 C4203_RF 1 C4206_RF
47PF
5%
FL_B13TX 01005
16V SAW-BAND13-TX-INTERSTAGE NOSTUFF
100PF 100PF 2 CERM B8817
5%
10V
5%
10V
01005 C4224_RF LGA
2 NP0-C0G 2 NP0-C0G 100PF
01005 01005 1 INPUT_UNBAL
1 2 50_B13_TX_FILT_IN OUTPUT_UNBAL 4 50_B13_FILTER_TX_OUT 42
RADIO_VLB_PAD
1
GND
GND
GND
5%
VDD 10V
50_VLB_SW_MCH_IN 42
NP0-C0G
U_VLB_SW
2
3
5
01005 RADIO_VLB_PAD
1
RADIO_VLB_PAD RADIO_VLB_PAD
CXA2973GC
3 V1 BGA RF1 6
RADIO_VLB_PAD L4212_RF
2 V2 RF2 5 50_B28_WTR_TX_OUT 22NH-5%-0.1A
C4202_RF
C4225_RF 01005
RF3 7 50_B13_WTR_TX_OUT 100PF
100PF 4 50_B17_WTR_TX_OUT 1 50_B17_WTR_FILT_IN
2
1 2 RF4
50_B13_B17_B28_WTR_TX_OUT 50_VLB_SW_MCH_IN GND
A 37 42
5%
2
FL_B17TX A
8
9
5% 10V
10V NP0-C0G
1 SAW-BAND17-TX-INTERSTAGE PAGE TITLE
NP0-C0G
01005
1
RADIO_VLB_PAD
RADIO_VLB_PAD
01005
B8822
LGA
VERY LOW BAND PAD DRAWING NUMBER SIZE
L4213_RF
L4202_RF
22NH-5%-0.1A 22NH-5%-0.1A 1 INPUT_UNBAL GND OUTPUT_UNBAL 4 50_B17_FILTER_TX_OUT 42
Apple Inc. 051-0517 D
GND
GND
01005 01005
REVISION
NOSTUFF V2 V1 BAND RADIO_VLB_PAD R
6.0.0
0 1 B28 2
2
3
5
2 RADIO_VLB_PAD NOTICE OF PROPRIETARY PROPERTY: BRANCH
THE INFORMATION CONTAINED HEREIN IS THE
1 0 B13 PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
1 1 B17 I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
42 OF 55
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 42 OF 55
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
C4318_RF
LOW BAND PAD (B8, B26, B20)
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
R1400
L4322_RF
U1402
RADIO_WTR
C4309_RF L4314_RF
100PF
22NH-3%-0.25A
D 1 2 50_B20_MATCH_1 1
0201
2 50_B20_PRX_WTR_IN 37 D
RADIO_WTR
5%
16V 1 C4312_RF
NP0-C0G
01005 0.8PF
+/-0.05PF
2 16V
C0G-CERM
01005
NOSTUFF
RADIO_WTR
C4310_RF L4312_RF
100PF 8.2NH-3%-0.19A-1.6OHM
1 2 50_B26_MATCH_2 1 2 50_B26_PRX_WTR_IN 37
01005
5%
16V
NP0-C0G
01005
VPA_ET 40 42 44 45 L4313_RF
7.5NH+/-3%-0.2A
1 2 50_B26_MATCH_1
CAPACITOR THAT’S SUPPOSED TO GO HERE IS LOCATED ON 01005
VERY LOW BAND PAD. THE 2 PAD’S NEED TO SHARE DECOUPLING RADIO_WTR
1 C4314_RF
45 44 42 40 VPA_BATT 47PF
5%
RADIO_LB_PAD 2 16V
CERM
CAPACITOR THAT’S SUPPOSED TO GO HERE IS LOCATED ON 01005
C4304_RF
100PF VERY LOW BAND PAD. THE 2 PAD’S NEED TO SHARE DECOUPLING
43 50_B20_WTR_TX_OUT 1 2
C4311_RF L4315_RF C
RADIO_LB_PAD
100PF 18NH-3%-140MA
L4303_RF 1 250_B8_MATCH_1 1 2 50_B8_PRX_WTR_IN 37
22NH-5%-0.1A
01005 01005
NOSTUFF 5%
16V
36
NP0-C0G
5
6
2 01005 1 C4313_RF
VBATT VCC1 VCC2 1.1PF
+/-0.1PF
2 16V
NP0-C0G
43 CTRL_LB_BAND_SELECT_1 28 SW1 B20RX 25 50_B20_PAD_RX 01005
43 CTRL_LB_BAND_SELECT_2 27 SW2 U_LB_PAD_RF B26RX 20 50_B26_PAD_RX
C4303_RF TQF6410 B8RX 10 50_B8_PAD_RX
18PF 50_B20_PAD_IN 34 B20IN
LGA
43 50_B26_WTR_TX_OUT 1 2 50_B26_PAD_IN 33 B26IN B20ANT 22 50_B20_PAD_ANT
50_B8_PAD_IN 31 B8IN B26ANT 17 50_B26_PAD_ANT
2%
16V 1 B8ANT 14 50_B8_PAD_ANT L4316_RF
CERM
01005 RADIO_LB_PAD
4.7NH-3%-0.270A
VIO 3 LB_VLB_VIO 42
1 2
1 C4321_RF L4304_RF 50_B20_ASM_TRX 46
0.7PF 22NH-5%-0.1A SCLK 1 RFFE1_CLK 31 36 40 41 42 44 45
01005
+/-0.05PF
16V
01005 SDATA 2 RFFE1_DATA 31 36 40 41 42 44 45
1
2 NP0-C0G NOSTUFF
RADIO_LB_PAD
01005
PLACE INDUCTOR CLOSE TO PA 1 C4317_RF
2 THRM 0.8PF
GND PAD L4308_RF +/-0.05PF
RADIO_LB_PAD
18NH-3%-140MA 2
16V
01005 C0G-CERM
01005
4
7
8
9
11
12
13
15
16
18
19
21
23
24
26
29
30
32
35
37
38
39
40
41
42
43
44
45
46
47
48
C4302_RF NOSTUFF
100PF
1 2 2
43 50_B8_WTR_TX_OUT
5%
10V
B NP0-C0G
01005
1
RADIO_LB_PAD
L4320_RF
4.3NH-3%-0.270A B
L4305_RF 1 2 50_B26_ASM_TRX 46
22NH-5%-0.1A 01005
01005
NOSTUFF
PLACE INDUCTOR CLOSE TO PA
2 1 C4318_RF
0.6PF
+/-0.05PF
2 16V
CERM
01005
L4321_RF
3.6NH+/-0.1NH-0.280A
PP_LDO14_RFSW
1 2 50_B8_ASM_TRX 46
RADIO_LB_PAD 01005
C4301_RF L4301_RF 1
PLACE INDUCTOR CLOSE TO PA RADIO_LB_PAD
100PF
6.8NH-3%-0.210A DECOUPLING SHARED W C4201_RF 1 C4307_RF
51 42 32 30
37
1 2
50_B8_B26_B20_WTR_TX_OUT 1 2 50_LB_SW_MCH_IN 43 L4306_RF 10PF
5%
50_LB_SW_T_MCH 01005 18NH-3%-140MA 2 16V
5% 01005 CERM
10V RADIO_LB_PAD RADIO_LB_PAD 01005
1
NP0-C0G NOSTUFF
01005 NOSTUFF
1 VDD
C4320_RF 2
2.7PF U_LB_SW_RF
+/-0.1PF
16V
2 NP0-C0G CXA2973GC V2 V1 BAND
01005 CTRL_LB_BAND_SELECT_1 3 V1 BGA 6 50_LB_SW_MCH_IN 0 1 B8
A 43
43 CTRL_LB_BAND_SELECT_2 2 V2
RF1
RF2 5 50_B8_WTR_TX_OUT
43
43
1 0 B20 A
RF3 7 50_B20_WTR_TX_OUT PAGE TITLE
GND
RF4 4 50_B26_WTR_TX_OUT
43
D
5%
16V
NP0-C0G
01005 L4403_RF
RADIO_WFR
D
3.6NH+/-0.1NH-0.280A C4425_RF
33PF
1 2 1 2
01005 50_B3_MATCH_1_MATCH
5%
16V
NP0-C0G-CERM
01005
VPA_ET NOSTUFF
RADIO_MB_PAD
40 42 43 45
RADIO_MB_PAD
L4405_RF
1.5NH+/-0.1NH-220MA
1 C4408_RF 1 C4409_RF
1 2 50_B1_B4_PRX_WFR_IN
47PF
5%
47PF
5% 01005
39
2 16V
CERM 2 16V
CERM
01005 01005
MB_ET_RC_FILT L4406_RF
RADIO_MB_PAD 2.7NH+/-0.1NH-0.370A
1 1 2
R4401_RF
0.00
0%
01005
RADIO_WFR
1/32W
MF
VPA_BATT 201005
NOSTUFF
RADIO_WFR
45 43 42 40
2 10V
X5R-CERM
5%
16V
1
0201-1 NP0-C0G
01005
L4402_RF
26
3.9NH+/-0.1NH-0.270A
36
27
C RADIO_MB_PAD 01005 C
C4423_RF
VBATT
VCC1
VCC2
C4403_RF
100PF B3RX 12 50_B3_PAD_RX
2 22PF
37 50_B3_B4_WTR_TX_OUT 1 2 35
50_B3_B4_PAD_IN B3/4IN 1 2
RADIO_MB_PAD B1/4RX 10 50_B1_B4_PAD_RX
50_B25_MATCH_2
RADIO_MB_PAD
5%
16V
U_MBPAD B25RX 5 50_B25_PAD_RX FL_B39LP
5%
16V
NP0-C0G
RADIO_MB_PAD
01005 RADIO_MB_PAD AFEM-8020-AP1 BAND34-39 CERM
01005
1 C4401_RF 1 C4406_RF LGA LFL151G95TCSD734
16 50_B1_B3_B4_PAD_ANT 0402 RADIO_MB_PAD
18PF 18PF B1/3/4ANT L4421_RF
2% 2% 34 B1/25/34/39IN
50_B1_B25_B34_B39_PAD_IN B25ANT 8 50_B25_PAD_ANT 0.9NH+/-0.1NH-0.32A-0.6OHM R4402_RF
2 16V
CERM 2 16V
CERM 24 50_B34_B39_PAD_ANT 1 2 0.00
01005 01005 B34/39TX 4 IN OUT 2 50_B34_B39_LPF_OUT 1 2 50_B34_B39_HB_SWITCH_IN 47
50_B34_B39_LPF_IN
NOSTUFF NOSTUFF 01005 0% TDD-LTE
VIO 1 RFFE_VIO 46 47 49
36 41 42 NOSTUFF TDD-LTE 1/32W
45 GND MF
SCLK 2 RFFE1_CLK 43 45
31 36 40
1 C4410_RF 01005
RADIO_MB_PAD 41 42 TDD-LTE 1 C4414_RF
3 RFFE1_DATA
1
3
SDATA
45
31 36 40
0.6PF
41 42 43 +/-0.05PF 12PF
C4404_RF 16V
2 CERM 5%
100PF 2 16V
EPAD
EPAD
EPAD
EPAD
EPAD
EPAD
EPAD
EPAD
EPAD
EPAD
EPAD
EPAD
CERM
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
01005
37 50_B1_B25_B34_B39_WTR_TX_OUT 1 2 RADIO_MB_PAD
01005
NOSTUFF
5% RADIO_MB_PAD
4
6
7
9
11
14
13
15
17
18
19
20
21
22
23
25
28
29
30
31
32
33
37
38
39
40
41
42
43
44
45
46
47
48
16V
NP0-C0G
01005 L4407_RF
1.0NH+/-0.1NH-0.580A
1 2 50_B1_B3_B4_ASM_TRX 46
01005
1 C4418_RF
0.2PF
+/-0.1PF
2 16V
NP0-C0G
01005
NOSTUFF
B B
L4408_RF
3.8NH-+/-0.1NH-0.27A
1 2 50_B25_ASM_TRX 46
01005
1 C4419_RF
1 C4413_RF 1.5PF
+/-0.05PF
1.2PF 2
16V
+/-0.05PF NP0-C0G-CERM
16V 01005
2 NP0-C0G-CERM
01005
A A
PAGE TITLE
D VPA_ET 40 42 43 44
RADIO_WTR
C4521_RF L4512_RF D
100PF 3.3NH+/-0.1NH-290MA
1 2 50_B7_MATCH_11 2 50_B7_PRX_WTR_IN 37
1 C4507_RF 01005
68PF 5% RADIO_WTR
5% 16V
16V
2 NP0-C0G NP0-C0G
01005
C4522_RF
01005 1.8PF
1 2
+/-0.1PF
16V
L4509_RF NP0-C0G
01005
1.5NH+/-0.1NH-1.0A
RADIO_HB_PAD 1 2 50_B7_ASM_TRX 46
0201
R4506_RF C4501_RF RADIO_HB_PAD
0.00
18PF 1 C4512_RF
37 50_B7_WTR_TX_OUT 1 2 50_B7_PAD_MTCH 1 2 0.2PF
+/-0.1PF
0%
2% 2 16V
NP0-C0G
1/32W 01005
MF 16V
01005 RADIO_HB_PAD
CERM NOSTUFF
RADIO_HB_PAD 01005 44 43 42 40 VPA_BATT
1 C4503_RF
1.0PF RADIO_HB_PAD
C4526_RF
+/-0.1PF
2 16V
1 C4505_RF VPA_APT 40 41 100PF
NP0-C0G
01005
1.0UF 1 2 TDD-LTE 50_B41B_TX_OUT 45
20%
2 10V
1 C4506_RF
1 C4532_RF
RADIO_HB_PAD
X5R-CERM 100PF 68PF 5%
0201-1 5% 5% 1 C4510_RF 16V 1 C4520_RF
16V 25V NP0-C0G
2 NP0-C0G 2 NP0-C0G-CERM 1.0PF 01005 0.7PF
01005 01005 +/-0.1PF +/-0.1PF
2 16V 2 16V
24
21
20
19
NP0-C0G NP0-C0G
01005 01005
NOSTUFF TDD-LTE
VBATT
VCC1
VCC2
VAPT
C RADIO_HB_PAD B7RX 11 50_B7_RX_PAD FT_B40
C
50_B7_PAD_IN 25 RADIO_HB_PAD
15 50_B7_ANT_PAD TX-BAND40-LTE
B7IN B7ANT SAFFU2G35MA0F57
C4533_RF U_HBPAD L4520_RF LGA
L4526_RF
100PF AFEM-8010-AP1 B41B 7 50_B41B_TX_PAD 1.3NH+/-0.1NH-0.400A 2.2NH+/-0.1NH-0.380A
50_B40_B38_B41_WTR_TX_OUT 26 LGA 3
37
1 2 50_B38_B40_B41_PAD_IN B38/40/41IN B40/B41 50_B40_B41_TX_PAD 1 2 50_B40_TX_FILTER_IN1 UNBAL_PRT1 4 1
UNBAL_PRT450_B40_TX_FILTER_OUT 2 50_B40_TX_HB_SWITCH_IN
5
GND
GND
GND
5% B41C 50_B41C_TX_PAD 01005 01005
9 1 TDD-LTE TDD-LTE
16V
NP0-C0G RADIO_HB_PAD B40A/B41A 50_B40A_B41A_TX_PAD 1
01005
2
3
5
27 RFFE_VIO 47 49 TDD-LTE
TDD-LTE VIO 36 41 42
1 C4502_RF SCLK 28 RFFE1_CLK 44
44 46
31 36 40
L4527_RF L4523_RF
41 42 43 9.1NH-3%-0.17A-1.7OHM
1PF SDATA 1 RFFE1_DATA 31 36 40 01005 9.1NH-3%-0.17A-1.7OHM
+/-0.1PF 41 42 43 01005
16V 44
2 NP0-C0G
TDD-LTE
EPAD
EPAD
EPAD
EPAD
EPAD
EPAD
EPAD
EPAD
EPAD
01005 2
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
TDD-LTE 2
L4515_RF
2
4
6
8
10
13
12
14
16
17
18
22
23
29
30
31
32
33
34
35
36
37
2.4NH+/-0.1NH-0.370A
C4531_RF
15PF 1 2 50_B41C_FILTER_IN 45
50_B40A_TX_HB_SWITCH_MCH 1 2 50_B40A_TX_HB_SWITCH_IN 01005
TDD-LTE 1
1
5% TDD-LTE
16V
1 NP0-C0G-CERM
01005 L4528_RF L4521_RF
6.8NH-3%-140MA
22NH-3%-0.12A-3.2OHM 01005
L4506_RF 01005
NOSTUFF
RADIO_HB_PAD
NOSTUFF
7.5NH+/-3%-0.2A
01005 2
TDD-LTE 2
FT40A41A 2
B LTE-BAND-40A-41A-TX
LGA C4528_RF L4516_RF
1.2NH+/-0.1NH-0.550A
B
6 BAND_40A 3 3.9PF
45 50_B40A_B41A_FILTER_IN ANT 50_B41A_TX_HB_SWITCH_IN
BAND_41A 1 1 2 47
1 2 50_B40A_B41A_FILTER_IN
50_B41A_TX_HB_SWITCH_MCH 01005
GND
GND
GND
GND
GND
GND
+/-0.1PF
1 16V TDD-LTE
TDD-LTE NP0-C0G
1 01005
2
4
5
7
8
9
TDD-LTE
L4501_RF
1.0NH+/-0.1NH-0.22A-0.9OHM L4507_RF
01005
NOSTUFF 4.7NH-3%-0.270A
RADIO_HB_PAD 01005
2 TDD-LTE
L4524_RF
1.8NH+/-0.1%-0.380A
2 1 250_B41B_TX_HB_SWITCH_IN
01005
TDD-LTE
L4522_RF
2.7NH+/-0.1NH-0.370A
45 50_B41B_TX_OUT 1 45 2 50_B41B_FILTER_IN
45 50_B41C_FILTER_IN 01005 RADIO_HB_PAD
TDD-LTE
1 NOSTUFF FT_41BC
A RADIO_HB_PAD
1 NOSTUFF
RADIO_HB_PAD
SAW-BAND-41B-41C-TDD-TX
SAWEN2G58QA0F57 L4525_RF A
L4504_RF 1 RF1/
50_B41B_FILTER_IN RF2/ 9 50_B41B_TX_HB_SWITCH_MCH 1.4NH+/-0.1NH-0.4A PAGE TITLE
3.0NH+/-0.1NH-200MA
01005
L4508_RF
2.4NH+/-0.1NH-200MA
01005
45
45
B41BIN
4 RF3/
50_B41C_FILTER_IN B41CIN
LGA
B41BOUT
RF4/ 6 50_B41C_TX_HB_SWITCH_MCH
B41COUT
1
01005
2 50_B41C_TX_HB_SWITCH_IN HIGH BAND PAD DRAWING NUMBER SIZE
GND
GND
GND
GND
GND
GND
2 TDD-LTE
Apple Inc. 051-0517 D
2 REVISION
2
3
5
7
8
10
TDD-LTE R
6.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
45 OF 55
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 45 OF 55
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
C1702
ANTENNA SWITCH
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
R1700
L4608_RF
U1702
D D
L4608_RF
22-OHM-25%-0.2A-0.9DCR
1 2
R4603_RF
VCC_ASM_FILTERED PP_BATT_VCC 14 16 25 26 41 47
1
0.00 2
RADIO_ASM 01005 50_FWD_REV_CPL_OUT 50_FWD_OR_REV_RF 37
1 C4602_RF 0%
1/32W
47PF 1
5% R4601_RF MF
01005 1
R4602_RF
2 16V
CERM 105 RADIO_ASM
01005 1% 105
1/32W 1%
MF 1/32W
2 01005
RADIO_ASM
MF
01005
NOSTUFF 2RADIO_ASM
ASM NEEDS TO BE UPDATED WITH A NEW PINOUT VERSION NOSTUFF
C 47 50_HB_SWITCH_TX C
29
RADIO_ASM
R4608_RF
1
0.00 2 VDD
FRX34B39 47 50_HB_SWITCH_RX
BAND34-39 0%
50_HB_SW_RX_ASM_MCH
1 RF1 U_ASM_RF
1/32W
L4601_RF SAWFD1G90LC0F57 MF 2 RF3 RF5159 FWD/REV 32 50_ANT2_CONN 51
2.4NH+/-0.1NH-0.370A LGA 01005 LGA
45 50_B7_ASM_TRX 3 RF7
37 50_B34_B39_PRX_WTR_IN 1 2 50_B34_B39_FILT_RX 1 INPUT OUT_FIL1 9
50_B39_RX_ASM_OUT 4 RX1
01005
TDD-LTE OUT_FIL2 6 50_B34_RX_ASM_OUT 22 TRX6
1 44 50_B1_B3_B4_ASM_TRX 23 TRX7 A2 21
GND 44 50_B25_ASM_TRX 24 TRX8
L4602_RF
2
3
4
5
7
8
10
RADIO_ASM 12 HBTX
3.3NH+/-0.1NH-290MA 41 50_HB_2G_ASM_IN
01005
TDD-LTE
RADIO_ASM 49 50_HB_DIVERSITY_ASM 20 HBRF2
TDD-LTE TO DIVERSITY MODULE 50_B17_ASM_TRX 8
2 42 TRX2
43 50_B8_ASM_TRX 18 TRX3
42 50_B28A_ASM_TRX 9 TRX0
42 50_B28B_ASM_TRX 10 TRX1 R4609_RF
16 5 0.00 2
43 50_B26_ASM_TRX TRX4 A1 50_ASM_ANT1_OUT 1 50_ANT1_CONN 51
42 50_B13_ASM_TRX 17 TRX5 1%
1/20W
43 50_B20_ASM_TRX 11 TRX11 MF
0201
42 50_B29_ASM_TRX 7 RX2 VIO 26 RFFE_VIO 36 41 42 44 45 47 49
SCLK 28 RFFE2_CLK 31 36 47 49
50_LB_2G_ASM_IN 14 LBTX
TO DIVERSITY MODULE SDATA 27 RFFE2_DATA 31 36 47 49
1 1 49 50_LB_DIVERSITY_ASM 19 LBRF2
B RADIO_ASM RADIO_ASM GND 1 C4606_RF
22PF
B
L4603_RF L4604_RF 5%
13
15
25
30
6
31
33
1.0NH+/-0.1NH-0.22A-0.9OHM 1.0NH+/-0.1NH-0.22A-0.9OHM 16V
2 CERM
01005 01005
NOSTUFF NOSTUFF 01005
2 2
RADIO_ASM
RADIO_ASM
A A
PAGE TITLE
D D
R4703_RF
1
0.00 2
37 50_B40A_PRX_WTR_IN 50_B40A_PRX_FILTER
0%
1/32W
MF 1
01005 PP_BATT_VCC 14 16 25 26 41 46
TDD-LTE
L4705_RF RADIO_HBSWITCH RADIO_HBSWITCH
2.0NH+/-0.1NH-0.380A
01005 FR40A41A RADIO_HBSWITCH
1 C4710_RF
TDD-LTE
SAW-BAND-40A-41A-TDD-RX
885055
C4709_RF 47PF
5%
9 18PF
2 RX_B40A 2 50_B40A_B41A_RX_MATCH 1 2 2 16V
CERM
6 LGA ANT 01005
RX_B41A
2% 1
1
16V
GND
GND
GND
GND
GND
GND
GND
CERM
01005 VBATT
L4709_RF U_HBS_RF C
10
8
7
5
4
3
1
C RADIO_HBSWITCH
TDD-LTE TDD-LTE 3.3NH+/-0.1NH-290MA
01005 45 50_B40A_TX_HB_SWITCH_IN 11 TX1 CXM3652UR
50_B41A_TX_HB_SWITCH_IN 12 UQFN
C4720_RF C4704_RF TDD-LTE 45
7
TX2 C4721_RF
6.0PF 100PF 2 45 50_B40_TX_HB_SWITCH_IN TX3 100PF
37 50_B41A_PRX_WTR_IN 1 2 50_B41A_PRX_MATCH1 1 2 45 50_B41B_TX_HB_SWITCH_IN 8 TX4 TX RF1 5 50_HB_SWITCH_TX_OUT 1 2 50_HB_SWITCH_TX 46
17
2
TDD-LTE TDD-LTE
RADIO_HBSWITCH
FR38X40B
C4701_RF L4713_RF SAW-BAND-40B-38X-TDD-RX
2.7NH+/-0.1NH-0.370A 885056
100PF
1 2 1 2 2 RF3/RX_B40B 9 R4707_RF
37 50_B40B_B38X_PRX_WTR_IN 50_B40B_B38X_PRX_MATCH2 RF1/ANTLGA 6 50_B38X_RX_MATCH 1
0.00 2
01005 RF2/RX_B38X
50_B40B_B38X_PRX_FILTER
5% TDD-LTE 0%
GND
GND
GND
GND
GND
GND
GND
10V 1/32W
NP0-C0G 1 MF 1
01005 1 01005
B TDD-LTE TDD-LTE
B
1
3
4
5
7
8
10
TDD-LTE
L4704_RF L4712_RF L4708_RF
3.7NH-+/-0.1NH-0.27A 2.9NH-+/-0.1NH-0.36A
01005 2.7NH+/-0.1NH-0.370A 01005
TDD-LTE 01005 TDD-LTE
TDD-LTE RADIO_HBSWITCH
2 2
2
A A
PAGE TITLE
RADIO_WTR
RADIO_WTR RADIO_WTR
RADIO_WFR
L4804_RF C4804_RF L4830_RF L4823_RF C4827_RF
1.6NH+/-0.1NH-0.390A 100PF 0.4NH+/-0.1NH-0.990A 22NH-5%-0.1A 100PF
1 2 1 2 1 2 1 2 1 2
50_B20_B29_DRX_DSM
39 50_B25_DRX_WFR_IN 50_B25_DRX_DSM 49 37 50_B40_DRX_WTR_IN 50_B40_DRX_FILTER 49 37 49
50_B20_B29_DRX_WTR_MCH
01005 50_B25_DRX_WFR_MCH 01005 TDD-LTE 50_B20_B29_DRX_WTR_IN 01005
5% 16V01005 5%
RADIO_WFR NP0-C0G 10V
NP0-C0G
L4802_RF
C4802_RF 2.3NH+/-0.1NH-0.370A 1 C4832_RF
01005
33PF 0.8PF
1 2 1 2
L4812_RF +/-0.05PF
2.4NH+/-0.1NH-0.370A 2 16V
01005 C0G-CERM
5% 50_B25_DRX_MATCH 1 2 01005
16V
NP0-C0G-CERM 01005 TDD-LTE
01005
RADIO_WTR
RADIO_WTR C4826_RF L4829_RF
RADIO_WTR
R4817_RF TDD-LTE C4816_RF 100PF 8.2NH-3%-0.19A-1.6OHM
100PF 50_B26_B28A_DRX_DSM
0.00 2 37 50_B26_B28A_DRX_WTR_IN 1 2 1 2 49
D D
L4905_RF
22-OHM-25%-0.2A-0.9DCR
C VCC_DSM 1 2 PP_VCC_MAIN 53
10 12 14 15 16 17
23 26 30 32 40 52
C
01005
1 C4901_RF
15PF
5%
16V
2 NP0-C0G-CERM
01005
2
VBATT
VIO 3 RFFE_VIO 36 41 42 44 45 46 47
48 50_B8_B28B_DRX_DSM 19 B8/B28B
ANT LB 7 50_LB_DIVERSITY_ASM 46
48 50_B13_B17_DRX_DSM 25 B13/B17
48 50_B25_DRX_DSM 34 B25 ANT HB 9 50_HB_DIVERSITY_ASM 46
48 50_B26_B28A_DRX_DSM21 B26/B28A
PCS 29 50_PCS_DSM_OUT 48
48 50_B20_B29_DRX_DSM 23 B20/B29
TDD-LTE 12
48 50_B34_DRX_DSM B34 DCS 30 50_DCS_DSM_OUT 48
FD40B41A 48 50_B39_DRX_DSM 13 B39
SAW-2-1-BAND-40-41A-DRX 17
B39252B9920P810 48 50_B38X_DRX_DSM B38X
48 50_B40_DRX_FILTER 6 B40OUT B40IN 4 50_B40_DRX_DSM 14 B40
48 50_B41A_DRX_FILTER 9 B41AOUT
LGA B41AIN
1 50_B41A_DRX_DSM 15 B41A
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
THRM
PAD
1 1
1 1
10
8
7
5
3
2
1
6
8
10
11
18
20
22
24
26
27
28
31
35
36
37
38
39
40
B L4901_RF L4903_RF
B
9.1NH-3%-0.17A-1.7OHM L4902_RF 8.2NH-3%-0.19A-1.6OHM L4904_RF
01005 5.6NH-3%-0.23A-1.3OHM 01005 5.1NH-3%-0.250A
RADIO_DSM 01005 RADIO_DSM 01005
RADIO_DSM RADIO_DSM
2 2
2 2
A A
PAGE TITLE
D D
C L5002_RF
C
10NH-3%-0.170A
FL_GPSRF 100_GPS_DSM_P_OUT 1 2 100_GPS_WTR_IN_P 37
LNA-GNSS-BAL 01005
B8821
LGA RADIO_GPS
BAL_PORT 3 1 C5001_RF
50_GPS_DSM_IN 1 BAL_PORT 4
51 UNBAL_PORT 1.0PF
+/-0.1PF
GND
GND
2 16V
NP0-C0G
01005
2
5
L5003_RF
10NH-3%-0.170A
100_GPS_DSM_M_OUT 1 2 100_GPS_WTR_IN_N 37
01005
B B
A A
PAGE TITLE
ANTENNA FEED’S
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
TEST & COAX CONNECTOR FOR LOWER SECTION OF MLB
RADIO_LOW_ANT
D LOWER_COAX_RF UPPER_COAX_RF
RADIO_UP_ANT D
MM6829-2700B MM6829-2700B
F-ST-SM F-ST-SM
46 50_ANT2_CONN 1 1 50_ANT2_UPPER_COAX_CONN
3
2
2
3
PP_LDO14_RFSW 30 32 42 43
RADIO_UP_ANT
10
UP_HB_ANT_FEED_RF RADIO_UP_ANT
1 C5109_RF
MM7829-2700
F-ST-SM FL_WIFI_DIPLEXER VDD 47PF
LFD212G45MJBD899 5%
2
LLP FL_CELL_WIFI_RF U_SW_UANT_RF 2 16V
CERM
DIPLEXER-CELL-WIFI
L5122_RF CXM3651XR 01005
1 50_UPPER_HB_ANT_FEED 2 P3 P1 4 50_WIFI_5G_IN_OUT
885072 QFN RADIO_UP_ANT
BI 52
LGA 1.7NH+/-0.1NH-0.60A
5 RF1
P2 6 50_WIFI_2G_DIPLEXER_IN 9 RF1 RF3 1 50_WICE_WIFI_IN 1 2 50_WIFI_2G_NOTCHPLEXER_IN
C 3
GND 7 SMD2_RF1/SMD4_GND RF2 4 50_UPPER_HB_CELL
0201
52
8 RF2
3 RF3 CTL 1 UAT_SELECT 36
C
5
3
1
1
13 THRM
4.3NH+/-3%-0.5A 0=UPPER_LBMB_ANT
PAD
GND
GND
GND
GND
GND
GND
GND
L5120_RF
10
8
5
3
2
1 2
3.0NH+/-0.1NH-0.6A
0201 50_WICE_CELL2_IN 0201
12
11
9
7
6
4
2
2
50_WICE_ANT2_GND
L5121_RF
5.6NH-3%-0.23A-1.3OHM 50_UPPER_LBMB_DIPLEXER
01005
L5128_RF
2 33-OHM-25%-1500MA
26 PP_LDO13_GPS 1 2 PP_LDO13 32 34
VOLTAGE=2.95V
0201
RADIO_UP_ANT
UP_LBMB_ANT_FEED 1 C5129_RF 1 C5130_RF
MM7829-2700 22PF 2.2UF
F-ST-SM 5% 20%
2 16V 6.3V
2 X5R
2 U_GPS_CELL CERM
1
01005 0201-1
HFQDPFPFA-241 VDD RADIO_UP_ANT RADIO_UP_ANT
1 50_CELL_GPS_COMBINED 6 ANT LGA CELLOUT 1 SKY65746-14
B 3 GPSOUT 3 50_GPS_ANT 3 U_GPS_LNA
RF_IN RF_OUT
LGA
6 50_GPS_DSM_IN 50
B
GND
GND
GND
GND
2
4
5
7
GND EPAD
2
4
5
7
RADIO_LOW_ANT
L5129_RF LOW_ANT_RF
MM4829-2702B
1.8NH+/-0.1NH-600MA F-ST-SM
46 50_ANT1_CONN 1 2 50_ANT1_CONN_R 1
0201
A 1 C5128_RF A
4
3
2
0.3PF
+/-0.05PF PAGE TITLE
25V
2 C0G-CERM
0201 ANTENNA FEEDS DRAWING NUMBER SIZE
WLAN/BT
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
WIFI_BT
32 30 26 23 17 16 15 14 12 10
PP_VCC_MAIN
53 49 40 IN
1 WIFI_BT
C5202_RF 1 WIFI_BT
C5203_RF
D 10UF
20%
27PF
5% D
2 6.3V
CERM-X5R 2 16V
NP0-C0G
WIFI_BT
0402-1 01005
R5214_RF
1
0 2
50_WIFI_2G_NOTCHPLEXER_IN
BI 51
WIFI_BT 5% WIFI_BT
1/20W
WIFI_BT
R5208_RF
1 C5213_RF MF
201
1 C5211_RF
PP_WL_BT_VDDIO_AP 0.00 2 52 PP_WLAN_VDDIO_1V8 0.2PF 0.2PF
30 1 +/-0.1PF +/-0.1PF
IN
VOLTAGE=1.80V 2 16V
NP0-C0G 2 16V
NP0-C0G
0% 01005 01005
1/32W WIFI_BT
1 C5204_RF WIFI_BT
1 C5205_RF
MF NOSTUFF NOSTUFF
01005 0.01UF 27PF
10% 5%
2 6.3V
X5R 2 16V
NP0-C0G
01005 01005 WIFI_BT
WIFI_BT
R5215_RF
FL5201_RF
VDDIO_1P8V 22
VBATT 23
VBATT 24
VBATT_RF_VCC 54
VBATT_RF_VCC 55
LFH185G53RG1D868
0 250_WIFI_5G_BPF_RADIO SM 50_WIFI_5G_IN_OUT
1 4 IN OUT 2 BI 51
C WLAN_SR_LC 0603
BT_UART_CTS* 38 BT_UART_CTS_L 1 WIFI_BT
C
2 4 IN 30 R5210_RF
31 30
HOST_WAKE_WLAN 30 GPIO_0 BT_UART_RTS* 39 BT_UART_RTS_L 30 100K
OUT OUT
WLAN_PCIE_WAKE_L 12 41 BT_UART_RXD 5%
31 30 OUT PCIE_WAKE* BT_UART_RXD IN 30 31 1/32W
WLAN_PCIE_PERST_L 14 40 BT_UART_TXD MF
52 31 30 IN PCIE_PRST* BT_UART_TXD OUT 30 31
2 01005
31 30
WLAN_PCIE_CLKREQ_L 13 PCIE_CLKREQ*
BI
30
90_WLAN_PCIE_REFCLK_N 16 PCIE_REFCLK_N
IN
30
90_WLAN_PCIE_REFCLK_P 17 PCIE_REFCLK_P
IN 49 BT_PCM_CLK
90_WLAN_PCIE_RDN 20 BT_PCM_CLK BI 30
31 30 IN PCIE_RDN 50 BT_PCM_SYNC
90_WLAN_PCIE_RDP 21 BT_PCM_SYNC BI 30
31 30 IN PCIE_RDP 48 BT_PCM_IN
90_WLAN_PCIE_TDN 18 BT_PCM_IN IN 30
31 30 OUT PCIE_TDN 47 BT_PCM_OUT
90_WLAN_PCIE_TDP 19 BT_PCM_OUT OUT 30
31 30 OUT PCIE_TDP
UART_CTS(GPIO_8) 4 WLAN_UART_CTS_L 30 31
IN
52
JTAG_SEL 11 JTAG_SEL UART_RX(GPIO_9) 3 WLAN_UART_RXD 30 31
IN
31 30
WLAN_JTAG_SWDCLK 31 JTAG_TCK(GPIO_2) UART_TX(GPIO_10) 2 WLAN_UART_TXD 30 31
IN OUT
WLAN_JTAG_SWDIO 34 WIFI_BT
31 30 BI JTAG_TMS(GPIO_3) R5206_RF
30 IN
OSCAR_CONTEXT_A 32 JTAG_TDI(GPIO_4) WLAN_COEX_TXD 0.002 BB_COEX_UART_RXD
35 SECI_TX(GPIO_13) 6 1 31 36
NC JTAG_TDO(GPIO_5) WLAN_COEX_RXD
OSCAR_CONTEXT_B 33 SECI_RX(GPIO_14) 5 0%
30 IN JTAG_TRST(GPIO_6) 1/32W
RF_SW_CTRL_8 7 NC MF
01005
WLAN_PCIE_PERST_L GND THRM_PAD WIFI_BT
52 31 30
R5205_RF
0.002
1
15
25
27
29
37
44
46
51
52
53
57
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
B 1
0%
BB_COEX_UART_TXD 31 36
B
1 C5215_RF 1/32W
MF
100PF 01005
5%
2 16V
NP0-C0G
01005
PP_WLAN_VDDIO_1V8 52
1 WIFI_BT
R5201_RF
10K
5%
1/32W
MF
2 01005
NOSTUFF
JTAG_SEL
A 52
SYNC_MASTER=N56_RADIO_MLB SYNC_DATE=05/07/2014 A
PAGE TITLE
1 WIFI_BT
R5202_RF WIFI/BT: MODULE AND FRONT END
10K DRAWING NUMBER SIZE
5%
1/32W
MF Apple Inc. 051-0517 D
2 01005 R
REVISION
6.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
MODULE BOOT-STRAPPED TO PCIE INTERNALLY I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
52 OF 55
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 52 OF 55
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
C2101
STOCKHOLM
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
R2100
L2102
U2100
D D
53 52
30 26 23 PP_VCC_MAIN
14 12 10 IN
17 16 15
49 40 32
53 52 49
PP_STOCKHOLM_VDD 14
PP_VCC_MAIN 10 IN
VOLTAGE=1.80V RADIO_STOCKHOLM RADIO_STOCKHOLM
12
40 32 30 26 23 17 16 15
55 53 30 IN PP_STOCKHOLM_1V8_S2R
1 C5304_RF 1 C5305_RF
RADIO_STOCKHOLM
NC
NC
53 PP_STOCKHOLM_ESE
1 C5302_RF VOLTAGE=1.80V 1.0UF 0.1UF
RADIO_STOCKHOLM 20% 20%
1.0UF 1 C5303_RF 10V 6.3V RADIO_STOCKHOLM
C5306_RF 1 1 RADIO_STOCKHOLM
C6
C7
D7
D3
VUP G2
TVDD E7
SVDD_IN G1
SVDD B7
ESE_VDD C5
20% 2 X5R-CERM 2 X5R-CERM C5307_RF
10V 0.1UF 0201-1 01005 0.22UF 0.22UF
2 X5R-CERM 20% 20% 20% C5312_RF
VDD/RF_IF_VDD
VBAT
VDHF
PVDD
C5
D5
1 C5310_RF 2% 2% 2%
3
4
R5319_RF 50V 2 50V 2 50V
1.00K2 560PF C0G C0G NPO-COG
BAL1
ATB201206E-20011
UNBAL
1
VDD VDD_RF 10% 0402 0402 0402
53 STOCKHOLM_RF_DATA_IO 50V
U5301_RF 2 X7R-CERM 30
PN65V 5% RADIO_STOCKHOLM
U5302_RF 0201 STOCKHOLM_ANT
T5301_RF
1/32W
RADIO_STOCKHOLM
STOCKHOLM_HOST_WAKE D1
UFLGA
A4 STOCKHOLM_SIM_SWP
MF
01005 AS3923-B0-BWLT C5313_RF 1 C5316_RF
31 30 OUT IRQ SIM_SWIO BI 31 55 WLCSP 33PF 330PF
0805
ALWAYS ON PULL-UP --> NC B3 SVDD_REQ SIM_VCC A5 VOLTAGE=1.80V PP_PN65_VCC_SIM A2 RF_IF_VDD CDMP1 B3 1 2 2%
OUT L5301_RF 25V
STOCKHOLM_FW_DWLD_REQ A1 A4 2 NPO-COG
53 30 IN DWL SIM_PMU_VCC B5 PP_PN65_SIM_PMU
IN 26 55 RF_DATA_IO CDMP2 B4 78NH-5%-0.97A-0.13OHM 2% TP5303_RF
1 0201
BB_REQUEST_XO_CLK A2 CLK_REQ TX_PWR_REQ F2 A5 RF_CLK_RX
STOCKHOLM_CDMP2 25V A
33 31 OUT NC 1 2 NPO-COG TP-P55
REF_CLK_FROM_BB A3 CLK_XTAL1 1 B2 0201
BAL0
33 31 IN R5303 RF_CLK_TX
ESE_DWPM_DBG D5 RFO1 C4 0402 TP5304_RF
GND
STOCKHOLM_UART_RXD C1 RX NC 10K 1
31 30 IN
ESE_DWPS_DBG E5 5%
STOCKHOLM_RFO1 L5302_RF A
31 30 OUT
STOCKHOLM_UART_TXD D2 TX NC 1/32W 78NH-5%-0.97A-0.13OHM
STOCKHOLM_RF02 TP-P55
RFO2 C3
2
1
STOCKHOLM_CTS_L B1 MF
31 30 IN CTS G7 R5316_RF 2 01005 1 2
STOCKHOLM_RTS_L ANT1 NC
31 30 OUT
B2 RTS F6
STOCKHOLM_RF_CLK_RX 0.00 2 A1 TIO 0402
RXP/RF_CLK_RX 1 STOCKHOLM_RF_CLK_RX_ASM3923
53 30 IN
STOCKHOLM_ENABLE E1 VEN G3 A3 GP_IO RFI1 D1 STOCKHOLM_RFI1 1 C5311_RF
TX1 0%
NC 1/32W NC 560PF
53 PP_STOCKHOLM_ESE E3 SMX_RST* TX2 G5 MF 53 30 STOCKHOLM_ENABLE B1 NRES 10%
NC 01005 RFI2 C1
STOCKHOLM_RFI2 50V
2 X7R-CERM
E4 SMX_CLK RXN/RF_CLK_RX F5
NC R5317_RF 0201
F4 ESE_IO1 ANT2 G6 0.00 RADIO_STOCKHOLM
NC NC STOCKHOLM_RF_CLK_TX 1 2 STOCKHOLM_RF_CLK_TX_ASM3923 VSP_RF D3
STOCKHOLM_VSP_RF
E6 ESE_IO2 VMID F7
NC 0%
A7 ESE_IO3 1/32W
NC RF_CLK_TX F1 MF VSP C2 STOCKHOLM_VSP
A6
B5 VSS_DMP
NC ESE_IO4 R5318_RF
01005
RF_DATA_IO B4
D4 VSS_RF
0.00 1 C5308_RF 1 C5309_RF
C3 XTAL2 53 1
STOCKHOLM_RF_DATA_IO 2 STOCKHOLM_RF_DATA_IO_ASM3923
NC 1.0UF 0.022UF
TVSS
PVSS
D2 VSS
VSS
GND
GND
GND
GND
GND
0% 20% 10%
1/32W 2 6.3V
X5R 2 6.3V
X5R-CERM
STOCKHOLM_VMID MF
B 01005 0201-1
RADIO_STOCKHOLM
0201
RADIO_STOCKHOLM B
E2
B6
C4
D4
D6
F3
G4
C2
RADIO_STOCKHOLM
1 C5317_RF TP5301_RF
1 STOCKHOLM_TIO
A
0.1UF TP-P55
20%
6.3V
2 X5R-CERM TP5302_RF
1
01005 A
TP-P55
55 53 30 PP_STOCKHOLM_1V8_S2R NOSTUFF
1 RADIO_STOCKHOLM
R5301_RF
100K
5%
1/32W
MF
2 01005
53 30 IN STOCKHOLM_ENABLE
53 30 IN STOCKHOLM_FW_DWLD_REQ
1 RADIO_STOCKHOLM
R5302_RF
100K
5%
1/32W
MF
2 01005
A SYNC_MASTER=N56_RADIO_MLB SYNC_DATE=05/07/2014 A
PAGE TITLE
D D
UAT JUMPER
L5408_RF
120NH-5%-40MA
PAC2_VDD_3V0_FILTER 1 2 PAC_VDD_3V0 30
0201
1 C5405_RF 1 C5403_RF
33PF 0.01UF
5% 10%
2 16V
NP0-C0G 2 25V
X5R-CERM
01005 0201
R5401_RF
RFFE2_CLK_BUFFER 1
0 2
36 31
5% MF
1/20W 201
1 C5401_RF
33PF
5%
6
2 16V
NP0-C0G
C C
VDD
01005
U5411_RF L5407_RF
RF1331 120NH-5%-40MA
R5402_RF SCLK_FILT 5 SCLK WLCSP VIO 3 VIO_FILT 1 2 RFFE_VIO_S2R 30
RFFE2_DATA_BUFFER 0 4 SDAT
36 31 1 2 SDAT_FILT 0201
5% MF
1/20W 201 1 C5402_RF 1 RF1A
33PF 10 RF1B 1 C5408_RF 1 C5404_RF
5%
2 16V 9
0.01UF 33PF
NP0-C0G 10% 5%
RFGND1
RFGND2
01005 RF2A 25V
1 C5410_RF 8 2 X5R-CERM 2 16V
NP0-C0G
GNDA
0.4PF RF2B 0201 01005
+/-0.05PF 1 C5411_RF
25V
2 C0G 0.8PF
201 +/-0.05PF
11
2
7
25V
2 C0G
0201
NOSTUFF
B L5404_RF 1
C0H-CERM
0201 B
5.1NH-5%-800MA-0.083OHM
L_2A 1 2
0402
L5410_RF
6.8NH-1.5A-0.055OHM
0402
L5405_RF
16NH-2%-0.85A-0.130OHM 2
L_1B 1 2
0402
L5406_RF
56NH-2%-0.33A-0.9OHM
L_1A 1 2
0402
A A
PAGE TITLE
JUMPER
DRAWING NUMBER SIZE
DSDS
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
D D
55 34 32 31
PP_LDO6
1
1
R5501_RF
C5501_RF 15.00K
2.2UF 1%
20% 1/32W
MF
2 6.3V
X5R 2 01005
0201-1
NOSTUFF NOSTUFF
8
VCC
U5501_RF
5
ST33F1MFE
35 31
DSDS_SIM_CLK CLK UFDFPN SWIO 2 DSDS_SIM_SWP 31 55
DSDS_SIM_RESET 6 IO1 3 NC
R5503_RF 35 31 RST
NC1 7
C NC C
EPAD
0.00 2 DSDS_SIM_DATA_R 4
GND
35 31
DSDS_SIM_DATA 1 31
IO0
0% NOSTUFF
1/32W
MF
9
01005 NOSTUFF
53 30 PP_STOCKHOLM_1V8_S2R
30 STOCKHOLM_VDD_MUX_3V0
1 C5502_RF
2.2UF
D2
A2
20%
2 6.3V
X5R
B 0201-1
NOSTUFF
V+ VIO
U5502_RF
B
R5504_RF TS3DS26227YZT D1 4FF_SIM_SWP
BI 31 55
PP_LDO5 1
0.00 2 PP_PN65_SIM_PMU WCSP NC1
55 34 32 31 26 53 55 A1 IN1
55 30
STOCKHOLM_SIM_SEL NO1 B1 DSDS_SIM_SWP 31 55
0% IN BI
1/32W D3 NC2
MF 55 34 32 31
PP_LDO5 COM1 C1 STOCKHOLM_SIM_SWP 31 53 55
01005 BI
PP_LDO6 B3 NO2 IN2 A3 STOCKHOLM_SIM_SEL
R5505_RF 55 34 32 31 30 55
4FF_SIM_SWP 1
0.00 2 STOCKHOLM_SIM_SWP PP_PN65_SIM_PMU C3 COM2 1
55 31 31 53 55 55 53 26 OUT R5502_RF NOSTUFF
0% VOLTAGE=3.00V 10K DEFAULT LOW = 4FF
1/32W 1%
MF GND 1/32W
01005 MF
01005 2
B2
C2
NOSTUFF RADIO_BB
A A
PAGE TITLE
JUMPER
DRAWING NUMBER SIZE