intrinsic-ID PUF ARC EM
intrinsic-ID PUF ARC EM
Optional high-performance
``
implementation with Synopsys
ARC CryptoPack acceleration
Chip identification based on Fuzzy
``
Identifier
Target Applications Uncontrollable nano-scale Start–up SRAM values Fingerprint turned User keys can be wrapped
process variations establish a unique, into a strong secret or encrypted with this
IoT
`` make ICs unique Silicon fingerprint cryptographic key PUF key (red/black system)
Wearables
``
Mobile
`` Figure 1. Flow of PUF technology used for secure key management
Microcontrollers
``
Sensors
``
Physically Unclonable Function Solution for ARC EM Processors
Technology The Physically Unclonable Function (PUF) solution from Intrinsic-ID is available
TSMC, UMC, Intel, Samsung
`` for DesignWare® ARC® EM Processors and enables designers to extract a unique
180nm, 150nm, 130nm, 90nm,
`` device fingerprint from standard embedded SRAM. This fingerprint can be used as
65nm, 45nm, 40nm, 28nm, a device identifier or as a cryptographic key. In the latter case, it effectively creates a
16nm, 14nm secure key vault without the need to add non-volatile memory (NVM) or a dedicated
security core. In combination with ARC EM Processor security options such as the
Enhanced Security Package and CryptoPack, the PUF solution provides a high-
performance, low-power security engine for protecting low-power IoT edge nodes
such as wearables or smart home devices.
1 Activation
SRAM code
2 Quiddikey 3
Key code 1
5
Key code 2
4
6
Key 1
Key 2
AC and KC are non-sensitive i.e., they contain no information about the keys or the PUF itself and can be
stored off-chip or remotely. The AC and the PUF key are established during the enrollment phase. This phase
typically takes place only once, usually during device manufacturing, device testing or at first use. The KC
is established during a key programming phase where Quiddikey-Flex converts the plain text user key into a
wrapped key code.
When combined with cryptographic algorithms in hardware or firmware, this can become a fully self-contained
root of trust or secure element.
The encryption and authentication algorithms can use the cryptographic keys generated by Quiddikey. This
eliminates the need to store any of the keys in NVM where they could potentially be unsafe.
If no NVM is available to store the AC and KC, they can be stored remotely. With the Fuzzy Identifier as an
index, they can be retrieved from the remote server. As AC and KC are non-sensitive, this is an inherently
secure approach.
Performance
The PUF algorithms are only required after power-up. They can be further accelerated using Synopsys’ ARC
CryptoPack hardware extensions. The authentication and encryption of data can also be executed by the ARC
EM core with CryptoPack to maximize performance and minimize power consumption.
Implementation
The PUF is based on standard SRAM cells (1 kbyte minimum). The Quiddikey PUF logic, as well as the
authentication and encryption, are implemented in firmware leveraging Synopsys SecureShield™ technology
and both can be enhanced with the CryptoPack option.
2
ARCv2 Instruction Set Architecture (ISA)
ICCM
Execute Commit
IFQ
3 stage pipeline
Secure MPU
Secure watchdog
timer
Secure AHB bus
Since the Quiddikey implementation is firmware, it requires protection. SecureShield provides a trusted
execution environment for the firmware, with instruction and data encryption, and isolation from other software
running on the ARC EM processor using the secure MPU.
The optional Fuzzy Identifier algorithm is software that runs on a server or Cloud system and converts a fuzzy
or noisy PUF response into a fixed identifier. This way any chip can be identified without the need for storing or
programming an identifier or serial number.
About Intrinsic-ID
Intrinsic-ID is a world leader in the field of Cyber Physical Security Systems as a provider of “Physical
Unclonable Functions” (PUF). Using patented PUF technology, secret keys and identifiers are reliably
extracted from the physical properties of chips. Intrinsic-ID’s wide range of security solutions serve the
following markets: Embedded systems, IoT, Identification, automotive, communications, content distribution,
pay TV, government and defense. www.intrinsic-id.com
About DesignWare IP
Synopsys is a leading provider of high-quality, silicon-proven IP solutions for SoC designs. The broad
DesignWare IP portfolio includes logic libraries, embedded memories, embedded test, analog IP, wired
interface IP, wireless interface IP, security IP, embedded processors, and subsystems. To accelerate
prototyping, software development and integration of IP into SoCs, Synopsys’ IP Accelerated initiative offers
IP Prototyping Kits, IP Virtual Development Kits and IP subsystems. Synopsys’ extensive investment in IP
quality, comprehensive technical support and robust IP development methodology enables designers to
reduce integration risk and accelerate time-to-market.
Synopsys, Inc. • 690 East Middlefield Road • Mountain View, CA 94043 • www.synopsys.com
©2016 Synopsys, Inc. All rights reserved. Synopsys is a trademark of Synopsys, Inc. in the United States and other countries. A list of Synopsys trademarks is
available at http://www.synopsys.com/copyright.html . All other names mentioned herein are trademarks or registered trademarks of their respective owners.
02/05/16.TT_CS6880_ARC2016_Intrinsic_PO.