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Semiconductors Problem Set

This document provides instructions for a problem set in EEE 131 with a deadline of September 20, 2019. It lists 9 problems and provides context for each problem. Students are instructed to show all work, write their name and student information, and use color-coded answer sheets according to their lecture section. Answers should abide by the student code of conduct.

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Marc Dominic Enriquez
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96 views2 pages

Semiconductors Problem Set

This document provides instructions for a problem set in EEE 131 with a deadline of September 20, 2019. It lists 9 problems and provides context for each problem. Students are instructed to show all work, write their name and student information, and use color-coded answer sheets according to their lecture section. Answers should abide by the student code of conduct.

Uploaded by

Marc Dominic Enriquez
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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EEE 131 1st Semester 2019-2020 Problem Set Questions

Deadline: September 20, 2019, Friday, 12nn


To be submitted at the EEE 131 Box to be placed at the Admin Office on that date.

Instructions: Write legibly. Show all solutions and state all assumptions. Write your full name, student
number, and section at the upper-right corner of each page. Box or encircle your final answer.
Answer sheets should be color coded according to your lecture section. The color scheme is as
follows:
THW – yellow
THX – blue
WFR – pink
WFW – green

In answering this problem set, make sure that you abide by the UP Student Code of Conduct.

1. A non-inverting amplifier with a gain of 10 uses 100K as its feedback resistor. It gets its input
from a signal source whose source resistance is 5K. The amplifier has zero offset voltage.
However, it has an input bias current of 2 µA and an input offset current of 0.2 µA.
a. Draw the op-amp circuit.
b. What minimum and maximum effects will the input bias current and the input offset
current together have on the expected voltage output?
c. Introduce a resistor that will reduce the effects computed in b. Show how this should be
connected. Assume it is ok for the input voltage to be attenuated.
d. What new minimum and maximum effects will the input bias current and the input offset
current together have on the expected output?

2. An n-type semiconductor is doped to give the electron


distribution profile shown.
a. Derive an expression for the electron current
density Jn(x) assuming there is no externally
applied electric field.
b. Derive an expression for the built-in electric field
that must exist if the net electron current is to be
zero.

3. Consider a silicon crystal at 300 OK, with the Fermi level 0.18eV above the valence band. Draw
the band diagram with complete information on the Eg , Ei, and (Ei -Ef )What type is this
material? What are the electron and hole concentration?

4. A silicon p-n junction is formed between n-type Si doped with ND = 1017cm-3 and p-type Si
doped with NA = 1016cm-3.
a. Sketch the energy band diagram. Label all axes and important energy levels
b. Find nn0 , np0 , pp0 , pn0. Sketch the carrier concentration (of both electrons and holes as a
function of position
c. Calculate the built-in potential Vbi in eV
5. Two identical Silicon diodes are connected in series opposing. A 5-volt
DC source is attached to this series connection as shown in the figure.
Assume the temperature is 300˚K.
a. Find the voltages across each of the diodes.
b. If the reverse saturation current is 1 nA and the diodes breaks
down at 4.5 volts,
ECE what
3410 current will flow
– Homework 4 through the circuit?

oblem 1. In each of the ideal-diode circuits shown below, vIN is a 1 kHz sinusoid with zero-to-peak
amplitude 10 V. For each circuit, sketch the output waveform and state the values of
6. maximum
the In each of theminimum
and ideal-diode circuits
output shownFor
voltages. below,
this vproblem,
in is a 1kHz sinusoid with a zero to peak
use the ideal switch
amplitude
model of the diode.of 10V. For each circuit, sketch the output waveform and state the values of
maximum and minimum output voltages. Use the ideal switch model of the diode

D1 D2 D1 D1 D2
vIN vOUT vIN vOUT vIN vOUT

1 k⌦ 1 k⌦ 1 k⌦

(A) (B) (C)

7. TheD1voltage waveform is appliedD1 to the diode circuit shown.


D1
Sketch the
D2
resulting output voltage
vIN waveform showingv all important
OUT v IN
voltage values.
v Use the
v constant
OUT
voltage
IN
drop model
v of the OUT

diode which is Silicon.


D2 1 k⌦ D2 1 k⌦ D3 1 k⌦

(D) (E) (F)

1 k⌦
1 k⌦ 1 k⌦ vIN vOUT
vIN vOUT vIN vOUT
1 k⌦
D1 D1 D2

D1
(G) (H)

(I)

Solution

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