Msi in Guest Arm64
Msi in Guest Arm64
direct injection
Santa Fe
November 4, 2016
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The problem
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The problem
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The problem
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The problem
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Basic system overview
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The x86 solution
x86 does not translate MSIs in the same way as DMA writes, and instead handles MSIs specially at
the IOMMU. The doorbell is a fixed 1MB region at 0xfee00000, so consequently:
The MSI region doesn’t require translation entries in the IOMMU page tables
Userspace can actively avoid the MSI region
Userspace can utilise a single memory map for all guest OSs
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arm64 constraints
arm64 typically translates MSIs in the same way as DMA writes. The MSI region is not at an
architecturally fixed address, nor is it of a standard size. Some reserved addresses may abort before
reaching the SMMU. Consequently:
The MSI region must be mapped in the SMMU page tables
Userspace needs to discover the MSI region
Userspace must adapt the memory map to avoid reserved regions
Reserved regions and MSI regions can be handled in the same way!
The regions are specific to the hardware at the point of adding the device
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VFIO ABI implications
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Open questions:
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Direct injection
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The ITS
EP (DID) ITS
DID
0 (addr,data0) IRQ−a
data
1 (addr,data1) IRQ−b
2 (addr,data2) IRQ−c
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Maintaining mappings between ITS and vITS
EP (DID) ITS
Ho
DID
st
0 (addr,data0) IRQ−a
data
1 (addr,data1) IRQ−b
2 (addr,data2) IRQ−c
EP (vDID) vITS
Gu
vIRQ−x
es
(vaddr,vdata0)
t
(vaddr,vdata1) vIRQ−y
(vaddr,vdata2) vIRQ−z
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map(vDID,vdata,virq)
Mappings
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