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Low Power 4×4 Bit Multiplier Design Using Dadda

This paper presents a low power 4x4 bit multiplier design using the Dadda algorithm and an optimized full adder. Full and half adders are designed using pass-transistor logic and CMOS technology to reduce power and delay. The proposed multiplier operates at 3.83 GHz with an average power of 184.3 μW at 1V. It uses optimized full adders as building blocks along with Dadda's algorithm to minimize power and propagation delay for applications like calculators and signal processing.

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Amena Farhat
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131 views3 pages

Low Power 4×4 Bit Multiplier Design Using Dadda

This paper presents a low power 4x4 bit multiplier design using the Dadda algorithm and an optimized full adder. Full and half adders are designed using pass-transistor logic and CMOS technology to reduce power and delay. The proposed multiplier operates at 3.83 GHz with an average power of 184.3 μW at 1V. It uses optimized full adders as building blocks along with Dadda's algorithm to minimize power and propagation delay for applications like calculators and signal processing.

Uploaded by

Amena Farhat
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Low Power 4×4 Bit Multiplier Design using Dadda

Algorithm and Optimized Full Adder

Abstract: This paper presents the model of 4-bit multiplier having low power and high speed
using Algorithm named Dadda and the basic building block used is optimized Full adder having
low power dissipation and minimum propagation delay. Full and half adder blocks have been
designed using pass-transistor logic and CMOS process technology to reduce the power
dissipation and propagation delay. We have also applied Dadda algorithm to reduce the
propagation delay. The model has been designed using Cadence Virtuoso in 90-nm technology.
The proposed multiplier starts its operation at the frequency of 3.83 GHz and its average
dynamic power is 184.3 μW at the supply of 1V.

Existing system:
Multiplication is the basic process which is used in different electronic and in various digital
communication applications. Multipliers with low latency and minimum power dissipation are
preferred to design an optimized circuit so that maximum throughput can be achieved in
minimum response time. Building blocks used in multipliers are a full adder and a half adder.
Different design implementations of a full adder and half adder circuits have been used to reduce
power and delay in order to design an optimized multiplier circuit which includes pass transistor
logic, CMOS process technology, split percentage data-driven logic and CMOS process
technology. Besides this, different multiplication algorithms also have been used to achieve
optimized power and delay product which includes Dadda, Wallace tree, and Vedic and Booth
algorithms.

Proposed Method:
The Recent multiplier used Reduced-sp-D3Lsum Adder and Dadda Algorithm technique. This
design operates at high frequency and consumes less power as compared to previous designs, but
still, power needs to be significantly reduced, so, it will help in the larger circuits where

Further Details Contact: A. Vinay 9030333433, 08772261612, 9014123891 #301, 303 & 304, 3rd Floor,
AVR Buildings, Opp to SV Music College, Balaji Colony, Tirupati - 515702 Email:
[email protected] | www.takeoffprojects
multiplier itself becomes the building block. In proposed work, a multiplier has been designed in
which Full adder and half adder has been used as its building block to reduce the power
dissipation by using pass transistor logic and CMOS technology process. Dadda Algorithm has
been used to reduce the propagation delay of the multiplier.

Applications:
 Calculator, Digital Signal Processing, Image Processing.

Advantages:
 Power, area and delay.

System Configuration:-

In the hardware part a normal computer where TANNER TOOL software can be easily
operated is required, i.e., with a minimum system configuration

HARDWARE REQUIREMENT

Processor - Pentium –III

Speed - 1.1 GHz

RAM - 1 GB (min)

Hard Disk - 40 GB

Floppy Drive - 1.44 MB

Key Board - Standard Windows Keyboard

Mouse - Two or Three Button Mouse

Further Details Contact: A. Vinay 9030333433, 08772261612, 9014123891 #301, 303 & 304, 3rd Floor,
AVR Buildings, Opp to SV Music College, Balaji Colony, Tirupati - 515702 Email:
[email protected] | www.takeoffprojects
Monitor - SVGA

SOFTWARE REQUIREMENTS

 Operating System :Windows95/98/2000/XP/Windows7

 Back End : TANNER TOOL

Further Details Contact: A. Vinay 9030333433, 08772261612, 9014123891 #301, 303 & 304, 3rd Floor,
AVR Buildings, Opp to SV Music College, Balaji Colony, Tirupati - 515702 Email:
[email protected] | www.takeoffprojects

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