Scribd
Upload
39 views6 pages

Code No.: 41190 E: (6 Pages)

This document appears to be an exam for a Computer Science course, covering topics related to computer architecture. It contains multiple choice and short answer questions assessing students' knowledge of topics like: registers and their purposes; control words; status bits; addressing modes; addition and multiplication algorithms; priority interrupts; main memory; vector processing; multi-processors; instruction cycles; stack organization; floating point arithmetic; asynchronous data transfer; associative memory; parallel processing; and pipelining. The exam is divided into three parts with a total of 75 marks possible.

Uploaded by

Raja Prathumnan
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
39 views6 pages

Code No.: 41190 E: (6 Pages)

This document appears to be an exam for a Computer Science course, covering topics related to computer architecture. It contains multiple choice and short answer questions assessing students' knowledge of topics like: registers and their purposes; control words; status bits; addressing modes; addition and multiplication algorithms; priority interrupts; main memory; vector processing; multi-processors; instruction cycles; stack organization; floating point arithmetic; asynchronous data transfer; associative memory; parallel processing; and pipelining. The exam is divided into three parts with a total of 75 marks possible.

Uploaded by

Raja Prathumnan
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 6

(6 pages) Reg. No. : ........................................

Code No. : 41190 E Sub. Code : JACS 31/


JASE 31

B.Sc. (CBCS) DEGREE EXAMINATION,


NOVEMBER 2018.

Third Semester

Computer Science — Allied

COMPUTER ARCHITECTURE

(For those who joined in July 2016 only)

Time : Three hours Maximum : 75 marks

PART A — (10  1 = 10 marks)

Answer ALL questions.


Choose the correct answer :

1. ————— holds the address of reset instruction.


(a) Stack pointer
(b) Input Register
(c) Accumulator
(d) Program counter
2. A memory that is part of control unit is referred to
as a —————.
(a) Control Memory (b) Data memory
(c) Main memory (d) Registers

3. In the multiplication process multiplier is stored


in —————.
(a) PC register (b) Shift Register
(c) Cache (d) Data Register

4. Generally, the subtraction is carried out by


(a) 1’s complement (b) 2’s complement
(c) 10’s complement (d) None

5. In which mode of effective address is equal to the


address part of the instruction.
(a) Implide mode
(b) Immediate mode
(c) Direct Address mode
(d) Indirect address mode

6. When A  B , the subtract magnitude for the


operation (  A )  (  B ) is —————.
(a)  ( A  B ) (b)  ( A  B )
(c)  (B  A) (d)  ( A  B )

Page 2 Code No. : 41190 E


7. A ————— command is used to test various
status conditions in the interface and the
peripheral.
(a) Control (b) Status
(c) I/O (d) None

8. Hand shaking is ————— type of data transfer.


(a) Synchronous
(b) Asynchronous
(c) DMA
(d) Interrupt

9. The virtual Memory basically stores the next


segment of data to be executed on the —————.
(a) RAM
(b) ROM
(c) Disks
(d) Secondary storage

10. Pipelining organization is applicable to ————.


(a) Instruction (b) Arithmetic
(c) Both (d) None

Page 3 Code No. : 41190 E


PART B — (5  5 = 25 marks)

Answer ALL questions, choosing either (a) or (b).

Each answer should not exceed 250 words.

11. (a) Draw the Block diagram of general Register


organization and explain its purposes.

Or
(b) Explain control word with examples.

12. (a) Explain the use of status bits register with


the block diagram.

Or
(b) Convert the following infix into prefix
notation:
(i) ( A  B )  (C  D )  E
(ii) A  B  C  (D  C)
(iii) ( A  B  C )  (C  D  E )
(iv) ( A  B )  (C  D )  ( E  D )
(v) (( A  B )  C  D )  ( E  D ) .

13. (a) Explain he Hardware implementation of


Addition Algorithm.

Or
(b) Explain the Hardware Algorithm for
Divisions?
Page 4 Code No. : 41190 E
[P.T.O.]
14. (a) What is priority Interrupt? Explain.
Or
(b) Explain about Main memory.

15. (a) What is Vector processing? Explain.


Or
(b) Discuss about Multi processors.

PART C — (5  8 = 40 marks)
Answer ALL questions, choosing either (a) or (b).
Each answer should not exceed 600 words.

16. (a) Explain about computer Instruction.


Or
(b) Explain the process of Instruction cycle.

17. (a) Explain stack organization in detail.


Or
(b) What is Addressing Mode? Explain the
various types.

18. (a) Explain Booth multiplication Algorithm with


an example.
Or
(b) Explain Addition and Subtraction of floating
point numbers with its register
configurations.
Page 5 Code No. : 41190 E
19. (a) What do you understands about
Asynchronous Data transfer? Explain in
detail.

Or
(b) Explain about Associative Memory.

20. (a) Explain parallel processing.

Or
(b) Write about Pipe Lining.

———————

Page 6 Code No. : 41190 E

You might also like