Smart Ballast Controll Ic
Smart Ballast Controll Ic
Smart Ballast Controll Ic
0, June 2007
ICB1FL02G
Smart Ballast Control IC
for Fluorescent Lamp Ballasts
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Smart Ballast Control IC
ICB1FL02G
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Product Highlights
Features PFC
Description
The ICB1FL02G is designed to control a fluorescent lamp ballast including a discontinuous mode
Power Factor Correction (PFC), a lamp inverter control and a high voltage level shift half-bridge driver.
Table of Contents
1 Introduction
2 Functional IC Description
Operating behaviour
Inverter
Preconverter
Operating procedure during start-up
Protection features
3 Ballast Design
5 Application Examples
6 Appendix
1 Introduction
2 Functional IC Description
LVS2
LVS1
C01 R14 R26 L2
270V HSGD C17
AC R15
ICB1FL02G
R11 Q1 HSVCC
K02 PFCGD
R16 HSGND
C14 Q3 C20
PFCVS
K03 C04 C02 C10 LSGD
R27
R12 C15 C16 C18 K3
PFCCS
PE LSCS
RFRUN
D7 K4
RFPH
RTPH
C03 R29
GND
VCC
RES
D9 D6 L22 C22 R36
R18 R19 C11 R20
D8 C19 D10
R30
C12 R21 R22 R23 C13 R24 R25
The continuous recharging of C16 with the On the output of the PFC preconverter a
inverter frequency shifts energy for the supply feedback controlled DC voltage is available at
voltage Vcc of the IC to C13. A surplus of capacitor C10 for the application. The PFC
energy is dissipated by the zener diode D9. In stage is operated with a controlled turn-on time
addition C16 is used to limit the voltage slew without input voltage sense. A turn-on time set
rate and to produce zero voltage switching by the control unit is followed by a turn-off time
conditions. which is detemined by the duration until the
current in the inductor and hence in the diode
During operation C16 is recharged without too has reached the level zero. This point of
losses in the dead time periods of MOSFET Q2 time is detected by the voltage level at the zero
and Q3 by the inductive driven current of the current detector winding on the inductor L1 and
load circuit. So the succeeding turn on of the feed to the IC via the resistor R13 and the
MOSFET occurs at zero voltage. At turn-off PFCZCD pin. The result is a gapless triangular
C16 limits the voltage slew rate in such a way, shaped current through inductor L1 (so called
that the MOSFET channel is already turned off critical conduction mode) which is sustained for
before the Drain to Source voltage has reached a turn-on time in the range of 23µs down to
considerable levels. Therefore the inverter 2.3µs. A further reduction of the energy flow
creates negligible switching losses at normal reduces the turn-on time down to 0.4µs while at
operation. the same time the turn-off time is extended
causing triangular shaped currents with gaps
The load circuit of the inverter consists of a (discontinuous conduction mode). Such a
series resonant circuit with the resonance control method allows a stable operation of the
inductor L2 and the resonance capacitor C20. boost converter over a large range of the input
The lamp is connected in parallel to the voltage as well as the output power.
resonance capacitor. In the shown example the
preheating of the lamp is done voltage Of course the IC includes a couple of protection
controlled. This means that the resonance features for the PFC preconverter. The
inductor L2 has two additional windings. Each overcurrent is sensed at the PFCCS pin. The
of those windings drives a current in the bus voltage, overvoltage and undervoltage are
filament via the band pass consisting of monitored at the PFCVS pin as well as the
L21/C21 and L22/C22. The band pass filter open loop detection. The ICB1FL02G includes
ensures that the current in the filaments is only the error amplifier with entire compensation
flowing during the preheat phase. By reducing build up by a digital PI regulator and a digital
the frequency during run mode the heating filter to suppress the 100Hz ripple.
current is almost completely blocked by the
band pass. The load circuit also contains a
capacitor C17. This capacitor is charged to half Operating procedure during start-up
the value of the bus voltage thus operating the
lamp symmetrically to the ground potential of The inverter starts at a frequency of 125 kHz.
the rectified mains supply. Within 10ms the frequency is reduced in 16
steps to the preheat frequency adjustable by
the resistor R22. The duration of preheating can
Preconverter for power factor correction be selected between zero and 2000ms by the
resistor R23. Subsequently the frequency is
Simultaneously with the inverter the MOSFET further reduced in 128 steps and a time period
Q1 of the PFC boost converter starts the of 40ms to the run frequency f_RUN adjustable
operation. This circuit consists of the inductor by the resistor R21. The ballast should be
L1, diode D5, MOSFET Q1 together with the designed in such a way that during the
bulk capacitor C10. Such a boost converter can preheating phase the voltage across the lamp is
transform the input voltage to any arbitrary low and at the same time the current in the
higher output voltage. Using a suitable control filaments is large. In the ignition phase following
method this converter is used as an active to the preheating period the frequency of the
harmonic filter and for the correction of the inverter should be at - or at least close to - the
power factor. The input current follows the resonance frequency of the resonant circuit in
same sinusoidal wave form as the AC mains order to reach a sufficient voltage for the
supply voltage. ignition of the lamp.
After successful ignition and frequency failure mode, when the situation happens for
reduction to the run frequency the current in the longer than 500ms. In a second situation
lamp should reach its nominal value and the capacitor C16 is completely charged and
current in the filaments should become a discharged by the MOSFETs switching.
minimum. During the ignition period a high Possibly there is a commutation of the body
voltage at the lamp and a large current in the diode of the MOSFETs during flowing forward
resonant circuit is generated due to the current. In such a critical operating condition
unloaded resonant circuit. The current in the with high power dissipation the IC changes into
resonant circuit is monitored by the resistors failure mode already after 610µs ( Fig. 35 ).
R24 and R25. As soon as the voltage at pin
LSCS exceeds a level of 0,8V, the operating Finally dangerous operating conditions can
frequency of the inverter is increased by a happen, when the fluorescent lamp reaches the
couple of frequency steps in order to prevent a end of lifetime or at operating conditions leading
further increase of the current and in the same to thermal instability of the lamp. As a
way of the voltage at the lamp. If the level of consequence the lamp voltage becomes
0,8V at pin LSCS is not crossed any more, the unsymmetrical or increases. For detecting such
operating frequency of the inverter decreases operating conditions the resistors R31, R32,
with the typical step width of the ignition phase R33 measure the lamp voltage by evaluating
towards the run frequency. As a result of this the current through these resistors at pin LVS.
measure the ignition phase is enlarged from The turn-off threshold because of exceeding the
40ms up to 235ms with a lamp not willing to maximum lamp voltage is detected when the
ignite, while the voltage at the lamp keeps on current through the resistors R31, R32, R33
the level of the ignition voltage with a certain crosses +/- 215µA. This failure condition is
ripple. If the run frequency is not achieved called EOL1 (end-of-life 1) in the datasheet.
within 235ms after finishing the preheating The rectifier effect with unsymmetrical lamp
period the IC changes over into the failure voltage is called EOL2 in the datasheet. If the
mode. In such a situation the Gate drives will be ratio of measured positive and negative peak
shut down, the current consumption of the IC value at pin LVS is higher than 1,15 or lower
will be reduced to 150µA typically and the than 0,85 the IC detects a rectifier effect.
detection of the filaments will be activated. A The failure events EOL1 and EOL2 are
restart is initiated either by lamp removal or summarized in time periods of about 40µs and
after a new cycle of turn-off and turn-on of the 4ms respectively. A counter adds up periods
mains voltage. with failure events and adds down periods
without failure events. There is a change over
into failure mode only when the counter has
Protection features reached 15 or 128 periods with failure events
respectively. By this method is guaranteed, that
Numerous protection functions complement the the ballast is turned-off only when a significant
basic functions of the ICB1FL02G. As soon as number of failure events in sequence has
the level at pin LSCS exceeds the voltage happened. Therefore a continuous rectifier
threshold of 1,6V for longer than 400ns, it is effect results in a change over into the failure
recognized as a risky operating condition as it mode after 500ms. The IC controls the
can occur during lamp removal in a running operating frequency of the inverter during the
device or during transients of mains voltage, different operating sequences such as softstart,
and the IC changes over into the failure mode. preheat, ignition, pre-run and run mode. During
the different operating sequences there are only
During run mode of the inverter a deviation from some of the protection features active first. All
the typical zero voltage switching is recognized the protection features are active during run
as an operation with capacitive load. In such an mode only.The integrated circuit ICB1FL02G
operating condition peak currents occur during has a unique combination of features that make
turn-on of the MOSFETs due to switched a design of high-quality lamp ballast with a low
charging of the charge pump capacitor C16. number of external components possible.
The IC distinguishes between two different Further information and datasheet can be found
natures of capacitive load. In a first situation on the subsequent link to Infineon
there is in part a change of the charge of Technologies.
capacitor C16. Such an operating condition is
less risky. So the IC changes over into the http://www.infineon.com/smartlighting
3 Ballast Design
Time
Operation
Ignition
Preheat
Fig. 3
For operating the FL it is necessary to provide In addition to these pure physical requirements
at least a sufficiently high voltage for generating of lamp operation it is necessary to provide safe
the needed amount of free charge carriers operation employing adequate protection
during the discharge ignition process. In most functionality respecting all operational states
cases it is wishful to include an additional and lifetimes phases of the discharge lamps.
Preheat Phase for a sufficient thermalization of The supply unit shall also show Immunity
the lamp filaments which increases the number against external signals and emission signal
of maximum starting cycles during the lamp levels below the limits given in the Electro
lifetime significantly. Magnetic Compliance (EMC) - Standardization.
These demands lead to the inclusion of a
After ignition of the discharge the negative U( I ) substantial control and protection functionality
– curve of the FL requires a current source into High-Performance-FL-Ballasts and the
behaviour of the supplying lamp circuit. The associated Control-IC’s. So the block diagram
periodic ac signal should also offer an of an Electronic Ballast will posses typically the
appropriate crest factor of the lamp voltage. following function blocks:
Fig. 4
The lifetime of fluorescent lamps can be Starting with cold filaments the constant current
increased significantly by thermalizing the lamp IF is applied to the cold filaments with the
filaments to an appropriate temperature of resistance R(0) = Rc . In this case the temporal
emission which is Te ≥ 900 K. This means increase shows an approximate exponential
that the ratio of thermalized to cold filament behaviour according
resistance should be
α Rc
IF 2 t
R R I (t ) = R c e cv
≅ 4
Rc
Where α denotes the temperature coefficient of
the resistance and cv the heat capacity of the
For preheating of the lamp filament different
modes of energy transfer can be applied. In the filament. It can be seen that increasing α , Rc
following the pure cases of preheating by and IF accelerates preheating while increasing
constant current respectively constant voltage cv will lead to a prolongation of the filament
are depicted. thermalization ( Fig. 5 ).
The application of constant voltage to the lamp With preheated filament the lamp is prepared
filaments will rise its resistance according the for igniting the discharge. For this the voltage is
temporal square root law increased by lowering the inverter frequency
until the lamp resistance breaks down abruptly
and the resonant circuit shows strong damping.
αR
2
RU (t ) = R + 2 c U 2 ⋅t
c c
F
v 1000
900
800
Lamp Voltage
preheating while increasing cv will again lead to 600
400
Without
Load
In the lamp data sheets of the manufacturers 300
Run
Preheating
the parameters for sufficient preheating are
200
With
100
listed. The essential magnitude is the minimum 0
Load After
cathode preheat energy 10000 Ignition 100000
Operating Frequency
E min = Q + P t e
Fig. 6 Lamp Voltage in different resonant
states
Where Q indicates the specific heat and P an
average power transformed into heat losses of
the filament when thermalizing the filament to From Softstart to normal operation
emission temperature. The data sheets also
indicate the maximum energy which may not be Preceding the required filament preheating a
exceeded to prevent overheating of the softstart phase is traversed. The ignition phase
filament. Preheat current and –time te should with the sufficiently increased lamp voltage is
be chosen accordingly using the denoted followed by a normal operation which starts with
substitution resistor. the abrupt appearance of the lamp current
( Fig. 7 ). In the timing diagrams of Fig. 8 and 9
current and voltage controlled preheating can
8
be observed.
Ru( t )
Ri( t ) 4
Rph
0
0 0.2 0.4 0.6 0.8 1
t
te
The temporal resistance curves calculated as After preheating the operating frequency of the
approximation from the filament voltage and – inverter is shifted downwards in 40 milliseconds
current slopes show the typical exponential typically to the run frequency ( Fig. 10 ). During
( Fig. 8 ) for current controlled preheating and this frequency shifting the voltage and current in
square root behaviour ( Fig. 9 ) for voltage the resonant circuit will rise when it operates
controlled preheating respectively. In the case close to the resonant frequency with increasing
of voltage controlled preheating a limitation of voltage across the lamp. As soon as the lower
filament current takes place during the temporal current sense level (0,8V) is reached, the
phase with low resistant filaments owing to the frequency shift downwards is stopped and if
limits of the preheat circuit energized by the necessary it is increased by eight steps in order
transformer. to limit the current and the ignition voltage as
well. The procedure of shifting the operating
frequency up and down in order to stay within
the max ignition level is limited to a time frame
of 235ms. If there is no ignition within this time
the control is disabled and the status is latched
as a fault mode. While the softstart proceeds in
15 steps of 650us with
120⋅ kHz − f
PH
∆f ss
15⋅ Steps
120
Preheat 54 W
110
100
Frequency [ kHz ]
90
80
Ignition 54 W
70
Preheat 36 W
60 Ignition 36 W
50 Run
40
0 500 1000 1500 2000
Fig. 9 Voltage Controlled Preheating of
Operation Time [ ms ]
the T5 54W Lamp, RC = 2.3 Ω
Filament Voltage ( black, 10 V / div.)
Filament Current ( blue, 2 A / div. ) Fig. 10 Temporal frequency profiles of the
inverter during the main Operation phases
Filament Resistance ( pink, 5 Ω /div.)
During the process of lamp ignition it is useful to By means of the ignition control function it is
control also the current in the half bridge. An possible to provide stable conditions even at
increase of the corresponding voltage detected essential variation of the values arising with the
at pin LSCS ( Fig. 11 ) is used to control onset of saturation effects. These influences
saturation effects arising in the lamp choke. owing to temperature and tolerances of the
lamp choke on ballast functions can be
respected smartly.
R11 Q1 HSVCC
K02 PFCGD
R16 HSGND
C14 Q3 C20
PFCVS
K03 C04 C02 C10 LSGD
R27
R12 C15 C16 C18 K3
PFCCS
PE LSCS
D7 K4
RFRUN
C03 R29
RFPH
RTPH
G ND
VCC
RES
The high frequency oscillations zoomed in From the Drain Current curve of the low side
Fig. 16 show the trapez form of VRES and the half bridge MOSFET it can be seen ( Fig. 18)
sinusoidal current curve of the lamp choke. that in the steady state of preheating the
With the first gate signals of the Softstart transistor performs inductive switching of the
generated by the IC temporary hard switching resonant circuit and that it carries the inductor
behaviour with elevated current peaks can arise current during its turn-on-phase. The
due to charging of the coupling- and charge- programming of the relevant magnitudes
pump- capacitors ( Fig. 17 ). preheat time and –frequency can be performed
Fig. 17 Softstart
During the ignition phase where the currents in With completion of the lamp ignition process the
the half bridge are extensively higher ( Fig. 19 ) lamp resistance lowers dramatically. The
than in the preceding phases. In all states these ICB1FL02G changes to the Pre-Run-Mode in
states before completed ignition of the lamp the which already the normal operation frequency is
high-Q character of the load circuit can be applied but only a selected set of protection
observed. functions active.
The application of high voltage initiates the free In the normal run mode the operation frequency
charge carrier generation process in the lamp keeps unchanged and is connected with the
and hence ignites the discharge with abrupt desired lamp-current and –power via the
lowering of the infinite resistance to values defined dimensioning of the resonant circuit. In
fastly approximating the specified lamp voltage. the ballast board designed for the T5 54W lamp
With a load circuit impedance fulfilling the at frun = 45 kHz inductive switching occurs in
standard requirements the ignition process is interaction with the damped resonant circuit as
short enough to cause no damage at the lamp can be derived from ( Fig. 20 ).
electrodes.
In Ignition Mode of the ICB1 the detection of In Run-Mode all protection functions needed
Bus-Voltage, voltages at Pins PFCCS, LSCS are activated.
and VCC are active. Also if the Run frequency
can not be achieved Driver turn off and Power
Down respectively are performed.
Protection Functions
The safety of lamp operation is influenced by a
dangerous thermalization of the lamp regions
Under Voltage Lock Out - UVLO which are surrounding the electrodes especially
of low diameter lamps as the power densities
The intermediate circuit voltage ( Bus Voltage ) arising in this cases are high. Another
is sensed by a resistive divider at the pin damaging effect is given if high pulse powers
PFCVS so that the cases open control loop, are heating up the HB-MOSFETS. So the EOL-
undervoltage and overvoltage can be detected. events are detected by measuring the positive
In Fig. 21 the case of repeating UVLO as and negative peak level of the lamp voltage by
consequence of ballast operation near line a current fed into the LVS pin. The relevant
undervoltage can be observed. The connected lamp-voltage-levels are indicated in Fig. 22 .
detection limit of 1.83 V is 73% of the reference During Run Mode slow and abrupt increases of
voltage of 2.5 V. Lamp Voltage can be detected at pins LVS1
and LVS2. Exceeding one of the two thresholds
of either +215µA or -215µA cycle by cycle for
longer than 610µs, the interpretation of this
event is a failure due to EOL1.
The EOL2-test applying asymmetric power The EOL2-test applying asymmetric power
dissipation shows for the negative rectifier dissipation exhibits for the positive rectifier
effect the following results: effect the following results:
For this effect the experimental setup provides The belonging ratio- and timing -diagram shows
the ratios illustrated in Fig. 23. The belonging lamp voltage and the negative signals in Fig. 25
timing diagram ( Fig. 24 ) shows lamp voltage and Fig. 26 measured at resistor R1 according
and the negative signals measured at resistor EN 61347-2-3. For both directions EOL2 is
R1 as defined in the standard EN 61347-2-3. detected with t ( EOL2 ) > 500 ms.
Signals at Pin RES and RFPH in case of the pins RES and RFPH respectively. It can be
deactivated fluorescent lamp seen that the state of normal Run Mode will not
be reached when starting a deactivated lamp.
The sequence from Softstart, Preheat, Ignition The phase of triangle voltage form ( Fig. 28 ) at
and direct transition to power-down due to high- Pin RES during power down with low current
ohmic lamp is displayed in the following timing- consumption of IVCC < 170µA is generated to
diagram on a long time scale ( Fig. 27 ) and as prevent that voltage transient are interpreted as
detailed representation ( Fig. 28 – Fig. 30 ) for lamp removal.
Fig. 27 Total Sequence from soft start to power Fig. 29 Transition from soft start to preheating
down due to increased lamp resistance RFPH-Voltage-Steps reflecting the decrease of
operation frequency
Curves in envelope mode
Voltage on Pin RES ( black, 2 V / div. ) Curve in high resolution
Voltage on Pin RFPH ( blue, 1 V / div. ) Voltage on Pin RFPH ( blue, 0.5 V / div. )
In normal operation of the half bridge inductive A first criterion detects low deviations from ZVS
or near resonant switching on the inductive side ( CapLoad 1, Fig. 32 ) and changes operation
of the resonant curve takes place which can be into fault mode, if this operation lasts longer
observed at the timing diagrams of the Drain- than 500ms. For CapLoad1 the same counter is
Source-Voltage and the Drain-Current of the used as for the end-of-life evaluation.
Low-Side Switch ( Fig. 31 ).
VDSLS VDSLS
t IDLS t
IDLS
VRES
VRES
VRES5
VRES5 VRESLLV
VRESLLV
tCAPM1 tCAPM2 t
tCAPM1 tCAPM2 t
Gate HS
Gate HS
t
t
Gate LS
Gate LS
t
t Deadtime
Deadtime
Fig. 31 ZVS at Normal Operation of the Lamp Fig. 32 Current Spikes at Capacitive Load 1
At the pin RES the detection of Capacitive Load CapLoad2 is sensed in the moment when the
takes place. If the Drain-Voltage of the lower high-side Gate drive is turned on. If the voltage
MOSFET is already zero when its Gate Voltage level at pin RES is below the VREScap threshold
is turned on ( Fig. 34 ) , no capacitive switching related to the level VRESLLV , conditions of
occurs. The detection relates to cases in which CapLoad2 ( Fig. 35 ) are assumed. As the
only low deviation from ZVS ( Cap. Load 1 ) as reference level VRESLLV is a floating level, it is
well as the more severe case of operation updated every on-time of the low-side
below resonance ( Cap. Load 2 ) occurs. MOSFET. Dramatic changes of the load circuit
Fig. 34 Normal Run Mode - no Power Down: Fig. 35 Capacitive Load / Cap.Load 2:
Gate Voltage of Low Side MOSFET rises when Gate Voltage of Low Side MOSFET rises when
voltage at PIN RES has already declined Voltage at PIN RES is still in the high-state
In the first case the fault mode is acquired if the like sudden break of the lamp tube will cause a
Cap Load1 operation lasts longer than 500ms. quick rise of the low side MOSFET. This event
In the second case of Cap Load2 the inverter is is detected by inverter current limitation ( 1,6 V
turned off after the shorter time interval of threshold or EOL1 detection ) and results in
610µs and the IC changes over into fault mode. shut down of the control. This status is latched
Capacitive Modes may arise when the lamp as a failure mode.
voltage increases which will lead to a shift of
the resonant frequency to higher values. Filament Detection at start up
The evaluation of the failure condition is done A source current out of pin RES via resistor and
by an up and down counter. In the second case filament to ground monitors the existence of the
of Cap Load2 the inverter is turned off this low-side filament of the fluorescent lamp for
conditions lasts longer than 610µs and the IC restart after lamp removal. During typical start-
changes over into fault mode. The evaluation of up with connected filaments of the lamp a
the failure condition is done by an up and down current source (20µA) is active as long as Vcc >
counter which samples the status every 40µs. 10,5V and VRES < 1,6V. An open Lowside
CapLoad 1 is sensed in the moment when the filament is detected, when VRES > 1,6V. Such
low-side gate is drived on. If the voltage level at a condition will prevent the start-up of the IC.
pin RES is above the VREScap threshold ( typ. An open high-side filament is detected when
0.24 V ) related to the level VRESLLV conditions there is no sink current ILVSsink (15µA) into
of CapLoad1 are assumed. both of the LVS-Pins before the VCC start-up
threshold is reached.
LVS2
LVS1
C01 R14 R26
270V HSGD R35 C17
AC
ICB1FL02G
R15 HSVCC
R10 Q1
K02 PFCGD
R16 HSGND C23
C14 Q3
PFCVS
K03 C04 C02 C10 LSGD
R27
R11 C15 C16 C18 K3
PFCCS
PE LSCS K4
RFRUN
D7
RFPH
RTPH
C03 R29
GND
VCC
RES
D6 R36
R18 R19 C11 R20
D8 C19 D10
R30
R34 R12 D9 C12 R21 R22 R23 C13 R24 R25
Principal Behaviour
The standards for the suppression of line The control depends on the effective value and
current harmonics ( EN61000-3-2 , IEC61000- phase of the line voltage and on the bus
3-2 ) require certain limits for the generation of voltage. The timing diagram of the negative
the single current harmonics. Providing an voltage at pin PFCCS for Uline = 230 V in the
extensive approximation to a resistive load phase Iline = Imax is shown in Fig. 39. The
behaviour of the ballast will lead to a high positive value of U(pin PFCCS)( -1 ) correlates
power factor, low harmonic generation and with the Ton -Time of the Boost-Switch.
minimum THD. For this an appropriate drive
control of the MOSFET-Switch in the Boost The rising slope of the inductor current belongs
Converter used as power factor correction to the phase in which the energy in the inductor
circuit is provided. It is based on the detection increases. During the blocking phase of the
and processing of the signals at the pins Boost Transistor the Boost-Diode is conducting
PFCVS (Bus Voltage Sense), PFCZCD (Zero and carries the discharging current of the
Current Detection) and PFCCS (Current Sense Inductor ( Fig. 40 ). The falling slope of the
for Over-Current-Detection ). Base on this the timing diagram Integral [ U( pin PFCCS ) ( -1 ) ]
On-Time of the switch can be varied in corresponds to the Diode-Current as expected.
frequency and duration of the Gate Signal. The With the chosen scaling the induction curve has
PFC starts with fixed frequency operation and the same amplitude as the diode-current-curve.
switches over into critical conduction mode So it is obvious that both curves can differ only
operation as soon as a sufficient ZCD signal is by an additive integration constant.
available.
Fig. 39 Voltage Signal at pin PFCZCD at Fig. 40 Voltage Signal at pin PFCZCD at
Iline (t) = Imax for Uline = 230V Iline (t) = Imax for Uline = 230 V
Line Current as reference ( blue, 200 mA / div ) Voltage at Pin PFCZCD ( red, 20 V / div. )
U ( Pin PFCZCD ) * ( -1 ) (red, 20 V / div ) Boost Diode current ( blue, 500 mA / div. )
Boost-L-Induction ( pink, 100 µVs / div. ) Boost-L-Induction ( pink, 100µVs / div. )
For Uline,peak = UBus / 2 the conducting and There is an overvoltage threshold at 109% of
blocking durations of the Boost-Transistor are rated Bus voltage that stops PFC Gate Drive as
equal with Ton = Toff . With the effective line long as the Bus voltage has reached a level of
voltage decreasing from Uline = 230 V to Uline = 105% of rated Bus voltage again. The compen-
130 V the pfc-operation frequency reduces sation of the voltage control loop is completely
from about 70 kHz to about 35 kHz measured integrated. The internal reference level of the
at the phase of peak line voltage. The duty Bus voltage sense (PFCVS) is 2,5V with high
cycle increase from τ = 0.3 to τ = 0.85 raises accuracy.
the line current and hence keeping the line
power approximately constant. The PFC control operates in CritCM in the
range of 23µs > on-time > 2,3µs. For lower
loads the control operates in discontinuous
conduction mode (DCM) with an on-time down
to 0,5µs and an increasing off-time. With this
control method the PFC preconverter covers a
stable operation from 100% of load to 0,1% .
The line current harmonics were analysed in The dependence of THD and power versus line
the application of a ballast board for the voltage is week. Analysing the single harmonic
operation of a T5 54W fluorescent lamp. For the distortions sufficient distances to the limit
nominal line voltage and the extreme values of values set by the EN 61000-3-2 Class C-
the voltage range from 170V to 270V the Standard arise in the displayed range of line
harmonics distortions relating to the voltages. These performance of the PFC can
fundamental mode lead to low THD < 9.2 % be achieved using a constant design and
and high power factors exceeding PF > 0.975. dimensioning of the EMI-Filter.
THD [ % ]
8,0
15
7,0
10
6,0
5
5,0
0
170 190 210 230 250 270
1 5 9 13 17 21 25 29 33 37 Line Voltage [ V ]
Odd Harmonic Number
Harmonic Distortion w ith ICB1FL02G and T5 54W Power Factor versus Line Voltage
compared with EN 61000-3-2 Class C with ICB1FL02G and T5 54W
30
Limit
THD ( 170V ) = 9.1% 0,995
ICB1
25 PF = 0.992
20 0,990
Distortion [ % ]
P ow er Factor
15 0,985
10
0,980
5
0,975
0 170 190 210 230 250 270
1 5 9 13 17 21 25 29 33 37
Odd Harmonic Number Line Voltage [ V ]
Harmonic Distortion w ith ICB1FL02G and T5 54W Fig. 46 - 47 Line Voltage Dependences of
compared with EN 61000-3-2 Class C THD and Power Factor with
30
THD ( 270V ) = 9.1% Limit ICB1- PFC in T5 FL Ballast
ICB1
25 PF = 0.997
20
Distortion [ % ]
15
10
0
1 5 9 13 17 21 25 29 33 37
Odd Harmonic Number
1,2 35,00
30,00
1
25,00
0,8
A THD [%]
20,00
0,6
PF
15,00
0,4 10,00
0,2 5,00
0 0,00
0 20 40 60 0 20 40 60
UIN 110V UIN 230V UIN 270V UIN 110V UIN 230V UIN 270V
1,2 30,00
1 25,00
0,8 20,00
A THD [%]
0,6 15,00
PF
0,4 10,00
0,2 5,00
0 0,00
0 20 40 60 0 20 40 60
UIN 110V UIN 230V UIN 270V UIN 110V UIN 230V UIN 270V
5 Application Examples
LVS2
LVS1
C01 R14 R26
270V HSGD R35 C17
AC R15
ICB1FL02G
R10 Q1 HSVCC
K02 PFCGD
R16 HSGND C23
C14 Q3
PFCVS
K03 C04 C02 C10 LSGD
R27
R11 C15 C16 C18 K3
PFCCS
PE LSCS K4
RFRUN
D7
RFPH
RTPH
C03 R29
GND
VCC
RES
D6 R36
R18 R19 C11 R20
D8 C19 D10
R30
R34 R12 D9 C12 R21 R22 R23 C13 R24 R25
Fig. 53 Single FL Ballast Application with ICB1 for current mode preheating
R11 Q1 HSVCC
K02 PFCGD
R16 HSGND
C14 Q3 C20
PFCVS
K03 C04 C02 C10 LSGD
R27
R12 C15 C16 C18 K3
PFCCS
PE LSCS K4
RFRUN
D7
RFPH
RTPH
C03 R29
GND
VCC
RES
Fig. 54 Single FL Ballast Application with ICB1 for voltage mode preheating
Bill of Material for Single Lamp Ballast with current mode preheating in Fig. 53
Bill of Material for Single Lamp Ballast – voltage mode preheating in Fig. 54
Fig. 55 Layout for Single FL Ballast Application with ICB1 for voltage mode preheating
Fig. 56 Duo Parallel FL Ballast Application with ICB1 for current mode preheating
Fig. 57 Duo Serial FL Ballast Application with ICB1 for voltage mode preheating
6 Appendix
1
C20 Selected value: R13= 33k.
( )
min 2
2⋅ π⋅ f ⋅ L2
IGN
1
C20 3 , 6nF PFC Voltage sense resistor R20:
min 2
( 2 ⋅ π ⋅ 70000kHz ) ⋅ 1.43mH
V
REF 2 , 50V
C17 10 ⋅ C20 36nF R ≤ 10kΩ
min min 20 100 ⋅ I 100 ⋅ 2.5µA
PFCBIAS
(
1⋅ R + R + R
20 14 15 ) R
11k
8.4kΩ
( )
C 22 105kHz ⋅ 11k
11 2 ⋅ π ⋅ f ⋅ R ⋅ R14 + R
C1 20 15 −1
8
5 ⋅ 10 ⋅ ΩHz
1 ⋅ ( 10k + 820k + 820k )
C 1 , 60nF
11 2 ⋅ π ⋅ 10kHz ⋅ 10k ⋅ ( 820k + 820k )
Selected value: R22= 8,2kΩ
T ( ms )
PH 900ms
R R 8 , 93kΩ
23 TPH 112ms 112ms
PFC Shunt resistors R18, R19: kΩ kΩ
R ⋅R G a t e d r i v e r es i s t o rs R1 6 , R 2 6 , R 2 7 a r e
18 19 1V ⋅ 0.95 ⋅ 180V ⋅ 2 recommended to be equal or higher than 10Ω.
1.1Ω
R +R 4 ⋅ 55W
18 19
Shunt resistors R24, R25:
Selected values: R18= 2,2 Ω; R19= 2,2 Ω
The selected lamp type 54W-T5 requires an
ignition voltage of VIGN= 800V peak. In our
application example the resonant inductor is
Set resistor R21 for run frequency, at a projected evaluated to L2= 1,46mH and the resonant
run frequency of 45kHz: capacitor C20= 4,7nF. With this inputs we can
calculate the ignition frequency f IGN :
8
5 ⋅ 10 ⋅ ΩHz
R R 11 , 1 ⋅ kΩ
21 FPH 45kHz V ⋅2
BUS
1+
π⋅ V
IGN
f
Selected value: R21= 11,0k Ω IGN 2
4⋅π ⋅L ⋅ C
2 20
Set resistor R22 for preheating frequency, at a
projected preheating frequency of 105kHz:
410V ⋅ 2
1+
π ⋅ 800V
R f 70 , 0kHz
FRUN IGN 2
R R 4 ⋅ π ⋅ 1.46mH ⋅ 4.7nF
22 FPH f ⋅R
PH FRUN
−1
8
5 ⋅ 10 ⋅ ΩHz
The second solution of this equation with a minus Current limitation resistor R30 for floating
instead of a plus – sign leads to a result of bootstrap capacitor C14:
50163Hz is on the capacitive side of the resonant
rise. This solution is not taken into account A factor of 2 is provided in order to keep current
because the operating frequency approaches from level significant below LSCS turn-off threshold.
the higher frequency level.
2⋅ V R ⋅R
In the next step we can calculate the current CCON 24 25
through the resonant capacitor C20 when R ≥ ⋅
30 V R +R
reaching a voltage level nof 800V peak. LSCSOVC 24 25
I V ⋅ 2⋅ π⋅ f ⋅C
C20 IGN IGN 20 2 ⋅ 14 ⋅ V 0 , 82 ⋅ 0 , 82 ⋅ Ω
R ≥ ⋅ 7 , 18Ω
30 1, 6 ⋅ V 0 , 82 + 0 , 82
Finally the resistors R24, R25 can be calculated Low-side filament sense resistor R36:
from IC20 and the current limitation threshold
during ignition mode. For a single lamp ballast
V
RESC1MIN 1 , 55V
R ⋅R V R ≤ 57 , 4kΩ
24 25 LSCSLIMIT 0 , 8V 36 I 27 , 0µA
0 , 485Ω RES3MIN
R +R I 1 , 65A
24 25 C20
Selected value: R36= 56kΩ
Selected values are R24 = R25 = 0,82kΩ.
(FLP)2 − 1
200V C
R +R − 1170kΩ 6522kΩ 19 2⋅ π⋅ f ⋅R
34 35 26µA RUN 36
2
V ⋅ 2 ⋅ V − V ⋅ 2 ⋅ η
INACMAX BUS INACMAX
2 L
100 − 1 B 4⋅ F ⋅P ⋅V
C 7 , 1nF MIN OUTPFC BUS
19 2 ⋅ π ⋅ 40kHz ⋅ 56kΩ
The inductivity of the boost inductor typically is As some protection-functions require the
designed to operate within a specified voltage detection and processing of small signals
range above a minimum frequency in order to get special care has to be taken regarding the
an easier RFI suppression. It is well known, that in influence of parasitic layout effects. In particular
critical conduction mode (CritCM) there is a for the Lamp Voltage sensing Pins LVS1 / LVS2
minimum operating frequency at low input the layout should possess conducting lines with
voltages and another minimum at maximum input minimum coupling capacitance to those having
voltage. In state-of-the-art CritCM PFC controllers high slopes of temporal voltage variations.
we use the lowest value out of these two criteria:
2
V ⋅ 2 ⋅ V − V ⋅ 2 ⋅ η
L
INACMIN BUS INACMIN
A 4⋅ F ⋅P ⋅V
MIN OUTPFC BUS