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Format For Course Curriculum: Course Level: UG Course Objectives

This document provides details of the Computer Organization and Architecture course curriculum. The course deals with computer architecture, organization, and design. It has 5 credit units and consists of 3 lectures and 2 practical sessions per week. The course content is divided into 5 modules covering topics like register transfer language, basic computer design, CPU, memory and I/O organization, and parallel processing. Student learning outcomes include building hardware fundamentals, understanding computer structure and operations, and designing computer architecture. The course will be delivered through classroom teaching, assignments, and practical sessions involving simulations and experiments. Student performance will be assessed through continuous and end-term evaluation of theory and practical components.

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93 views4 pages

Format For Course Curriculum: Course Level: UG Course Objectives

This document provides details of the Computer Organization and Architecture course curriculum. The course deals with computer architecture, organization, and design. It has 5 credit units and consists of 3 lectures and 2 practical sessions per week. The course content is divided into 5 modules covering topics like register transfer language, basic computer design, CPU, memory and I/O organization, and parallel processing. Student learning outcomes include building hardware fundamentals, understanding computer structure and operations, and designing computer architecture. The course will be delivered through classroom teaching, assignments, and practical sessions involving simulations and experiments. Student performance will be assessed through continuous and end-term evaluation of theory and practical components.

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abcd
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© © All Rights Reserved
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Annexure ‘CD – 01’

FORMAT FOR COURSE CURRICULUM

L T P/S SW/FW No. of TOTAL


PSDA CREDIT
Course Title: COMPUTER ORGANIZATION AND ARCHITECTURE Credit Units: 5 UNITS
3 - 2 2 3 5
Course Level: UG Course Code:CS301
Course Objectives:
This course deals with computer architecture as well as computer organization and design. Computer architecture is concerned with the structure and behavior
of the various functional modules of the computer and how they interact to provide the processing needs of the user. Computer organization is concerned with
the way the hardware components are connected together to form a computer system. Computer design is concerned with the development of the hardware for
the computer taking into consideration a given set of specifications

Pre-requisites:
Digital Electronics

Course Contents/Syllabus:
Weightage (%)
Module I : Register Transfer Language 25%
Register Transfer, Bus and Memory Transfers, Arithmetic Micro-operations, Logic Micro-operations, Shift Micro-
operations, Arithmetic Logic shift Unit.

Module II: Basic Computer Organizations and Design


20%
Instruction Codes, Computer Registers, Computer Instructions, Timing and Control, Instruction Cycle, Memory-
Reference Instructions, Input-Output and Interrupt, Design of Accumulator Logic. Hardwired and Microprogrammed
control: Control Memory, Address Sequencing, Design of Control Unit

Module III : Central Processing Unit 20%


Introduction, General Register Organization, Stack Organization, Instruction representation, Instruction Formats,
Instruction type, Addressing Modes, Data Transfer and Manipulation, Program Control, Reduced Instruction Set
Computer RISC and CISC
Computer Arithmetic: Introduction, Multiplication Algorithms, Division Algorithms, Floating-Point Arithmetic
Operations

Module IV : Memory and Interasystem Communication and Input output organization 20%
Memory: Memory types and organization Memory Hierarchy, Main Memory, Auxiliary Memory, Associative Memory,
Cache Memory, Virtual Memory, Memory Management Hardware
Intrasystem communication and I/O :Peripheral Devices, Input-Output
Controller and I/O driver, IDE for hard disk, I/O port and Bus concept, Bus cycle, Synchronous and asynchronous
transfer, Interrupt handling in PC, Parallel Port, RS – 232 interface, Serial port in PC, Serial I/O interface, Universal
serial bus IEEE 1394, Bus Arbitration Techniques, Uni-bus and multi-bus architectures EISA Bus, VESA Bus.

Module V: Pipelining, Vector Processing and Multiprocessors 15%


Parallel Processing, Pipelining, Arithmetic Pipeline, Instruction Pipeline, RISC Pipeline, Vector Processing, Array
Processors.
Multiprocessors: Characteristics of Multiprocessors, Interconnection Structures, Interprocessor Arbitration,
Interprocessor Communication and Synchronization, Advanced computer architecture, Pentium and Pentinum –Pro,
Power PC Architecture

Student Learning Outcomes:


 Build a firm foundation in hardware fundamentals.
 Understand the organizational structure of computer and its basic operations
 Students will learn the component assembly of CPU and its operational process.
 Design and build Computer Architecture.
 Understand how processing speed can be increased by using parallel processing and multiprocessors.

Pedagogy for Course Delivery:


1. Classroom teaching using White board and Presentations.
2. Assignments and Tutorials for continuous assessment.

List of Professional Skill Development Activities (PSDA):

i. Minor Experiment
ii. Group presentation
iii. Class Quiz
Lab/ Practicals details, if applicable:

List of Experiments:

 Simulation using ORCAD


 To simulate Half Adder circuit
 To simulate Full Adder Circuit
 To simulate the logical part of a simple Arithmetic logical Unit
 To simulate a 4-bit binary adder-subtractor circuit
 Simulation of one digit BCD Adder.
 To simulate and study the tristate buffer
 To simulate the common bus using tri-state buffers and decoder
 To simulate the common bus using multiplexers.
 Study of 8085 Microprocessor
 Study of instruction set of 8085 microprocessor
 Open Ended program :Designing of various type parser

Assessment/ Examination Scheme:

Theory L/T (%) Lab/Practical/Studio (%)

80% 20%

Theory Assessment (L&T):


Continuous Assessment/Internal Assessment End Term
(40 %) Examination
(60%)
Components (Drop Attendance Class Test Assignment Case Study Minor Group Quiz
down) Experiment Presentation

Linkage of PSDA with 4 3 3


Internal Assessment
Component, if any
Weightage (%) 5 10 7 8
60

Lab/ Practical/ Studio Assessment:


Continuous Assessment/Internal Assessment End Term Examination
(40 %) (60 %)

Components (Drop down Attendance Lab Record Performance Viva Practical Viva Total

Weightage (%) 5 10 15 10 30 30 60

Text Reading:
 Morris Mano, Computer System Architecture, 3rd Edition – 1999, Prentice-Hall of India Private Limited.
 Harry & Jordan, Computer Systems Design & Architecture, Edition 2000, Addison Wesley, Delhi

References:
 WIliam Stallings, Computer Organization and Architecture, 4th Edition-2000, Prentice-Hall of India Private Limited.
 Kai Hwang-McGraw-Hill, Advanced Computer Architecture.

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