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Module 1 of DSD

The document discusses combinational logic, which refers to digital logic functions made of gates where the outputs depend only on the current input values. It covers canonical forms, Karnaugh maps, and don't care terms for simplifying boolean functions. Implementation methods include direct mapping to gates or programmable logic devices. Karnaugh maps provide a graphical way to minimize functions through pattern recognition by "looping out" adjacent minterms.

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0% found this document useful (0 votes)
94 views44 pages

Module 1 of DSD

The document discusses combinational logic, which refers to digital logic functions made of gates where the outputs depend only on the current input values. It covers canonical forms, Karnaugh maps, and don't care terms for simplifying boolean functions. Implementation methods include direct mapping to gates or programmable logic devices. Karnaugh maps provide a graphical way to minimize functions through pattern recognition by "looping out" adjacent minterms.

Uploaded by

Rakesh
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Digital Electronics 15ES33

Module -1 Principles of combinational logic-1 Hrs: 10

Definition of combinational logic,Canonical forms, Generation of switching equations from


truth tables,Karnaugh maps-3, 4 and 5 variables, Incompletely specified functions (Don‟tCare
terms), Simplifying Max term equations.

Recommended readings:

1. John M Yarbrough, “Digital Logic Applications and Design”,

Thomson Learning, 2001.

Unit-3.1, 3.2, 3.3, 3.4

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Digital Electronics 15ES33

combinational logic

Also known as "combinatorial logic," it refers to a digital logic function made of


primitive logic gates (AND, OR, NOT, etc.) in which all outputs of the function are directly
related to the current combination of values on its inputs. Any changes to the signals being
applied to the inputs will immediately propagate through the gates until their effects appear at
the outputs. Contrast with sequential logic.

sequential logic

A digital logic function made of primitive logic gates (AND, OR, NOT, etc.) in which
the output values depend not only on the values currently being presented to its inputs, but
also on previous input values. The output depends on a "sequence" of input values. Contrast
with combinational logic.

Canonical Forms

There are two standard or canonical ways of expressing boolean functions:

1. Sum-of-products (SOP).

E.g.

2. Product-of-sums (POS)

E.g.

These representations are useful for

 direct implementation, and

 starting logic function minimization.

We will focus on SOP.

Consider

where

 product terms A, ,

 minterms

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Digital Electronics 15ES33

A minterm is any ANDed term containing all of the varibles (perhaps complemented).

Let's look at the truth table which corresponds to this function:

A B C f(A,B,C)

m0 0 0 0 0

m1 0 0 1 1

m2 0 1 0 0

m3 0 1 1 1

m4 1 0 0 1

m5 1 0 1 1

m6 1 1 0 1

m7 1 1 1 1

(Check this!)

Each row of the truth table corresponds to one of the 2n = 8 possible minterms in n=3
variables.

E.g.

Actually, the truth table specifies the function as a sum of minterms:

This is called the canonical SOP representation of the function f.

The minterm code for n=3 is as follows:

m0 0 0 0

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Digital Electronics 15ES33

m1 0 0 1 C

m2 0 1 0 B

m3 0 1 1 B C

m4 1 0 0 A

m5 1 0 1 A C

m6 1 1 0 A B

m7 1 1 1 A B C

Complemented variables correspond to 0 and un complemented variables correspond to 1.

The function can be put into canonical SOP form algebraically as follows:

(fill in the missing steps!) and so on combining we get as before.

Any Boolean function can be expressed in canonical SOP form.

Simplification and Implementation of Boolean Functions

Boolean functions can be implemented in hardware in a number of ways. For


instance, standard discrete TTL or CMOS ICs could be used, in which case it is useful to find
the simplest expression for the function being implemented. Or if programmable devices are
to be used, then a more direct representation of the function may be useful.

Direct Implementation

Consider the function

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Digital Electronics 15ES33

expressed in canonical SOP form. Then assuming all variables and their complements are
available we can implement this function with the AND-OR circuit of Figure as shown.

Figure : AND/OR implementation.

This implemntation is not minimal in general (i.e. can realize f with fewer gates).

This representation is direct and is useful when implementing with programmable logic
devices (PLD). To illustrate, consider functions f=f(A,B) of two variables (n=2, 2n=4). A
PLD schematic is shown in Figure.

Figure : PLD implementation.

This PLD can program any given function f(A,B) by breaking appropriate links.

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Digital Electronics 15ES33

Karnaugh Maps (K-Maps)

Karnaugh or K- maps are useful tool fot boolean function minimization, and for
visualization of the boolean function. In brief,

 K-maps provide a graphical method for minimizing boolean functions via pattern
recognition forup to about n=6 variables.

 For larger numbers of variables, there are computer algorithms which can yield near-
minimal implementations.

 K-maps are a way of expressing truth tables to make minimization easier. They are
constructed from minterm codes.

Consider the boolean function

The truth table is

A B f

0 0 1 m0

0 1 1 m1

1 0 1 m2

1 1 0 m3

The K-map is shown in Figure .The essence of the K-map is the two dimensional
representation of f, which is equivalent to the truth table but more visual.

To minimize f, we loop out logical adjacencies, Figure .

Figure : K-map showing looped-out terms and also corresponding minterms.

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Digital Electronics 15ES33

Therefore

This is less complex than f in canonical SOP form.

Note. Looping out logical adjacencies is a graphical alternative to algebraic calculations.

Unit distance code (Gray code.) For two bits, the Gray code is:

00 01 11 10

Only one bit changes as you go from left to right. This code preserves logical adjacencies.

The K-map method is to loop out groups of 2n logically adjacent minterms. Each looped out
group corresponds to a product term in a minimal SOP expression.

1.Loop out single 1s (n=0) which have no logical adjacencies.

2.Loop out all pairs of 1s (n=1) which cannot be included in a larger group.

3.Loop out all quads of 1s (n=2) which cannot be included in a larger group.

Etc.

Example. The K-map is shown in Figure.

Figure: K-map for.

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Digital Electronics 15ES33

Moving left to right or up to down in the K-map changes only one digit in the minterm code.
Note the wrap-around at the ends: because of logical adjacency, the top and bottom are
joined, and the left and right are joined.

n=0: none

n=1:

n=2:

Therefore the minimal SOP representation is

Example. The K-map is shown in Figure.

Figure: K-map for.

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Digital Electronics 15ES33

Therefore the minimal SOP representation is

Don't cares. In some applications it doesn't matter what the output is for certain input
values. These are called don't cares.

For instance, in the Binary Coded Decimal code, not all input values occur:

0 0 0 0 0

0 0 0 1 1

0 0 1 0 2

0 0 1 1 3

0 1 0 0 4

0 1 0 1 5

0 1 1 0 6

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Digital Electronics 15ES33

0 1 1 1 7

1 0 0 0 8

1 0 0 1 9

1 0 1 0 10

1 0 1 1 11

1 1 0 0 12

1 1 0 1 13

1 1 1 0 14

1 1 1 1 15

The decimal numbers are those in the range, and a minimum of 4 bits is needed to encode
these.

The remaining numbers correspond to code values which are not used in BCD.

We shall use the symbols or X to denote don't cares.

Don't cares can be exploited to help minimize boolean functions.

Example. The K-map is shown in Figure.

Figure: K-map for.

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Digital Electronics 15ES33

The minimal SOP representation is

KARNAUGH MAPS ( K- MAP)

A method for graphically determining implicants and implicates


of a Boolean function was developed by Veitch and modified by Karnaugh .
The method involves a diagrammatic representation of a Boolean algebra. This
graphic representation is called map.

It is seen that the truth table can be used to represent complete function of
n-variables. Since each variable can have value of 0 or 1. The truth table has 2n
rows. Each rows of the truth table consist of two parts (1) an n-tuple which
corresponds to an assignment to the n-variables and (2) a functional value.

A Karnaugh map (K-map) is a geometrical configuration of 2n


cells such that each of the n-tuples corresponds to a row of a truth table
uniquely locates a cell on the map. The functional values assigned to the n-
tuples are placed as entries in the cells, i.e. 0 or 1 are placed in the
associated cell.

An significant about the construction of K-map is the arrangement of


the cells. Two cells are physically adjacent within the configuration if and
only if their respective n-tuples differ in exactly by one element. So that the
Boolean law x+x=1 cab be applied to adjacent cells. Ex. Two 3- tuples (0,1,1) and
(0,1,0) are physically a djacent since these tuples vary by one element.

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Digital Electronics 15ES33

One variable : One variable needs a map of 21= 2 cells map as shown below

x f(x)

0 f(0)

1 f(1)

TWO VARIABLE : Two variable needs a map of 22 = 4 cells

x y f(x,y)

0 0 f(0,0)

0 1 f(0,1)

1 0 f(1,0)

1 1 f(1,1)

THREE VARIABLE : Three variable needs a map of 23 = 8 cells. The arrangement of


cells are as follows

x y z f(x,y,z)

0 0 0 f(0,0,0)

0 0 1 f(0,0,1)

0 1 0 f(0,1,0)

0 1 1 f(0,1,1)

1 0 0 f(1,0,0)

1 0 1 f(1,0,1)

1 1 0 f(1,1,0)

1 1 1 f(1,1,1)

FOUR VARIABLE : Four variable needs a map of 24 = 16 cells. The arrangement of


cells are as follows

w x y z f(w,x,y,z) w x y z f(w,x,y,z)

0 0 0 0 f(0,0,0,0) 1 0 1 0 f(1,0,1,0)

0 0 0 1 f(0,0,0,1) 1 0 1 1 f(1,0,1,1)

0 0 1 0 f(0,0,1,0) 1 1 0 0 f(1,1,0,0)

0 0 1 1 f(0,0,1,1) 1 1 0 1 f(1,1,0,1)

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Digital Electronics 15ES33

0 1 0 0 f(0,1,0,0) 1 1 1 0 f(1,1,10)

0 1 0 1 f(0,1,0,1) 1 1 1 1 f(1,1,1,1)

0 1 10 f(0,1,1,0)

0 1 11 f(0,1,1,1)

1 0 0 0 f(1,0,0,0)

1 0 0 1 f(1,0,0,1)

Four variable K-map.

0000 0001 0011 0010

0100 0101 0111 1010

1100 1101 1111 1110

1000 1001 1011 1010

Ex. Obtain the minterm canonical formula of the three variable problem given below

f(x, y,z) = x y z+ x y z + x y z + x y z

f(x,y,z) = m(0,2,4,5)

00 01 11 11

1 0 0 1

1 1 0 0

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Digital Electronics 15ES33

Ex. Express the minterm canonical formula of the four variable K-map given below

00 01 11 10

1 1 0 1

1 1 0 0

0 0 0 0

1 0 0 1

f(w,x,y,z) = w x y z + w x y z + w x y z + w x y z + w x y z + w x y z

f(w,x,y,z) =  m(0, 1, 2, 4, 5,

Ex. Obtain the max term canonical formula

(POS) of the three variable problem stated above

f(x,y,z) = ( x + y +z)( x + y +z)(x + y +z) (x + y +z)

f(x,y,z) = M(1,3,6,7)

Ex Obtain the max term canonical formula

(POS) of the four variable problem stated above

f(w,x,y,z) = (w + x + y + z) (w + x + y + z) (w + x + y + z)

(w + x + y + z) (w + x + y + z) (w + x + y + z)

(w + x + y + z) (w + x + y + z) (w + x + y + z)

f(w,x,y,z) = M(3,6,7,9,11,12,13,14,15)

PRODUCT AND SUM TERM REPRESENTATION OF K –MAP

1.The importance of K-map lies in the fact that it is possible to determine the
implicants and implicates of a function from the pattern of 0‟s and 1‟s appearing in
the map. The cell of a K-map has entry of 1‟s is refereed as 1-cell and that of 0,s is
referred as 0-cell.

2. The construction of an n-variable map is such that any set of 1-cells or 0-cells
which form a 2ax2b rectangular grouping describing a product or sum term with n-a-b
variables , where a and b are non-negative no.

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Digital Electronics 15ES33

3. The rectangular grouping of these dimensions referred as Sub cubes. The sub cubes
must be the power of 2 i.e. 2 a+b equals to 1,2,4,8 etc.

4. For three variable and four variable K-map it must be remembered that the edges
are also adjacent cells or sub cubes hence they will be grouped together.

5. Given an n-variable map with a pair of adjacent 1-cells or 0-cellscan result n-1
variable. Where as if a group of four adjacent sub cubes are formed than it can result
n-2 variables. Finally if we have eight adjacent cells are grouped may result n-3
variable product or sum term.

Typical pair of sub cubes

wxz

1 1

1 1 1

Typical group of four adjacent subcubes

1
1 1
1
1 1
1

1 1 1 1

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Digital Electronics 15ES33

Typical group of four adjacent sub cubes.

1 1
1 1

1 1

1 1

Typical group of eight adjacent sub cubes.

1 1 1 1 1 1
1 1 1 1 1 1

1 1

1 1

1 1 1 1
1 1

1 1

1 1
1 1 1 1
1 1

Typical map sub cubes describing sum terms

0 0

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Digital Electronics 15ES33

0 0 0 0

0 0

0 0

0 0 0 0

USING K-MAP TO OBTAIN MINIMAL EXPRESSION FOR COMPLETE


BOOLEAN FUNCTIONS :

How to obtain a minimal expression of SOP or POS of given function is


discussed.

PRIME IMPLICANTS and K-MAPS :

CONCEPT OF ESSENTIAL PRIME IMPLICANT

00 01 11 10

0 0 0 1

0 0 1 1

f(x,y,z)= xy+ yz

ALGORITHM TO FIND ALL PRIME IMPLICANTS

A General procedure is listed below

1. For an n-variable map make 2n entries of 1‟s. or 0‟s.

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Digital Electronics 15ES33

2. Assign I = n , so that find out biggest rectangular group with dimension


2ax2b = 2 n-1.

3. If bigger rectangular group is not possible I = I-1 form the subcubes which
consist of all the previously obtained subcube repeat the step till all 1-cell or 0‟s
are covered.

Remaining is essential prime implicants

1. Essential prime implicants

2. Minimal sums

3. Minimal products

MINIMAL EXPRESSIONS OF INCOMPLETE BOOLEAN FUNCTIONS

1. Minimal sums

2. Minimal products.

EXAMPLE TO ILLUSTRATE HOW TO OBTAIN ESSENTIAL PRIMES

1. f(x,y,z) = m(0,1,5,7)

Ans f(x,y,z) = xz + x y

2. f(w,x,y,z) = m(1,2,3,5,6,7,8,13)

Ans. f(w,x,y,z) = w z +w y+xyz+w x y z

MINIMAL SUMS

f(w,x,y,z)=m(0,1,2,3,5,7,11,15)

MINIMAL PRODUCTS

F(w,x,y,z)=m(1,3,4,5,6,7,11,14,15)

MINIMAL EXPRESSIONS OF INCOMPLETE BOOLEAN FUNCTIONS

f(W,X,Y,Z)=m(0,1,3,7,8,12) +dc(5,10,13,14)

Entered-Variable K-Maps

A generalization of the k-map method is to introduce variables into the k-map squares.
These are called entered variable k-maps. This is useful for functions of large numbers of
variabes, and can generally provide a clear way of representing Boolean functions.

An entered variable k-map is shown in Figure.

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Digital Electronics 15ES33

Figure : An entered variable k-map.

Note the variable C in the top left square. It corresponds to

It can be looped out with the 1, since 1=1+C, and we can loop out the two terms

to get

The remaining term

needs to be added to the cover, or more simply, just loop out the 1. The outcome is

Figure shows another EV k-map, with four entered variables C0, C1, C2, C3. Each of these
terms are different and must be looped out individually to get

Figure: Another entered variable k-map.

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Digital Electronics 15ES33

Recommended question and answer –unit-1

Jan-2009

l a) Convert the given boolean function f(x, y, z) = [x + x Z (y + z)] into maxterm canonical
formula and hence highlight the importance of canonical formul.1.

(5)

f(x,y,z)= x (y + y) (z + z) ;- x y z + x Z (y + y)
= x y z + x Y z + x yz + x Y z + x Y z + x Y z + x Y z
f(x, y, z) = x y z + x Y z + x Y z + x Y z + x Y z + x Y z

1 b) Distinguish the prime implicants and essential prime implicants. Determine the same
of the function
f(w, x, y, z) = I m(O, 1, 4, 5, -9, 11, 13, 15) using K-map and hence the minimal sum
expression.

(5)
Ans. : After grouping the cells, sum terms which appear in the k-map are called prime
implicants groups. It is observed than some cells may appear in only one prime implicant
group, while other cells may appear in more than one prime implicants group. The cells
which appear in only one prime implicant group are called essential cells and corresponding
prime implicants are called essential prime implicants.

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Digital Electronics 15ES33

Jan-2008

Q.l a) Two motors M2 and !v1; are controlled by three sensors 531 52 and 51' One motor M2
is to run any time all three sensors are on. The other motor is to run whenever sensors 52 or
51 but not both are on and 53 is off For all sensor combinations where M1 is an, M2 is to be
off except when all the three sensors are off and then both .motors must remain off Construct
the truth table and write the Boolean output equation.
(6)

b) Simplify using Karnaugh map. Write the Boolean equation and realize using NAND gates

D = f(w, x, y, z) = L (0, 2, .4, 6, 8) + L d(lO, 11, 12, 13, 14, 15).(6)

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Digital Electronics 15ES33

Ans. : D = f(w, x, y, z) = L (0-, 2, 4, 6, 8) + L d(10, 11, 12, 13, 14, 15).

c. Simplify P = f(a, b, c) = L (0,1, 4, 5, 7) using two variable Karnaugh map. Write the
Boolean equation and realize using logic gates
(8)

Q.2 a) Simplify using Karnaugh map L =lea, b, c, d) = 1t (2, 3, 4, 6, 7, 10, 11, 12).
(6)

Ans. : L = f(a, b, c, d) = 1t (2, 3, 4, 6, 7, 10, 11, 12).

Aug 2009

i) T = f(A, B, C) = (A + B + C) (A + B + C) (A + B + C)

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Digital Electronics 15ES33

ii) J = f(A, B, C, D) = (A + B + C + D) (A + B + C + D) (:4 + B + C + D)


(A + B + C + D) (A + B + C + D) (A + B +' C + D) (4)
i) T = f(A, B, C) = (A + B + C) (A + B + C) (A + B + C)
. . . f(A, B, C) = M2 + M3 + M6 = 1t M(2, 3, 6)
ii) J = f(A, B, C, D) = (A + B + C + D) (A + B + C + D) (A + B + C + D)
(A + B + C + D) (A + B + C + D) (A + B + C + D)
= M4 + Ms + Ms + MlO + M12 + M14
= 1t M (4, 5, 8, 10, 12, 14)
b) Reduce the following function using K-map technique and implement using gates.
i) f(P, Q, R, 5) = I,m (0, 1, 4, 8, 9, 10) + d (2, 11)
ii) f(A, B, C D) = 1t m (0, 2, 4, 10, 11, 14, 15) (10)
Ans.: i) (P, Q, R, S) I,ffi (0, 1,4,8,9, 10) + d (2, 11)
f(P, Q, R, S) Q R + P R S + P Q

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Digital Electronics 15ES33

Aug 2008
Q.l a) Simplify the following expression using Kamaugh map. Implement the simpl~l.
circuit using the gates as indicated.
i) !(ABCD) = L m (2, 3, 4, 5, 13, 15) + Lex (8, 9, 10, 11) use only NAND gat~
ii) !(ABCD) = 1t (2, 3, 4, 6, 7, 10, 11, 12) use only NOR gates.
to implement these circuits.
i) f(ABCD) = L m (2, 3, 4, 5, 13, 15) + Lx (8, 9, la, 11)

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Digital Electronics 15ES33

Aug-2007

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Digital Electronics 15ES33

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Digital Electronics 15ES33

b) i) What are the advantage, disadvantages of K map?


ii) Simplify the following function in SOP form using K Map:

Sol. : i) Advantages of K-map method:


1. It provides a systematic approach for simplifying a Boolean expression.
2. It is very convenient method for simplifying a Boolean expression upto six
variables.
Disadvantages of K-map method:
1. As the number of variables increases it is difficult to make judgements about
which combinations form the minimum expression. In case of complex
problem with 7, 8, or even 10 variables it is almost an impossible task to
simplify expression by the mapping method.

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Digital Electronics 15ES33

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Digital Electronics 15ES33

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Digital Electronics 15ES33

Principles of combinational Logic-2

Quine-McCluskey minimization technique- Quine-McCluskey using don‟t care terms,

educed Prime Implicant Tables, Map entered variables

Recommended readings:

1. John M Yarbrough, “Digital Logic Applications and Design”,

Thomson Learning, 2001.

Unit- 3.5, 3.6

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Digital Electronics 15ES33

QUINE – McCLUSKEY METHOD

Using K-maps for simplification of Boolean expressions with more than six
variables becomes a tedious and difficult task. Therefore a tabular method illustrate
below can be used for the purpose.

ALGORITHM FOR GENERATING PRIME IMPLICANTS

The algorithm procedure is listed below

1.Express each minterm of the function in its binary representation.

2. List the minterms by increasing index.

3. Separate the sets of minterms of equal index with lines.

4. Let i = 0.

5. Compare each term of index I with each term of index I+1. For each pair of terms
that can combine which has only one bit position difference.

6. Increase I by 1 and repeat step 5 . The increase of I continued until all terms are
compared. The new list containing all implicants of the function that have one less
variable than those implicants in the generating list.

7. Each section of the new list formed has terms of equal index. Steps 4,5, and 6 are
repeated on this list to form another list. Recall that two terms combine only if they
have their dashes in the same relative positions and if they differ in exactly one bit
position.

8. The process terminates when no new list is formed .

9. All terms without check marks are prime implicants.

Example: Find all the prime implicants of the function

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Digital Electronics 15ES33

f(w,x,y,z) = m(0,2,3,4,8,10,12,13,14)

Step 1: Represent each minter in its 1-0 notation

no. minterm 1-0 notation index

0 wxyz 0000 0

2 wxyz 0010 1

3 wxyz 0011 2

4 wxyz 0100 1

8 wxyz 1000 1

10 wxyz 1010 2

12 wxyz 1100 2

13 wxyz 1101 3

14 wxyz 1110 3

Step 2: List the minterm in increasing order of their index.

No. wxyz index

0 0000 Index 0

2 0010

4 0100 Index 1

8 1000

3 0011

10 1010 Index 2

12 1100

13 1101

14 1110 Index 3

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Digital Electronics 15ES33

Wxyz index

0.2 00–0

0,4 0–00

0,8 - 000
001–
2,3
- 010
2,10 - 100
10–0
4,12
1–00
8,10
1–10
8,12
110–
10,14
11-0
12,13

12,14

wxyz

(0, 2, 8, 10) __ 0 __ 0

(0, 4, 8,12 ) __ __ 0 0(index 0)

(8,10,12,14) 1__ __ 0 (index 1)

F(w,x,y,z)=x z + y z +w z+w x y +w x z

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Digital Electronics 15ES33

PETRICK’S METHOD OF DETERMINING IRREDUNDANT EXPRESSIONS

FIND THE PRIME IMPLICANTS AND IRREDUNDANT EXPRESSION

F(W,X,Y,Z)= M(0,1,2,5,7,8,9,10,13,15)

A=X Y , B= X Z C= Y Z D= X Z

P = (A+B)(A+C) (B)(C+D)(D)(A+B)(A+C)(B)(C+D)(D)

P = (A +C)(BD) = ABD +BCD

F1(W,X,Y,Z)= ABD =X Y +X Z +X Z

F2(W,X,Y,Z) = BCD = X Z + Y Z +X Z

DECIMAL METHOD FOR OBTAINING PRIME IMPLICANTS

The prime implicants can be obtained for decimal number represented minterms.In this
procedure binary number are not used to find out prime implicants

f(w, x,y,z) =m(0,5,6,7,9,10,13,14,15)

fsop= xy +xz+xyz+wyz+w x y z

MAP ENTERED VARIABLE(MEV)

It is graphical approach using k-map to have a variable of order n. Where in we are using a
K-map of n-1 variable while map is entered with ouput function and variable.

f(w,x,y.z) = m(2,3,4,5,13,15) +dc(8,9,10,11)

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Digital Electronics 15ES33

Ans.fsop= w z +x y + w x y

 karnaugh mapping is the best manual technique for boolean equation simplification,
yet when the map sizes exceed five or six variable unwidely.

 the technique called “map entered variables “ ( mevs ) increases the effective size of
a karnaugh maps, allowing a smaller map to handle a greater no. of variables

 the map dimension and the no. of problem variables are related by 2n = m, where
n = no.of problem variable, m = no. of squares in k-maps. mev k-maps permit a cell
to contain a single (x) or a complete switching expression, in addition to the 1s, 0s
and don‟t care terms.

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Digital Electronics 15ES33

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Digital Electronics 15ES33

Recommended question and answer –unit-2

Jan-2009

Q.2 a) Using Quine-Mcluskey method and prime implicant reduction table, obtain the
minimal sum expression for the Boolean function

F(w, x, y, z) = L mO, 4, 6, 7, 8,9, 10, 11, 15). .


(12)

f(w, X, y, z) = L m (I, 4, 6, 7, 8, 9, 10, 11, 15)

:. f(w, x, y, z) = x y z + W x Z + W x + W x Y + x Y z + W Y z

b) Obtain the minimal product of the following Boolean functions using VEM technique:

f(w, x, y, z) = L m (1, 5, 7, 10, 11) + dc (2, 3, 6, 13) . (8)

Ans. : f(w, x, y, z) = L m (1, 5, 7, 10, 11) + dc (2, 3, ,6, 13)

Writing these rninterrns in SOP forills we get,

Now converting 4-variable terill into 3-variable terill we get,

f(w, x, y, z) = illa z + ill1 Z + illl Z + ill2 Z + ill3 Z + ill3 Z + illS Z + illS Z + ill6 Z

= illa Z + illl (z + z) + ill2 Z + ill3 (z + z) + illS (z + z) + ill6'Z

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Applying grouping technique we get,

f(w, x, y, z) = w Z + X Y + w Y + x y Z

Jan-2008

c. Simplify P = f(a, b, c) = L (0,1, 4, 5, 7) using two variable Karnaugh map. Write the
Boolean equation and realize using logic gates (8)

b) Simplify using Quine Mc Cluskey tabulation algorithm -

v = lea, b, c, d) = L (2, 3, 4, 5, 13, 15) + L d (8, 9, 10, 11)


(14)

Ans:

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Final expression

Y= AbC + bCd+ Bc +a B+ aD

Aug-2009

Q.2 a) Using Quine McCluskey method simplify the following function.

f (a, b, c, d) = Lm (0, 1, 2, 3, 8, 9)

S.J.B.I.T , ECE Department Page 46


Digital Electronics 15ES33

b) Write the map entered variable K-map for the Boolean function.

f(w~ X, y, z) = Lm(2, 9, 10, 11, 13, 14, 15)

f(w, X, y, z) = Lm(2, 9, la, 11, 13, 14, 15)

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Aug-2008

Q.2a) .Simplify the logic function given below, using Quine-McCluskey

technique. Y(ABCD) = L m (0, 1, 3, 7, 8, 9, 11, 15). Realize the

expression using universal gates.

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b) Simplify the logic function given below using variable - entered mapping (VEM)

technique. Y (ABeD) = L m (1, 3, 4, 5, 8, 9, 10, 15) + L d (2, 7, 11, 12, 13). (8)

Ans. :

1. Use A, B, C as ordinary K-map variable

2. Make D the map-entered variable

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