HP Pavilion 15 440 G1 Quanta U83 DA0U83MB6E0 Rev-E

5 4 3 2 1
U83 DIS (14"/15.6") Ultra/Slim 01

PCB 6L STACK UP
D
Intel Shark Bay ULT Platform Block Diagram LAYER 1 : TOP
LAYER 2 : SGND D
LAYER 3 : IN1(High)
LAYER 4 : IN2(Low)
VRAM DDR3 x 4 (900 MHz)
AMD Sun XT LAYER 5 : SVCC
128 x 16 x 4, 64 bit
LAYER 6 : BOT
Intel Shark Bay ULT PCI-E Gen3
256 x 16 x 4, 64 bit
DDR3L SODIMM1 Power : 25 (Watt)
DDR3L X4 Lane Max 1GBs PAGE 19
Maxima 8GBs Package : S3
Processor : Daul Core
PAGE 12 Size : 23 x 23 (mm) 27MHz
Power : 15 (Watt) PAGE 16
DDR3L SODIMM2 PAGE 14-18
DDR3L Package : BGA1168
Maxima 8GBs
PAGE 13 Size : 40 X 24 (mm)
RTD2132R LVDS (1CH)
SATA - 1st HDD Package : QFN-32 PAGE 20
SATA0 6GB/s
Package : 9.5 (mm) PAGE 19
Power : PAGE 24 eDP
C C
eDP X1 PAGE 20
mSATA SATA1 6GB/s
Package : 12.7 (mm)
HDMI Conn
Power : PAGE 24
PAGE 20
DP Port 1
SATA ODD SATA2 6GB/s
Package : (mm) USB3.0 Port x 2
USB3.0 InterfaceUSB 3.0 Port 1,2(USB 2.0 Port 0,5)
Power : PAGE 24
PAGE 25
ICT USB2.0 Interface
PAGE 2~10
System BIOS
SPI ROM SPI Interface
Azalia
PAGE 7 USB2.0 Port x 1(Left side) Camera
Port1 Port2
PAGE 21 PAGE 20
LPC Interface PCIE Gen 1 x 1 Lane
B B
EnE KB9010QF A1
Audio Codec Card Reader LAN Controller Halt Mini Card
G-Sensor Embedded Controller ALC3227-GR RTS5237-GR 10/100 RTL8176EH-CG Intel Rambo Peak
SM BUS
HP3DC2TR
PAGE 26 Power : Power : Power :
Power : WLAN / BT Combo
Package : LQPF128 Package : MQFN Package : LQPF48 Package : OFN48
Keyboard
PAGE 25
Size : 14 x 14 (mm) Size : 6 x 6 (mm) Size : 7 x 7 (mm) Size : 6 x 6 (mm)
Touch Pad PAGE 27 PAGE 21 PAGE 23 Int PAGE 22 PAGE 26
TCP-15G24
PAGE 24 FAN
Speaker
PAGE 21
PAGE 24
Combo Jack
A iPHONE type A
PAGE 21
Digital MIC PROJECT :U83

PAGE 21
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
Block Diagram
Date: Monday, March 18, 2013 Sheet 1 of 41
5 4 3 2 1
5 4 3 2 1
<21> IN_D2#
DPB_LANE0_N C54
U19A
DDI1_TXN0 TP89
PROC_DETECT# D61
U19B
PROC_DETECT#
02
MISC
DPB_LANE1_N B58
<21> IN_D1# DDI1_TXN1
DPB_LANE2_N B55 CATERR# K61
<21> IN_D0# DDI1_TXN2 TP91 CATERR#
DPB_LANE3_N A57
<21> IN_CLK# DDI1_TXN3 +1.35VSUS
DPB_LANE0_P C55 EC_PECI N62
<21> IN_D2 DDI1_TXP0 <28> EC_PECI PECI
DPB_LANE1_P C58
<21> IN_D1 DDI1_TXP1
DPB_LANE2_P A55
<21> IN_D0 DDI1_TXP2
DPB_LANE3_P B57
<21> IN_CLK DDI1_TXP3
D R183 D
C51 470_4
C53 DDI2_TXN0
C49 DDI2_TXN1
PCI EXPRESS* - GRAPHICS

A53 DDI2_TXN2
DDI2_TXN3
THERMAL
C50 AV15 SM_DRAMRST# R184 0_4
DDI2_TXP0 SM_DRAMRST# DDR3_DRAMRST# <12,13>
B54
DDI2_TXP1
DDR3
B50 AU60 SM_RCOMP_0 R527 200/F_4
B53 DDI2_TXP2 SM_RCOMP0 AV60 SM_RCOMP_1 R528 121/F_4
DDI2_TXP3 R415 56.2/F_4 PROCHOT# K63 SM_RCOMP1 AU61 SM_RCOMP_2 R526 100/F_4
<28,33> H_PROCHOT# PROCHOT# SM_RCOMP2
eDP_COMPIO and ICOMPO signals should be shorted
near balls and routed with typical impedance <25 mohms AV61
SM_PG_CNTL1 DDR_PG_CNTL <13>
eDP_RCOMP D20
EDP_DISP_UTIL A43 EDP_RCOMP
<6> EDP_DISP_UTIL EDP_DISP_UTIL
INT_eDP_AUXP B45
<20> INT_eDP_AUXP EDP_AUXP TP21
INT_eDP_AUXN A45 J62
<20> INT_eDP_AUXN EDP_AUXN PRDY# XDP_PRDY#_CPU <11>
K62
PREQ# XDP_PREQ#_CPU <11>
eDP
TP25
INT_eDP_TXP0 B46 R397 10K/F_4 E60 XDP_TCK0
<20> INT_eDP_TXP0 eDP_TXP0 PROC_TCK XDP_TCK0 <11>
B47 E61 XDP_TMS_CPU
eDP_TXP1 PROC_TMS XDP_TMS_CPU <11>
C46 PROCPWRGD C61 E59 XDP_TRST#_CPU
eDP_TXP2 TP86 PROCPW RGD PROC_TRST# XDP_TRST#_CPU <7,11>
B49
PWR MANAGEMENT
eDP_TXP3 F63 XDP_TDI_CPU
JTAG & BPM

PROC_TDI XDP_TDI_CPU <11>
F62 XDP_TDO_CPU
PROC_TDO XDP_TDO_CPU <11>
INT_eDP_TXN0 C45
<20> INT_eDP_TXN0 eDP_TXN0
A47
C C47 eDP_TXN1 C
A49 eDP_TXN2
eDP_TXN3
J60
BPM#0 XDP_BPM0 <11>
H60
BPM#1 XDP_BPM1 <11>
*HSW_ULT_DDR3L H61 BPM#2
BPM#2 TP90
H62 BPM#3
BPM#3 TP17
K59 BPM#4
BPM#4 TP24
H63 BPM#5
BPM#5 TP20
K60 BPM#6
BPM#6 TP28
J61 BPM#7
BPM#7 TP22
+VCCIOA_OUT R109 24.9/F_4 eDP_RCOMP
eDP_COMPIO and ICOMPO signals should be shorted

*HSW_ULT_DDR3L
near balls and routed with typical impedance <25 mohms
Processor pull-up (CPU)

H_PROCHOT# R419 62_4 +V1.05S_VCCST
+V1.05S_VCCST
XDP_TDO_CPU R411 51_4
XDP_TMS_CPU R410 *51_4

DEL or not?
B XDP_TDI_CPU R412 *51_4 B
XDP_TRST#_CPU R539 *51_4
XDP_TCK0 R101 51_4
A A
PROJECT :U83
Custom 1A
ULT 1/9(eDP/DDI)
Date: Thursday, March 14, 2013 Sheet 2 of 41
5 4 3 2 1
5 4 3 2 1
<12> M_A_DQ[63:0]
03
<13> M_B_DQ[63:0]
<12> M_A_DQSN[7:0]
<12> M_A_DQSP[7:0]
<13> M_B_DQSN[7:0]
<13> M_B_DQSP[7:0]
Haswell ULT Processor (DDR3L)

D D
U19D
U19C M_A_DQ32 AY31

M_A_DQ33 AW31 SB_DQ0
M_A_DQ0 AH63 M_A_DQ34 AY29 SB_DQ1
M_A_DQ1 AH62 SA_DQ0 M_A_DQ35 AW29 SB_DQ2 AN38
SA_DQ1 SB_DQ3 SB_CLK0 M_B_CLKP0 <13>
M_A_DQ2 AK63 M_A_DQ36 AV31 AM38
SA_DQ2 SB_DQ4 SB_CLK#0 M_B_CLKN0 <13>
M_A_DQ3 AK62 AV37 M_A_CLKP0 <12> M_A_DQ37 AU31 AY49 M_B_CKE0 <13>
M_A_DQ4 AH61 SA_DQ3 SA_CLK0 AU37 M_A_DQ38 AV29 SB_DQ5 SB_CKE0
SA_DQ4 SA_CLK#0 M_A_CLKN0 <12> SB_DQ6
M_A_DQ5 AH60 AU43 M_A_CKE0 <12> M_A_DQ39 AU29
M_A_DQ6 AK61 SA_DQ5 SA_CKE0 M_A_DQ40 AY27 SB_DQ7
M_A_DQ7 AK60 SA_DQ6 M_A_DQ41 AW27 SB_DQ8 AL38
SA_DQ7 SB_DQ9 SB_CLK1 M_B_CLKP1 <13>
M_A_DQ8 AM63 M_A_DQ42 AY25 AK38 M_B_CLKN1 <13>
M_A_DQ9 AM62 SA_DQ8 AY36 M_A_DQ43 AW25 SB_DQ10 SB_CLK#1 AU50
SA_DQ9 SA_CLK1 M_A_CLKP1 <12> SB_DQ11 SB_CKE1 M_B_CKE1 <13>
M_A_DQ10 AP63 AW36 M_A_DQ44 AV27
SA_DQ10 SA_CLK#1 M_A_CLKN1 <12> SB_DQ12
M_A_DQ11 AP62 AW43 M_A_DQ45 AU27
SA_DQ11 SA_CKE1 M_A_CKE1 <12> SB_DQ13
M_A_DQ12 AM61 M_A_DQ46 AV25
M_A_DQ13 AM60 SA_DQ12 M_A_DQ47 AU25 SB_DQ14
M_A_DQ14 AP61 SA_DQ13 M_B_DQ32 AM29 SB_DQ15
M_A_DQ15 AP60 SA_DQ14 M_B_DQ33 AK29 SB_DQ16 AW49
M_B_DQ0 AP58 SA_DQ15 M_B_DQ34 AL28 SB_DQ17 SB_CKE2
M_B_DQ1 AR58 SA_DQ16 AY42 M_B_DQ35 AK28 SB_DQ18
M_B_DQ2 AM57 SA_DQ17 SA_CKE2 M_B_DQ36 AR29 SB_DQ19
M_B_DQ3 AK57 SA_DQ18 M_B_DQ37 AN29 SB_DQ20
M_B_DQ4 AL58 SA_DQ19 M_B_DQ38 AR28 SB_DQ21
M_B_DQ5 AK58 SA_DQ20 M_B_DQ39 AP28 SB_DQ22 AV50
M_B_DQ6 AR57 SA_DQ21 M_B_DQ40 AN26 SB_DQ23 SB_CKE3
M_B_DQ7 AN57 SA_DQ22 AY43 M_B_DQ41 AR26 SB_DQ24
M_B_DQ8 AP55 SA_DQ23 SA_CKE3 M_B_DQ42 AR25 SB_DQ25
M_B_DQ9 AR55 SA_DQ24 M_B_DQ43 AP25 SB_DQ26 AM32
SA_DQ25 SB_DQ27 SB_CS#0 M_B_CS#0 <13>
M_B_DQ10 AM54 M_B_DQ44 AK26 AK32 M_B_CS#1 <13>
M_B_DQ11 AK54 SA_DQ26 AP33 M_B_DQ45 AM26 SB_DQ28 SB_CS#1
SA_DQ27 SA_CS#0 M_A_CS#0 <12> SB_DQ29
M_B_DQ12 AL55 AR32 M_A_CS#1 <12> M_B_DQ46 AK25
C
M_B_DQ13 AK55 SA_DQ28 SA_CS#1 M_B_DQ47 AL25 SB_DQ30 C
M_B_DQ14 AR54 SA_DQ29 M_A_DQ48 AY23 SB_DQ31

AN54 SA_DQ30 AW23 SB_DQ32 TP59
M_B_DQ15 M_A_DQ49
M_A_DQ16 AY58 SA_DQ31 M_A_DQ50 AY21 SB_DQ33 AL32
AW58 SA_DQ32 TP61 AW21 SB_DQ34 SB_ODT0
M_A_DQ17 M_A_DQ51
M_A_DQ18 AY56 SA_DQ33 AP32 M_A_DQ52 AV23 SB_DQ35
M_A_DQ19 AW56 SA_DQ34 SA_ODT0 M_A_DQ53 AU23 SB_DQ36
M_A_DQ20 AV58 SA_DQ35 M_A_DQ54 AV21 SB_DQ37
M_A_DQ21 AU58 SA_DQ36 M_A_DQ55 AU21 SB_DQ38
M_A_DQ22 AV56 SA_DQ37 M_A_DQ56 AY19 SB_DQ39
M_A_DQ23 AU56 SA_DQ38 M_A_DQ57 AW19 SB_DQ40
M_A_DQ24 AY54 SA_DQ39 M_A_DQ58 AY17 SB_DQ41 AW30 M_A_DQSN4
M_A_DQ25 AW54 SA_DQ40 M_A_DQ59 AW17 SB_DQ42 SB_DQSN0 AV26 M_A_DQSN5
M_A_DQ26 AY52 SA_DQ41 AJ61 M_A_DQSN0 M_A_DQ60 AV19 SB_DQ43 SB_DQSN1 AN28 M_B_DQSN4
DDR SYSTEM MEMORY B

M_A_DQ27 AW52 SA_DQ42 SA_DQSN0 AN62 M_A_DQSN1 M_A_DQ61 AU19 SB_DQ44 SB_DQSN2 AN25 M_B_DQSN5
M_A_DQ28 AV54 SA_DQ43 SA_DQSN1 AM58 M_B_DQSN0 M_A_DQ62 AV17 SB_DQ45 SB_DQSN3 AW22 M_A_DQSN6
M_A_DQ29 AU54 SA_DQ44 SA_DQSN2 AM55 M_B_DQSN1 M_A_DQ63 AU17 SB_DQ46 SB_DQSN4 AV18 M_A_DQSN7
AV52 SA_DQ45 SA_DQSN3 AV57 AR21 SB_DQ47 SB_DQSN5 AN21
DDR SYSTEM MEMORY A
M_A_DQ30 M_A_DQSN2 M_B_DQ48 M_B_DQSN6

M_A_DQ31 AU52 SA_DQ46 SA_DQSN4 AV53 M_A_DQSN3 M_B_DQ49 AR22 SB_DQ48 SB_DQSN6 AN18 M_B_DQSN7
M_B_DQ16 AK40 SA_DQ47 SA_DQSN5 AL43 M_B_DQSN2 M_B_DQ50 AL21 SB_DQ49 SB_DQSN7
M_B_DQ17 AK42 SA_DQ48 SA_DQSN6 AL48 M_B_DQSN3 M_B_DQ51 AM22 SB_DQ50
M_B_DQ18 AM43 SA_DQ49 SA_DQSN7 M_B_DQ52 AN22 SB_DQ51
M_B_DQ19 AM45 SA_DQ50 M_B_DQ53 AP21 SB_DQ52
M_B_DQ20 AK45 SA_DQ51 M_B_DQ54 AK21 SB_DQ53 AV30 M_A_DQSP4
M_B_DQ21 AK43 SA_DQ52 M_B_DQ55 AK22 SB_DQ54 SB_DQSP0 AW26 M_A_DQSP5
M_B_DQ22 AM40 SA_DQ53 AJ62 M_A_DQSP0 M_B_DQ56 AN20 SB_DQ55 SB_DQSP1 AM28 M_B_DQSP4
M_B_DQ23 AM42 SA_DQ54 SA_DQSP0 AN61 M_A_DQSP1 M_B_DQ57 AR20 SB_DQ56 SB_DQSP2 AM25 M_B_DQSP5
M_B_DQ24 AM46 SA_DQ55 SA_DQSP1 AN58 M_B_DQSP0 M_B_DQ58 AK18 SB_DQ57 SB_DQSP3 AV22 M_A_DQSP6
M_B_DQ25 AK46 SA_DQ56 SA_DQSP2 AN55 M_B_DQSP1 M_B_DQ59 AL18 SB_DQ58 SB_DQSP4 AW18 M_A_DQSP7
M_B_DQ26 AM49 SA_DQ57 SA_DQSP3 AW57 M_A_DQSP2 M_B_DQ60 AK20 SB_DQ59 SB_DQSP5 AM21 M_B_DQSP6
M_B_DQ27 AK49 SA_DQ58 SA_DQSP4 AW53 M_A_DQSP3 M_B_DQ61 AM20 SB_DQ60 SB_DQSP6 AM18 M_B_DQSP7
M_B_DQ28 AM48 SA_DQ59 SA_DQSP5 AL42 M_B_DQSP2 M_B_DQ62 AR18 SB_DQ61 SB_DQSP7
M_B_DQ29 AK48 SA_DQ60 SA_DQSP6 AL49 M_B_DQSP3 M_B_DQ63 AP18 SB_DQ62
M_B_DQ30 AM51 SA_DQ61 SA_DQSP7 SB_DQ63
B M_B_DQ31 AK51 SA_DQ62 B
SA_DQ63 M_B_A[15:0] <13>
<13> M_B_BS#0
AL35 AP40 M_B_A0
AM36 SB_BA0 SB_MA0 AR40 M_B_A1
M_A_A[15:0] <12> <13> M_B_BS#1 SB_BA1 SB_MA1
AU35 AU36 M_A_A0 AU49 AP42 M_B_A2
<12> M_A_BS#0 SA_BA0 SA_MA0 <13> M_B_BS#2 SB_BA2 SB_MA2
AV35 AY37 M_A_A1 AR42 M_B_A3
<12> M_A_BS#1 SA_BA1 SA_MA1 SB_MA3
AY41 AR38 M_A_A2 AM33 AR45 M_B_A4
<12> M_A_BS#2 SA_BA2 SA_MA2 <13> M_B_CAS# SB_CAS# SB_MA4
AP36 M_A_A3 AM35 AP45 M_B_A5
SA_MA3 <13> M_B_RAS# SB_RAS# SB_MA5
<12> M_A_CAS#
AU34 AU39 M_A_A4 <13> M_B_WE#
AK35 AW46 M_B_A6
AY34 SA_CAS# SA_MA4 AR36 M_A_A5 SB_WE# SB_MA6 AY46 M_B_A7
<12> M_A_RAS# SA_RAS# SA_MA5 SB_MA7
AW34 AV40 M_A_A6 AY47 M_B_A8
<12> M_A_WE# SA_WE# SA_MA6 SB_MA8
AW39 M_A_A7 AU46 M_B_A9
SA_MA7 AY39 M_A_A8 SB_MA9 AK36 M_B_A10
SA_MA8 AU40 M_A_A9 SB_MA10 AV47 M_B_A11
SA_MA9 AP35 M_A_A10 SB_MA11 AU47 M_B_A12
SA_MA10 AW41 M_A_A11 SB_MA12 AK33 M_B_A13
SA_MA11 AU41 M_A_A12 SB_MA13 AR46 M_B_A14
SA_MA12 AR35 M_A_A13 SB_MA14 AP46 M_B_A15
SA_MA13 AV42 M_A_A14 SB_MA15
SA_MA14 AU42 M_A_A15
SA_MA15
AP49 SM_VREF SM_VREF <12>
SM_VREF_CA AR51 SMDDR_VREF_DQ0_M3
SM_VREF_DQ0 SMDDR_VREF_DQ0_M3 <12> ICT
AP51 SMDDR_VREF_DQ1_M3 SMDDR_VREF_DQ1_M3 <13> *HSW_ULT_DDR3L
SM_VREF_DQ1
*HSW_ULT_DDR3L
20mils width
A A
PROJECT :U83
Custom 1A
ULT 2/9 (DDR3 I/F)
5 4 3 2 1
5 4 3 2 1
POWER
04
U19F
32A 1.4A
+1.35VSUS CFG0-19 need Reserve TP U19E
+VCC_CORE CFG0 TP53 CFG0 AC60

Close to CPU <11> CFG0
CFG1 TP51 CFG1 AC62 CFG0 A51 TP80
C36 AH26 <11> CFG1 AC63 CFG1 RSVD_TP B51
CFG2 TP63 CFG2 TP83
C40 VCC VDDQ AJ31 <11> CFG2 AA63 CFG2 RSVD_TP
CFG3 TP96 CFG3
C44 VCC VDDQ AJ33 <11> CFG3 AA60 CFG3
CFG4 TP58 CFG4
C48 VCC VDDQ AJ37 <11> CFG4 Y62 CFG4 L60
C560 C561 C559 C562 C556 C563 CFG5 TP48 CFG5 TP27
C52 VCC VDDQ AN33 <11> CFG5 Y61 CFG5 RSVD_TP
C469 C224 C221 C201 10U/6.3V_6 10U/6.3V_6 10U/6.3V_6 10U/6.3V_6 10U/6.3V_6 10U/6.3V_6 CFG6 TP54 CFG6
C56 VCC VDDQ AP43 <11> CFG6 Y60 CFG6
22U/6.3VT_8 22U/6.3VT_8 22U/6.3VT_8 22U/6.3VT_8 CFG7 TP41 CFG7
E23 VCC VDDQ AR48 <11> CFG7 V62 CFG7 N60
CFG8 TP35 CFG8
E25 VCC VDDQ AY35 <11> CFG8 V61 CFG8 RSVD W23
CFG9 TP34 CFG9
E27 VCC VDDQ AY40 <11> CFG9 V60 CFG9 RSVD Y22
CFG10 TP49 CFG10
E29 VCC VDDQ AY44 <11> CFG10 U60 CFG10 RSVD
CFG11 TP43 CFG11
E31 VCC VDDQ AY50 Direct tie to CPU VCC/VSS-Ball <11> CFG11
CFG12 TP36 CFG12 T63 CFG11 AY15 PROC_OPI_RCOMP
D VCC VDDQ <11> CFG12 CFG12 PROC_OPI_RCOMP D
E33 CFG13 TP31 CFG13 T62
E35 VCC <11> CFG13 T61 CFG13
C234 C199 C222 C471 CFG14 TP30 CFG14
E37 VCC <11> CFG14 T60 CFG14
22U/6.3VT_8 22U/6.3VT_8 22U/6.3VT_8 22U/6.3VT_8 CFG15 TP42 CFG15
RESERVED
E39 VCC <11> CFG15 AA62 CFG15
C552 C550 C554 C551 CFG16 TP16 CFG16
E41 VCC <11> CFG16 AA61 CFG16 AV62
2.2U/6.3V_4 2.2U/6.3V_4 2.2U/6.3V_4 2.2U/6.3V_4 CFG17 TP15 CFG17 R523
E43 VCC <11> CFG17 U63 CFG17 RSVD D58
CFG18 TP37 CFG18 49.9/F_4
E45 VCC <11> CFG18 U62 CFG18 RSVD
CFG19 TP39 CFG19
E47 VCC <11> CFG19 CFG19
E49 VCC R448
C223 C214 C235 C466 E51 VCC 49.9/F_4 CFG_RCOMP V63
22U/6.3VT_8 22U/6.3VT_8 22U/6.3VT_8 22U/6.3VT_8 E53 VCC +1.05V +VCCIO_OUT CFG_RCOMP
E55 VCC P22
E57 VCC D63 R458 *0_8 A5 VSS N21
F24 VCC VSS P62 RSVD VSS
F28 VCC VSS T59 E1
F32 VCC RSVD AD60 D1 RSVD
F36 VCC RSVD AD59 C516 J20 RSVD
C212 C237 C475 C492 F40 VCC RSVD AA59 4.7U/6.3V_6 H18 RSVD P20
22U/6.3VT_8 22U/6.3VT_8 22U/6.3VT_8 22U/6.3VT_8 F44 VCC RSVD AE60 RSVD RSVD
F48 VCC RSVD AC59 R385 TD_IREF B12 R20
F52 VCC RSVD AG58 8.2K/F_4 TD_IREF RSVD
F56 VCC RSVD U59
G23 VCC RSVD V59 AV63
G25 VCC RSVD TP108 AU63 RSVD_TP
G27 VCC TP104 RSVD_TP
HSW ULT POWER

C236 C213 C200 C211 G29 VCC
22U/6.3VT_8 22U/6.3VT_8 22U/6.3VT_8 22U/6.3VT_8 G31 VCC +V1.05S_VCCST
G33 VCC C63
VCC TP88 RSVD_TP
G35 Layout note: need routing TP87
C62
G37 VCC R431 B43 RSVD_TP
G39 VCC A59 together and ALERT need RSVD
G41 VCC VCCIO_OUT +VCCIO_OUT
between CLK and DATA.
75/F_4
SVID ALERT
G43 VCC E20 *HSW_ULT_DDR3L
VCC VCCIOA_OUT +VCCIOA_OUT
C245 C187 C198 G45 H_CPU_SVIDALRT# R422 43_4 VR_SVID_ALERT# <33>
22U/6.3VT_8 22U/6.3VT_8 22U/6.3VT_8 G47 VCC
C VCC C
G49
G51 VCC C518 *0.1U/10V_4
G53 VCC
G55 VCC
G57 VCC
H23 VCC
VCC VIDALERT#
L62 H_CPU_SVIDALRT#
+3VPCU
IO Thrm Protect
C178 C179 C182 J23 N63 VR_SVID_CLK
22U/6.3VT_8 22U/6.3VT_8 22U/6.3VT_8 K23 VCC VIDSCLK L63 H_CPU_SVIDDAT
K57 VCC VIDSOUT SVID CLK
L22 VCC H59 PWR_DEBUG
M23 VCC PWR_DEBUG# PWR_DEBUG <11>
VR_SVID_CLK
For 65 degree, 1.8v limit, (SW)
VCC VR_SVID_CLK <33>
M57 TP14 R78
P57 VCC
U57 VCC F60 16.5K/F_4
VCC VR_EN H_VR_ENABLE_MCP <33> +V1.05S_VCCST
C486 C467 C468 C502 W57 C59
VCC VR_READY THRM_MOINTOR <28>
*22U/6.3VS_8 *22U/6.3VS_8 *22U/6.3VS_8 *22U/6.3VS_8 AB57 Place PU resistor
VCC
2
AD57 IMVP_PWRGD_R IMVP_PWRGD_R <28> close to VR
AG57 VCC C145
C24 VCC R398 10K_4 R105 0_4 0.1U/10V_4
IMVP_PWRGD <6,33>
1
C28 VCC R414
C32 VCC AC22 D1 *RB501V-40 130/F_4 SVID DATA R76
VCC VCCST AE22 2 1
VCCST +V1.05S_VCCST
AE23 H_CPU_SVIDDAT R421 *0_4/S 3.3K/F_4
VCCST VR_SVID_DATA <33>
F59 For 75 degree, 1.2v limit, (HW)
VCC
B59 H_VCCST_PWRGD_R R399 0_4 H_VCCST_PWRGD
VCCST_PWRGD THRM_MOINTOR1 <28>
L59
RSVD
2
J58 R509
N58 RSVD C135
RSVD 0_4
AC58 0.1U/10V_4
1
AB23 RSVD P60 TP44 +V1.05S_VCCST
AD23 RSVD RSVD_TP P61 TP40
AA23 RSVD RSVD_TP N59 TP32 THER_CPU
AE59 RSVD RSVD_TP N61 TP38
B RSVD RSVD_TP B
AT2 R402 R504
AU44 RSVD 10K_4 100K_4 NTC
AV44 RSVD 100- ±1% pull-up to VCC near processor.
D15 RSVD R408 100/F_4 +VCC_CORE
F22 RSVD
H22 RSVD E63
RSVD VCC_SENSE VCC_SENSE <33>
J21
N23 RSVD E62 D14 1 2 RB501V-40
RSVD VSS_SENSE VSS_SENSE <33> <11,28,30,31,32> HWPG H_VCCST_PWRGD <11> +1.05V +V1.05S_VCCST
R23
T23 RSVD R413 100/F_4
U10 RSVD R459 0_8
AL1 RSVD
AM11 RSVD C508
AP7 RSVD C514 C513
RSVD *10P/50V_4
AU10
AU15 RSVD *1U/6.3V_4 *22U/6.3V_8
RSVD
AW14 TP111
RSVD AY14 TP110
RSVD
+V1.05S_VCCST
*HSW_ULT_DDR3L
R401
150/F_4
PWR_DEBUG
Processor Strapping The CFG signals have a default value of '1' if not terminated on the board.
R400
A *10K_4 A
1 0 Circuit
CFG3
Disable: Enable: Set DFX Enable in DFX interface MSR CFG3 R452 *1K_4
(Physcial Debug Enable)
DFX Privacy
CFG4
Disable; No physical DP attached to eDP Enable; An ext DP device is connected to eDP CFG4 R143 1K_4
(DP Presence Strap)
+VCCIOA_OUT
+VCCIO_OUT
<2>
<6>
PROJECT :U83
+1.5V <10,22,25,27,31>
+1.35VSUS <2,12,13,25,32> Custom
04 -- ULT 3/9 (POWER-1) 1A
+1.05V <7,10,11,27,28,31,34>
+VCC_CORE <33>
5 4 3 2 1
5 4 3 2 1
U19I
05
U19H
U19G
D33 H17
A11 AJ35 D34 VSS VSS H57
A14 VSS VSS AJ39 AP22 AV59 D35 VSS VSS J10
A18 VSS VSS AJ41 AP23 VSS VSS AV8 D37 VSS VSS J22
A24 VSS VSS AJ43 AP26 VSS VSS AW 16 D38 VSS VSS J59
A28 VSS VSS AJ45 AP29 VSS VSS AW 24 D39 VSS VSS J63
A32 VSS VSS AJ47 AP3 VSS VSS AW 33 D41 VSS VSS K1
A36 VSS VSS AJ50 AP31 VSS VSS AW 35 D42 VSS VSS K12
A40 VSS VSS AJ52 AP38 VSS VSS AW 37 D43 VSS VSS L13
D A52 VSS VSS AJ58 AP52 VSS VSS AW 42 D47 VSS VSS L18 D
AA1 VSS VSS AJ63 AP57 VSS VSS AW 47 D5 VSS VSS L58
AA58 VSS VSS AK23 AR11 VSS VSS AW 50 D50 VSS VSS L61
AB10 VSS VSS AK3 AR15 VSS VSS AW 51 D51 VSS VSS L7
AB20 VSS VSS AK52 AR17 VSS VSS AW 59 D53 VSS VSS M22
AB22 VSS VSS AL10 AR23 VSS VSS AW 60 D54 VSS VSS N10
AB7
AC61
VSS
VSS
VSS
VSS
VSS
VSS
AL13
AL17
AR31
AR33
VSS
VSS
VSS
VSS
VSS
VSS
AY11
AY16
D55
D57
VSS
VSS
VSS
VSS VSS
VSS
VSS
N3
P59
AD21 AL20 AR39 AY18 D59 P63
AD3 VSS VSS AL22 AR43 VSS VSS AY22 D62 VSS VSS R10
AD63 VSS VSS AL23 AR49 VSS VSS AY24 D8 VSS VSS R22
AE10 VSS VSS AL26 AR5 VSS VSS AY26 E11 VSS VSS R8
AE5 VSS VSS AL29 AR52 VSS VSS AY30 E17 VSS VSS T1
AE58 VSS VSS AL31 AT13 VSS VSS AY33 F20 VSS VSS T58
AF11 VSS VSS AL33 AT35 VSS VSS AY4 F26 VSS VSS U20
AF17 VSS VSS AL45 AT43 VSS VSS AY59 F42 VSS VSS V10
AF18 VSS VSS AL46 AT46 VSS VSS AY6 F46 VSS VSS V3
AG1 VSS VSS AL51 AT49 VSS VSS B20 F50 VSS VSS V7
AG11 VSS VSS AL52 AT61 VSS VSS B24 F54 VSS VSS W 20
AG21 VSS VSS AL54 AT62 VSS VSS B26 F58 VSS VSS W 22
AG23 VSS VSS AL57 AT63 VSS VSS B28 F61 VSS VSS Y10
AG60 VSS VSS AL60 AU1 VSS VSS B32 G18 VSS VSS Y59
AG61
AG62
VSS
VSS
VSS VSS
VSS
VSS
VSS
AL61
AM1
AU16
AU18
VSS
VSS
VSS
VSS VSS
VSS
VSS
B36
B4
G22
G3
VSS
VSS
VSS
VSS
VSS
VSS
Y63
V58
AG63 AM17 AU20 B40 G5 AH46
AH17 VSS VSS AM23 AU22 VSS VSS B44 G6 VSS VSS V23
C AH19 VSS VSS AM31 AU24 VSS VSS B48 G8 VSS VSS AH16 C
AH20 VSS VSS AM52 AU26 VSS VSS B52 H13 VSS VSS
AH22 VSS VSS AN17 AU28 VSS VSS B56 VSS
AH24 VSS VSS AN23 AU30 VSS VSS B60
AH28 VSS VSS AN31 AU33 VSS VSS C11
AH38 VSS VSS AN40 AU59 VSS VSS C27 DC_TEST_AY2_AW2 AY2 A3 DC_TEST_A3_B3
AH40 VSS VSS AN42 AV14 VSS VSS C38 DC_TEST_AY3_AW3 AY3 DAISY_CHAIN_NTCF_AY2 DAISY_CHAIN_NTCF_A3 A4 TEST_A4 TP79
AH42 VSS VSS AN43 AV16 VSS VSS C39 TP109 TEST_AY60 AY60 DAISY_CHAIN_NTCF_AY3 DAISY_CHAIN_NTCF_A4 A60 TEST_A60 TP85
AH44 VSS VSS AN45 AV20 VSS VSS C57 DC_TEST_AY61_AW61 AY61 DAISY_CHAIN_NTCF_AY60 DAISY_CHAIN_NTCF_A60 A61 DC_TEST_A61_B61
AH49 VSS VSS AN46 AV24 VSS VSS D12 DC_TEST_AY62_AW62 AY62 DAISY_CHAIN_NTCF_AY61 DAISY_CHAIN_NTCF_A61 A62 TEST_A62 TP84
AH51 VSS VSS AN48 AV28 VSS VSS D14 TEST_B2 B2 DAISY_CHAIN_NTCF_AY62 DAISY_CHAIN_NTCF_A62 AV1 TEST_AV1 TP102
AH53 VSS VSS AN49 AV33 VSS VSS D18 TP78 DC_TEST_A3_B3 B3 DAISY_CHAIN_NTCF_B2 DAISY_CHAIN_NTCF_AV1 AW 1 TEST_AW1 TP105
AH55 VSS VSS AN51 AV34 VSS VSS D2 DC_TEST_A61_B61 B61 DAISY_CHAIN_NTCF_B3 DAISY_CHAIN_NTCF_AW 1 AW 2 DC_TEST_AY2_AW2
AH57 VSS VSS AN52 AV36 VSS VSS D21 DC_TEST_B62_B63 B62 DAISY_CHAIN_NTCF_B61 DAISY_CHAIN_NTCF_AW 2 AW 3 DC_TEST_AY3_AW3
AJ13 VSS VSS AN60 AV39 VSS VSS D23 B63 DAISY_CHAIN_NTCF_B62 DAISY_CHAIN_NTCF_AW 3 AW 61DC_TEST_AY61_AW61
AJ14 VSS VSS AN63 AV41 VSS VSS D25 DC_TEST_C1_C2 C1 DAISY_CHAIN_NTCF_B63 DAISY_CHAIN_NTCF_AW 61 AW 62DC_TEST_AY62_AW62
AJ23 VSS VSS AN7 AV43 VSS VSS D26 C2 DAISY_CHAIN_NTCF_C1 DAISY_CHAIN_NTCF_AW 62 AW 63TEST_AW63 TP107
AJ25 VSS VSS AP10 AV46 VSS VSS D27 DAISY_CHAIN_NTCF_C2 DAISY_CHAIN_NTCF_AW 63
AJ27 VSS VSS AP17 AV49 VSS VSS D29
AJ29 VSS VSS AP20 AV51 VSS VSS D30
VSS VSS AV55 VSS VSS D31
VSS VSS
ICT
*HSW_ULT_DDR3L
*HSW_ULT_DDR3L
B *HSW_ULT_DDR3L B
A A
PROJECT :U83
Custom 1A
ULT 4/9 (RSV,GND)
5 4 3 2 1
5 4 3 2 1
Lynx Point-LP Platform Controller Hub (LVDS,DDI)

U19M 06
SIDEBAND
PCH_LVDS_BLON A9
<20> PCH_LVDS_BLON EDP_BKLEN
PCH_DISP_ON C6
<20> PCH_DISP_ON EDP_VDDEN
PCH_DPST_PWM B8
D
<20> PCH_DPST_PWM EDP_BKLCTL D
R379 *0_4 B9 SDVO_CLK

<2> EDP_DISP_UTIL DDPB_CTRLCLK SDVO_CLK <21>
C9 SDVO_DATA
EDP
DDPB_CTRLDATA SDVO_DATA <21>
INT. HDMI
Need Check!
C5
DDPB_AUXN B5
DDPB_AUXP C8 HDMI_HPD_CON
DDPB_HPD HDMI_HPD_CON <21>
U19L
DSWVRMEN <7>
SUSWARN# R480 *0_4 SUSACK# For DS3 -->Ra
for DS3 AW 7 DSWVRMEN
Non-DS3 -->Rb
System Power Management

DSW VRMEN
Ra
R543 0_4 DPWROK_EC
DPWROK_EC <28>
R472 0_4 SUSACK# AK2 AV5 DPWROK R542 *0_4 RSMRST#
<28> SUSACK#_EC SUSACK# DPW ROK
DISPLAY
Rb D9
DDPC_CTRLCLK D11
SYS_RESET# AC3 AJ5 PCIE_WAKE# DDPC_CTRLDATA
<11> SYS_RESET# SYS_RESET# W AKE# PCIE_WAKE# <23,24,27,28>
C531 *0.1U/10V_4 B6
AG2 V5 CLKRUN# DDPC_AUXN A6
<11> SYS_PWROK SYS_PW ROK CLKRUN#/ GPIO32 CLKRUN# <25,28> DDPC_AUXP A8
DDPC_HPD
EC_PWROK AY7 AG4 SUS_STAT# TP50
<28> EC_PWROK PCH_PW ROK SUS_STAT# / GPIO61 (SUS)
C C
EC_PWROK AB5 AE6 PCH_SUSCLK_L R116 *0_4/S
APW ROK SUSCLK / GPIO62 (SUS) PCH_SUSCLK <28>
TP26
PLTRST# AG7 AP5
PLTRST# SLP_S5# / GPIO63 ( DSW ) SLP_S5# <11>
AJ6
SLP_S4# SUSC# <11,28>
for DS3 RSMRST# AW 6
<28> RSMRST# RSMRST#
R479 0_4 SUSWARN# AV4 AT4
<28> SUSWARN#_EC SUSW ARN#/SUSPW RDNACK/GPIO30(SUS) SLP_S3# SUSB# <11,28>
TP55
R164 0_4 DNBSWON#_R AL7 AL5 for DS3
<11,28> DNBSWON# PW RBTN# SLP_A# SLP_A# <11>
D6 INT_eDP_HPD_Q
EDP_HPD
R138 0_4 AC_PRESENT_R AJ8 AP4 SLP_SUS# R142 0_4 SLP_SUS#_EC
<28> AC_PRESENT_EC ACPRESENT / GPIO31(DSW ) SLP_SUS# SLP_SUS#_EC <28>
PM_BATLOW# AN4
BATLOW # / GPIO72(DSW )
PCH_SLP_S0_N AF3 AJ7 SLP_LAN# TP69
<11,28> PCH_SLP_S0_N SLP_S0# SLP_LAN#
PCH_SLP_WLAN_N AM5
TP62 SLP_W LAN#/ GPIO29(DSW )
*HSW_ULT_DDR3L *HSW_ULT_DDR3L
B B
PCH Pull-high/low(CLG) PLTRST#(CLG) System PWR_OK(CLG)

+3VS5 <7,8,9,10,11,12,13,14,20,21,22,23,24,25,26,27,28,33,34,35> +3V
<9,10,11,25,27,30,31,34,35,36> +3VS5
PM_BATLOW# R156 10K_4
Check Q2010 Rise/Fall time less than 100ns
PCIE_WAKE# R131 1K_4 PLTRST#
PLTRST# <11,14,23,24,25,27,28>
R453 100K_4
Change to 1k for LAN wake from OBFF state issue
+3VS5
+3V_DEEP_SUS
Reserve EDP_HPD opposites circuit! C522 *0.1U/10V_4
SUSACK# R471 10K_4 for DS3 +VCCIO_OUT

SUSWARN# R478 10K_4
5
Check SUSWARN# need PU? R449 0_4
2
IMVP_PWRGD <4,33>
PWRBTN# internally PU in PCH to 3.3V_DSW R468 DG V0.7 -> 10K SYS_PWROK 4
DNBSWON#_R R163 *10K_4 *10K/F_4 1 EC_PWROK
AC_PRESENT_R R137 *10K_4 Q33 *2N7002
SCH V0.7 -> 1K
+3VS5
U17
3
+3V INT_eDP_HPD_Q 1 3 INT_eDP_HPD R497 0_4 *TC7SH08FU R430
10K_4
3
A A
SYS_PWROK R481 *1K_4
2
+5V
CLKRUN# R121 8.2K/F_4 2
ULT_EDP_HPD <20,21>
SYS_RESET# R119 10K_4 R447 0_4
R123 *1K_4
R442
*100K_4
R500
*100K_4 Q36 R501
PROJECT :U83
1
RSMRST# R541 10K_4

*2N7002 100K_4
RTD2132R Vender request PD 100kohm
DPWROK_EC R544 100K_4 Size Document Number Rev
Custom 1A
ULT 5/9(Power Manger)
5 4 3 2 1
5 4 3 2 1
Lynx Point-LP Platform Controller Hub
RTC_X1 AW 5
(HDA,JTAG,SATA)
U19J
RTCX1 LAD0
AU14
AW 12
LAD0
LAD1
<25,27,28>
<25,27,28>
+1.05V +1.05VS5
RTC Clock 32.768KHz
R494 0_4
CLKGEN_RTC_X1 <27>
07
RTC_X2 AY5 LAD1 AY12 R476 *0_4 R473 *51_4 JTAGX_PCH C530 *18P/50V_4 RTC_X1
RTCX2 LAD2 LAD2 <25,27,28>
AW 11
LAD3 LAD3 <25,27,28>
2
1
RTC_RST# AU7 R469 51_4 JTAG_TMS_PCH
<11> RTC_RST# RTCRST# AV12
LFRAME# LFRAME# <25,27,28>
SRTC_RST# AV6 R460 51_4 JTAG_TDI_PCH Y4 R483
SRTCRST# *32.768KHZ *10M_4
D
+3V_RTC R521 1M_4 SM_INTRUDER# AU6 R487 51_4 JTAG_TDO_PCH D
3
4
INTRUDER#
LPC
RTC
C534 *18P/50V_4 RTC_X2
PCH_INVRMEN AV7 R477 *51_4 JTAG_TCK_PCH
INTVRMEN
Close to Chipset
J5 SATA_RXN0
ACZ_BCLK AW 8
HDA_BCLK / I2S0_SCLK
SATA_RN0/ PERN6_L3
SATA_RP0/ PERP6_L3
H5
B15
SATA_RXP0
SATA_TXN0
SATA_RXN0
SATA_RXP0
<25>
<25>
no stuff If use green Clock
AV11 SATA_TN0/ PETN6_L3 A15 SATA_TXN0 <25>
ACZ_SYNC SATA_TXP0
HDA_SYNC/ I2S0_SFRM SATA_TP0/ PETP6_L3 SATA_TXP0 <25> HDD0 (SATA3 6.0Gb/s)
J8 SATA_RXN1 30mils
ACZ_RST# AU8
SATA_RN1/ PERN6_L2
SATA_RP1/ PERP6_L2
H8
A17
SATA_RXP1
SATA_TXN1
SATA_RXN1
SATA_RXP1
<25>
<25>
RTC Circuitry(RTC) +3V_RTC
HDA_RST#/ I2S_MCLK SATA_TN1/ PETN6_L2 B17 SATA_TXP1
SATA_TXN1 <25> mSATA (SATA4 6Gb/s) R341
SATA_TP1/ PETP6_L2 SATA_TXP1 <25>
RTC_RST#
AY10 J6 SATA_RXN2
<22> ACZ_SDIN0 HDA_SDIN0/ I2S0_RXD SATA_RN2/ PERN6_L1 SATA_RXN2 <24>
H6 SATA_RXP2 20K/F_4
SATA_RP2/ PERP6_L1 SATA_RXP2 <24>
AUDIO
AU12 B14 SATA_TXN2
HDA_SDIN1/ I2S1_RXD SATA_TN2/ PETN6_L1 C15 SATA_TXP2
SATA_TXN2 <24> ODD (SATA3 6.0Gb/s) RTC Power trace width 20mils. C462
SATA_TP2/ PETP6_L1 SATA_TXP2 <24>
ACZ_SDOUT AU11 1U/6.3V_4
HDA_SDO/ I2S0_TXD F5 +3V_RTC_0 R347
AW 10 SATA_RN3/ PERN6_L0 E5 20K/F_4
HDA_DOCK_EN# / I2S1_TXD SATA_RP3/ PERP6_L0 +3VPCU
C17 R346 SRTC_RST#
AV10 SATA_TN3/ PETN6_L0 D17 +3V_RTC_0 *1K_4 +3V_RTC_1
HDA_DOCK_RST/ I2S1_SFRM SATA_TP3/ PETP6_L0 D9
1
AY8 *BAT54C C464
I2S1_SCLK CN18 C463
BAT_CONN *1U/6.3V_4 1U/6.3V_4
TP97
2
XDP_TRST#_CPU AU62 V1 ACC_LED#
C <2,11> XDP_TRST#_CPU PCH_TRST# SATA0GP/ GPIO34 ACC_LED# <22> C
JTAG_TCK_PCH AE62 U1 SIO_EXT_SMI#
TP95 Uninstall for Green-CLK
<11> JTAG_TCK_PCH PCH_TCK SATA1GP/ GPIO35 SIO_EXT_SMI# <28>
RTC_RST# R345 *0_6 SRTC_RST#
JTAG_TDI_PCH AD61 V6 PCI_SERR#
<11> JTAG_TDI_PCH PCH_TDI SATA2GP/ GPIO36 PCI_SERR# <28>
TP93
JTAG_TDO_PCH AE61 AC1 SATA3GP
<11> JTAG_TDO_PCH PCH_TDO SATA3GP/ GPIO37 TP101
HDA Bus(CLG) GPIO Pull UP
+3V
JTAG
JTAG_TMS_PCH AD62
<11> JTAG_TMS_PCH PCH_TMS
AL11 C12 SATA_RCOMP R391 3.01K/F_4 ACC_LED# R454 10K_4
RSVD SATA_RCOMP +V1.05S_ASATA3PLL
AC4 SIO_EXT_SMI# R106 10K_4
RSVD R533 33_4 ACZ_SYNC PCI_SERR# R420 10K_4
<22> ACZ_SYNC_AUDIO
AE63
SATA
JTAGX_PCH SATA3GP R474 10K_4

<11> JTAGX_PCH AV2 JTAGX
DG recommended that SATA AC coupling capacitors should be R535 33_4 ACZ_RST#
RSVD <22> ACZ_RST#_AUDIO
TP70 close to the connector (<100 mils) for optimal signal quality.
R530 33_4 ACZ_SDOUT
<22> ACZ_SDOUT_AUDIO
PCH_SPI1_CLKAA3 A12 SATA_IREF R362 0_6
SPI_CLK SATA_IREF R532 33_4 ACZ_BCLK
<22> BIT_CLK_AUDIO
PCH_SPI_CS0# Y7 R450 10K_4 +3V
SPI_CS0#
Y4 C553
AC2 SPI_CS1# U3 *10P/50V_4
SPI_CS2# SATALED# SATA_LED# <22>
PCH_SPI1_SI AA2
SPI_MOSI L11 R181 *1K_4 ACZ_SYNC
RSVD +3V_DEEP_SUS
SPI
PCH_SPI1_SO AA4 K10

SPI_MISO RSVD
PCH_SPI_IO2 Y6
PCH_SPI_IO3 AF1 SPI_IO2
SPI_IO3
B
PCH Strap Table *HSW_ULT_DDR3L
B
Pin Name Strap description Sampled Configuration Circuit

0 = Default (weak pull-down 20K) Vender Size P/N
SPKR No reboot mode setting PWROK 1 = Setting to No-Reboot mode +3V R455 *1K_4 SPKR
SPKR <9>
PCH SPI ROM(CLG)
AMIC 8MB AKE3EFN0800 (A25LQ64M-F)
0 = "top-block swap" mode R376 *1K_4
SDIO_D0 /GPIO66 Top-Block Swap PWROK 1 = Default (weak pull-up 20K) R375 *1K_4 Winbond 8MB AKE3EFP0N07 (W25Q64FVSSIQ)
GPIO66_ULT <9>
PCH_INVRMEN
GigaDevice 8MB AKE3EGN0Q01 (GD25B64BSIGR)
INTVRMEN Integrated 1.05V VRM enable ALWAYS Should be always pull-up +3V_RTC R519 330K_4
Socket DFHS08FS023
Flash Descriptor Security 0 = Default (weak pull-down 20K) ACZ_SDOUT PCH_SPI_CS0#_R
HDA_SDO /I2S0_TXD Only for Interposer PWROK 1 = Can be Overridden R182 1K_4
<28> GPIO33_EC TP12
PCH_SPI1_CLK_R
TP19
PCH_SPI1_SI_R
GNT0# Boot Location TP66-71 need place to TOP TP11 PCH_SPI1_SO_R
TP10
GSPI0_MOSI /GPIO86 Boot BIOS Selection PWROK 1 LPC BIOS_WP# R438 0_4
TP13 +3V_DEEP_SUS
0 SPI(Default) HOLD#
TP18
U15
PCH_SPI_CS0# R386 15/F_4 PCH_SPI_CS0#_R 1 8 +3VSPI
PCH_SPI1_CLK R441 15/F_4 PCH_SPI1_CLK_R 6 CE# VDD
0 = ME Crypto Transport Layer Security PCH_SPI1_SI R436 PCH_SPI1_SI_R 5 SCK
GPIO15 TLS Confidentiality PWROK 15/F_4 R451 3.3K/F_4
cipher suite with no confidentiality(Default) PCH_SPI1_SO R387 15/F_4 PCH_SPI1_SO_R 2 SI 7HOLD#
R125 *1K_4 SO HOLD# R440 15/F_4
1 = Intel ME Crypto TLS cipher suite with +3V_DEEP_SUS GPIO15_ULT <9> R457/R453/R450/R451/R546/R548 close to U15 pin 3 4
confidentiality C521 W P# VSS
DSWVRMEN Deep Sx Well 22P/50V_4 A25LQ64M-F C520
R520 330K_4 AKE3EFN0800 0.1U/10V_4
On-Die Voltage +3V_RTC DSWVRMEN <6>
ALWAYS Should be always pull-up
A Regulator Enable C620 1U/10V_4 +3VSPI R389 3.3K/F_4 A
PCH_SPI_IO2 R388 15/F_4 BIOS_WP#
SI modify PCH_SPI_IO3
+3V <6,8,9,10,11,12,13,14,20,21,22,23,24,25,26,27,28,33,34,35>
+5V <6,21,22,24,25,26,27,34>
<28>
<28>
PCH_SPI_CS0#_R
PCH_SPI1_CLK_R
PCH_SPI_CS0#_R
PCH_SPI1_CLK_R
+1.05V
+3VS5
<4,10,11,27,28,31,34>
<6,9,10,11,25,27,30,31,34,35,36>
PROJECT :U83
<28> PCH_SPI1_SI_R
PCH_SPI1_SI_R
PCH_SPI1_SO_R
+3VPCU <4,22,25,26,27,28,29,30> Quanta Computer Inc.
<28> PCH_SPI1_SO_R +3V_RTC <10,27>
+V1.05S_ASATA3PLL <10>
Custom 1A
ULT 6/9(SATA/HDA)
5 4 3 2 1
5 4 3 2 1

PCI/USBOC# Pull-up(CLG)
DGPU_PR_EN
TS_INTB#
R428
R432
*10K_4
10K_4
+3V
(HDA,JTAG,SATA)
U19N
G17
F17
U19K
PERN1 / USB3RN3
08
PIRQC# R103 10K_4 C30 PERP1 / USB3RP3 AN2 SMBALERT#
PIRQD# R423 10K_4 C31 PETN1 / USB3TN3 SMBALERT# / GPIO11(SUS)
PETP1 / USB3TP3
SMBUS
AP2 SMB_PCH_CLK
GPIO77_ULT R403 10K_4 F15 SMBCLK
<24> PCIE_RXN2_CARD PERN2/ USB3RN4
GPIO52_ULT R418 10K_4 G15 AH1 SMB_PCH_DAT
GPIO53_ULT R416 10K_4 Cardreader <24>
<24>
PCIE_RXP2_CARD
PCIE_TXN2_CARD C192 0.1U/10V_4 PCIE_TXN2_CARD_C B31 PERP2/ USB3RP4 SMBDATA
GPIO55_ULT R111 10K_4 C193 0.1U/10V_4 PCIE_TXP2_CARD_C A31 PETN2/ USB3TN4
<24> PCIE_TXP2_CARD PETP2/ USB3TP4
D DGPU_HOLD_RST# R104 10K_4 AL2 SML0ALERT# D
DGPU_HOLD_RST# R102 *100K_4 G11 SML0ALERT# / GPIO60(SUS)
<27> PCIE_RXN3_WLAN PERN3
F11 AN1 SMB_ME0_CLK
C- Link
WLAN <27> PCIE_RXP3_WLAN
C494 0.1U/10V_4 PCIE_TXN3_WLAN_C C29 PERP3 SML0CLK
<27> PCIE_TXN3_WLAN PETN3
<27> PCIE_TXP3_WLAN C493 0.1U/10V_4 PCIE_TXP3_WLAN_C B30 AK1 SMB_ME0_DAT
+3V_DEEP_SUS PETP3 SML0DATA
for DS3 AF2 <23> PCIE_RXN4_LAN PCIE_RXN4_LAN F13
PCI-E*
SMBALERT# R498 10K_4 CL_CLK PCIE_RXP4_LAN G13 PERN4 AU4 SML1ALERT#
<23> PCIE_RXP4_LAN PERP4 SML1ALERT# / PCHHOT# / GPIO73(SUS) TP68
USB_OC1# R171 10K_4 AD2 LAN <23> PCIE_TXN4_LAN C496 0.1U/10V_4 PCIE_TXN4_LAN_C B29
USB_OC2# R172 10K_4 CL_DATA C495 0.1U/10V_4 PCIE_TXP4_LAN_C A29 PETN4 AU3 SMB_ME1_CLK
<23> PCIE_TXP4_LAN PETP4 SML1CLK / GPIO75(SUS)
USB_OC3# R173 10K_4 AF4
USB_OC4# R484 10K_4 CL_RST# F10 AH3 SMB_ME1_DAT
<14> PEG_RXN0 PERN5_L0 SML1DATA / GPIO74(SUS)
<14> PEG_RXP0 E10 PCH_XTAL24_IN <27>
C183 0.22U/10V_4 PEG_TXN0_C C23 PERP5_L0 R369 0_4
<14> PEG_TXN0 PETN5_L0 TP82
<14> PEG_TXP0 C184 0.22U/10V_4 PEG_TXP0_C C22
PETP5_L0 C501 *12P/50V_4
<14> PEG_RXN1 F8
(USBP0) PERN5_L1
1
2
USB2.0(M/B-1) <14> PEG_RXP1 E8
PERP5_L1
USB2.0/USB3.0 COMBO 1st <14> PEG_TXN1 C188 0.22U/10V_4 PEG_TXN1_C B23 A25 XTAL24_IN R392
C189 0.22U/10V_4 PEG_TXP1_C A23 PETN5_L1 XTAL24_IN B25 XTAL24_OUT *1M_4 *24MHZ +-30PPM
USB2.0 Small board (USBP1) <14> PEG_TXP1 PETP5_L1 XTAL24_OUT Y3
USB2.0/USB3.0 COMBO 2nd <14> PEG_RXN2 H10
3
4
G20 AN8 G10 PERN5_L2 C500 *12P/50V_4
<26> USB30_RX1- USB3RN1 USB2N0 USBP0- <26> <14> PEG_RXP2 PERP5_L2
H20 AM8 USBP0+ <26> <14> PEG_TXN2 C190 0.22U/10V_4 PEG_TXN2_C B21
<26> USB30_RX1+ USB3RP1 USB2P0 PETN5_L2
C33 AR7 USBP1- <22> <14> PEG_TXP2 C191 0.22U/10V_4 PEG_TXP2_C C21 TP81
<26> USB30_TX1- USB3TN1 USB2N1 PETP5_L2
B34 AT7 USBP1+ <22> B35 CK_XDP_N_R RP1 2 1
<26> USB30_TX1+ USB3TP1 USB2P1 CLKOUT_ITPXDP# CK_XDP_N <11>
AR8 USBP2- <21> A35 CK_XDP_P_R *0_4P2R_4 4 3
USB2N2 CLKOUT_ITPXDP_P CK_XDP_P <11>
AP8 USBP2+ <21> <14> PEG_RXN3 E6
USB2P2 AR10 F6 PERN5_L3 EC34 18P/50V_4
Camera (USBP2) RP1 install for XDP
USB3.0 USB2N3 AT10
<14>
<14>
PEG_RXP3
PEG_TXN3 C185 0.22U/10V_4 PEG_TXN3_C B22 PERP5_L3
E18 USB2P3 AM15 C186 0.22U/10V_4 PEG_TXP3_C A21 PETN5_L3
<26> USB30_RX2- USB3RN2 USB2N4 <14> PEG_TXP3 PETP5_L3
F18 AL15 USB2.0(M/B-2) (USBP5) AN15 CLK_PCI_EC_R R525 22_4 CLK_24M_KBC <28>
<26> USB30_RX2+ USB3RP2 USB2P4 CLKOUT_LPC_0
B33 AM13 USBP5- <26> R98 0_4 PCIE_IREF B27 AP15 CLK_PCI_LPC_R CLK_24M_DEBUG <27>
C <26> USB30_TX2- USB3TN2 USB2N5 PCIE_IREF CLKOUT_LPC_1 C
A33 AN13 USBP5+ <26> R99 3.01K/F_4 PCIE_RCOMP A27 R524 22_4
<26> USB30_TX2+ USB3TP2 USB2P5 <10> +V1.05S_AUSB3PLL PCIE_RCOMP
AP11 USBP6- <27> E15 EMI(near PCH)
USB2N6 AN11 E13 RSVD
USB2P6 USBP6+ <27> WLAN RSVD
AR13 EC33 18P/50V_4
USB2N7 AP13
USB2P7 Touch Screen C43 R5103 22_4
CLK_PCI_TPM <25>
USBP7- <27> CLKOUT_PCIE0N
USBP7+ <27> C42 EMI(near PCH)
CLKOUT_PCIE0P
20111130 Modify USB3.0 for HM70 PCIE_CLKREQ_CR# U2 EC44 *18P/50V_4
<24> PCIE_CLKREQ_CR# PCIECLKRQ0# / GPIO18
GPIO77_ULT U6
Cardreader CLK_PCIE_CRN B41
R384
PIRQA#/ GPIO77 <24> CLK_PCIE_CRN CLKOUT_PCIE_N1
TS_INTB# P4 SI modify <24> CLK_PCIE_CRP CLK_PCIE_CRP A41 C26 XCLK_BIASREF +V1.05S_AXCK_LCPLL <10>
PIRQC# N4 PIRQB#/ GPIO78 CLKOUT_PCIE_P1 DIFFCLK_BIASREF
PIRQD# N2 PIRQC#/ GPIO79 PCIE_CLKREQ1# Y5
CLOCK SIGNALS
PIRQD#/ GPIO80 PCIECLKRQ1# / GPIO19 3.01K/F_4
<27> CLK_PCIE_WLANN CLK_PCIE_WLANN C41

GPIO52_ULT L1 CLK_PCIE_WLANP B42 CLKOUT_PCIE_N2
R417 0_4 DGPU_PWR_EN_R L3 GPIO52 WLAN <27> CLK_PCIE_WLANP CLKOUT_PCIE_P2
<35,36,37> DGPU_PR_EN GPIO54
<27> PCIE_CLKREQ_WLAN# PCIE_CLKREQ_WLAN# AD1
DGPU_HOLD_RST# R5 PCIECLKRQ2# / GPIO20
<14> DGPU_HOLD_RST# GPIO51
GPIO53_ULT L4 <23> CLK_PCIE_LANN CLK_PCIE_LANN B38
PCI
GPIO55_ULT U7 GPIO53 CLK_PCIE_LANP C37 CLKOUT_PCIE_N3 K21

GPIO55 TIE TRACES TOGETHER
LAN <23> CLK_PCIE_LANP CLKOUT_PCI_P3 RSVD
CLOSE TO PINS WITH LENGTH PCIE_CLKREQ_LAN# N1 M21
TO RESISTOR <23> PCIE_CLKREQ_LAN# PCIECLKRQ3# / GPIO21 RSVD
USB
<14> CLK_VGA_N CLK_VGA_N A39 C35 R380 10K/F_4

AJ10 USB_BIAS R140 CLK_VGA_P B39 CLKOUT_PCIE_N4 TESTLOW_C35
USBRBIAS# AJ11 22.6/F_4
VGA <14> CLK_VGA_P CLKOUT_PCIE_P4 C34 R381 10K/F_4
USBRBIAS PCIE_CLKREQ_VGA# U5 TESTLOW_C34
<15> PCIE_CLKREQ_VGA# PCIECLKRQ4# / GPIO22
AN10 AK8 R531 10K/F_4
PCI_PME# AD4 RSVD AM10 B37 TESTLOW_AK8
TP46 PME# RSVD CLKOUT_PCIE_N5
A37 AL8 R141 10K/F_4
AL3 USB_OC1# TP65 CLKOUT_PCIE_P5 TESTLOW_AL8
B B
OC0# / GPIO40(SUS) AT1 USB_OC2# TP66 PCIE_CLKREQ0# T2
OC1# / GPIO41(SUS) AH2 USB_OC3# TP64 PCIECLKRQ5# / GPIO23
OC2# / GPIO42(SUS) SI modify
AV3 USB_OC4# TP100
OC3# / GPIO43(SUS)
*HSW_ULT_DDR3L
*HSW_ULT_DDR3L
SMBus/Pull-up(CLG) CLK_REQ/Strap Pin(CLG) +3V

+3V SMBus/Pull-up(CLG)
PCIE_CLKREQ0# R443 10K_4
Q34
PCIE_CLKREQ1# R115 10K_4
5 PCIE_CLKREQ_WLAN# R482 10K_4
PCIE_CLKREQ_LAN# R425 10K_4
4 3 SMB_ME1_CLK PCIE_CLKREQ_CR# R445 10K_4
<13,20,28> MBCLK2
PCIE_CLKREQ_VGA# R114 10K_4
for DS3
2 +3V_DEEP_SUS R499 2.2K_4 SMB_PCH_CLK
R486 2.2K_4 SMB_PCH_DAT
1 6 SMB_ME1_DAT
<13,20,28> MBDATA2
R168 2.2K_4 SMB_ME0_CLK
R493 2.2K_4 SMB_ME0_DAT
*2N7002DW R178 2.2K_4 SMB_ME1_CLK
A +3V R485 2.2K_4 SMB_ME1_DAT A
Q35
R179 10K_4 SML1ALERT#
+3V R495 4.7K_4 5 R492 1K_4 SML0ALERT#
4 3 SMB_PCH_DAT
<11,12,13,20,25> SMB_RUN_DAT
+3V R461 4.7K_4 2 PROJECT :U83

<11,12,13,20,25> SMB_RUN_CLK
1 6 SMB_PCH_CLK Quanta Computer Inc.
Custom 1A
2N7002DW <6,7,9,10,11,12,13,14,20,21,22,23,24,25,26,27,28,33,34,35> +3V ULT 7/9 (PCIE/USB/CLK)
<6,7,9,10,11> +3V_DEEP_SUS
5 4 3 2 1
5 4 3 2 1
Lynx Point-LP Platform Controller Hub RP6
09
RP7 10 1 I2C0_SCL
(HDA,JTAG,SATA) Haswell (GPIO) UART1_RXD
10
9
1
2
SDIO_D2
SDIO_D1
GSPI1_MOSI
GSPI0_MISO
9
8
2
3
I2C1_SCL
I2C0_SDA
U19O I2C1_SDA 8 3 SDIO_CMD GSPI1_MISO 7 4 SDIO_D3
TP67 GSPI0_CLK 7 4 SDIO_CLK UART0_TXD 6 5
SIO_EXT_SCI# AU2 D60 PCH_THRMTRIP# R405 0_4 GSPI1_CLK 6 5
<28> SIO_EXT_SCI# GPIO8(SUS) THRMTRIP# PM_THRMTRIP# <28>
10K_10P8R_6
BT_OFF AM3 10K_10P8R_6
<27> BT_OFF GPIO9(SUS) +3V
TP57 +3V
RF_OFF AM2 V4 EC_RCIN#
<27> RF_OFF GPIO10(SUS) RCIN#/ GPIO82 EC_RCIN# <28>
TP52 RP5
CPU/MISC
LAN_DISABLE# AM7 T4 SERIRQ R113 10K_4 10 1 UART1_RST
LAN_PHY_PW R_CTRL / GPIO12(DSW ) SERIRQ +3V
for DS3 UART0_RXD 9 2 UART0_RTS
SERIRQ <25,28>
D R175 10K_4 GPIO13_ULT AT3 UART1_CTS 8 3 UART0_CTS D
+3V_DEEP_SUS GPIO13(SUS) R522 GSPI0_CS 7 4 UART1_TXD
GPIO14_ULT AH4 AW 15 PCH_OPI_RCOMP 49.9/F_4 GSPI1_CS 6 5
TP103 GPIO14(SUS) PCH_OPI_RCOMP
AD6 AF20 10K_10P8R_6
<7> GPIO15_ULT GPIO15(SUS) RSVD
+3V
Reserve
<24> ZERO_ODD_DP# R631 *0_4 ODD_PRSNT#_R Y1 AB21
GPIO16 RSVD
SI modify TP92
T3
<28,35,36,37> DGPU_PWROK GPIO17
GPIO24_ULT AD5
GPIO24 (SUS) GPIO Pull-up/Pull-down(CLG) +3V_DEEP_SUS
GPIO25_ULT AM4 R6 GSPI0_CS
GPIO25(DSW ) GSPI0_CS/ GPIO83 SIO_EXT_SCI# R174 10K_4
GPIO26_ULT AN3 L6 GSPI0_CLK BT_OFF R177 10K_4
GPIO
GPIO26(SUS) GSPI0_CLK/ GPIO84 RF_OFF R139 10K_4
TP5038 GPIO27_ULT AN5 N6 GSPI0_MISO GPIO13_ULT R176 10K_4
GPIO27(DSW ) GSPI0_MISO/ GPIO85 GPIO14_ULT R489 10K_4
GPIO28_ULT AD7 L8 GPIO86_ULT TP33
GPIO28(SUS) GSPI0_MOSI/ GPIO86 GPIO24_ULT R488 10K_4
DEVSLP0 P2 GPIO26_ULT R180 10K_4
DEVSLP0/ GPIO33 R7 GSPI1_CS GPIO28_ULT R126 10K_4
DEVSLP1 L2 GSPI1_CS/ GPIO87 GPIO44_ULT R491 10K_4
<25> DEVSLP1 DEVSLP1/ GPIO38 L5 GSPI1_CLK ACCEL_INTA# R490 10K_4
DEVSLP2 N5 GSPI1_CLK/ GPIO88
DEVSLP2/ GPIO39 N7 GSPI1_MISO
GPIO44_ULT AK4 GSPI1_MISO/ GPIO89
GPIO44(SUS) K2 GSPI1_MOSI +3V
BOARD_ID4 AG5 GSPI1_MOSI/ GPIO90
TP for DG GPIO45(SUS)
C ACCEL_INTA# AG3 J1 UART0_RXD GPIO49_ULT R475 10K_4 C
TP29 <27> ACCEL_INTA# GPIO46(SUS) UART0_RXD/ GPIO91 GPIO50_ULT R433 10K_4
SERIAL IO
BOARD_ID5 AB6
GPIO47(SUS) UART0_TXD/ GPIO92
K3 UART0_TXD SI modify ODD_PRSNT#_R R470 10K_4
DGPU_PWROK R424 10K_4
BT_COMBO_EN# U4 J2 UART0_RTS DEVSLP0 R407 10K_4
<27> BT_COMBO_EN# GPIO48 UART0_RTS/ GPIO93 DEVSLP1 R429 10K_4
TP99 GPIO49_ULT Y3 G1 UART0_CTS DEVSLP2 R396 10K_4
GPIO49 UART0_CTS/ GPIO94 BT_COMBO_EN# R112 10K_4
GPIO50_ULT P3 GPIO70_ULT R383 10K_4
GPIO50 K4 UART1_RXD EC_RCIN# R444 10K_4
BOARD_ID0 AG6 UART1_RXD/ GPIO0 GPIO12 LAN_DISABLE#
GPIO56(SUS) G2 UART1_TXD SUS -->Check list
BOARD_ID1 AP1 UART1_TXD/ GPIO1 +3V -->Datasheet GPIO76_ULT R434 10K_4
GPIO57(SUS) J3 UART1_RST MPHY_PWREN R465 100K_4
BOARD_ID2 AL4 UART1_RST/ GPIO2 MPHY_PWREN R464 *10K_4
GPIO58(SUS) J4 UART1_CTS
TP106 BOARD_ID3 AT5 UART1_CTS/ GPIO3
GPIO59(SUS)
GPIO70_ULT C4 F2 I2C0_SDA
SDIO_POW ER_EN/ GPIO70 I2C0_SDA/ GPIO4
MPHY_PWREN Y2 F3 I2C0_SCL +3VS5
<34> MPHY_PWREN HSIOPC/ GPIO71 I2C0_SCL/ GPIO5
G4 I2C1_SDA GPIO25_ULT R134 10K_4
TP94 GPIO76_ULT P1 I2C1_SDA/ GPIO6 GPIO27_ULT R161 10K_4
BMBUSY# / GPIO76 F1 I2C1_SCL LAN_DISABLE# R136 10K_4
I2C1_SCL/ GPIO7
R456 0_4SPKR V2
<22> ACZ_SPKR SPKR/ GPIO81 E3 SDIO_CLK
SDIO_CLK/ GPIO64
F4 SDIO_CMD
Close to EC
B SDIO_CMD/ GPIO65 B
<7> SPKR +V1.05S_VCCST
D3
SDIO_D0/ GPIO66 GPIO66_ULT <7>
E4 SDIO_D1 PM_THRMTRIP# R135 1K_4
SDIO_D1/ GPIO67
C3 SDIO_D2
SDIO_D2/ GPIO68
E2 SDIO_D3
SDIO_D3/ GPIO69
*HSW_ULT_DDR3L
BOARD_ID5 BOARD_ID4 BOARD_ID3 BOARD_ID2 BOARD_ID1 BOARD_ID0

Model UMA: 0 14": 0 R132 10K_4 BOARD_ID0 R133 *10K_4 +3V_DEEP_SUS
DIS: 1 15": 1
U83 DIS-14 1 0 0 0 0 0 R158 10K_4 BOARD_ID1 R159 *10K_4
U83 UMA-15 0 1 0 0 0 0 R155 10K_4 BOARD_ID2 R154 *10K_4
0 0 0 0 0 0 R160 10K_4 BOARD_ID3 R167 *10K_4 DIS UMA

A A
Stuff Ra Rb
0 0 0 0 0 0 R463 10K_4 BOARD_ID4 R466 *10K_4
NC Rb Ra <6,7,8,10,11,12,13,14,20,21,22,23,24,25,26,27,28,33,34,35> +3V
Rb <6,10,11,25,27,30,31,34,35,36> +3VS5
0 0 0 0 0 0 R128 *10K_4 BOARD_ID5 Ra R127 10K_4
0 0 0 0 0 0
PROJECT :U83
Custom 1A
ULT 8/9 (GPIO/MISC)
5 4 3 2 1
5 4 3 2 1
+1.05V
VCC1_05=1.741A +V1.05S_CORE_PCH U19P

POWER
(HDA,JTAG,SATA)(POWER) 10
1U/6.3V_4 C248 J11 +V3.3A_DSW_PRTCSUS
VCC1_05 +3V_DEEP_SUS
H11 AH11
1U/6.3V_4 C241 H15 VCC1_05 VCCSUS3_3 C258 1U/6.3V_4
AE8 VCC1_05 CORE RTC
VCC1_05 VCCRTC < 1mA +3V_RTC
10U/6.3VS_6 C204 AF22 AG10
VCC1_05 VCCRTC C564 1U/6.3V_4
D D
TP56 AE7 +VCCRTCEXT C233 0.1U/10V_4 C565 0.1U/10V_4 L26 2.2uH/500mA_6
20mil
DCPRTC +1.05V_MODPHY +V1.05S_ASATA3PLL
C249 AG19 C247 0.1U/10V_4
1U/6.3V_4 +PCH_VCCDSW AG20 DCPSUSBYP SPI Y8VCCSPI=18mA C227 *0.1U/10V_4 L25 2.2uH/500mA_6
20mil
DCPSUSBYP VCCSPI +V1.05S_AUSB3PLL
+V3.3M_PSPI R117 0_4 +3V_DEEP_SUS
+V1.05M_ASW AE9
+1.05V VCCASW +V1.05DX_MODPHY_PCH
AF9 R118 *0_4
VCCASW +3V
C244 1U/6.3V_4 AG8 2.2uH/500mA_6
+1.05V VCCASW +V1.05S_AXCK_DCB L4 +1.05V
C528 *22U/6.3VS_8 J18 C209 1U/6.3V_4
VCCCLK K19
VCCASW=658mA +V1.05M_FHV0 AG14 VCCCLK C217 47U/6.3VST_8
+V1.05M_FHV1 AG13 VCCASW A20
VCCASW VCCACLKPLL C216 47U/6.3VST_8
ICC
AD10 +V1.05S_AXCK_LCPLL L27 2.2uH/500mA_6
TP47 DcpSus1=109mA +V1.05A_SUS_PCH AD8 DCPSUS1 C503 1U/6.3V_4
+1.05V VCCACLKPLL=31mA
DCPSUS1
C206 1U/6.3V_4 +V1.05DX_MODPHY_PCH K9 J17 C488 47U/6.3VST_8
L10 VCCHSIO VCCCLK
C197 1U/6.3V_4
VCCHSIO=1.838A M9 VCCHSIO C483 47U/6.3VS_8
VCCHSIO
C208 *1U/6.3V_4 +V1.05S_SSCF100 R110 0_6 +1.05V VCCCLK=200mA
+V1.05S_AIDLE N8
+1.05V VCC1_05 VCCMPHY
P9 R21 C202 1U/6.3V_4
VCC1_05 VCCCLK T21
C225 *1U/6.3V_4 VCCCLK
+V1.05S_SSCFF R122 0_6 +1.05V
C C
C499 1U/6.3V_4 +V1.05S_AUSB3PLL B18 K18 C210 1U/6.3V_4
VCCUSB3PLL RSVD
C489 22U/6.3VS_8 M20
RSVD
C484 22U/6.3VS_8 V21
VCCSATA3PLL=42mA RSVD
C504 1U/6.3V_4 +V1.05S_ASATA3PLL B11
C498 22U/6.3VST_8
VCCSATA3PLL
VCCSUS3_3
VCCSUS3_3
AE20 +V3.3A_PSUS
AE21
+V3.3A_PSUS for DS3
+3VS5 +3V_DEEP_SUS
C490 22U/6.3VS_8
R462 *0_6
SI Change to 22uF for Intel recommend USB3 THERMAL SENSOR VCCTS1_5=3mA
TP23 DcpSus3=10mA +V1.05A_VCCUSB3SUS J13 J15 +V1.5S_ATS
+1.5V
DCPSUS3 VCCTS1_5 C524
+V3.3S_PTS R446
+3V
K14 100K_4 1U/6.3V_4
HDA VCC3_3 K16 VCC3_3=41mA C203 0.1U/10V_4 U18
VCC3_3
VCCHDA=11mA 5 1
+V3.3DX_1.5DX_ADO IN OUT
+V3.3DX_1.5DX_PAZSUS_PCH AH14 OPI
VCCHDA 2.2uH PN CV-2205JZ00 4 2
C243 1U/6.3V_4 Y20 VCCAPLL=57mA L5 0_6 IN GND
RSVD +1.05V
AA21 R426 0_4 3 C526
VCCAPLL <28> SLP_SUS_ON ON/OFF
W 21 C229 1U/6.3V_4 0.1U/10V_4
VRM VCCAPLL
+V1.05S_APLLOPI C231 *47U/6.3VST_8 IC(5P) G5243AT11U
TP60 DcpSus2=25mA +V1.05A_USB2SUS AH13 SERIAL IO C517
DCPSUS2 C232 *47U/6.3VST_8 *10P/50V_4
B B
GPIO/ LCC U8 VCCSDIO=17mA
VCCSDIO T9 +V3.3S_1.8S_SDIO_PCH
VCCSDIO +3V
VCCSUS3_3=63mA +V3.3A_PSUS AC9
AA9 VCCSUS3_3
+3V_DEEP_SUS VCCSUS3_3
C242 22U/6.3VST_8 SUS OSCILLATOR C218 1U/6.3V_4
DcpSus4=1mA
AB8 +V1.05A_AOSCSUS TP45
VCCDSW3_3=114mA+3.3V_A_DSW_P AH10 DCPSUS4
VCCDSW 3_3
+3VS5
C250 *1U/6.3V_4 C239 1U/6.3V_4
USB2
+V3.3S_PCORE V8
+3V VCC3_3
W9 AC20
C205 22U/6.3VST_8 VCC3_3 RSVD
+1.05V
AG16 +V1.05S_DUSB
VCC1_05
AG17 C246 1U/6.3V_4
VCC1_05
ICT
*HSW_ULT_DDR3L
+V3.3DX_1.5DX_ADO
R129 0_4 +1.5V

R5105 *0_4 +3V
A A
<6,7,8,9,11,12,13,14,20,21,22,23,24,25,26,27,28,33,34,35>
<8> +V1.05S_AUSB3PLL
+3V PROJECT :U83
<6,21,22,24,25,26,27,34> +5V <7> +V1.05S_ASATA3PLL Quanta Computer Inc.
<8> +V1.05S_AXCK_LCPLL
<4,7,11,27,28,31,34> +1.05V <7,27> +3V_RTC
<6,9,11,25,27,30,31,34,35,36> +3VS5 <2,4,12,13,25,32> +1.35VSUS Size Document Number Rev
Custom 1A
<13,22,25,26,30,32,33,34,35,36,37> +5VS5 ULT 9/9(POWER-2)
Date: Monday, March 18, 2013 Sheet 10of 41
5 4 3 2 1
5 4 3 2 1
<2>
<2>
XDP_PREQ#_CPU
XDP_PRDY#_CPU
<4> CFG0
CFG1
R496 1K_4
31
32
33
34
35
36
CN6
31
32
33
34
35
30
29
28
27
26
30
29
28
27
26
25
OBSFN_C0
OBSFN_C1
CFG8
CFG9
CFG17
CFG16
CFG8
CFG9
<4>
<4>
<4>
<4>
11
<4> CFG1 36 25
37 24
CFG2 38 37 24 23 CFG10
<4> CFG2 38 23 CFG10 <4>
CFG3 39 22 CFG11 CFG11 <4>
<4> CFG3 39 22
40 21
OBSFN_B0 41 40 21 20 OBSFN_D0
D <2> XDP_BPM0 CFG19 <4> D
OBSFN_B1 42 41 20 19 OBSFN_D1
<2> XDP_BPM1 42 19 CFG18 <4>
43 18
CFG4 44 43 18 17 CFG12
<4> CFG4 44 17 CFG12 <4>
CFG5 45 16 CFG13 CFG13 <4>
<4> CFG5 45 16
46 15
CFG6 47 46 15 14 CFG14
<4> CFG6 47 14 CFG14 <4>
CFG7 48 13 CFG15 CFG15 <4>
<4> CFG7 48 13
49 12
H_VCCST_PW RGD R406 1K_4 VCCST_PW RGD_XDP 50 49 12 11 +1.05V
<4> H_VCCST_PW RGD 50 11 CK_XDP_P <8>
DNBSW ON# 51 10 CK_XDP_N <8>
52 51 10 9
+1.05V 52 9
53 8 XDP_RST
<4> PW R_DEBUG 53 8
C228 0.1U/10V_4 H_SYS_PW ROK_XDP 54 7 XDP_DBRESET_N C238 0.1U/10V_4
55 54 7 6
56 55 6 5 XDP_TDO
<8,12,13,20,25> SMB_RUN_DAT 56 5
57 4 XDP_TRST#
<8,12,13,20,25> SMB_RUN_CLK 57 4
XDP_TCK1 58 3 XDP_TDI
XDP_TCK0 59 58 3 2 XDP_TMS
<2> XDP_TCK0 59 2
60 1 R100 1K_4 CFG3
60 1
*SEC_BSH-030-01-L-D-A-TR
C C
XDP_DBRESET_N R120 1K_4 +3V H_SYS_PW ROK_XDP R170 *1K_4 +3V_DEEP_SUS
C215 C255
0.1U/10V_4 0.1U/10V_4
+3V
C566
0.1U/10V_4
U22
14
VCC
XDP_TDO 2 3 XDP_TDO_CPU <2>
1A 1B
B 1 B
APS <4,28,30,31,32> HW PG 1OE
+3V_DEEP_SUS +3VS5 XDP_TDI_R 5 6
2A 2B XDP_TDI_CPU <2>
4
2OE
CN8 XDP_TMS 9 8
3A 3B XDP_TMS_CPU <2>
1 R157 0_4 +3V_DEEP_SUS
1 2 R145 0_4 10
2 SUSB# <6,11,28> 3OE
3 R144 *0_4 +3VS5
3 4 R146 0_4 XDP_TRST# 12 11
4 SLP_S5# <6> 4A 4B XDP_TRST#_CPU <2,7>
5 R147 0_4 SUSC# <6,28>
5 6 R148 0_4 13
6 SLP_A# <6> 4OE
7 15
7 8 DPAD
8 9 R149 0_4 7
9 RTC_RST# <7> GND
10
10 11 R150 0_4 *SN74CBTLV3126RGYR
11 DNBSW ON# <6,28>
12 XDP_TDI R515 0_4 XDP_TDI_R
12 13 R151 0_4
13 SYS_RESET# <6>
14 +V1.05S_VCCST R511 *51_4
14 15 R152 *0_4
15 PCH_SLP_S0_N <6,28>
16 R510 *0_4 XDP_TDO
16 17
17 18 R153 0_4 R505 0_4 XDP_TCK0 R166 0_4 H_SYS_PW ROK_XDP
18 SUSB# <6,11,28> <7> JTAGX_PCH <6> SYS_PW ROK
*ACES_88511-180N R538 0_4 XDP_TMS
<7> JTAG_TMS_PCH
R516 0_4 XDP_TDI R124 1K_4 XDP_RST
A <7> JTAG_TDI_PCH <6,14,23,24,25,27,28> PLTRST# A
R512 0_4 XDP_TDO

<7> JTAG_TDO_PCH
XDP_TDI_R R513 *0_4 R506 *0_4 XDP_TCK0
<7> JTAG_TCK_PCH
R502 0_4 XDP_TCK1
PROJECT :U83
ULT
1A
HSW XDP & APS
Date: 14, 2013
Thursday, March Sheet
11 41
of
5 4 3 2 1
5 4 3 2 1
<3> M_A_A[15:0]
M_A_A0
M_A_A1
M_A_A2
M_A_A3
98
97
96
95
JDIM2A
A0
A1
A2
DQ0 7
5
DQ1 15
DQ2 17
M_A_DQ5
M_A_DQ4
M_A_DQ6
M_A_DQ2
M_A_DQ[63:0] <3>
2.48A +1.35VSUS
75
76
81
JDIM2B
VDD1
VDD2
VSS16
VSS17
44
48
49
12
M_A_A4 92 A3 DQ3 4 M_A_DQ1 82 VDD3 VSS18 54
D M_A_A10 107 A9 DQ9 33 M_A_DQ14 100 VDD9 VSS24 71 D
M_A_A11 84 A10/AP DQ10 35 M_A_DQ15 105 VDD10 VSS25 72
PC2100 DDR3 SDRAM SO-DIMM

M_A_A13 119 A12/BC# DQ12 24 M_A_DQ8 111 VDD12 VSS27 128
A15 DQ15 39 M_A_DQ21 118 VDD15 VSS30 138

109 DQ16 41 M_A_DQ20 123 VDD16 VSS31 139
<3> M_A_BS#0 BA0 DQ17 51 VDD17 VSS32
108 M_A_DQ19 124 144
<3> M_A_BS#1 BA1 DQ18 53 VDD18 VSS33
79 M_A_DQ23 145
<3> M_A_BS#2 BA2 DQ19 40 VSS34
114 M_A_DQ17 199 150
<3> M_A_CS#0 S0# DQ20 42 +3V VDDSPD VSS35
121 M_A_DQ16 151
<3> M_A_CS#1 S1# DQ21 50 VSS36
101 M_A_DQ18 77 155
<3> M_A_CLKP0 CK0 DQ22 52 NC1 VSS37
103 M_A_DQ22 122 156
<3> M_A_CLKN0 CK0# DQ23 57 NC2 VSS38
102 M_A_DQ24 R198 10K/F_4 125 161
<3> M_A_CLKP1 CK1 DQ24 59 +3V NCTEST VSS39
104 M_A_DQ25 162
<3> M_A_CLKN1 CK1# DQ25 67 VSS40
73 M_A_DQ31 PM_EXTTS#0 198 167
<3> M_A_CKE0 CKE0 DQ26 69 <13> PM_EXTTS#0 EVENT# VSS41
74 M_A_DQ27 30 168
<3> M_A_CKE1 CKE1 DQ27 56 <2,13> DDR3_DRAMRST# RESET# VSS42
115 M_A_DQ28 172
<3> M_A_CAS# CAS# DQ28 58 VSS43
110 M_A_DQ29 C320 *0.1U/10V_4 173
<3> M_A_RAS# RAS# DQ29 68 VSS44
113 M_A_DQ30 SMDDR_VREF_DQ0_M1 R204 0_6 +SMDDR_VREF_DQ0 1 178
<3> M_A_WE# W E# DQ30 70 VREF_DQ VSS45
R207 10K/F_4 DIMM0_SA0 197 M_A_DQ26 +SMDDR_VREF_DIMM 126 179
SA0 DQ31 129 <12,13> +SMDDR_VREF_DIMM VREF_CA VSS46
R208 10K/F_4 DIMM0_SA1 201 M_A_DQ36 184
SMB_RUN_CLK 202 SA1 DQ32 131 M_A_DQ33 VSS47 185
<8,11,13,20,25> SMB_RUN_CLK 200 SCL DQ33 141 2 VSS48 189
SMB_RUN_DAT M_A_DQ34
<8,11,13,20,25> SMB_RUN_DAT SDA DQ34 143 M_A_DQ35 3 VSS1 VSS49 190
116 DQ35 130 M_A_DQ32 8 VSS2 VSS50 195
(204P)
<13> M_A_ODT0 ODT0 DQ36 132 VSS3 VSS51
120 M_A_DQ37 9 196
<13> M_A_ODT1 ODT1 DQ37 140 VSS4 VSS52
M_A_DQ38 13
11 DQ38 142 M_A_DQ39 14 VSS5
C 28 DM0 DQ39 147 M_A_DQ44 19 VSS6 C
46 DM1 DQ40 149 M_A_DQ45 20 VSS7
(204P)
63 DM2 DQ41 157 M_A_DQ46 25 VSS8
136 DM3 DQ42 159 M_A_DQ42 26 VSS9 203
DM4 DQ43 146 VSS10 VTT1 +0.75V_DDR_VTT
153 M_A_DQ40 31 204
170 DM5 DQ44 148 M_A_DQ41 32 VSS11 VTT2
187 DM6 DQ45 158 M_A_DQ47 37 VSS12 205
DM7 DQ46 160 M_A_DQ43 38 VSS13 GND 206
<3> M_A_DQSP[7:0] DQ47 163 VSS14 GND
M_A_DQSP0 12 M_A_DQ49 43
M_A_DQSP1 29 DQS0 DQ48 165 M_A_DQ52 VSS15
M_A_DQSP2 47 DQS1 DQ49 175 M_A_DQ50
M_A_DQSP3 64 DQS2 DQ50 177 M_A_DQ51 DDR3-DIMM0_H=4.0_STD
M_A_DQSP4 137 DQS3 DQ51 164 M_A_DQ55 ddr-ddrsk-20401-tp4b-204p-ldv
M_A_DQSP5 154 DQS4 DQ52 166 M_A_DQ48 DGMK4000326
M_A_DQSP6 171 DQS5 DQ53 174 M_A_DQ54 IC SOCKET DDR3 SODIMM(204P,H4.0,STD)
M_A_DQSP7 188 DQS6 DQ54 176 M_A_DQ53
<3> M_A_DQSN[7:0] 10 DQS7 DQ55 181
M_A_DQSN0 M_A_DQ59
M_A_DQSN1 27 DQS#0 DQ56 183 M_A_DQ56
CPU Bracket M_A_DQSN5
M_A_DQSN6
152
169
DQS#4
DQS#5
DQ60 182
DQ61 192
M_A_DQ60
M_A_DQ62
DQS#7 DQ63 <6,7,8,9,10,11,13,14,20,21,22,23,24,25,26,27,28,33,34,35> +3V
EZIW
DDR3-DIMM0_H=4.0_STD <2,4,13,25,32> +1.35VSUS
ddr-ddrsk-20401-tp4b-204p-ldv <13,32> +0.75V_DDR_VTT
DGMK4000326 <12,13> +SMDDR_VREF_DIMM
IC SOCKET DDR3 SODIMM(204P,H4.0,STD)
B B
Place these Caps near So-Dimm0. +1.35VSUS

1uF/10uF 4pcs on each side of connector VREF DQ0 M1 Solution
+1.35VSUS +0.75V_DDR_VTT
For EMI RESERVE <13,32> DDR_VTTREF
DDR_VTTREF R200 *0_6
C324 1U/6.3V_4 C333 1U/6.3V_4 R202
1.8K/F_4
+1.35VSUS C330 1U/6.3V_4 C328 1U/6.3V_4
+1.35VSUS SMDDR_VREF_DQ0_M3 R203 2/F_6 SMDDR_VREF_DQ0_M1
C325 1U/6.3V_4 C318 1U/6.3V_4 <3> SMDDR_VREF_DQ0_M3
1
EC5 *120P/50V_4 EC14 *120P/50V_4 +1.35VSUS
C311 1U/6.3V_4 C322 1U/6.3V_4 C317
EC6 *120P/50V_4 EC15 *120P/50V_4 R205 0.022U/25V_4 R201
2
C313 1U/6.3V_4 C319 10U/6.3V_6 1.8K/F_4
EC7 *120P/50V_4 EC16 *120P/50V_4 24.9/F_4 R215
C312 1U/6.3V_4 1.8K/F_4
EC35 120P/50V_4 EC4 *0.1U/10V_4
C310 1U/6.3V_4 DDR_VTTREF R214 *0_6 +SMDDR_VREF_DIMM
EC10 *120P/50V_4 EC13 *0.1U/10V_4 +SMDDR_VREF_DIMM
C309 1U/6.3V_4
EC8 *120P/50V_4 EC43 *0.1U/10V_4 C335 *0.1U/10V_4 <3> SM_VREF R217 2/F_6
R213
1
EC9 *120P/50V_4 EC42 *0.1U/10V_4 C329 10U/6.3V_6 C332 *2.2U/6.3V_6 1.8K/F_4
C347
C327 10U/6.3V_6 0.022U/25V_4
R220
2
A +SMDDR_VREF_DQ0 A
+0.75V_DDR_VTT C326 10U/6.3V_6
C307 *0.1U/10V_4
EC12 *120P/50V_4 C314 10U/6.3V_6
C316 *2.2U/6.3V_6 24.9/F_4
EC11 *120P/50V_4 C315 10U/6.3V_6
C340 10U/6.3V_6 +3V PROJECT :U83

C323 10U/6.3V_6 C302 0.1U/10V_4
C343 10U/6.3V_6 C308 2.2U/6.3V_6 Size Document Number Rev
Custom 1A
DDR3 DIMM0-STD(4.0H)
Date: Thursday, March 14, 2013 Sheet 12of 41
5 4 3 2 1
5 4 3 2 1
<3> M_B_A[15:0]
M_B_A0
M_B_A1
M_B_A2
98
97
96
JDIM1A
A0
A1
DQ0
DQ1
5
7
15
M_B_DQ22
M_B_DQ23
M_B_DQ21
M_B_DQ[63:0] <3>
2.48A
+1.35VSUS
75
76
81
JDIM1B
VDD1
VDD2
VSS16
VSS17
44
48
49
13
M_B_A3 95 A2 DQ2 17 M_B_DQ18 82 VDD3 VSS18 54
D M_B_A9 85 A8 DQ8 23 M_B_DQ5 100 VDD9 VSS24 71 D
M_B_A11 84 A10/AP DQ10 35 M_B_DQ7 106 VDD11 VSS26 127

M_B_A13 119 A12/BC# DQ12 24 M_B_DQ3 112 VDD13 VSS28 133
A15 DQ15 39 M_B_DQ9 123 VDD16 VSS31 139

109 DQ16 41 M_B_DQ8 124 VDD17 VSS32 144
<3> M_B_BS#0 BA0 DQ17 VDD18 VSS33
108 51 M_B_DQ11 145
<3> M_B_BS#1 BA1 DQ18 VSS34
79 53 M_B_DQ10 199 150
<3> M_B_BS#2 BA2 DQ19 +3V VDDSPD VSS35
114 40 M_B_DQ12 151
<3> M_B_CS#0 S0# DQ20 VSS36
121 42 M_B_DQ13 77 155
<3> M_B_CS#1 S1# DQ21 NC1 VSS37
101 50 M_B_DQ15 122 156
<3> M_B_CLKP0 CK0 DQ22 NC2 VSS38
103 52 M_B_DQ14 125 161
<3> M_B_CLKN0 CK0# DQ23 NCTEST VSS39
102 57 M_B_DQ26 162
<3> M_B_CLKP1 CK1 DQ24 VSS40
104 59 M_B_DQ27 PM_EXTTS#0 198 167
<3> M_B_CLKN1 CK1# DQ25 <12> PM_EXTTS#0 EVENT# VSS41
73 67 M_B_DQ29 30 168
<3> M_B_CKE0 CKE0 DQ26 <2,12> DDR3_DRAMRST# RESET# VSS42
74 69 M_B_DQ28 172
<3> M_B_CKE1 CKE1 DQ27 VSS43
115 56 M_B_DQ30 C321 *0.1U/10V_4 173
<3> M_B_CAS# CAS# DQ28 VSS44
110 58 M_B_DQ31 SMDDR_VREF_DQ1_M1 R199 0_6 +SMDDR_VREF_DQ1 1 178
<3> M_B_RAS# RAS# DQ29 VREF_DQ VSS45
113 68 M_B_DQ24 126 179
<3> M_B_WE# W E# DQ30 <12> +SMDDR_VREF_DIMM VREF_CA VSS46
R189 10K/F_4 DIMM1_SA0 197 70 M_B_DQ25 184
R190 10K/F_4 DIMM1_SA1 201 SA0 DQ31 129 M_B_DQ32 VSS47 185
+3V 202 SA1 DQ32 131 2 VSS48 189
M_B_DQ33
<8,11,12,20,25> SMB_RUN_CLK 200 SCL DQ33 141 M_B_DQ38 3 VSS1 VSS49 190
<8,11,12,20,25> SMB_RUN_DAT SDA DQ34 143 8 VSS2 VSS50 195
M_B_DQ34
(204P)
M_B_ODT0 116 DQ35 130 M_B_DQ36 9 VSS3 VSS51 196
M_B_ODT1 120 ODT0 DQ36 132 M_B_DQ37 13 VSS4 VSS52
ODT1 DQ37 140 M_B_DQ35 14 VSS5
C 11 DQ38 142 M_B_DQ39 19 VSS6 C
28 DM0 DQ39 147 M_B_DQ40 20 VSS7
46 DM1 DQ40 149 M_B_DQ43 25 VSS8
(204P)
63 DM2 DQ41 157 M_B_DQ47 26 VSS9 203
DM3 DQ42 VSS10 VTT1 +0.75V_DDR_VTT
136 159 M_B_DQ46 31 204
153 DM4 DQ43 146 M_B_DQ41 32 VSS11 VTT2
170 DM5 DQ44 148 M_B_DQ42 37 VSS12 205
187 DM6 DQ45 158 M_B_DQ44 38 VSS13 GND 206
DM7 DQ46 160 M_B_DQ45 43 VSS14 GND
<3> M_B_DQSP[7:0] 12 DQ47 163 VSS15
M_B_DQSP2 M_B_DQ52
M_B_DQSP0 29 DQS0 DQ48 165 M_B_DQ51
M_B_DQSP1 47 DQS1 DQ49 175 M_B_DQ54 DDR3-DIMM1_H=4.0_RVS
M_B_DQSP3 64 DQS2 DQ50 177 M_B_DQ48 ddr-ddrrk-20401-tp4b-204p-ruv
M_B_DQSP4 137 DQS3 DQ51 164 M_B_DQ49 DGMK4000263
M_B_DQSP5 154 DQS4 DQ52 166 M_B_DQ55 IC SOCKET DDR3 SODIMM (204P, H4.0, RVS)
<3> M_B_DQSN[7:0] 10 DQS7 DQ55 181
M_B_DQSN2 M_B_DQ63
M_B_DQSN0 27 DQS#0
DQS#1
DQ56
DQ57
183 M_B_DQ62 Local Thermal Sensor
M_B_DQSN1 45 191 M_B_DQ59
M_B_DQSN3 62 DQS#2 DQ58 193 M_B_DQ60 U3 C271 *0.01U/16V_4
M_B_DQSN4 135 DQS#3 DQ59 180 M_B_DQ56
M_B_DQSN5 152 DQS#4 DQ60 182 M_B_DQ57 MBCLK2 8 1
DQS#5 DQ61 <8,20,28> MBCLK2 SCLK VCC +3V
M_B_DQSN6 169 192 M_B_DQ61
M_B_DQSN7 186 DQS#6 DQ62 194 M_B_DQ58 <8,20,28> MBDATA2 MBDATA2 7 2 DDR_THERMDA DDR3 Thermal Sensor
DQS#7 DQ63 SDA DXP
3
PM_EXTTS#0 6 3
DDR3-DIMM1_H=4.0_RVS ALERT# DXN C272 2 Q2
ddr-ddrrk-20401-tp4b-204p-ruv R185 *10K/F_4 4 5 *2200P/50V_4 *METR3904-G
+3V OVERT# GND
DGMK4000263
1
B IC SOCKET DDR3 SODIMM (204P, H4.0, RVS) DDR_THERMDC B
*EMC1412-1-ACZL-TR
Need Check PN(EOD)
Main:AL001412003 EMC1412-1-ACZL-TR(98h)
2nd:AL000431014 TMP431ADGKR(98h)
+5VPCU
Place these Caps near So-Dimm1. +1.35VSUS
+5VS5 +1.35VSUS 2N7002
1uF/10uF 4pcs on each side of connector VREF DQ1 M1 Solution
Q3
R212
100K_4 3 1 R209 66.5/F_4 +1.35VSUS +0.75V_DDR_VTT +SMDDR_VREF_DIMM
M_A_ODT0 <12>
R218 R187
220K_4 R210 66.5/F_4 C303 1U/6.3V_4 C280 *0.1U/10V_4 1.8K/F_4
M_A_ODT1 <12>
Q5 C293 1U/6.3V_4
2
DTC144EUA R195 66.5/F_4 M_B_ODT0 C306 1U/6.3V_4 C279 *2.2U/6.3V_6 DDR_VTTREF R192 *0_6 SMDDR_VREF_DQ1_M1
<12,32> DDR_VTTREF
3
DDR_VTT_PG_CTRL C297 1U/6.3V_4

R194 66.5/F_4 M_B_ODT1 C341 1U/6.3V_4
2 C336 C289 1U/6.3V_4
C304 1U/6.3V_4 +SMDDR_VREF_DQ1 R188
0.1U/10V_4 C295 1U/6.3V_4 SMDDR_VREF_DQ1_M3 R191 2/F_6 1.8K/F_4
<3> SMDDR_VREF_DQ1_M3
2
C301 1U/6.3V_4 C296 *0.1U/10V_4

1
1
C288 10U/6.3V_6
1 3 R216 *0_4 C300 1U/6.3V_4 C298 *2.2U/6.3V_6 C290
51216S3 <32> +3V 0.022U/25V_4
2
Q4 C305 1U/6.3V_4 R193 24.9/F_4
2N7002K C281 0.1U/10V_4
A C299 1U/6.3V_4 A
C282 2.2U/6.3V_6
DDR_PG_CNTL C287 10U/6.3V_6
DDR_PG_CNTL <2>
R219 C292 10U/6.3V_6
*2M/F_4
C284 10U/6.3V_6
C283 10U/6.3V_6
PROJECT :U83
C286
C285
10U/6.3V_6
10U/6.3V_6
<2,4,12,25,32> +1.35VSUS C291 10U/6.3V_6 Size Document Number Rev
<12,32> +0.75V_DDR_VTT C294 10U/6.3V_6 Custom 1A
DDR3 DIMM1-RVS(4.0H)
<6,7,8,9,10,11,12,14,20,21,22,23,24,25,26,27,28,33,34,35> +3V Date: Thursday, March 14, 2013 Sheet 13of 41
5 4 3 2 1
5 4 3 2 1
U5000A U5000G
DP E/F POWER DP A/B POWER

14
+1.8V_DPE_VDD18 AG15 AE11
AG16 DPE_VDD18#1 DPA_VDD18#1 AF11
3GT/s bit rate DPE_VDD18#2 DPA_VDD18#2
PEG_TXP0 AF30 AH30 C_PEG_RXP0 C5000 0.1U/10V_4
<8> PEG_TXP0 PCIE_RX0P PCIE_TX0P PEG_RXP0 <8>
PEG_TXN0 AE31 AG31 C_PEG_RXN0 C5001 0.1U/10V_4
<8> PEG_TXN0 PCIE_RX0N PCIE_TX0N PEG_RXN0 <8> AG20 AF6
D +1.0V_DPE_VDD10 DPE_VDD10#1 DPA_VDD10#1 D
AG21 AF7
PEG_TXP1 AE29 AG29 C_PEG_RXP1 C5002 0.1U/10V_4 DPE_VDD10#2 DPA_VDD10#2
<8> PEG_TXP1 PEG_TXN1 AD28 PCIE_RX1P PCIE_TX1P AF28 C_PEG_RXN1 PEG_RXP1 <8>
C5003 0.1U/10V_4
<8> PEG_TXN1 PCIE_RX1N PCIE_TX1N PEG_RXN1 <8> AG14 AE1
AH14 DPE_VSSR#1 DPA_VSSR#1 AE3
PEG_TXP2 AD30 AF27 C_PEG_RXP2 C5004 0.1U/10V_4 AM14 DPE_VSSR#2 DPA_VSSR#2 AG1
<8> PEG_TXP2 AC31 PCIE_RX2P PCIE_TX2P AF26 PEG_RXP2 <8> AM16 DPE_VSSR#3 DPA_VSSR#3 AG6
PEG_TXN2 C_PEG_RXN2 C5005 0.1U/10V_4
<8> PEG_TXN2 PCIE_RX2N PCIE_TX2N PEG_RXN2 <8> AM18 DPE_VSSR#4 DPA_VSSR#4 AH5
DPE_VSSR#5 DPA_VSSR#5
PEG_TXP3 AC29 AD27 C_PEG_RXP3 C5006 0.1U/10V_4
<8> PEG_TXP3 AB28 PCIE_RX3P PCIE_TX3P AD26 PEG_RXP3 <8>
PEG_TXN3 C_PEG_RXN3 C5007 0.1U/10V_4
<8> PEG_TXN3 PCIE_RX3N PCIE_TX3N PEG_RXN3 <8> AF16 AE13
+1.8V_DPE_VDD18
AG17 DPF_VDD18#1 DPB_VDD18#1 AF13
DPF_VDD18#2 DPB_VDD18#2
PCI EXPRESS INTERFACE

AB30 AC25
AA31 PCIE_RX4P PCIE_TX4P AB25
PCIE_RX4N PCIE_TX4N
+1.0V_DPE_VDD10 AF22 AF8 NC for Mars & Sun
AA29 Y23 AG22 DPF_VDD10#1 DPB_VDD10#1 AF9
Y28 PCIE_RX5P PCIE_TX5P Y24 DPF_VDD10#2 DPB_VDD10#2
PCIE_RX5N PCIE_TX5N
AF23 AF10
Y30 AB27 AG23 DPF_VSSR#1 DPB_VSSR#1 AG9
W 31 PCIE_RX6P PCIE_TX6P AB26 AM20 DPF_VSSR#2 DPB_VSSR#2 AH8
PCIE_RX6N PCIE_TX6N AM22 DPF_VSSR#3 DPB_VSSR#3 AM6
AM24 DPF_VSSR#4 DPB_VSSR#4 AM8
W 29 Y27 DPF_VSSR#5 DPB_VSSR#5
V28 PCIE_RX7P PCIE_TX7P Y26
PCIE_RX7N PCIE_TX7N
C V30 W 24 AF17 AE10 C

U31 PCIE_RX8P PCIE_TX8P W 23 DPEF_CALR DPAB_CALR
PCIE_RX8N PCIE_TX8N
U29 V27 +1.8V_DPE_VDD18 AG18 DP PLL POWER AG8

T28 PCIE_RX9P PCIE_TX9P U26 AF19 DPE_PVDD DPA_PVDD AG7
PCIE_RX9N PCIE_TX9N DPE_PVSS DPA_PVSS
T30 U24
R31 PCIE_RX10P PCIE_TX10P U23 +1.8V_DPE_VDD18 AG19 AG10
PCIE_RX10N PCIE_TX10N AF20 DPF_PVDD DPB_PVDD AG11
DPF_PVSS DPB_PVSS
R29 T26
P28 PCIE_RX11P PCIE_TX11P T27
PCIE_RX11N PCIE_TX11N SUN_XT_S3
P30 T24
N31 PCIE_RX12P PCIE_TX12P T23
PCIE_RX12N PCIE_TX12N
Mars stuff
N29 P27 Sun un-stuff
M28 PCIE_RX13P PCIE_TX13P P26
PCIE_RX13N PCIE_TX13N +1.0V_DPE_VDD10
M30 P24 +1.0V_DPE_VDD10 L5000

PCIE_RX14P PCIE_TX14P +1.0V_VGA
L31 P23 *0_6
PCIE_RX14N PCIE_TX14N
C5008 C5009 C5010
L29 M27 0.1U/10V_4 1U/10V_4 10U/6.3V_6
K30 PCIE_RX15P PCIE_TX15P N26
B PCIE_RX15N PCIE_TX15N B
CLOCK Mars stuff

CLK_VGA_P AK30 Sun un-stuff
<8> CLK_VGA_P AK32 PCIE_REFCLKP
CLK_VGA_N
<8> CLK_VGA_N PCIE_REFCLKN
TEST_PG renaming—must be tied to ground +1.8V_DPE_VDD18 L5001 +1.8V_VGA
CALIBRATION *0_6
Y22 M72_PCIE_CALRP R5000 1.69K/F_4
PCIE_CALRP +1.0V_VGA
C5011 C5012 C5013
1K/F_4 R5001 N10 AA22 M72_PCIE_CALRN R5002 1K/F_4 0.1U/10V_4 1U/10V_4 10U/6.3V_6
PW RGOOD PCIE_CALRN +1.0V_VGA
PEGX_RST# AL27
PERSTB INT
SUN_XT_S3
+3V_VGA R5102 0_4
+3V R5101 *0_4
A C5014 A
U5001 0.1U/10V_4 +1.0V_VGA <15,17,36>
C5015 *0.1U/10V_4 MC74VHC1G08DFT2G
+1.8V_VGA <15,17,27,36>
5
2
<6,11,23,24,25,27,28> PLTRST#
4 PEGX_RST#
<8> DGPU_HOLD_RST# R5003 330/F_4 DGPU_HIN_RST# 1
PROJECT :U83
R5004 Quanta Computer Inc.
3
100K/F_4
Custom 1A
Sun S3 PCIE_Interface
5 4 3 2 1
5 4 3 2 1
15
U5000B
GPIO10 GPIO30 GPIO16 GPIO20 GPIO15 Sun XT
PWRCNTL5 PWRCNTL4 PWRCNTL3 PWRCNTL2 PWRCNTL1 V-CORE Thermal Solution(Close to GPU)
M93-S3/M92-S2 AF2
AE9 TXCAP_DPA3P AF4 C5017 0.01U/25V_4
TP5010 DVCNTL_0/ DVPDATA_18 TXCAM_DPA3N
0 1 1 0 1 1.175V L9
TP5011 DVCNTL_1 / NC
N9 AG3 U5002
TP5001 DVCNTL_2 / NC TX0P_DPA2P
AE8 DPA AG5
TP5002 DVDATA_12 / DVPDATA_16 TX0M_DPA2N
0 1 1 1 0 1.150V AD9 DGPUT_CLK 8 1 +3V_DELAY
TP5003 DVDATA_11 / DVPDATA_20 SCLK VCC
AC10 AH3
TP5004 DVDATA_10 / DVPDATA_22 TX1P_DPA1P
AD7 AH1 DGPUT_DATA 7 2 GPU_THERMDA
TP5005 DVDATA_9 / DVPDATA_12 TX1M_DPA1N SDA DXP
0 1 1 1 1 1.125V AC8
TP5006 DVDATA_8 / DVPDATA_14
AC7 AK3 VGA_ALERT R5005 *0_4 VGA_ALERT_R 6 3
TP5007 DVDATA_7 / DVPCNTL_0 TX2P_DPA0P ALERT# DXN
AB9 AK1 C5016
TP5008 DVDATA_6 / DVPDATA_8 TX2M_DPA0N
1 0 0 0 0 1.100V AB8 +3V_DELAY R5009 10K/F_4 4 5 2200P/50V_4
TP5012 DVDATA_5 / DVPDATA_6 OVERT# GND
AB7 AK5
D +VDDR4 TP5009 DVDATA_4 DVPDATA_4 TXCBP_DPB3P D
Memory ID AM3 GPU_THERMDC
TXCBM_DPB3N <28> DGPU_OVT#
1 0 0 0 1 1.075V DVO G781-1P8
R5006 *10K/F_4 MEM_ID3 AB4 AK6
R5007 *10K/F_4 MEM_ID2 AB2 DVDATA_3 / DVPDATA_19 TX3P_DPB2P AM5
R5008 *10K/F_4 MEM_ID1 Y8 DVDATA_2 / DVPDATA_21 TX3M_DPB2N
1 0 0 1 0 1.050V DVDATA_1 / DVPDATA_2 DPB Main:AL000781039 G781-1P8(9Ah)
R5010 *10K/F_4 MEM_ID0 Y7 AJ7
DVDATA_0 / DVPDATA_0 TX4P_DPB1P AH6
TX4M_DPB1N 2nd:AL001412005 EMC1412-2-ACZL-TR(9Ah)
1 0 0 1 1 1.025V
AK8
TX5P_DPB0P AL7
TX5M_DPB0N
1 0 1 0 0 1.000V
M93-S3/M92-S2
W6
V6 DPC_PVDD / DVPDATA_11
1 0 1 0 1 0.975V DPC_PVSS / GND M92-S2/M93-S3
V4
DVPDATA_3/TXCCP_DPC3P U5
AC6 DVPCNTL_2/TXCCM_DPC3N
1 0 1 1 0 0.950V DPC_VDD18#1/DVPDAT10
AC5 W3
DPC_VDD18#2/DVPDAT23 DVPDATA_7 / TX0P_DPC2P V2
DVPDATA_1 / TX0M_DPC2N
1 0 1 1 1 0.925V Mars stuff
NC for Sun Y4 Sun un-stuff
AA5 DVPCNTL_MV1 / TX1P_DPC1P W5
AA6 DPC_VDD10#1/DVPDAT15 DVPDATA_9 / TX1M_DPC1N
1 1 0 0 0 0.900V Default +3V_DELAY DPC_VDD10#2/DVPDAT17 +1.8V_AVDD_Q
AA3
DVPDATA_13 / TX2P_DPC0P Y2
DVPCNTL_1 / TX2M_DPC0N 1.8V(70mA)
R5011 4.7K_4 DGPUT_DATA
1 1 0 0 1 0.875V R5012 4.7K_4 DGPUT_CLK U1 +1.8V_AVDD_Q
DPC_VSSR#1 / DVPCLK +1.8V_VGA
W1 L5002 *0_6
U3 DPC_VSSR#2 / DVPDAT5
1 1 0 1 0 0.850V Access+3V_DELAY
to SMBBus ans SDA/SCL is mandatory on all designs DPC_VSSR#3 / GND
Add test points on SMBBus and SDA/SCL for debug Y6
AA1 DPC_VSSR#4 / GND C5018 C5019 C5020
R5013 4.7K_4 DPC_VSSR#5/ DVPCNTL_MV0 DPC
1 1 0 1 1 0.825V 0.1U/10V_4 1U/10V_4 *10U/6.3V_6
R5014 4.7K_4
Mars stuff
R1
Sun un-stuff
1 1 1 0 0 0.800V TP5000 SCL
R3 I2C
TP5013 SDA +VDDD1
C 1 1 1 0 1 0.775V AM26 1.8V(45mA VDD1DI) C
R TP5014
GENERAL PURPOSE I/O AK26 AVSSN#
GPIO0 U6 AVSSN#1 +VDDD1
R5015 *10K/F_4 <16> GPIO0 GPIO_0 +1.8V_VGA
DGPU_TCK <16> GPIO1 GPIO1 U10 AL25 L5003 *0_6
GPIO_1 G TP5015
<16> GPIO2 GPIO2 T10 AJ25
R5016 0_4 DGPUT_DATA_R U8 GPIO_2 AVSSN#2
<28> DGPUT_DATA GPIO_3_SMBDATA
<28> DGPUT_CLK R5017 0_4 DGPUT_CLK_R U7 AH24 C5021 C5022 C5023
+3V_DELAY GPIO_4_SMBCLK B TP5016
R5018 0_4 GPIO5 T9 AG25 0.1U/10V_4 1U/10V_4 *10U/6.3V_6
<28> GPU_AC_BATT GPIO_5_AC_BATT AVSSN#3
VDDCI_GPIO0 T8 DAC1
R5019 100K/F_4 GPU_AC_BATT R5020 *10K/F_4 T7 GPIO_6 AH26
GPIO_7_BLON HSYNC
Mars stuff
DGPU_ROMSO P10 AJ27 Sun un-stuff
TP5017 GPIO_8_ROMSO VSYNC
R5021 *10K/F_4 DGPU_TDI DGPU_ROMSI P4
TP5018 GPIO_9_ROMSI
<35> GFX_CORE_CNTRL5
P2
R5022 *10K/F_4 DGPU_TMS GPIO11 N6 GPIO_10_ROMSCK AD22 R5023 *499/F_4
<16> GPIO11 GPIO_11 RSET
GFX_CORE_CNTRL4_Mars N5
R5024 *10K/F_4 DGPU_TDO GPIO13 N3 GPIO_12 AG24 +1.8V_AVDD_Q
<16> GPIO13 GPIO_13 AVDD +1.8V_AVDD_Q
TP5019 HDMI_HP2 Y9 AE22 AVSSQ
R5025 *10K/F_4 DGPU_TRSTB GFX_CORE_CNTRL1 N1 GPIO_14_HPD2 AVSSQ
<35> GFX_CORE_CNTRL1 GPIO_15_PWRCNTL_0
<35> GFX_CORE_CNTRL3 GFX_CORE_CNTRL3 M4 AE23 +VDDD1 +VDDD1
R5026 *10K/F_4 PCIE_CLKREQ_VGA# VGA_ALERT R6 GPIO_16_SSIN VDD1DI AD23 VSS1D1
HPD3 W10 GPIO_17_THERMAL_INT VSS1DI
TP5020 GPIO_18_HPD3
R5027 *10K/F_4 DGPU_PROCHOT# <28> TEMP_FAIL TEMP_FAIL M2 M92-S2/M93-S3
GFX_CORE_CNTRL2 P8 GPIO_19_CTF AM12
<35> GFX_CORE_CNTRL2 GPIO_20_PWRCNTL_1 CEC_1
R5028 10K/F_4 VGA_ALERT P7 AK12
DGPU_ROMCSB N8 GPIO_21_BB_EN R2B / NC
TP5021 GPIO_22_ROMCSB
<8> PCIE_CLKREQ_VGA# PCIE_CLKREQ_VGA# N7 AL11
DGPU_PROCHOT# R5029 *0_4 AK10 GPIO_23_CLKREQB G2 / NC AJ11
GFX_CORE_CNTRL4_SUN AM10 GPIO_29 G2B / NC
R5030 10K/F_4 TEMP_FAIL GPIO_30
DGPU_TRSTB L6 AL9
TP5022 JTAG_TRSTB B2B / NC
DGPU_TDI L5
TP5023 JTAG_TDI
Mars stuff Ra DGPU_TCK L3
TP5024 JTAG_TCK
Sun stuff Rb DGPU_TMS L1 AH12
TP5025 JTAG_TMS C / NC
DGPU_TDO K4 DAC2
TP5026 JTAG_TDO
Ra TESTEN AF24 AJ9
R5031 *0_4 GFX_CORE_CNTRL4_Mars TESTEN COMP / NC
<16,35> GFX_CORE_CNTRL4
AB13
Rb W8 GENERICA AL13
B
R5032 0_4 GFX_CORE_CNTRL4_SUN W9 GENERICB H2SYNC AJ13 B
W7 GENERICC V2SYNC
Mars stuff Rc, Rd, Ca GENERICD
Sun un-stuff Rc, Rd, Ca AD10
GENERICE_HPD4 AD19 PS_1
PS_1 TP5027
AC14 AC19 PS_0 TP5028
HPD1 PS_0
+3V_DELAY +1.8V_VGA 1.8V+R6043(249R)=1.8V/3=0.6V
Fo Mars/ Chelsea
Rc AE20 PS_3 TP5029
Change La, Lb R5033 *499/F_4 PS_3 +1.8V_VGA +1.8V_VGA
Bead to 0 ohm AE17 PS_2 TP5030
R5034 R5035 Rd *249/F_4 +0.6V_VREFG AC16 PS_2
VREFG AE19 R5036 *0_4
*5.1K/F_4 For Thems: La,Lb: TS_A
Reserved. Do not connect on the PCB.
Ca
CX8PG471000/BLM18PG471SN1D/1A_6 R5037 R5038
*0_6/S 1.8V(75mA DPLL_PVDD) C5024 *0.1U/10V_4 AG13 R5039 *715/F_4 8.45K/F_4 *8.45K/F_4
TESTEN R2SET / NC
+1.8V_VGA
L5004 PS_0 PS_1
La C5026 DDC/AUX PS_3[3:1] Vendor Type Vendor P/N R5045 R5048
C5025 C5027 AE6
R5040 10U/6.3V_6 1U/10V_4 0.1U/10V_4 PLL/CLOCK DDC1CLK AE5 C5028
DDC1DATA 000 Hynix- F(Huma) 128Mx16 *4, 900Mhz H5TC2G63FFR-11C NC 4.75K
1K/F_4 +1.8V_DPLL_PVDD AF14 R5041 *0.01U/50V_4 R5042 C5029
AE14 DPLL_PVDD AD2 2K/F_4 4.75K/F_4 *0.082U/16V_4
DPLL_PVSS AUX1P 001 Micron- V89C/K 128Mx16 *4, 900Mhz MT41J128M16JT-093G:K 8.45K 2K
AD4
AUX1N
Lb 010 Samsung- E die 128Mx16 *4, 900Mhz K4W2G1646E-BC1A 4.53K 2K SI Modify
+1.0V_VGA L5005 *0_6/S +1.0V_DPLL_VDDC AD14 AC11
DPLL_VDDC DDC2CLK AC13
1.0V(125mA DPLL_VDDC) C5030 C5031 C5032 DDC2DATA
011 Hynix- Huma die 256Mx16 *4, 900Mhz H5TC4G63FAFR-11C 6.98K 4.99K +1.8V_VGA +1.8V_VGA
10U/6.3V_8 1U/10V_4 0.1U/10V_4 EVGA-XTALI AM28 AD13
EVGA-XTALO AK28 XTALIN AUX2P AD11
R5043 *0_4 AC22 XTALOUT AUX2N 100 Samsung- B die 256Mx16 *4, 900Mhz K4W4G1646B-HC1A 4.53K 4.99K
0.85mm AB22 NC#2/XO_IN AE16
NC#1/XO_IN2 DDCCLK_AUX5P
DDCDATA_AUX5N
AD16 101 Micron- E 256Mx16 *4, 900Mhz MT41J256M16HA-093G:E 3.24K 5.62K R5044 R5045
*0_4 *0_4
HCB1608KF-121T30(120,3000MA) 1.8V(5mA TSVDD) AC1
DDC6CLK TP5031
+1.8V_VGA GPU_THERMDA T4 AC3 PS_2 PS_3
DPLUS DDC6DATA TP5032
L5006 GPU_THERMDC T2 THERMAL
DMINUS AD20
C5034 C5035 NC/DDCCLK_AUX3P AC20 R5046 0_4
BIT5 => BIT0
A Reserve for Power Play NC/DDCDATA_AUX3N For AMD tuning GPU_XTAL27_IN <27>
A
C5033 GPIO28 R5 R5047 C5036 R5048 C5037
GFX_CORE_CNTRL1 R5049 3.01K/F_4 10U/6.3V_6 1U/10V_4 0.1U/10V_4
<16> GPIO28
+1.8V_TSVDD AD17 TS_FDO timing purpose C5038 8.2P/50V_4 4.75K/F_4 0.68U/4V_4 4.75K/F_4 *0.01U/50V_4
AC17 TSVDD PS0 => 11001
GFX_CORE_CNTRL2 R5050 3.01K/F_4 TSVSS EVGA-XTALI
PS1 => 01000
2
1
GFX_CORE_CNTRL3 R5051 10K/F_4 SI Modify
Y5000 R5053
GFX_CORE_CNTRL4 R5052 *3.01K/F_4 1M/F_4
SI Modify ICT PS2 => 00000
R5054 *3.01K/F_4
GFX_CORE_CNTRL5 SUN_XT_S3 *27MHZ +-10PPM
PROJECT :U83
4
3
Ra EVGA-XTALO PS3 => 11000
GFX_CORE_CNTRL5 R5055
Rb
10K/F_4 +3V_DELAY
C5039 8.2P/50V_4
GFX_CORE_CNTRL3 R5056 *10K/F_4 For Mars: Stuff Ra only=> VDDC 1.1V For Int Clk 27Mhz Size Document Number Rev
R5057 *3.01K/F_4 +1.8V_VGA <14,17,27,36> Custom
VDDCI_GPIO0 For Thems: Stuff Ra, Rb=> VDDC 1.0V Sun S3 Main 1A
+1.0V_VGA <14,17,36>
5 4 3 2 1
5 4 3 2 1
AA27
AB24
U5000E
PCIE_VSS#1 GND#1
A3
A30
U5000F
LVDS CONTROL AB11

16
AB32 PCIE_VSS#2 GND#2 AA13 VARY_BL AB12 RECOMMENDED SETTINGS
AC24 PCIE_VSS#3 GND#3 / EVDDQ#2 AA16 DIGON 0= DO NOT INSTALL RESISTOR
AC26 PCIE_VSS#4 GND#4 AB10 CONFIGURATION STRAPS-- SEE EACH DATABOOK FOR STRAP DETAILS 1 = INSTALL 3K RESISTOR
AC27 PCIE_VSS#5 GND#5 AB15 X = DESIGN DEPENDANT
AD25 PCIE_VSS#6 GND#6 / EVDDQ#3 AB6
ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED, NA = NOT APPLICABLE
AD32 PCIE_VSS#7 GND#7 AC9 AH20 THEY MUST NOT CONFLICT DURING RESET
D
AE27 PCIE_VSS#8 GND#8 AD6 TXCLK_UP_DPF3P AJ19 D
AF32 PCIE_VSS#9 GND#9 AD8 TXCLK_UN_DPF3N
AG27 PCIE_VSS#10 GND#10 AE7 AL21 STRAPS PIN DESCRIPTION OF DEFAULT SETTINGS
AH32 PCIE_VSS#11 GND#11 AG12 TXOUT_U0P_DPF2P AK20
K28 PCIE_VSS#12 GND#12 AH10 TXOUT_U0N_DPF2N
K32 PCIE_VSS#13 GND#13 AH28 AH22 TX_PWRS_ENB GPIO0 PCIE FULL TX OUTPUT SWING
L27 PCIE_VSS#14 GND#14 B10 TXOUT_U1P_DPF1P AJ21
PCIE_VSS#15 GND#15 TXOUT_U1N_DPF1N 0
M32 B12 TX_DEEMPH_EN GPIO1 PCIE TRANSMITTER DE-EMPHASIS ENABLED
N25 PCIE_VSS#16 GND#16 B14 AL23
PCIE_VSS#17 GND#17 TXOUT_U2P_DPF0P X
N27 B16 AK22
P25 PCIE_VSS#18 GND#18 B18 TXOUT_U2N_DPF0N RSVD GPIO2 RESERVED 0
P32 PCIE_VSS#19 GND#19 B20 AK24 RSVD GPIO8 RESERVED 0
R27 PCIE_VSS#20 GND#20 B22 TXOUT_U3P AJ23
T25 PCIE_VSS#21 GND#21 B24 TXOUT_U3N
T32 PCIE_VSS#22 GND#22 B26 BIF_VGA DIS GPIO9 VGA ENABLED 0
U25 PCIE_VSS#23 GND#23 B6 LVTMDP
U27 PCIE_VSS#24 GND#24 B8
V32 PCIE_VSS#25 GND#25 C1 AL15 RSVD GPIO21 RESERVED 0
W 25 PCIE_VSS#26 GND#26 C32 TXCLK_LP_DPE3P AK14
W 26 PCIE_VSS#27 GND#27 E28 TXCLK_LN_DPE3N
W 27 PCIE_VSS#28 GND#28 F10 AH16 BIOS_ROM_EN GPIO_22_ROMCSB ENABLE EXTERNAL BIOS ROM
PCIE_VSS#29 GND#29 TXOUT_L0P_DPE2P 0
Y25 F12 AJ15
Y32 PCIE_VSS#30 GND#30 F14 TXOUT_L0N_DPE2N
PCIE_VSS#31 GND#31 F16 AL17 ROMIDCFG(2:0) GPIO[13:11] SERIAL ROM TYPE OR MEMORY APERTURE SIZE SELECT 0 0 1
GND#32 F18 TXOUT_L1P_DPE1P AK16
GND#33 F2 TXOUT_L1N_DPE1N
GND#34 F20 AH18 VIP_DEVICE_STRAP_ENA V2SYNC IGNORE VIP DEVICE STRAPS (Removed on Seymour/Whistler) 0
M6 GND#35 F22 TXOUT_L2P_DPE0P AJ17
N11 GND#56 GND#36 F24 TXOUT_L2N_DPE0N
GND#57 GND#37 F26 AL19 RSVD H2SYNC RESERVED 0
C C
N13 GND#38 F6 TXOUT_L3P AK18
N16 GND#59 GND#39 F8 TXOUT_L3N
N18
N21
GND#60
GND#61
GND#62
GND GND#40
GND#41
GND#42
G10
G27
AUD[1]
AUD[0]
HSYNC
VSYNC
SEE DATABOOK FOR DETAIL
SEE DATABOOK FOR DETAIL
0
0
P6 G31
P9 GND#63 GND#43 G8 SUN_XT_S3
R12 GND#64 GND#44 H14 RSVD GENERICC RESERVED 0
R15 GND#65 GND#45 H17
R17 GND#66 GND#46 H2
R20 GND#67 GND#47 H20
T13 GND#68 GND#48 H6
T16 GND#69 GND#49 J27
T18 GND#70
GND#71
GND#50
GND#51
J31 NOTE1: AMD RESERVED CONFIGURATION STRAPS
T21 K11
T6 GND#72 GND#52 K2
U15 GND#73 GND#53 K22
ALLOW FOR PULLUP PADS FOR THESE STRAPS BUT DO NOT INSTALL RESISTOR. IF THESE GPIOS ARE USED,
U17 GND#74 GND#54 K6 THEY MUST KEEP "LOW" AND NOT CONFLICT DURING RESET.
U20 GND#75 GND#55 T11
U9 GND#76 GND#85 R11
V13 GND#77 GND#86 GPIO21 H2SYNC GENERICC GPIO8 GPIO2
V16 GND#78
V18 GND#79
Y10 GND#80
Y15 GND#81
Y17 GND#82 A32
Y20 GND#83 VSS_MECH#1 AM1
GND#84 VSS_MECH#2 AM32
VSS_MECH#3
B B
SUN_XT_S3
+3V_DELAY
Power Up/Down Sequence Memory Aperture size(Seymour)

GPIO0 R5058 *10K/F_4
GPIO9 GPIO13 GPIO12 GPIO11 <15> GPIO0
GPIO1 R5059 *10K/F_4
<15> GPIO1
BIOSROM ROMIDCFG2 ROMIDCFG1 ROMIDCFG0 GPIO2 R5060 *10K/F_4
<15> GPIO2
0 128M 0 0 0 GPIO13 R5061 *10K/F_4
<15> GPIO13
+VGA_CORE VDDC
0 256M 0 0 1 <15,35> GFX_CORE_CNTRL4
GPIO12 R5062 10K/F_4 SI Modify
GPIO11 R5063 *10K/F_4
0 64M 0 1 0 <15> GPIO11
+VGA_CORE VDDCI GPIO28 Ra R5064 *10K/F_4

0 32M 0 1 1 <15> GPIO28
Rb R5065 10K/F_4
+1.5V_VGA VDDR1 0 512M 1 0 0

Mars : stuff Ra=> disable MLPS
A 0 1G 1 0 1 stuff Rb=> enable MLPS A
+3.3V_Delay VDDR3
0 2G 1 1 0
+1.8V_VGA VDDR4 0 4G 1 1 1 PROJECT :U83
+1.8V_VGA VDD_CT
It is a shared pin strap with CONFIG[2:0] if BIOS_ROM_EN is set to 0.
20ms 20ms Size Document Number Rev
Custom 1A
+3V_DELAY <15,17> Sun S3 GND / LVDS/ Straps
5 4 3 2 1
5 4 3 2 1
17
D D
U5000D
MEM I/O
1.5V ( DDR3, MVDDQ = 1.5V@1A) PCIE AM30
PCIE_PVDD +1.8V_VGA
+1.5V_VGA H13 AB23
H16 VDDR1#1 PCIE_VDDR#1 AC23
H19 VDDR1#2 PCIE_VDDR#2 AD24
C5040 C5043 C5044 C5045 C5050 J10 VDDR1#3 PCIE_VDDR#3 AE24
2.2U/6.3V_4 2.2U/6.3V_4 2.2U/6.3V_4 2.2U/6.3V_4 2.2U/6.3V_4 J23 VDDR1#4 PCIE_VDDR#4 AE25 C5046 C5047 C5048 C5049
VDDR1#5 PCIE_VDDR#5 NC for Mars & Sun
J24 AE26 0.01U/25V_4 0.1U/10V_4 1U/6.3V_4 10U/6.3VS_6
J9 VDDR1#6 PCIE_VDDR#6 AF25
K10 VDDR1#7 PCIE_VDDR#7 AG26
K23 VDDR1#8 PCIE_VDDR#8
K24 VDDR1#9
K9 VDDR1#10 L23
C5051 C5041 C5052 C5053 C5054 C5042 C5055 L11 VDDR1#11 PCIE_VDDC#1 L24 +1.0V_PCIE_VDDC +1.0V_VGA
10U/6.3VS_6 10U/6.3VS_6 10U/6.3VS_6 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 L12 VDDR1#12 PCIE_VDDC#2 L25 L5007
VDDR1#13 PCIE_VDDC#3 0.95V(2.5A)
0.1U/10V_4 L13 L26 +1.0V_PCIE_VDDC
L20 VDDR1#14 PCIE_VDDC#4 M22 *0_8/S
L21 VDDR1#15 PCIE_VDDC#5 N22
L22 VDDR1#16 PCIE_VDDC#6 N23 C5056 C5057 C5058 C5059 C5060 C5061 C5062 C5063 C5064
+1.8V_VDD_CT VDDR1#17 PCIE_VDDC#7 N24 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 10U/6.3VS_6 10U/6.3VS_6
PCIE_VDDC#8 R22
VDDC_CT: 1.8V @13mA PCIE_VDDC#9
L5008 0_6 +1.8V_VDD_CT T22
+1.8V_VGA PCIE_VDDC#10
LEVEL U22
TRANSLATION PCIE_VDDC#11 V22
C5065 C5066 C5067 C5068 C5069 AA20 PCIE_VDDC#12 +VGA_CORE
VDD_CT#1 VDDC+VDDCI
C 10U/6.3VS_6 1U/10V_4 1U/10V_4 1U/10V_4 0.1U/10V_4 AA21 0.8~1.15V(28A Max) C
AB20 VDD_CT#2 AA15
+3V_DELAY AB21 VDD_CT#3 CORE VDDC#1 N15
VDD_CT#4 VDDC#2 N17
VDDR3 : 3.3V @ 25mA VDDC#3
+3V_VGA L5009 *0_6/S +3V_DELAY M93-S3/M92-S2 R13 C5070 C5071 C5072 C5073 C5074 C5075 C5076 C5077 C5078 C5079
VDDC#4
POWER
R16 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4
AA17 VDDC#5 R18
AA18 VDDR3#1 VDDC#6 Y21
Mars stuff C5080 C5081 C5082 C5083
VDDR3#2 I/O VDDC#7
Sun un-stuff 1U/10V_4 1U/10V_4 1U/10V_4 10U/6.3VS_6 AB17 T12
+VDDR4 AB18 VDDR3#3 VDDC#8 T15
VDDR3#4 VDDC#9 T17
V12 VDDC#10 T20
VDDR4 : 1.8V @ 300mA VDDR4#1 / VDDR5 VDDC#11
+1.8V_VGA L5010 *0_6 +VDDR4 Y12 U13 C5084 C5085 C5086 C5087 C5088 C5089 C5090 C5091 C5092 C5093
U12 VDDR4#2 VDDC#12 U16 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4
VDDR4#3 / VDDR5 VDDC#13 U18
C5094 C5095 C5096 AA11 VDDC#14 V21
10U/6.3VS_6 1U/10V_4 0.1U/10V_4 Y11 NC#1 / VDDR4 VDDC#15 V15
TP5033 DVCLK / VDDR4 VDDC#16 V17
V11 VDDC#17 V20
1.8V(90mA MPV18) NC#3 / VDDR5 VDDC#18 Y13
L5011 BLM18PG181SN1D(180,1.5A)_6 MPV18 VDDC#20 Y16 C5097 C5098 C5099 C5100 C5101 C5102 C5103 C5104 C5105 C5106
+1.8V_VGA VDDC#21 Y18 1U/10V_4 2.2U/6.3V_41U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 2.2U/6.3V_41U/10V_4 1U/10V_4
VDDC#22 N12
C5107 C5108 C5109 VDDC#23 M11
1U/10V_4 0.1U/10V_4 10U/6.3VS_6 MEM CLK VDDC#24 AA12
L17 VDDC#25 U11
VDDRHA VDDC#26
1
1.8V(75mA SPV18) U21
L16 VDDC#19/BIF_VDDC R21 +
L5012 TI160808U121(120,2.5A) SPV18 VSSRHA VDDC#23 /BIF_VDDC C5110 C5111 C5112 C5113 C5611
+1.8V_VGA M13 10U/6.3VS_6 10U/6.3VS_6 10U/6.3VS_6 10U/6.3VS_6 330u_2.5V_3528
2
B PLL ISOLATED VDDCI#1 M15 B
C5115 C5116 C5117 CORE I/O VDDCI#2 M16
1U/10V_4 0.1U/10V_4 10U/6.3VS_6 VDDCI#3 M17
VDDCI#4 +1.0V_PCIE_VDDC
M18 0.95V(1.4A)
MPV18 L8 VDDCI#5 M20
MPLL_PVDD VDDCI#6 M21 C5118 C5119
VDDCI#7 N20 10U/6.3VS_6 1U/10V_4
SPV18 H7 VDDCI#8
0.95V(100mA SPV10) SPLL_PVDD VDDC+VDDCI
0.8~1.15V(28A Max)
L5013 TI160808U121(120,2.5A) +1.0V_VGA_SPV10 H8
+1.0V_VGA SPLL_VDDC +VGA_CORE
J7
C5120 C5121 C5122 SPLL_PVSS C5123 C5124 C5125 C5126 C5127 C5128
10U/6.3VS_6 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 10U/6.3VS_6 10U/6.3VS_6 10U/6.3VS_6
0.1U/10V_4
BACK BIAS
M12
BBP#2
SUN_XT_S3
+1.5V_VGA <18,19,37>
+1.8V_VGA <14,15,27,36>
A +1.0V_VGA <14,15,36> A
+VGA_CORE <35,36>
+3V <6,7,8,9,10,11,12,13,14,20,21,22,23,24,25,26,27,28,33,34,35>
+5V <6,21,22,24,25,26,27,34>
PROJECT :U83
Custom 1A
Sun S3 Power_and_NC
5 4 3 2 1
5 4 3 2 1
18
U5000C
<19> VMA_ODT0 VMA_ODT0

<19> VMA_ODT1 VMA_ODT1 VMA_DQ0 K27 K17 VMA_MA0
VMA_DQ1 J29 DQA_0 MAA_0 J20 VMA_MA1
VMA_RAS0# VMA_DQ2 H30 DQA_1 MAA_1 H23 VMA_MA2
<19> VMA_RAS0# DQA_2 MAA_2
<19> VMA_RAS1# VMA_RAS1# VMA_DQ3 H32 G23 VMA_MA3
VMA_DQ4 G29 DQA_3 MAA_3 G24 VMA_MA4
VMA_CAS0# VMA_DQ5 F28 DQA_4 MAA_4 H24 VMA_MA5
<19> VMA_CAS0# DQA_5 MAA_5
<19> VMA_CAS1# VMA_CAS1# VMA_DQ6 F32 J19 VMA_MA6
VMA_DQ7 F30 DQA_6 MAA_6 K19 VMA_MA7
DQA_7 MAA_7
MEMORY INTERFACE
<19> VMA_WE0# VMA_WE0# VMA_DQ8 C30 J14 VMA_MA8
VMA_WE1# VMA_DQ9 F27 DQA_8 MAA_8 K14 VMA_MA9
D <19> VMA_WE1# DQA_9 MAA_9 D
VMA_DQ10 A28 J11 VMA_MA10
VMA_CS0# VMA_DQ11 C28 DQA_10 MAA_10 J13 VMA_MA11
<19> VMA_CS0# DQA_11 MAA_11
VMA_DQ12 E27 H11 VMA_MA12
VMA_CS1# VMA_DQ13 G26 DQA_12 MAA_12 G11 VMA_BA2
<19> VMA_CS1# DQA_13 MAA_13/BA2
VMA_DQ14 D26 J16 VMA_BA0
VMA_CKE0 VMA_DQ15 F25 DQA_14 MAA_14/BA0 L15 VMA_BA1
<19> VMA_CKE0 DQA_15 MAA_15/BA1
<19> VMA_CKE1 VMA_CKE1 VMA_DQ16 A25
VMA_DQ17 C25 DQA_16 E32 VMA_DM0
VMA_CLK0 VMA_DQ18 E25 DQA_17 DQMA_0 E30 VMA_DM1
<19> VMA_CLK0 DQA_18 DQMA_1
<19> VMA_CLK0# VMA_CLK0# VMA_DQ19 D24 A21 VMA_DM2
VMA_DQ20 E23 DQA_19 DQMA_2 C21 VMA_DM3
VMA_CLK1 VMA_DQ21 F23 DQA_20 DQMA_3 E13 VMA_DM4
<19> VMA_CLK1 DQA_21 DQMA_4
<19> VMA_CLK1# VMA_CLK1# VMA_DQ22 D22 D12 VMA_DM5
VMA_DQ23 F21 DQA_22 DQMA_5 E3 VMA_DM6
VMA_WDQS[7..0] VMA_DQ24 E21 DQA_23 DQMA_6 F4 VMA_DM7
<19> VMA_WDQS[7..0] DQA_24 DQMA_7
VMA_DQ25 D20
VMA_RDQS[7..0] VMA_DQ26 F19 DQA_25 H28 VMA_RDQS0
<19> VMA_RDQS[7..0] DQA_26 RDQSA_0
VMA_DQ27 A19 C27 VMA_RDQS1
VMA_DM[7..0] VMA_DQ28 D18 DQA_27 RDQSA_1 A23 VMA_RDQS2
<19> VMA_DM[7..0] DQA_28 RDQSA_2
VMA_DQ29 F17 E19 VMA_RDQS3
VMA_DQ[63..0] VMA_DQ30 A17 DQA_29 RDQSA_3 E15 VMA_RDQS4
<19> VMA_DQ[63..0] DQA_30 RDQSA_4
VMA_DQ31 C17 D10 VMA_RDQS5
From GPU
VMA_MA[14..0] VMA_DQ32 E17 DQA_31 RDQSA_5 D6 VMA_RDQS6
<19> VMA_MA[14..0] DQA_32 RDQSA_6
VMA_DQ33 D16 G5 VMA_RDQS7
VMA_DQ34 F15 DQA_33 RDQSA_7 25mm (max) 5mm (max) 25mm (max)
VMA_BA0 VMA_DQ35 A15 DQA_34 H27 VMA_WDQS0
<19> VMA_BA0 DQA_35 W DQSA_0
<19> VMA_BA1 VMA_BA1 VMA_DQ36 D14 A27 VMA_WDQS1
VMA_BA2 VMA_DQ37 F13 DQA_36 W DQSA_1 C23 VMA_WDQS2 DRAM_RST R5066 10/F_4 DRAM_RST_M
<19> VMA_BA2 DQA_37 W DQSA_2 DRAM_RST_M <19>
VMA_DQ38 A13 C19 VMA_WDQS3 R5067 51.1/F_4
VMA_DQ39 C13 DQA_38 W DQSA_3 C15 VMA_WDQS4
C C
VMA_DQ40 E11 DQA_39 W DQSA_4 E9 VMA_WDQS5
support 1Gbit DQA_40 W DQSA_5
VRAM ( 64M X 16 ) VMA_DQ41 A11 C5 VMA_WDQS6 R5068 C5129
VMA_DQ42 C11 DQA_41 W DQSA_6 H4 VMA_WDQS7
VMA_DQ43 F11 DQA_42 W DQSA_7 4.99K/F_4 120P/50V_4
VMA_DQ44 A9 DQA_43 L18 VMA_ODT0
VMA_DQ45 C9 DQA_44 ODTA0 K16 VMA_ODT1
VMA_DQ46 F9 DQA_45 ODTA1
VMA_DQ47 D8 DQA_46 H26 VMA_CLK0
VMA_DQ48 E7 DQA_47 CLKA0 H25 VMA_CLK0#
VMA_DQ49 A7 DQA_48 CLKA0B
VMA_DQ50 C7 DQA_49 G9 VMA_CLK1
VMA_DQ51 F7 DQA_50 CLKA1 H9 VMA_CLK1#
DQA_51 CLKA1B Place all these components very close to GPU (Within
VMA_DQ52 A5
VMA_DQ53 E5 DQA_52 G22 VMA_RAS0#
25mm) and keep all component close to each Other (within
VMA_DQ54 C3 DQA_53 RASA0B G17 VMA_RAS1# 5mm) except Rser2
VMA_DQ55 E1 DQA_54 RASA1B
VMA_DQ56 G7 DQA_55 G19 VMA_CAS0# This basic topology should be used for DRAM_RST for DDR3/GDDR5.These
+1.5V_VGA VMA_DQ57 G6 DQA_56 CASA0B G16 VMA_CAS1#
DQA_57 CASA1B
Capacitors and Resistor values are an example only. The Series R and
VMA_DQ58 G1 || Cap values will depend on the DRAM load and will have to be
VMA_DQ59 G3 DQA_58 H22 VMA_CS0#
DQA_59 CSA0B_0 calculated for different Memory ,DRAM Load and board to pass Reset
VMA_DQ60 J6 J22 Signal Spec.
R5069 VMA_DQ61 J1 DQA_60 CSA0B_1
VMA_DQ62 J3 DQA_61 G13 VMA_CS1#
40.2/F_4 VMA_DQ63 J5 DQA_62 CSA1B_0 K13
DQA_63 CSA1B_1
MVREFD K26 K20 VMA_CKE0
J26 MVREFDA CKEA0 J17 VMA_CKE1
+1.5V_VGA MVREFSA CKEA1
J25 G25 VMA_WE0#
B
R5070 R5071 1K/F_4 K7 MEM_CALRN0 W EA0B H10 VMA_WE1# B
C5130 NC/TESTEN#2 W EA1B
1U/10V_4
100/F_4 R5072 J8 AB16 PX_EN
MEM_CALRP1/DPC_CALR PX_EN TP5034
R5073 120/F_4 K25 G14 VMA_MA14
40.2/F_4 MEM_CALRP0 RSVD#2 G20 VMA_MA13
DRAM_RST L10 RSVD#3
MVREFS DRAM_RST
CLKTESTA K8
CLKTESTB L7 CLKTESTA
CLKTESTB
R5074
C5131 SUN_XT_S3
1U/10V_4 100/F_4
C5132 C5133
*0.1U/10V_4 *0.1U/10V_4
R5075 R5076
*51.1/F_4 *51.1/F_4
route 50ohms
single-ended/100ohms diff +1.5V_VGA <17,19,37>
and keep short
A A
PROJECT :U83
Custom 1A
Sun S3 MEM_Interface
5 4 3 2 1
5 4 3 2 1
VMA_MA[14..0]
19
<18> VMA_MA[14..0]
1G DDR3
<18> VMA_DQ[63..0]
<18> VMA_DM[7..0] <18> VMA_WDQS[7..0]
<18> VMA_RDQS[7..0]
U5003 U5004 U5005 U5006
VREFC_VMA1 M9 E4 VMA_DQ20 VREFC_VMA2 M9 E4 VMA_DQ27 VREFC_VMA3 M9 E4 VMA_DQ61 VREFC_VMA4 M9 E4 VMA_DQ48

VREFD_VMA1 H2 VREFCA DQL0 F8 VMA_DQ18 VREFD_VMA2 H2 VREFCA DQL0 F8 VMA_DQ31 VREFD_VMA3 H2 VREFCA DQL0 F8 VMA_DQ58 VREFD_VMA4 H2 VREFCA DQL0 F8 VMA_DQ52
VREFDQ DQL1 F3 VMA_DQ22 VREFDQ DQL1 F3 VMA_DQ25 VREFDQ DQL1 F3 VMA_DQ63 VREFDQ DQL1 F3 VMA_DQ53
VMA_MA0 N4 DQL2 F9 VMA_DQ17 VMA_MA0 N4 DQL2 F9 VMA_DQ29 VMA_MA0 N4 DQL2 F9 VMA_DQ57 VMA_MA0 N4 DQL2 F9 VMA_DQ54
VMA_MA1 P8 A0 DQL3 H4 VMA_DQ23 VMA_MA1 P8 A0 DQL3 H4 VMA_DQ30 VMA_MA1 P8 A0 DQL3 H4 VMA_DQ62 VMA_MA1 P8 A0 DQL3 H4 VMA_DQ49
VMA_MA3 N3 A2 DQL5 G3 VMA_DQ21 VMA_MA3 N3 A2 DQL5 G3 VMA_DQ24 VMA_MA3 N3 A2 DQL5 G3 VMA_DQ60 VMA_MA3 N3 A2 DQL5 G3 VMA_DQ50
VMA_MA5 P3 A4 DQL7 VMA_MA5 P3 A4 DQL7 VMA_MA5 P3 A4 DQL7 VMA_MA5 P3 A4 DQL7
D VMA_MA6 R9 A5 VMA_MA6 R9 A5 VMA_MA6 R9 A5 VMA_MA6 R9 A5 D
VMA_MA7 R3 A6 D8 VMA_DQ0 VMA_MA7 R3 A6 D8 VMA_DQ15 VMA_MA7 R3 A6 D8 VMA_DQ43 VMA_MA7 R3 A6 D8 VMA_DQ37
VMA_MA8 T9 A7 DQU0 C4 VMA_DQ5 VMA_MA8 T9 A7 DQU0 C4 VMA_DQ10 VMA_MA8 T9 A7 DQU0 C4 VMA_DQ44 VMA_MA8 T9 A7 DQU0 C4 VMA_DQ32
VMA_MA9 R4 A8 DQU1 C9 VMA_DQ1 VMA_MA9 R4 A8 DQU1 C9 VMA_DQ13 VMA_MA9 R4 A8 DQU1 C9 VMA_DQ40 VMA_MA9 R4 A8 DQU1 C9 VMA_DQ36
VMA_MA10 L8 A9 DQU2 C3 VMA_DQ4 VMA_MA10 L8 A9 DQU2 C3 VMA_DQ9 VMA_MA10 L8 A9 DQU2 C3 VMA_DQ47 VMA_MA10 L8 A9 DQU2 C3 VMA_DQ33
VMA_MA11 R8 A10/AP DQU3 A8 VMA_DQ2 VMA_MA11 R8 A10/AP DQU3 A8 VMA_DQ12 VMA_MA11 R8 A10/AP DQU3 A8 VMA_DQ42 VMA_MA11 R8 A10/AP DQU3 A8 VMA_DQ39
VMA_MA12 N8 A11 DQU4 A3 VMA_DQ7 VMA_MA12 N8 A11 DQU4 A3 VMA_DQ8 VMA_MA12 N8 A11 DQU4 A3 VMA_DQ45 VMA_MA12 N8 A11 DQU4 A3 VMA_DQ34
VMA_MA13 T4 A12/BC DQU5 B9 VMA_DQ3 VMA_MA13 T4 A12/BC DQU5 B9 VMA_DQ14 VMA_MA13 T4 A12/BC DQU5 B9 VMA_DQ41 VMA_MA13 T4 A12/BC DQU5 B9 VMA_DQ38
VMA_MA14 T8 A13 DQU6 A4 VMA_DQ6 VMA_MA14 T8 A13 DQU6 A4 VMA_DQ11 VMA_MA14 T8 A13 DQU6 A4 VMA_DQ46 VMA_MA14 T8 A13 DQU6 A4 VMA_DQ35
M8 A14 DQU7 M8 A14 DQU7 M8 A14 DQU7 M8 A14 DQU7
A15/BA3 +1.5V_VGA A15/BA3 +1.5V_VGA A15/BA3 +1.5V_VGA A15/BA3 +1.5V_VGA
M3 B3 VMA_BA0 M3 B3 VMA_BA0 M3 B3 VMA_BA0 M3 B3

<18> VMA_BA0 N9 BA0 VDD#B3 D10 VMA_BA1 N9 BA0 VDD#B3 D10 VMA_BA1 N9 BA0 VDD#B3 D10 VMA_BA1 N9 BA0 VDD#B3 D10
<18> VMA_BA1 M4 BA1 VDD#D10 G8 VMA_BA2 M4 BA1 VDD#D10 G8 VMA_BA2 M4 BA1 VDD#D10 G8 VMA_BA2 M4 BA1 VDD#D10 G8
<18> VMA_BA2 BA2 VDD#G8 K3 BA2 VDD#G8 K3 BA2 VDD#G8 K3 BA2 VDD#G8 K3
VDD#K3 K9 VDD#K3 K9 VDD#K3 K9 VDD#K3 K9
VDD#K9 N2 VDD#K9 N2 VDD#K9 N2 VDD#K9 N2
J8 VDD#N2 N10 VMA_CLK0 J8 VDD#N2 N10 J8 VDD#N2 N10 VMA_CLK1 J8 VDD#N2 N10
<18> VMA_CLK0 K8 CK VDD#N10 R2 VMA_CLK0# K8 CK VDD#N10 R2 <18> VMA_CLK1 K8 CK VDD#N10 R2 VMA_CLK1# K8 CK VDD#N10 R2
<18> VMA_CLK0# K10 CK VDD#R2 R10 VMA_CKE0 K10 CK VDD#R2 R10 <18> VMA_CLK1# K10 CK VDD#R2 R10 VMA_CKE1 K10 CK VDD#R2 R10
<18> VMA_CKE0 CKE/CKE0 VDD#R10 +1.5V_VGA CKE/CKE0 VDD#R10 +1.5V_VGA <18> VMA_CKE1 CKE/CKE0 VDD#R10 +1.5V_VGA CKE/CKE0 VDD#R10 +1.5V_VGA
K2 A2 VMA_ODT0 K2 A2 K2 A2 VMA_ODT1 K2 A2
<18> VMA_ODT0 L3 ODT/ODT0 VDDQ#A2 A9 VMA_CS0# L3 ODT/ODT0 VDDQ#A2 A9 <18> VMA_ODT1 L3 ODT/ODT0 VDDQ#A2 A9 VMA_CS1# L3 ODT/ODT0 VDDQ#A2 A9
<18> VMA_CS0# J4 CS /CS0 VDDQ#A9 C2 J4 CS /CS0 VDDQ#A9 C2 <18> VMA_CS1# J4 CS /CS0 VDDQ#A9 C2 J4 CS /CS0 VDDQ#A9 C2
VMA_RAS0# VMA_RAS1#
<18> VMA_RAS0# K4 RAS VDDQ#C2 C10 VMA_CAS0# K4 RAS VDDQ#C2 C10 <18> VMA_RAS1# K4 RAS VDDQ#C2 C10 VMA_CAS1# K4 RAS VDDQ#C2 C10
<18> VMA_CAS0# L4 CAS VDDQ#C10 D3 VMA_WE0# L4 CAS VDDQ#C10 D3 <18> VMA_CAS1# L4 CAS VDDQ#C10 D3 VMA_WE1# L4 CAS VDDQ#C10 D3
<18> VMA_WE0# WE VDDQ#D3 E10 WE VDDQ#D3 E10 <18> VMA_WE1# WE VDDQ#D3 E10 WE VDDQ#D3 E10
VDDQ#E10 F2 VDDQ#E10 F2 VDDQ#E10 F2 VDDQ#E10 F2
VMA_RDQS2 F4 VDDQ#F2 H3 VMA_RDQS3 F4 VDDQ#F2 H3 VMA_RDQS7 F4 VDDQ#F2 H3 VMA_RDQS6 F4 VDDQ#F2 H3
VMA_RDQS0 C8 DQSL VDDQ#H3 H10 VMA_RDQS1 C8 DQSL VDDQ#H3 H10 VMA_RDQS5 C8 DQSL VDDQ#H3 H10 VMA_RDQS4 C8 DQSL VDDQ#H3 H10
C DQSU VDDQ#H10 DQSU VDDQ#H10 DQSU VDDQ#H10 DQSU VDDQ#H10 C
VMA_DM2 E8 A10 VMA_DM3 E8 A10 VMA_DM7 E8 A10 VMA_DM6 E8 A10

VMA_DM0 D4 DML VSS#A10 B4 VMA_DM1 D4 DML VSS#A10 B4 VMA_DM5 D4 DML VSS#A10 B4 VMA_DM4 D4 DML VSS#A10 B4
DMU VSS#B4 E2 DMU VSS#B4 E2 DMU VSS#B4 E2 DMU VSS#B4 E2
VSS#E2 G9 VSS#E2 G9 VSS#E2 G9 VSS#E2 G9
VMA_WDQS2 G4 VSS#G9 J3 VMA_WDQS3 G4 VSS#G9 J3 VMA_WDQS7 G4 VSS#G9 J3 VMA_WDQS6 G4 VSS#G9 J3
VMA_WDQS0 B8 DQSL VSS#J3 J9 VMA_WDQS1 B8 DQSL VSS#J3 J9 VMA_WDQS5 B8 DQSL VSS#J3 J9 VMA_WDQS4 B8 DQSL VSS#J3 J9
DQSU VSS#J9 M2 DQSU VSS#J9 M2 DQSU VSS#J9 M2 DQSU VSS#J9 M2
VSS#M2 M10 VSS#M2 M10 VSS#M2 M10 VSS#M2 M10
VSS#M10 P2 VSS#M10 P2 VSS#M10 P2 VSS#M10 P2
T3 VSS#P2 P10 DRAM_RST_M T3 VSS#P2 P10 DRAM_RST_M T3 VSS#P2 P10 DRAM_RST_M T3 VSS#P2 P10
<18> DRAM_RST_M RESET VSS#P10 T2 RESET VSS#P10 T2 RESET VSS#P10 T2 RESET VSS#P10 T2
VMA_ZQ1 L9 VSS#T2 T10 VMA_ZQ2 L9 VSS#T2 T10 VMA_ZQ3 L9 VSS#T2 T10 VMA_ZQ4 L9 VSS#T2 T10
ZQ/ZQ0 VSS#T10 ZQ/ZQ0 VSS#T10 ZQ/ZQ0 VSS#T10 ZQ/ZQ0 VSS#T10
Should be 240 Should be 240 Should be 240 Should be 240
Ohms +-1% A1 B2 Ohms +-1% A1 B2 Ohms +-1% A1 B2 Ohms +-1% A1 B2
T1 NC VSSQ#B2 B10 T1 NC VSSQ#B2 B10 T1 NC VSSQ#B2 B10 T1 NC VSSQ#B2 B10
R5077 A11 NC VSSQ#B10 D2 R5078 A11 NC VSSQ#B10 D2 R5079 A11 NC VSSQ#B10 D2 R5080 A11 NC VSSQ#B10 D2
T11 NC VSSQ#D2 D9 T11 NC VSSQ#D2 D9 T11 NC VSSQ#D2 D9 T11 NC VSSQ#D2 D9
243/F_4 NC VSSQ#D9 243/F_4 NC VSSQ#D9 243/F_4 NC VSSQ#D9 243/F_4 NC VSSQ#D9
E3 E3 E3 E3
J2 VSSQ#E3 E9 J2 VSSQ#E3 E9 J2 VSSQ#E3 E9 J2 VSSQ#E3 E9
L2 NC/ODT1 VSSQ#E9 F10 L2 NC/ODT1 VSSQ#E9 F10 L2 NC/ODT1 VSSQ#E9 F10 L2 NC/ODT1 VSSQ#E9 F10
J10 NC/CS1 VSSQ#F10 G2 J10 NC/CS1 VSSQ#F10 G2 J10 NC/CS1 VSSQ#F10 G2 J10 NC/CS1 VSSQ#F10 G2
L10 NC/CE1 VSSQ#G2 G10 L10 NC/CE1 VSSQ#G2 G10 L10 NC/CE1 VSSQ#G2 G10 L10 NC/CE1 VSSQ#G2 G10
NC/ZQ1 VSSQ#G10 NC/ZQ1 VSSQ#G10 NC/ZQ1 VSSQ#G10 NC/ZQ1 VSSQ#G10
100-BALL 100-BALL 100-BALL 100-BALL
SDRAM DDR3 SDRAM DDR3 INT SDRAM DDR3 SDRAM DDR3
H5TC2G63FFR-11C H5TC2G63FFR-11C H5TC2G63FFR-11C H5TC2G63FFR-11C
+1.5V_VGA +1.5V_VGA +1.5V_VGA +1.5V_VGA +1.5V_VGA +1.5V_VGA +1.5V_VGA +1.5V_VGA

B B
R5081 R5082 R5083 R5084 R5085 R5086 R5087 R5088

4.99K/F_4 4.99K/F_4 4.99K/F_4 4.99K/F_4 4.99K/F_4 4.99K/F_4 4.99K/F_4 4.99K/F_4
VREFC_VMA1 VREFD_VMA1 VREFC_VMA2 VREFD_VMA2 VREFC_VMA3 VREFD_VMA3 VREFC_VMA4 VREFD_VMA4
R5089 R5090 R5091 R5092 R5093 R5094 R5095 R5096

4.99K/F_4 C5134 4.99K/F_4 C5135 4.99K/F_4 C5136 4.99K/F_4 C5137 4.99K/F_4 C5138 4.99K/F_4 C5139 4.99K/F_4 C5140 4.99K/F_4 C5141
0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4
VMA_CLK0 +1.5V_VGA +1.5V_VGA
R5097
+1.5V_VGA <17,18,37>
40.2/F_4 C5142 C5143 C5144 C5145 C5146 C5147 C5148 C5149 C5150 C5151 C5152 C5153 C5154 C5155 C5156 C5157
C5158
1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4
VMA_CLK0_COMM
R5098 0.01U/25V_4 +1.5V_VGA +1.5V_VGA
40.2/F_4
VMA_CLK0#
A VMA_CLK1 C5159 C5160 C5161 C5162 C5163 C5164 C5165 C5166 C5167 C5168 C5169 C5170 C5171 C5172 C5173 C5174 A
1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4
R5099
40.2/F_4 +1.5V_VGA +1.5V_VGA

C5175
VMA_CLK1_COMM
PROJECT :U83
R5100 0.01U/25V_4 C5176 C5177 C5178 C5179 C5180 C5181 C5182 C5183 C5184 C5185 C5186 C5187
10U/6.3VS_6 10U/6.3VS_6 10U/6.3VS_6 10U/6.3VS_6 10U/6.3VS_6 10U/6.3VS_6 10U/6.3VS_6 10U/6.3VS_6 10U/6.3VS_6 10U/6.3VS_6 10U/6.3VS_6 10U/6.3VS_6
40.2/F_4 Size Document Number Rev
Custom Sun S3 VRAM(DDR3 BGA96P) 1A
VMA_CLK1#
5 4 3 2 1
5 4 3 2 1
Close to LVDS CONN

<2>
<2>
INT_eDP_TXP0
INT_eDP_TXN0
INT_eDP_TXP0
INT_eDP_TXN0
C20
C26
0.1U/10V_4
0.1U/10V_4
LANE0P
LANE0N To LVDS Converter

From LVDS Converter
PCH_LA_DATAP0_R
PCH_LA_DATAN0_R
R248
R249
0_4
0_4
PCH_LA_DATAP0
PCH_LA_DATAN0
<21>
<21>
20
R2 *0_4 eDP_TXP0
eDP_TXP0 C10 *0.1U/10V_4
R252 *1M/F_4 R4 *0_4 eDP_TXN0 To eDP
From CPU eDP_TXN0 C9 *0.1U/10V_4
INT_eDP_AUXN C28 0.1U/10V_4 eDP_AUXN_2132

D <2> INT_eDP_AUXN D
INT_eDP_AUXP C31 0.1U/10V_4 eDP_AUXP_2132 To LVDS Converter
<2> INT_eDP_AUXP
PCH_EDIDDATA_R R251 0_4 For eDP, close to U7
+3V R254 *1M/F_4 From LVDS Converter PCH_EDIDDATA <21>
R6 *0_4 eDP_AUXN PCH_EDIDCLK_R R253 0_4 PCH_LVDS_BLON R241 *0_4 2132_LVDS_BLON
PCH_EDIDCLK <21>
<6> PCH_LVDS_BLON 2132_LVDS_BLON <20,21>
PCH_DISP_ON R247 *0_4 2132_DISP_ON
R9 *0_4 eDP_AUXP To eDP <6> PCH_DISP_ON
PCH_DPST_PWM R245 *0_4 2132_DPST_PWM
2132_DISP_ON <20,21>
<6,20> PCH_DPST_PWM 2132_DPST_PWM <20,21>
eDP_AUXN C8 *0.1U/10V_4
From CPU eDP_AUXP C7 *0.1U/10V_4
For EDP Only: stuff Resistor
For LVDS only stuff Cap
PCH_EDIDDATA_R
PCH_EDIDCLK_R
+1.2V_2132 Close Pin3
C24 L22
SCA_SDA +3V +3.3V_2132_A
PBY160808T-600Y-N(60,3A)
SCA_SCL
0.1U/10V_4 C377 C33 C375
ULT_EDP_HPD DPRX_HPD
Note:
10U/6.3V_6 0.1U/10V_4 0.1U/10V_4
<6,21> ULT_EDP_HPD
PCH_LA_DATAN0_R
entire trace of +3.3V_2132_A should
R256 1K/F_4
C be wider than 80-mil C
PCH_LA_DATAP0_R L21
+3V +3.3V_2132
PBY160808T-600Y-N(60,3A)
C374 C373 C367
33
32
31
30
29
28
27
26
25
U7 10U/6.3V_6 0.1U/10V_4 0.1U/10V_4
TXO0-
SPI_CEB/IRQB/MIICSCL
SPI_SI/SCLK/MIICSCL
TXO0+
SPI_SO/SCSB/MIICSDA
SPI_CK/SDIO/MIICSDA
VCCK
GND
HPD
eDP_AUXN_2132 1 24
AUX-CH_N TXO1- PCH_LA_DATAN1 <21>
eDP_AUXP_2132 2 23
AUX-CH_P TXO1+ PCH_LA_DATAP1 <21>
3 22
+3.3V_2132_A DP_V33 TXO2- PCH_LA_DATAN2 <21>
4 21
DP_GND TXO2+ PCH_LA_DATAP2 <21>
LANE0P 5 20
LANE0P TXOC- PCH_LA_CLK# <21> SCA_SCL pull high => EEPROM mode
LANE0N 6
LANE0N
RTD2132R
TXOC+
19
PCH_LA_CLK <21>
SCA_SDA pull low = > EEPROM Free mode
7 18
+1.2V_2132 DP_V12 PVCC +3.3V_2132
SWR_VCCK
R17
Panel_VCC
SWR_VDD
8 17 C372
CIICSDA1
PWMOUT
CIICSCL1
DP_REXT BL_EN
SWR_LX
C376 0.1U/10V_4
Address=0xA8
PWMIN
12K/F_4
0.1U/10V_4
ICT
+3V
RTD2132R H=1mm(max) 2132_LVDS_BLON <20,21>
RTD2132R-CG
9
10
11
12
13
14
15
16
B B
+3V R13 *4.7K_4 CSCL1 PCH_DPST_PWM

PCH_DPST_PWM <6,20>
R1 100K/F_4
R7 *4.7K_4 CSDA1 U8 C379
8 7 *0.1U/10V_4
2132_DISP_ON <20,21> SCA_SDA SCA_SDA_R 5 VCC WP 3
+1.2V_2132 R25 *0_4
2132_DPST_PWM <20,21> SDA A2
L20 SCA_SCL R20 *0_4 SCA_SCL_R 6 2
4.7UH/850mA/TLPC3010C-4R7M 4 SCL A1 1
Note: GND A0
+1.2V_2132 +3.3V_2132
*SGT-M24C64-WMN6TP
Close to Pin8
Close Pin12 < 200mil entire trace of Panel VCC should PCH_EDIDDATA R28 *0_4
C369 C378 R8 *0_8 C23 C32 be wider than 80-mil PCH_EDIDCLK R23 *0_4
C6014/C6015 0.1U/10V_4 10U/6.3V_6 22U/6.3V_8 0.1U/10V_4
close < 200 mil Note:
Note: entire trace of +TRAVIS3.3V should RTD2132S => R25, R20
LDO mode change to 0ohm and 10u C6016/C6017 be wider than 80-mil
Pin11/Pin12 +1.2V_2132 entire trace of RTD2132R => R28, R23
should be wider than 80-mil close < 200 mil
Close Pin13
CSCL1
MODE_CFG0(PIN30)
*0_4 R15
SMB_RUN_CLK <8,11,12,13,25>
+3V R24 4.7K_4 SCA_SCL
0_4 R16 R26 *4.7K_4 SCA_SDA 0 1

MBCLK2 <8,13,28>
A 0 X EP MODE A
R21 R29 MODE_CFG1(PIN31)
CSDA1 *0_4 R12 ROM ONLY MODE EEPROM MODE
SMB_RUN_DAT <8,11,12,13,25> 1
*4.7K_4 4.7K_4
0_4 R11
MBDATA2 <8,13,28>
Reserve PROJECT :U83
Change Default setting to EC
EE PROM R15,R12 Custom
LVDS converter RTD2132R 1A
5
EC OPTION 4
R16,R11 3 2
Date: Monday, March 18, 2013
1
Sheet 20 of 41
5 4 3 2 1
LVDS Conn.
21
+3VLCD_CON
80 mile trace
R250 0_8
CN1
+3V C365 1K/F_4 R226 PCH_DPST_PWM_R
+LCDVCC <20> 2132_DPST_PWM
4.7U/6.3V_6
32
+3VLCD_CON 30
R225 C349
C22 U6 100K/F_4 29
22P/50V_4 +3V 28
PCH_DPST_PWM_R
*1U/6.3V_4 5 1 L19 C364 *10U/6.3V_6 C368 BLON_CON 27
IN OUT *TI160808U600 PCH_EDIDCLK 26
D 4 2 C362 *0.01U/16V_4 1000P/50V_4 PCH_EDIDDATA 25 D
IN GND 24
3 C359 0.1U/10V_4 PCH_LA_DATAN0 23
<20> 2132_DISP_ON ON/OFF <20> PCH_LA_DATAN0 22
PCH_LA_DATAP0
<20> PCH_LA_DATAP0 21
*IC(5P) G5243AT11U
For EDP Only: Stuff Rd PCH_LA_DATAN1 20 35
R3
For LVDS Only: Stuff Rc <20> PCH_LA_DATAN1
PCH_LA_DATAP1 19
100K/F_4 R230
Rc 0_4 <20> PCH_LA_DATAP1 18
D_MIC <20> PCH_LA_DATAN2 PCH_LA_DATAN2 17
L13 FCM1608KF-301T02 DIGITAL_D1_R R233 *0_4 EDP_HPD_R<20> PCH_LA_DATAP2 16
<22> DIGITAL_D1 <6,20> ULT_EDP_HPD PCH_LA_DATAP2 15 34
<22> DIGITAL_CLK L11 FCM1608KF-301T02 DIGITAL_CLK_R
14
R227 100K/F_4 C13 *33P/50V_4 DIGITAL_D1
Rd <20> PCH_LA_CLK# 13
<20> PCH_LA_CLK 12
C4 *33P/50V_4 DIGITAL_CLK
C350 22P/50V_4 C6 100P/50V_4 DIGITAL_D1_R USBP2-_C 11
Can't change to short D3 C3 100P/50V_4 DIGITAL_CLK_R USBP2+_C 10 33
R235 0_4 RB500V-40 BLON_CON 9
<28> EMU_LID 8
DIGITAL_D1_R
DIGITAL_CLK_R 7
6
R237 1K/F_4 5
<20> 2132_LVDS_BLON +3V +3V 4
C352 0.01U/16V_4 3
R229 4.7K/_4
Ra +VIN_BLIGHT 2
<20> PCH_EDIDDATA 1
C357 *4.7U/6.3V_6
31
R242
100K/F_4 R228 4.7K/_4
Rb C351 1000P/50V_4
<20> PCH_EDIDCLK
LVDS CONN
R255 *100K_4
Rc
C
DFWF30MR004 C
lvds-lvd-a30sfyg-30p-r
FOX DFWF30MR007 EOD
USB CAMERA +VIN_BLIGHT
+3V R231 0_4
L9
For LVDS stuff Ra=4.7k,Rb=4.7k,Rc un-stuff L12
+VIN_BLIGHT
+VIN
2132_LVDS_BLON R238 *1K_4 For eDP reserve Ra=100k,Rc=100k,Rb un-stuff <8> USBP2-
2 1 USBP2-_C *0_8/S
3 4 USBP2+_C
<8> USBP2+
C2 *4.7U/25V_8
2132_DPST_PWM R246 *1K_4 C360
*MCM2012B900GBE 0.1U/50V_6 C348 0.1U/50V_6
Only for eDP reserve SI modify R232 0_4
C1 0.01U/25V_4
HDMI Conn. HDMI SMBus Isolation CN16

+3V EMI Solution IN_D2 C167 0.1U/10V_4 C_TX2_HDMI+ 1 SHELL1
20
Q32 <2> IN_D2 D2+
R393 2.2K_4 C_TX2_HDMI+ R82 121/F_4 C_TX2_HDMI- 2
+3V D2 Shield
5 IN_D2# C169 0.1U/10V_4 C_TX2_HDMI- 3
<2> IN_D2# D2-
C_TX1_HDMI+ R93 121/F_4 C_TX1_HDMI- IN_D1 C176 0.1U/10V_4 C_TX1_HDMI+ 4
<2> IN_D1 D1+
HDMI_SCL_R 4 3 HDMI_SCLK 5
<6> SDVO_CLK D1 Shield
C_TX0_HDMI+ R96 121/F_4 C_TX0_HDMI- IN_D1# C177 0.1U/10V_4 C_TX1_HDMI- 6
<2> IN_D1# D1-
IN_D0 C180 0.1U/10V_4 C_TX0_HDMI+ 7
<2> IN_D0 D0+
2 C_TXC_HDMI+ R352 121/F_4 C_TXC_HDMI- 8
IN_D0# C181 0.1U/10V_4 C_TX0_HDMI- 9 D0 Shield
<2> IN_D0# D0-
<6> SDVO_DATA HDMI_SDA_R 1 6 HDMI_SDATA R351 0_4 <2> IN_CLK IN_CLK C465 0.1U/10V_4 C_IN_CLK C_TXC_HDMI+ 10
B 11 CK+ B
L41 IN_CLK# C470 0.1U/10V_4 C_IN_CLK# C_TXC_HDMI- 12 CK Shield
+3V <2> IN_CLK# CK-
R390 2.2K_4 C_IN_CLK 1 2 C_TXC_HDMI+ RB500V-40 13
2N7002DW C_IN_CLK# 4 3 C_TXC_HDMI- D13 2 1 5V_HSMBCK R395 2.2K_4 14 CE Remote
+5V_HDMIC NC
2 1 5V_HSMBDT R394 2.2K_4 HDMI_SCLK 15
Close to HDMI connector *MCM2012B900GBE D12 RB500V-40 HDMI_SDATA 16 DDC CLK
DDC DATA
R354 0_4 C506 *10P/50V_4 17
C509 *10P/50V_4 18 GND
19 +5V
+5V_HDMIC HP DET 21
SHELL2
+3V HDMI_HPD L28 0_6 HDMI_DET_C HDMI CONN
C491
VC2
DGPU_CL_HDMIP R81 680/F_4 C_TX2_HDMI+ R363 *TVM0G5R5M220R
R83 680/F_4 C_TX2_HDMI- 1M_4 220P/50V_4
3
+3V Q31 R92 680/F_4 C_TX1_HDMI+

40 MIL
2
2N7002K R94 680/F_4 C_TX1_HDMI-

40 mils F1 FUSE1A6V_POLY
2 R95 680/F_4 C_TX0_HDMI+ HDMI_HPD_CON 1 3 HDMI_HPD 2 1 +5V_HDMIC +5V_HDMIC
<6> HDMI_HPD_CON +5V
R97 680/F_4 C_TX0_HDMI-
Q30 R374 C507 0.1U/10V_4
R349 680/F_4 C_IN_CLK 2N7002 20K/F_4
R357 680/F_4 C_IN_CLK# VC3 SSM14 spec is 40V 1A
1
*TVM0G5R5M220R
R378 1 2 100K/F_4
<6,7,8,9,10,11,12,13,14,20,22,23,24,25,26,27,28,33,34,35> +3V
<4,7,22,25,26,27,28,29,30> +3VPCU
C505 0.1U/10V_4 <6,22,24,25,26,27,34> +5V
A +VIN A
<25,29,30,31,32,33,34,35,36,37> +VIN
Close to Q31 +5V_HDMIC <24,29,34,36> +12VALW
<13,22,25,26,30,32,33,34,35,36,37> +5VS5
C485
PROJECT :U83
*0.01U/16V_4 Quanta Computer Inc.
Custom 1A
LCD/HDMI/Camera/D-MIC
for EMI request
5 4 3 2 1
A B C D E
22
+5V_AVDD L40 +5V
Close to PIN1 >40mils trace <6,21,24,25,26,27,34> +5V
HCB1608KF-181T15_6
1
<6,7,8,9,10,11,12,13,14,20,21,23,24,25,26,27,28,33,34,35> +3V
C609 C605
*AZ2015-01H <10,25,27,31> +1.5V
L38 +3V_DVDD 10U/6.3VS_6 0.1U/10V_4
+3V C581
2
HCB1608KF-181T15_6 +1.5V L36 +3V_DVDD-IO
HCB1608KF-181T15_6
C584 C592 C593
Close to PIN26
1U/6.3V_4 10U/6.3VS_6 0.1U/10V_4 L5014 AGND C581 need check!
+3V
*HCB1608KF-181T15_6 C601 C602 L5015 *HCB1608KF-181T15_6 +3V
0.1U/10V_4 10U/6.3VS_6
+1.5V_AVDD L37 +1.5V
C588 HCB1608KF-181T15_6
U24 10U/6.3VS_6
+5V
C594 10P/50V_4 1 26 AGND +5V_AVDD
TO Digital MIC DVDD AVDD1 40
Close to PIN40 U23
R547 0_4 DMIC0 2 AVDD2 5 1
<21> DIGITAL_D1 GPIO0/ DMIC-DATA Vout Vin
R548 100/F_4 DMIC_CLK_R 3 25 4
<21> DIGITAL_CLK GPIO1 / DMIC-CLK AVSS1 AGND BYP
38 C345 C346 C579 C577 C578
Analog
C596 10P/50V_4 AVSS2 *2.2U/6.3V_6 *0.1U/10V_4 2 3 0.1U/10V_4 0.047U/10V_4 1U/6.3V_4
4 27 C598 10U/6.3VS_6 C580 GND EN
DVSS LDO1-CAP AGND
39 C595 10U/6.3VS_6 *1U/6.3V_4 *TPS793475DBVR
ACZ_SDOUT_AUDIO 5 LDO2-CAP HPA01091DBVR
<7> ACZ_SDOUT_AUDIO SDATA-OUT AGND
R549 0_4 HD_BCLK 6 28 C603 0.1U/10V_4 R545 10K_4 +5V
<7> BIT_CLK_AUDIO BCLK VREF
Close to PIN28 Vset=1.242V
10U/6.3VS_6 C599 7 C600 2.2U/6.3V_6
Close to PIN7 LDO3-CAP AGND
R550 33_4 HD_SDIN0 8 32 HPOUT_L AGND SHIELD
<7> ACZ_SDIN0 SDATA-IN HPOUT-L (PORT I)
33 HPOUT_R AGND SHIELD
+3V_DVDD-IO 9 HPOUT-R (PORT I)
DVDD-IO
AGND SHIELD
24
<7> ACZ_SYNC_AUDIO
ACZ_SYNC_AUDIO 10
SYNC
LINE2-L
LINE2-R
23 Close to Speaker
Digital
<7> ACZ_RST#_AUDIO
11
RESETB
Speaker 4 ohm: 40mils
C939 *0.1U/10V_4 22 INT SPEAKER CONN
AMP_BEEP 12 LINE1-L (PORTC) 21 L_SPK+ L17 TI160808U600 L_SPK+_R
PCBEEP LINE1-R (PORTC) L_SPK- L16 TI160808U600 L_SPK-_R 1
C597 2.2U/6.3V_6 34 R_SPK- L15 TI160808U600 R_SPK-_R 2
CPVEE 20 R_SPK+ L14 TI160808U600 R_SPK+_R 3
MIC1-R (PORTB) 19 4
35 MIC1-L (PORTB) CN2
CBN 31
CAP- 37 MIC1-VREFO-L 30 C356 C355 C354 C353
CBP MIC1-VREFO-R MUTE_LED_CNTL <26>
C334
2.2U/6.3V_6 36 1000P/50V_4 1000P/50V_4
CAP+ CPVDD 18 MIC_R1 C629 *2.2U/6.3V_6 1000P/50V_4 1000P/50V_4
MIC2-R (PORTF) 17 MIC_L1 C608 2.2U/6.3V_6 R556 1K/F_4 EXT_MIC_L
+3V_DVDD MIC2-L (PORTF)
+3V_DVDD +5V_AVDD
42
4.7U/6.3V_6 C331 SPK-L+ 29 VREFOUT_C
MIC2-VREFO
SPDIF-OUT/GPIO2
L_SPK+ 43
SPK-L- 16
1 L_SPK- 44 MONO-OUT R553 1
Close to Pin 34,35,36 SPK-R- 10K_4
R_SPK- 45
SenseA
SenseB
PVDD1
PVDD2
JDREF
SPK-R+ C604 C606
TO Internal Speakers check value
PDB
R_SPK+
NC
0.1U/10V_4 0.1U/10V_4
AMP_BEEP AMP_BEEP_L R551 100K/F_4 AMP_BEEP_R2
ALC3227 x QFN48
49
41
46
47
48
13
14
15
3
+5V_DVDD
+5V L35 +5V_DVDD R552

C607 10K_4 2
ACZ_SPKR <9>
HCB1608KF-181T15_6 0.1U/10V_4 C589 Close to Pin 41 0.01U/25V_4
R554 20K/F_4 2N7002
10U/6.3VS_6 C582
AGND Check layout Q6
SENSE_A_1 R555 39.2K/F_4 SENSE_A mount location
1
+5V_DVDD
0.1U/10V_4 C587
Close to Pin 46 Close to codec AGND
AGND AGND EC17 1000P/50V_4
10U/6.3VS_6 C583
COMBO_GPI R546 22K/F_4 EXT_MIC_L EC36 1000P/50V_4

PD# C342 *1000P/50V_4
C585 4.7U/6.3V_6 AGND C339 *1000P/50V_4 EC18 1000P/50V_4
C338 *1000P/50V_4
EC37 1000P/50V_4
+1.5V
for intel HSW ULT
Q7
BA039040000 +3V_DVDD
USB 2.0 AND AUDIO COMBO JACK EC40 1000P/50V_4
BA039040020 AGND 1
R221 HPOUT_L
HPOUT_R 2
*2.2K_4 3
AGND AGND
EXT_MIC_L 4
R222 AGND
5
6
Close to CODEC
2
Q7 1K/F_4 place to near U24 or under U24

*MMBT3904-7-F SENSE_A 7
ACZ_RST#_AUDIO 1 3 8 R206 *0_8/S
<26,28> USBPW_ON# 9
C590 *1000P/50V_4 +5VS5
PD# C586 10U/6.3V_8 10
11
+3VPCU 12
1 2 R223
<28> VOLMUTE# +3V 13
10K_4 <25> DEEP_PWRLED# AGND
D2 MEK500V-40 R197 *0_4 14
<7> SATA_LED# 15
MCM2012B900GBE <7> ACC_LED# 16
ACZ_SDIN0 EC38 *33P/50V_4 4 3 USBP1-_C 17
<8> USBP1- 18 CN9
1 2 USBP1+_C
<8> USBP1+ 19 Audio CONN
R211 2.2K_4 EXT_MIC_L
VREFOUT_C L8 20
ACZ_SDOUT_AUDIO EC19 *10P/50V_4 USBPW_ON#
R196 *0_4
C337
*1U/6.3V_4 ACZ_SYNC_AUDIO EC20 *10P/50V_4 C591
PROJECT :U83
0.1U/25V_4 Quanta Computer Inc.
AGND BIT_CLK_AUDIO EC39 *33P/50V_4
FOR EMI Custom 1A
Azalia ALC 3227
A B C D E
5 4 3 2 1
For EMI 0 ~ 22 ohm
LAN_XTAL1
R42
*10/F_4 XTAL1
R39 2.49K/F_4
+1.05V_LAN
LANRSET
TP113
+3V if ISOLATEB pin
pull-low,the LAN
chip will not drive
23
LAN_AMBLED# it's PCI-E outputs
XTAL2 R43 0_4 LAN_XTAL25_IN <27> +3V_LAN R19 ( excluding
TP112
1K_4
PCIE_WAKE# pin )
Y1
ISOLATEB
TP114
VDD10
XTAL2
XTAL1
1 3 XTAL2
RSET
LED0
2
D 2 4 LAN_WLED# D
R18
*25MHZ +-10PPM
15K/F_4
C56 C59 U1
32
31
30
29
28
27
26
25
1
*10P/50V_4 *10P/50V_4
SI modify
LED1/GPO
LED2(LED1)
AVDD33
AVDD10
CKXTAL2
CKXTAL1
LED0
RSET
33
GND
Please add 9 GND VIAs
Switch Mode:Stuff L23 For RTL 8176 connection with thermal PAD
Trace<30 mil LDO Mode:Stuff R259 For RTL8166
Power trace Layout 寬寬 > 60mil Place Cc,Cd,Ce,Cf MDI0+ 1 24 +1.05V_LAN_REGOUT
Width > 60 mil MDI0- 2 MDIP0 REGOUT(NC) 23 DVDDL
+1.05V_LAN_REGOUT
+1.05V_LAN MDIN0 VDDREG(VDD33) +3V_LAN
4.7UH,+-20%,650MA_1210 close to each VDD10 pin-- 3, 8, 22, 30 VDD10 3 22 VDD10
>60mil L23
+1.05V_LAN
MDI1+ 4 AVDD10(NC) DVDD10(NC) 21 PCIE_WAKE#
+1.05V_LAN
+1.05V_LAN_REGOUT
>60mil MDI1- 5 MDIP1
RTL8176EH LANW AKEB 20 ISOLATEB
PCIE_WAKE# <6,24,27,28>
PLTRST#
6 MDIN1 ISOLATEB 19
MDIP2(NC) PERSTB PLTRST# <6,11,14,24,25,27,28>
R259 *0_8 7 18 PCIE_RXN4_LAN_L C41 0.1U/10V_4
MDIN2(NC) HSON PCIE_RXN4_LAN <8>
VDD10 8 17 PCIE_RXP4_LAN_L C38 0.1U/10V_4
+1.05V_LAN AVDD10 HSOP PCIE_RXP4_LAN <8>
AVDD33(NC)
Cz Cc Cd Ce Cf Cg
REFCLK_N
MDIN3(NC)
REFCLK_P
MDIP3(NC)
C622
CLKREQB
C46 C54 C390 C42 C37 C36 C621
4.7U/6.3V_6 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 1U/6.3V_4 0.1U/10V_4
HSIN
HSIP
Close to Choke L23 RTL8176EH-CG
9
10
11
12
13
14
15
16
SWR mode need stuff C622 & Cz
Place Cg & C621 close to each VDD10 pin22
C *RTL8166EH Cg & C621 close pin30 C
LAN_CLKRQ
U9
CLK_PCIE_LANN
CLK_PCIE_LANN <8>
+3V_LAN CLK_PCIE_LANP
1 16 CLK_PCIE_LANP <8>
MDI1+_1 MDI1+ PCIE_TXN4_LAN
TD+ TX+ PCIE_TXN4_LAN <8>
<8> PCIE_CLKREQ_LAN# PCIE_CLKREQ_LAN# R10 0_4 PCIE_TXP4_LAN
MDI1-_1 3 15 TRA_V_DAC PCIE_TXP4_LAN <8>
TD- CMT
R22 75/F_4 LAN_MCTG1 2 14 MDI1-
CT TX-
MDI0+_1 6 9 MDI0-
RD+ RX-
MDI0-_1 8 10 TRA_V_DAC
R30 75/F_4 LAN_MCTG0 7

RD-
CT
CT
RX+
11 MDI0+ LAN conn
C366 NS681684 C52
TWD Type
10P/3KV_1808 0.01U/25V_4
BOT: TST1284R LF DB0EL5LAN00 RJ45

(White) CN13
LAN_WLED 9
LAN_WLED# 10 LED_AMB_P A1
LED_AMB_N A2
B
Stuff Ca and Cb only, close to each VDD33 pin-- 11, 32 8 R234 B
7 RX1-
+3V_LAN MDI1-_1 6 RX1+
5 RX0- *0_6/S
4 TX1-
MDI1+_1 3 TX1+
+3VLANVCC RX0+
MDI0-_1 2 14
MDI0+_1 1 TX0- GND1
C34 C45 TX0+ 13
GND
0.1U/10V_4 0.1U/10V_4
Ca Cb LAN_AMBLED 11 R266
LAN_AMBLED# 12 LED_GRE_P B1
LED_GRE_N B2
(Amber)
*0_6/S
C40 RJ45_CONN
68P/50V_4
Place Cc and Cd close to each VDD33 pin-- 23

C380 C53 +3VLANVCC C398 1000P/50V_4
4.7U/6.3V_6 0.1U/10V_4 R277 330_4

LAN_AMBLED
Cc Cd
A A
Remove For Not Using SWR mode
+3VLANVCC LAN_WLED
R279 330_4
PROJECT :U83
C399 1000P/50V_4
<6,7,8,9,10,11,12,13,14,20,21,22,24,25,26,27,28,33,34,35> +3V
<27,34> +3VLANVCC Custom LAN RTL8176EH/RJ45 1A
Date: Friday, March 15, 2013 Sheet 23 of 41
5 4 3 2 1
5 4 3 2 1
<8> PCIE_CLKREQ_CR#
PCIE_CLKREQ_CR# R301 *0_4/S PCIE_CLKREQ_CR#_R
R303 10K_4
Reserve for EMI
SD_D0
SD_D1
SD_D2
SD_D3
EC31
EC32
EC29
EC30
*5.6P/16V_4
*5.6P/16V_4
*5.6P/16V_4
*5.6P/16V_4
SP1
SP2
SP3
SP4
SP5
SP6
SD_D1
SD_D0
SD_CLK
SD_CMD
SD_D3
SD_D2
MS_D1
MS_D0
MS_D2
MS_D3
MS_CLK
24
+3V
SP7 SD_WP MS_BS
RTS5237_3Vaux
R299 0_6
RTS5237_GPIO
+3V
SD_CD#
SD_WP
D
<6,23,27,28> PCIE_WAKE# R300 0_4

C428 0.1U/10V_4
Share Pin D
C424
4.7U/6.3V_6
SD / MMC
32
31
30
29
28
27
26
25
U11
GPIO
WAKE#
MS_INS#
SD_CD#
SP7
3V3aux
NC
NC
PLTRST# 1 24
<6,11,14,23,25,27,28> PLTRST# PERST# NC
PCIE_CLKREQ_CR#_R 2 23
<8> PCIE_TXP2_CARD
PCIE_TXP2_CARD 3 CLKREQ#
HSIP
NC
NC
22 Close to chip pin
Zdiff = 100 ohm PCIE_TXN2_CARD 4 21 SD_D2_R R309 0_4 SD_D2
<8> PCIE_TXN2_CARD CLK_PCIE_CRP 5 HSIN SP6 20 SD_D3_R
RTS5237 R312 0_4 SD_D3
<8> CLK_PCIE_CRP 6 REFCLKP SP5 19
CLK_PCIE_CRN SD_CMD_R R313 0_4 SD_CMD
<8> CLK_PCIE_CRN REFCLKN SP4
C443 0.1U/10V_4 PCIE_RXP2_CARD_C 7 18 DV33_18 1U/10V_4 C441
<8> PCIE_RXP2_CARD PCIE_RXN2_CARD_C 8 HSOP DV33_18 17 SD_CLK_R
C446 0.1U/10V_4 R317 33_4 SD_CLK C442 5.6P/16V_4
<8> PCIE_RXN2_CARD HSON SP3
CARD_3V3
Please add 9 GND VIAs SI modify
3V3_IN
DV12S
RREF
AV12
connection with thermal PAD
SP1
SP2
33
NC
GND
RTS5237 CARD READER
9
10
11
12
13
14
15
16
CN15
RTS5237_DV12S
C SD_D0_R R318 0_4 SD_D0 SD_D2 1 C
SD_D1_R R321 0_4 SD_D1 +3VCARD SD_D3 2 DAT2
SD_CMD 3 DAT3
SD_CD# 4 CMD
R7009 need colse to Chip Close to chip pin CLOSE CONN 5 C/D
VSS1
C450
C457
6
+3VCARD VDD
R322 6.2K/F_4 RTS5237_RREF SD_CLK 7
RTS5237_AV12
1 2 8 CLK
C451 *100P/50V_4 C459 SD_D0 9 VSS2
SD_D1 10 DAT0
0.1U/10V_4
*0.1U/10V_4
10U/6.3V_8 SD_WP 11 DAT1
12 W /P
0.1U/10V_4 C453 C449 C458 13 GND
14 GND
RTS5237_AV12 R330 0_4 RTS5237_DV12S 4.7U/6.3V_6 C454 0.1U/10V_4 4.7U/6.3V_6 15 GND
GND
+3V CARDREADER CONN
R5106 0_8
C460 C452 SI modify R3X Type

10U/6.3V_8 0.1U/10V_4 +3VCARD
SATA ODD
B
CONNECTOR +5V
B
+12VALW
C914
15'' SATA ODD
2
0.1U/10V_4
14'' SATA ODD Bypass CAP close conn R821
330K_6
3
Q44
New Type
1
CN26 AO3404 +5V_ODD
S1 2 SATA_TXP14_C C766 0.01U/25V_4 +3V
TXP 3 SATA_TXN14_C C764 0.01U/25V_4 SATA_TXP2 <7> 2
14 TXN SATA_TXN2 <7> CN24
14
1
5 SATA_RXN14_C C765 0.01U/25V_4
RXN 18
3
16 6 SATA_RXP14_C C767 0.01U/25V_4 SATA_RXN2 <7> R824
16 RXP 8 ZERO_ODD_DP# R822 1 2 1K_4 SATA_RXP2 <7> 10K_4 20 17 ZERO_ODD_DA# R823
1
DP 9 19 20 16 22_8
+5V ZERO_ODD_DP# <9> 19 15
S7 10 SI modify R574 0_4 2
+5V_ODD <28> ZERO_PWR_ODD
2
+5V 14
1
P1 11 ZERO_ODD_DA# 0_4 R40
MD ODD_EJECT# <28> 13
17 1 C913
17 GND1 4 12 Q43 0.027U/25V_6
High : ODD power down
2
GND2 11
3
15 7 2N7002
1
15 GND3 10
GND
12
+5V_ODD +5V 9 +5V_ODD Low : ODD power on
13 ZERO_ODD_DP#
P6 GND 8 2
14 SATA ODD 7 SATA_RXP15_C C912 *0.01U/25V_4 SATA_RXP2
R564 *0_8 6 SATA_RXN15_C C910 *0.01U/25V_4 SATA_RXN2 Q47
5 2N7002
4 SATA_TXN15_C SATA_TXN2
SI change footprint C909 *0.01U/25V_4
1
A 3 SATA_TXP15_C C911 *0.01U/25V_4 SATA_TXP2 A
2
1
120 mils
+5V_ODD
*15 SATA ODD
C903
10U/6.3V_8
C905
0.1U/10V_4
C901
0.1U/10V_4
C902
0.1U/10V_4
C904
0.1U/10V_4
PROJECT :U83
SI change pin define/PN Quanta Computer Inc.
& footprint
Custom 1A
CR RTS5237 & CR SOCKET
5 4 3 2 1
A B C D E
Power Botton Connector

Pin1 : +3VPCU(LIDSWITCH PWR)
Pin2 : POWER LED
Pin3 : LIDSWITCH
Pin4 : GND
+3VPCU
Touch Pad Connector
Q1A 2N7002KDW +3VSUS R169 4.7K_4 TPCLK

25
Pin5 : GND R356 R165 4.7K_4 TPDATA 88513-0601-6p-l-smt
Pin6 : POWERON# 10K/F_4 4 3 TP_SMB_CLK DFFC06FR062
<8,11,12,13,20> SMB_RUN_CLK
C43 0.1U/10V_4 Dual C257 10P/50V_4
CN4 R107 4.7K_4 <28> TPCLK
DEEP_PWRLED# L7 BLM18BA470SN1D TPCLK-1 6
+3VPCU <22> DEEP_PWRLED#
5
L6 BLM18BA470SN1D TPDATA-1 5
1 +3V +3VSUS 4
3
DEEP_PWRLED# C256 10P/50V_4
2 <28> TPDATA 3
2
4 R108 4.7K_4 TP_SMB_DATA 4
<28> LID_EC# 3 2
2 PWR_LED# TP_SMB_CLK
4 PWR_LED# <28> 1 6 TP_SMB_DATA 1
5 <8,11,12,13,20> SMB_RUN_DAT
CN7
<28> NBSWON1# 6 Q29 C474 C194 *10P/50V_4
1
DDTC144EUA-7-F 0.1U/10V_4 Q1B 2N7002KDW
POWER BTN CONN 25 mils C195 *10P/50V_4
C391 C51 DFFC06FR062
*220P/50V_4 C57 88513-0601-6p-l-smt +3VSUS C219 0.1U/10V_4
*220P/50V_4 *220P/50V_4
SATA HDD Connector(Cable type) FAN Mini PCI-E Card 2- Full size
CN25
Bypass CAP close conn
+5V
mSATA
C274 10U/6.3VS_6
1 R559 *0_4
1
2 <9> DEVSLP1
SATA_TXP0_C C253 0.01U/16V_4 C278 0.1U/10V_4
3 SATA_TXN0_C C254 SATA_TXP0 <7>
0.01U/16V_4
4 SATA_TXN0 <7> +3V
FAN1
5 SATA_RXN0_C C251 0.01U/16V_4 SATA_RXN0 <7>
6 SATA_RXP0_C C252 0.01U/16V_4 SATA_RXP0 <7> 5
7 15
3 8 <28> FAN1_PWM 2 3
9 3 6 +1.5V
+3V <28> FAN1SIG 46
Main HDD
10
11
+3V
R186 4.7K_4 FAN Connect CN21 H=4.0
12 51 52
+5V Reserved +3.3V
13 49 50
14 +5V 靠靠EC 47 Reserved GND 48
15 C536 *10U/6.3V_8 45 Reserved +1.5V 46
16 43 Reserved LED_W PAN# 44
17 C539 *10U/6.3VS_6 41 Reserved LED_W LAN# 42
18 39 Reserved LED_W W AN# 40
19 C542 4.7U/6.3V_6 FAN1_PWM C277 *220P/50V_4
Place Cap close to 37 Reserved GND 38
19 conn within 100mils 35 Reserved USB_D+ 36
C543 0.1U/10V_4 FAN1SIG C276 *220P/50V_4 C270 0.01U/16V_4 SATA_TXP1_C 33 GND USB_D- 34
<7> SATA_TXP1 PETp0 GND
C269 0.01U/16V_4 SATA_TXN1_C 31 32
<7> SATA_TXN1 29 PETn0 SMB_DATA 30
+5V: 2 A(4 Pin)
SATA HDD(1ST) 27 GND SMB_CLK 28
DFHS13FS019 +3V: 2 A(4 Pin) C273 0.01U/16V_4 SATA_RXN1_C 25 GND +1.5V 26
<7> SATA_RXN1 PERp0 GND
sata-ah534-00-13p-r C275 0.01U/16V_4 SATA_RXP1_C 23 24
<7> SATA_RXP1 PERn0 +3.3Vaux
Gnd : (5 Pin) 21 22
19 GND PERST# 20
+3V 17 Reserved W _DISABLE# 18
Reserved GND
C265 4.7U/6.3V_6 15 16
13 GND Reserved 14
C573 0.1U/10V_4 11 REFCLK+ Reserved 12
TPM (1.2) TPM_XIN
C575 0.1U/10V_4
9
7
5
REFCLK-
GND
CLKREQ#
Reserved
Reserved
Reserved
10
8
6
TPM_XOUT C576 0.1U/10V_4 3 BT_CHCLK +1.5V 4
H=2.54mm
GND
GND
2 CLK_PCI_TPM 1 BT_DATA GND 2 2
C266 *4.7U/6.3V_6 W AKE# +3.3V
R581 10M_4 MINI PCIE H4
54
53
C570 4.7U/6.3V_6
R582 DFHS52FR108
33_4
Y6
1 4 C361 *0.1U/25V_4
+VIN
2 3 C264 *0.1U/25V_4
Address C828
+VIN
+VIN C610 *0.1U/25V_4
C827 C826 10P/50V_4 +VIN C611 *0.1U/25V_4
12p 32.768KHZ 12p C612 *0.1U/25V_4 C17 *0.1U/25V_4
BADD +VIN
C613 *0.1U/25V_4
BATT+
C15 *0.1U/25V_4 +1.5V
+3VS5 +VIN BATT+
C615 *0.1U/25V_4 C18 *150P/50V_4
HIGH 4EH/4F (default) +VIN
C614 *0.1U/25V_4
BATT+
C16 *150P/50V_4
+VIN BATT+
C616 *0.1U/25V_4
FOR EMI +VIN
+VIN C618 *0.1U/25V_4
+VIN C617 *0.1U/25V_4 C571 C574 C572
C822 +3V C619 *0.1U/25V_4 0.01U/16V_4 *0.1U/10V_4 *4.7U/6.3V_6
+VIN
0.1U/10V_4
+1.35VSUS C625 *0.1U/25V_4
U41 C624 *0.1U/25V_4
LAD0 R584 0_4 LAD0_T 26 10 C29 0.1U/25V_4 C626 *0.1U/25V_4
<7,27,28> LAD0 LAD0 VDD +VIN
LAD1 R585 0_4 LAD1_T 23 19 C69 0.1U/25V_4
<7,27,28> LAD1 LAD1 VDD +3V +VIN
LAD2 R586 0_4 LAD2_T 20 24 C196 0.1U/25V_4
<7,27,28> LAD2 LAD2 VDD +3V +VIN
LAD3 R587 0_4 LAD3_T 17 5 C823 C824 C825 C240 0.1U/25V_4 C409 *0.1U/25V_4
<7,27,28> LAD3 LAD3 VSB +VIN +PRWSRC
CLK_PCI_TPM 21 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 C259 0.1U/25V_4 C632 *0.1U/25V_4 C408 *0.1U/25V_4
<8> CLK_PCI_TPM LCLK +VIN +5VS5 +PRWSRC
4 C5 0.1U/25V_4 C633 *0.1U/25V_4
GND +VIN
LFRAME# R588 0_4 LFRAME#_T 22 11 R579 C11 0.1U/25V_4
<7,27,28> LFRAME# LFRAME# GND +VIN
PLTRST# 16 18 *4.7K/F_4 C39 0.1U/25V_4
<6,11,14,23,24,27,28> PLTRST# LRESET# GND +VIN <6,7,8,9,10,11,12,13,14,20,21,22,23,24,26,27,28,33,34,35> +3V
1 LPCPD#_TPM 28 25 R578 C371 0.1U/25V_4 1
LPCPD# GND +VIN <6,21,22,24,26,27,34> +5V
SERIRQ 27 4.7K/F_4 C370 0.1U/25V_4
<9,28> SERIRQ SERIRQ +VIN <4,7,22,26,27,28,29,30> +3VPCU
6 C447 0.1U/25V_4
GPIO +VIN <29> BATT+
R577 4.7K/F_4 9 2 TPM_PP C395 0.1U/25V_4
+3V TEST/BADD GPIO2 +VIN <24,29,34,36> +12VALW
LPCPD#_TPM C261 0.1U/25V_4
+VIN
CLKRUN# 15 7 TPM_PP C268 0.1U/25V_4
<6,28> CLKRUN# CLKRUN# PP +VIN
1 TESTI
8
R580
PROJECT :U83
NC
3
12 NC XTALI/32K IN
13
14
TPM_XIN
TPM_XOUT
0_4
C19 0.1U/25V_4
NC XTALO +PRWSRC
+PRWSRC C12 0.1U/25V_4
*SLB9635TT1.2-FW3.17 +PRWSRC C44 0.1U/25V_4 Size Document Number Rev
C110 0.1U/25V_4 Custom 1A
+PRWSRC HDD/mSATA/FAN/LED
A B C D E
5 4 3 2 1
KEYBOARD Con. MY5 C83 *220P/50V_4
26
MY6 C124 *220P/50V_4
MY3 C128 *220P/50V_4
MY[0..17] KB CONN MY7 C106 *220P/50V_4 +5V +5V
<28> MY[0..17]
MX[0..7] MX1 32 MY8 C114 *220P/50V_4
<28> MX[0..7] MX7 31 32 MY9 C63 *220P/50V_4 R350 R359
MX6 30 31 MY10 C137 *220P/50V_4
30 1K/F_4 1K/F_4
MUTE_LED_CNTL_R1 MY9 29 MY11 C136 *220P/50V_4
29
3
MX4 28
MX5 27 28
MY0 26 27 R355 2 1 *200/F_6 R364 2 1 *200/F_6
<22> MUTE_LED_CNTL
2
Q21
MX2
MX3
25
24
26
25 KEYBOARD PULL-UP MY1
MY2
C89
C100
*220P/50V_4
*220P/50V_4 WIRELESS_ON_R WIRELESS_OFF_R
D 2N7002K MY5 23 24 MY4 C102 *220P/50V_4 Q24 Q26 D
23
3
MY1 22 MY0 C71 *220P/50V_4 DDTC144EUA-7-F DDTC144EUA-7-F
R348 MX0 21 22
1
10K/F_4 MY2 20 21 MX4 C64 *220P/50V_4 2 2
RP3 <28> WIRELESS_ON <28> WIRELESS_OFF
MY4 19 20 10 1 MY14 MX6 C62 *220P/50V_4
19 +3VPCU
MY7 18 MY13 9 2 MY11 MX3 C80 *220P/50V_4
MY8 17 18 MY12 8 3 MY10 MX2 C73 *220P/50V_4
1
MY6 16 17 MY3 7 4 MY15
MY3 15 16 MY6 6 5
MY12 14 15 MX7 C61 *220P/50V_4
MY13 13 14 MX0 C93 *220P/50V_4
+3VPCU *10P8R-8.2K
MY14 12 13 MX5 C68 *220P/50V_4
MY11 11 12 MX1 C60 *220P/50V_4
RP2
MY10 10 11 10 1 MY2
MY15 9 10 MY1 9 2 MY4 MY12 C132 *220P/50V_4
MY16 8 9 MY5 8 3 MY7 MY13 C133 *220P/50V_4
MY17 7 8 MY0 7 4 MY8 MY14 C134 *220P/50V_4
6 7 MY9 6 5 MY15 C139 *220P/50V_4
R64 2 1 200/F_6 CAPSLED#_R 5 6 MY16 C141 *220P/50V_4
<28> CAPSLED# 5
MUTE_LED_CNTL_R1 R67 2 1MUTE_LED_CNTL_R 4
+3VPCU *10P8R-8.2K MY17 C143 *220P/50V_4
200/F_6 WIRELESS_ON_R 3 4
WIRELESS_OFF_R 2 3 R77 *8.2K_4 MY16
LED_PW 1 2 R79 *8.2K_4 MY17
+3V 1
CN5
50698-03201-001-32p-l
DFFC32FR039
C
R6X Type C
C533 0.1U/10V_4
USB 2.0/3.0 Combo C537 470P/50V_4 USB 3.0 Hole H30
VC4 *AVLC5S_4 *INTEL-BKT-SHARK-ULT FAN nut
C529 1000P/50V_4 CN20
USB3.0 CONN H27 H29
L33 DLP11SN900HL2L +5V_USBP0 1A 1
VBUS
h-c236d145p2 h-c236d145p2
4 3 USBP0-_C 2 1
<8> USBP0- 2 D-
1 2 USBP0+_C 3
<8> USBP0+
1
2
3
4
USBP0-_C C549 *Clamp-Diode L32 *DLP11SN900HL2L 4 3 D+
1 2 1 2 USB30_RX1-_C 5 4 GND
<8> USB30_RX1- 4 3 6 5 SSRX-
USB30_RX1+_C SI modify
<8> USB30_RX1+
1
7 6 SSRX+
USB30_TX1-_C C555 *Clamp-Diode C557 0.1U/10V_4 USB3_1- 1 2 USB30_TX1-_C 8 7 GND
1 2 <8> USB30_TX1- 8 SSTX-
C567 0.1U/10V_4 USB3_1+ 4 3 USB30_TX1+_C 9 H33 H34 H10
<8> USB30_TX1+ 9 SSTX+
USBP0+_C C546 *Clamp-Diode *H-TC279BC216D141P2 *H-TC279BC216D141P2 *H-TC279BC216D141P2
13
12
11
10
1 2 L34 *DLP11SN900HL2L
Nut PN:MBFF4001010
13
12
11
10
USB30_TX1+_C C568 *Clamp-Diode USB3_1- R529 0_4 USB30_TX1-_C USBP0- R517 *0_4 USBP0-_C
1 2 USB3_1+ R537 0_4 USB30_TX1+_C USBP0+ R514 *0_4 USBP0+_C
1
USB30_RX1-_C C541 *Clamp-Diode
1 2 USB3_2- R457 0_4 USB30_TX2-_C USBP5- R435 *0_4 USBP5-_C
USB3_2+ R467 0_4 USB30_TX2+_C USBP5+ R427 *0_4 USBP5+_C DFHS09FR122
B usb-2ub4029-200201f-9p B
USB30_RX1- R507 0_4 USB30_RX1-_C H13 H20 H14 H25 H16
USB30_RX1+ R508 0_4 USB30_RX1+_C *H-C394D118P2 *H-C394D118P2 *H-TC157BC236D118P2 *H-TC236BC314D102P2 *O-U83M-1
USB30_RX1+_C C544 *Clamp-Diode C532 0.1U/10V_4
1 2 USB30_RX2- R404
USB30_RX2+ R409
0_4
0_4
USB30_RX2-_C
USB30_RX2+_C
C535 470P/50V_4 USB 3.0
VC1 *AVLC5S_4
C262 1000P/50V_4 CN17
1
USB3.0 CONN
L30 DLP11SN900HL2L +5V_USBP0 1A 1
VBUS
USBP5-_C 4 3 USBP5-_C 2 1
C519
1 2
*Clamp-Diode
<8> USBP5- 2 D- SI modify
1 2 USBP5+_C 3
<8> USBP5+ 4 3 D+
*DLP11SN900HL2L
L29 1 2 USB30_RX2-_C 5 4 GND
USB30_TX2-_C C523
1 2
*Clamp-Diode
<8>
<8>
USB30_RX2-
USB30_RX2+
4 3 USB30_RX2+_C 6 5
6
SSRX- H17 H18 H15 Mini-PCIe & mSATA nut
7 SSRX+ *H-C394D118P2 *H-C394D118P2 *H-C394D118P2
USBP5+_C C515 *Clamp-Diode C226 0.1U/10V_4 USB3_2- 1 2 USB30_TX2-_C 8 7 GND
1 2 <8> USB30_TX2- 8 SSTX-
C230 0.1U/10V_4 USB3_2+ 4 3 USB30_TX2+_C 9 H28
<8> USB30_TX2+ 9 SSTX+ H-C236D104P2
13
12
11
10
L31 *DLP11SN900HL2L
USB30_TX2+_C C527 *Clamp-Diode
13
12
11
10
1
1 2
USB30_RX2-_C C510 *Clamp-Diode
1 2
SI delete
1
DFHS09FR122 H19 H24 H22 SI modify
usb-2ub4029-200201f-9p *H-C394D118P2 *H-C393D354P2 *O-U6X-2
USB30_RX2+_C C512 *Clamp-Diode 150 mils (Iout=3.7A)
1 2 +5VS5 +5V_USBP0
A U20 C525 220U/6.3V_6X4.5 Nut PN:MBZR7001010 A
2 8 +5V_USBP0 1 2
3 VIN1 OUT3 7
+
1
4 VIN2 OUT2 6
<22,28> USBPW_ON# EN OUT1
1 5
GND OC
VC5 C538
1U/6.3V_4
AP2820CMMTR-G1-01
Active Low
PROJECT :U83
*AVLC5S_4 SI modify Quanta Computer Inc.
<13,22,25,30,32,33,34,35,36,37> +5VS5
<4,7,22,25,27,28,29,30> +3VPCU
Custom 1A
USB3.0/KB
Date: Friday, March 15, 2013 Sheet 26of 41
5 4 3 2 1
A B C D E
+1.5V +3V_WLAN_P
27
+3V_WLAN_P
+3VPCU +3VS5
+3V_WLAN_P
<9> BT_OFF
R292 C419 C416 C420 C418 C417 C438 C415
10K_4 0.01U/16V_4 0.1U/10V_4 10U/6.3VS_6 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 10U/6.3VS_6
2
+1.5V +3V_WLAN_P R324 C444
H=4.0 ph 10K_4
1
1 3 CN14 0.1U/10V_4
Q39 6 52 Q18
28 +1.5V +3.3V 2 ME2303T1
2N7002E 48 +1.5V +3.3V 24 R560 200K_4 2
R297 *0_6 INT_BT_OFF# 51 +1.5V +3.3Vaux 41 R293 4.7K_4 +3V_WLAN_P
4 +5V 49 Reserved
Reserved
Reserved
Reserved
39 Mini Card R316 *0_8 +3V
4
3
47 44 WLAN_LED# R294 0_4 24mil
<28> EC_DEBUG R295 *0_4 45 Reserved LED_W LAN# 46
RF_LINK# <28>
WLAN/BT(Option) Q20
3
19 Reserved LED_W PAN# 42 +3V_AOCS
<8> CLK_24M_DEBUG Reserved LED_W W AN#
PLTRST# 17 38
USBP6+ <8>
2
33 Reserved USB_D+ 36 <28> EC_AOCS#
<8> PCIE_TXP3_WLAN USBP6- <8> C439
31 PETp0 USB_D- 32
<8> PCIE_TXN3_WLAN PETn0 SMB_DATA PLTRST# <6,11,14,23,24,25,28>
25 30 2N7002E *0.1U/10V_4
<8> PCIE_RXP3_WLAN PERp0 SMB_CLK
23 22 PLTRST#
<8> PCIE_RXN3_WLAN
1
13 PERn0 PERST# 20 INT_RF_OFF# R296 10K_4
<8> CLK_PCIE_WLANP REFCLK+ W _DISABLE# +3V_WLAN_P
11 16 LAD0
<8> CLK_PCIE_WLANN REFCLK- Reserved LAD0 <7,25,28>
<8> PCIE_CLKREQ_WLAN# R284 0_4 REQ_WLAN# 7 14 LAD1 LAD1 <7,25,28>
R283 *0_4 5 CLKREQ# Reserved 12 LAD2
<9> BT_COMBO_EN# BT_CHCLK Reserved LAD2 <7,25,28> Q40
3 10 LAD3
BT_DATA Reserved LAD3 <7,25,28> 2N7002E
MINICAR_PME# 1 8 LFRAME#
W AKE# Reserved LFRAME# <7,25,28>
43 50
37 Reserved GND 40 3 1
35 Reserved GND 34 For EMI Suggestion
29 GND GND 26 CLK_24M_DEBUG EC3 *33P/50V_4
27 GND GND 18 R63 *0_4
2
GND GND
HOLE
HOLE
21 4
PAD
PAD
15 GND GND 9
GND GND RF_OFF <9>
MINI PCIE H=4.0
56
55
54
53
DFHS52FR108
MINICARD-110021-52131-52P-RUV
+3V_WLAN_P
3 Support Wake Function(Reserve) 3
2
Accelerometer Sensor <6,23,24,28> PCIE_WAKE#
3
Q17
1 MINICAR_PME#
*DDTC144EUA-7-F
+3V_WLAN_P
R46 0_6 +3V_WLAN_P
R308 10K/F_4
+G_SEN_PW U2
HP3DC2TR
2
C77 C107 1 2
0.1U/10V_4 0.1U/10V_4 14 Vdd_IO NC 3
VDD NC
3 1 MINICAR_PME#
<28> EC_PCIE_WAKE#
Q19 DDTC144EUA-7-F
10
ACCEL_INTA# 2 1 ACCEL_INTA#_R 11 RESERVED 13
<9> ACCEL_INTA# INT1 RESERVED
D5 RB500V-40 9 15
TP6 INT2 RESERVED 16
ACCEL_INTA#
<28> MBDATA3
R69 *0_4/S
MBDATA3
MBCLK3
7
6
4
SDO
SDA
RESERVED
5
Green CLK Circuitry
2 <28> MBCLK3 SCL GND 12 2
C55 +G_SEN_PW 8 GND 20mils width(min)
+G_SEN_PW CS +3VPCU
*22P/50V_4 +3V_RTC_0,+3V_RTC_R,+3V_RTC..
MBDATA3 C98 *33P/50V_4
+3VLANVCC +3V_RTC_0
MBCLK3 C111 *33P/50V_4 AL003DC2A00
U21
R534 33_4 LAN_XTAL25_IN_R 6 15 C547 0.1U/10V_4
<23> LAN_XTAL25_IN 5 25M +V3.3A 2
R73 4.7K_4 MBDATA3 R518 33_4 PCH_XTAL24_IN_R
+G_SEN_PW <8> PCH_XTAL24_IN 24M VDD
R72 4.7K_4 MBCLK3 9 10 +3V_RTC_R R540 360/F_4
<7> CLKGEN_RTC_X1 32Khz VBAT
R536 22_4 CLK_27M_XTAL_IN_R12
<15> GPU_XTAL27_IN 27Mhz/NC C267 22U/6.3VS_8
C569 0.1U/10V_4 14
VDD_RTC_OUT +3V_RTC
8
+3VLANVCC VDDIO_25M
USBP7+ R561 0_4 USBP7+_C 3 7
+1.05V VDDIO_24M GND
USBP7- R562 0_4 USBP7-_C C548 0.1U/10V_4 11 13
Touch screen Power +3V for AUO TS
<14,15,17,36> +1.8V_VGA
C434 0.1U/10V_4 GEN_XTAL25_OUT 16
1
VDDIO_27/NC
XTAL_OUT
GND
GND
GND
4
17
C558
2.2U/6.3V_6
R816 0_6 SI Modify GEN_XTAL25_IN
+3V XTAL_IN
SLG3NB3354VTR
R817 *0_6 DEL TS 14" connector Circuit & Reserve +3V TS Power for AUO TS
+5V
+VCC_TS
C545 12P/50V_4 C260 0.1U/10V_4 +3VLANVCC
P/N R536 C434
GEN_XTAL25_IN
R236 0_6 C58 *10P/50V_4 LAN_XTAL25_IN
UMA AL003355000 N/A N/A
2
1
U5 Y5
1 C358 C363 C487 *10P/50V_4 PCH_XTAL24_IN 1
*1U/10V_4 5 1 *1U/10V_4
+VCC_TS
CN22 25MHZ +-10PPM
DIS AL003354001 Install Install
IN OUT L42
4
3
4 2 *MCM2012B900GBE GEN_XTAL25_OUT C263 *10P/50V_4 GPU_XTAL27_IN

IN GND 2 1 USBP7-_C 1
<8> USBP7- 2
TS_ON 3 3 4 USBP7+_C C540 15P/50V_4
28> TS_ON ON/OFF <8> USBP7+ 3
TS_INTB#
4 PROJECT :U83
5
R244
*100K/F_4
*IC(5P) G5243AT11U
Close to CN22 EC41 C623 6 <25,29> +PRWSRC Quanta Computer Inc.
<6,7,8,9,10,11,12,13,14,20,21,22,23,24,25,26,28,33,34,35> +3V
*100P/50V_4 0.1U/10V_4 <6,21,22,24,25,26,34> +5V
Touch screen <4,7,22,25,26,28,29,30> +3VPCU Size Document Number Rev
Custom 1A
R558 0_4
WLAN/G-Sensor/G-CLK/TS
A B C D E
1 2 3 4 5 6 7 8
3920_RST#
28
+3VPCU
+3VPCU_EC +3VPCU Q28 R377 4.7K_4

500mA +3V
adapter Type check
3
C431 0.1U/10V_4 *METR3904-G
C414 0.1U/10V_4 2 OVT_DETC 2 1 EC_PWROK
U12 C445 0.1U/10V_4 D11 MEK500V-40
SERIRQ 3 9 C473 0.1U/10V_4
<9,25> SERIRQ
1
LFRAME# 4 SERIRQ VCC1 22 C411 0.1U/10V_4 L24
<7,25,27> LFRAME# LAD0 10 LFRAME VCC2 33 +3VPCU
C448 0.1U/10V_4 BLM18BA470SN1D R353 10K/F_4 +3VPCU
<7,25,27> LAD0 8 LAD0 VCC3 96
LAD1 C472 0.1U/10V_4
<7,25,27> LAD1 LAD2 7 LAD1 VCC4 111 THRM_ALERT_HW#1
C422 0.1U/10V_4 Change to 1SS355 as Current loss
<7,25,27> LAD2 LAD2 VCC5
1
LAD3 5 125 C423 0.1U/10V_4
<7,25,27> LAD3 12 LAD3 VCC6 67
<8> CLK_24M_KBC +3VPCU_EC D10
A 13 PCICLK AVCC C421 A
<6,11,14,23,24,25,27> PLTRST# PCIRST/GPIO5 1SS355
CLKRUN# 38 C482 0.1U/10V_4 Open Drain need pu high
<6,25> CLKRUN# CLKRUN 4.7U/6.3V_6
2
SIO_EXT_SCI# 20 AD_TYPE R327 10K_4 R325 100/F_4
<9> SIO_EXT_SCI# SCI/GPIOE AD_ID <29>
R287 *0_4 SLP_S0#_EC 1 63 TEMP_MBAT
<6,11> PCH_SLP_S0_N GA20/GPIO0 AD0/GPI38 TEMP_MBAT <29>
RCIN# 2 64 AD_TYPE
<9> EC_RCIN# KBRST/GPIO1 AD1/GPI39
3920_RST# 37 65 AD_AIR 3 1
ECRST AD2/GPI3A 66 AD_AIR <29> DGPU_OVT# <15>
SYS_I C456 R342
55 AD3/GPI3B SYS_I <28,29>
MX0 Q25 12.1K/F_4 C455
<26> MX0 56 KSI0/GPIO30 68
MX1 *2N7002 0.1U/10V_4 100P/50V_4
<26> MX1 LAN_POWER <34>
2
MX2 57 KSI1/GPIO31 DA0/GPO3C 70
<26> MX2 58 KSI2/GPIO32 DA1/GPO3D 71 GPU_AC_BATT <15> DGPU_PWROK <9,28,35,36,37>
MX3 BATSHIP
<26> MX3 MX4 59 KSI3/GPIO33 DA2/GPO3E 72 PCH_PCIE_WAKE# BATSHIP <29>
PCIE_WAKE# <6,23,24,27> R382 4.7K_4 +1.05V
<26> MX4 KSI4/GPIO34 DA3/GPO3F
MX5 60
<26> MX5 61 KSI5/GPIO35 21
MX6 TP115 R567 *0_4
<26> MX6 MX7 62 KSI6/GPIO36 PW M1/GPIOF 23 ZERO_PWR_ODD IMVP_PWRGD_R <4>
<26> MX7 KSI7/GPIO37 PW M2/GPIO10 ZERO_PWR_ODD <24>
MY0 39 26 FAN1_PWM C497 220P/50V_4
<26> MY0 KSO0/GPIO20 FANPW M1/GPIO12 FAN1_PWM <25>
2
MY1 40 27 Q27
<26> MY1 KSO1/GPIO21 FANPW M2/GPIO13 TP5037
MY2 41 28 FAN1SIG
<26> MY2 MY3 42 KSO2/GPIO22 FANFB1/GPIO14 29 FAN1SIG <25> 3 1
<26> MY3 KSO3/GPIO23 FANFB2/GPIO15 TS_ON <27> PM_THRMTRIP# <9>
MY4 43
<26> MY4 MY5 44 KSO4/GPIO24 77 MBCLK METR3904-G
<26> MY5 45 KSO5/GPIO25 SCL1/GPIO44 78 MBCLK <29>
MY6 MBDATA
<26> MY6
MY7 46 KSO6/GPIO26 SDA1/GPIO45 79 MBCLK2
MBDATA <29> for Battery charge/charge
<26> MY7 MY8 47 KSO7/GPIO27 SCL2/GPIO46 80 MBDATA2 MBCLK2 <8,13,20>
<26> MY8
MY9 48 KSO8/GPIO28 SDA2/GPIO47 MBDATA2 <8,13,20> for DDR Thermal IC
<26> MY9 MY10 49 KSO9/GPIO29
<26> MY10 KSO10/GPIO2A
MY11 50 H_PROCHOT#
<26> MY11 KSO11/GPIO2B H_PROCHOT# <2,33>
MY12 51
<26> MY12 KSO12/GPIO2C
3
B MY13 52 B
<26> MY13 KSO13/GPIO2D
MY14 53 6 SUSB#
<26> MY14 KSO14/GPIO2E GPIO4 SUSB# <6,11>
MY15 54
<26> MY15 KSO15/GPIO2F
MY16 81 14 HWPG H_PROCHOT#_EC 2 C405
<26> MY16 KSO16/GPIO48 GPIO7 HWPG <4,11,30,31,32>
MY17 82 15 H_PROCHOT#_EC Q13 *47P/50V_4
<26> MY17 KSO17/GPIO49 GPIO8 R289 2N7002K
GPUT_CLK 83 16 SUSC#
<15> DGPUT_CLK GPUT_DATA 84 PSCLK1/GPIO4A GPIOA 17 SUSC# <6,11>
For GPU thermal SUSACK#_EC <6> *10K/F_4
<15> DGPUT_DATA
1
85 PSDAT1/GPIO4B GPIOB 18
<27> MBCLK3 PSCLK2/GPIO4C GPIOC EC_AOCS# <27>
For Gsensor 86 19 NBSWON1#
<27> MBDATA3 TPCLK 87 PSDAT2/GPIO4D GPIOD 25 NBSWON1# <25>
<25> TPCLK PSCLK3/GPIO4E GPIO11 EMU_LID <21>
For Touch-Pad TPDATA 88 30 R291 *0_4/S
<25> TPDATA PSDAT3/GPIO4F GPIO16 EC_DEBUG <27>
31
119 GPIO17 32 TP5035
BIOS_RD# SIO_EXT_SMI#
RD/GPIO5B GPIO18 SIO_EXT_SMI# <7>
BIOS_WR# 120
BIOS_CS# 128 W R/GPIO5C 34 VRON
89 SPICS/GPIO5A GPIO19 36 VRON <33>
DGPU_PROCHOT# R290 10K/F_4 NBSWON1#
SELIO/GPIO50 GPIO1A DGPU_PROCHOT# +3VPCU
ACIN 76 R371 4.7K_4 MBCLK
<29,34> ACIN AD5/GPIO43
SI Modify <7> 109 TP116 SI Add Pin36 to DGPU_PROCHOT# for DB error R370 4.7K_4 MBDATA
PCI_SERR# D0/GPXD0
EC_GPXD1 110 R361 10K/F_4 EC_PCIE_WAKE# Reserve for ENE Hold time issue
112 D1/GPXD1 R285 47K/F_4 LID_EC#
<6> SUSWARN#_EC 114 D2/GPXD2 73 EC_PCIE_WAKE# MBCLK2 C479 *10P/50V_4
<27> RF_LINK# 115 D3/GPXD3 AD6/CIR_RX/GPIO40 74 THRM_CPU EC_PCIE_WAKE# <27>
<6> SLP_SUS#_EC D4/GPXD4 AD7/GPIO41 THRM_MOINTOR <4>
D8 MEK500V-40 116 75 GPIO42_EC MBDATA2 C478 *10P/50V_4
<7> GPIO33_EC D5/GPXD5 AD4/GPIO42
117 90 DNBSWON#
<6> DPWROK_EC D6/GPXD6 GPIO52 DNBSWON# <6,11>
EC_PECI_R 118 91 CAPSLED# MBCLK C481 *10P/50V_4
D7/GPXD7 GPIO53 CAPSLED# <26>
92 PWR_LED# R319 *10K_4 GPIO33_EC
GPIO54 PWR_LED# <25> +3V
USBPW_ON# 97 93 EC_PWROK R366 *4.7K_4 GPUT_CLK MBDATA C480 *10P/50V_4
<22,26> USBPW_ON# A0/GPXA0 GPIO55 EC_PWROK <6>
SUSON 98 95 RSMRST# R365 *4.7K_4 GPUT_DATA SI Modify
<32,34> SUSON A1/GPXA1 GPIO56 RSMRST# <6>
MAINON 99 121 VOLMUTE# GPUT_CLK C477 *10P/50V_4
<31,32,34> MAINON A2/GPXA2 GPIO57 VOLMUTE# <22>
C 100 126 BIOS_SPI_CLK R373 4.7K_4 GPU_AC_BATT C
<10> SLP_SUS_ON A3/GPXA3 GPIO58
101 127 LID_EC# R368 4.7K_4 MBCLK2 GPUT_DATA C476 *10P/50V_4
<30> S5_ON A4/GPXA4 GPIO59 LID_EC# <25>
0_4 R326 102 R367 4.7K_4 MBDATA2
<4> THRM_MOINTOR1 A5/GPXA5
*0_4 R323 103
<28,29> SYS_I A6/GPXA6
104 123 CRY2 C432 *22P/50V_4
New Thermal Protect THRM_ALERT_HW#1 105 A7/GPXA7 GPIO5E
106 A8/GPXA8
<24> ODD_EJECT# 107 A9/GPXA9 122 CRY1 R307 0_4 HWPG C413 0.1U/10V_4 Close to BIOS
A10/GPXA10 GPIO5D AC_PRESENT_EC <6>
SI Modify 108 BIOS_CS# R286 15/F_4
<29> MBATLED0# A11/GPXA11 PCH_SPI_CS0#_R <7>
BIOS_SPI_CLK R298 15/F_4
<29> AC_LED_ON# PCH_SPI1_CLK_R <7>
11 BIOS_WR# R310 15/F_4
<26> WIRELESS_ON GND1 PCH_SPI1_SI_R <7>
24 3920_RST# BIOS_RD# R314 15/F_4
<26> WIRELESS_OFF GND2 PCH_SPI1_SO_R <7>
35
124 GND3 94 R306 47K/F_4 C433 0.1U/10V_4
V18R GND4 +3VPCU
113
GND5
2
69 R818 0_6
C429 C412 AGND
0.1U/10V_4 4.7U/6.3V_6 C410 *10P/50V_4 R288 *10_4 CLK_24M_KBC DGPU Thermal protect
1
KB9010QF C4 3920_RST#
Need Change New PN
3
CRY2 R281 *0_4
THRM_MOINTOR
PCH_SUSCLK <6> Adapter select for EC Q48
2
<15> TEMP_FAIL
2
THRM_MOINTOR1 +3VPCU R372 10K_4 GPIO42_EC R360 *10K_4

R282
2
*100K_4 DIS Hi ==> ( 90W ) *ME2N7002E

C631 C630
1
0.1U/10V_4 0.1U/10V_4 UMA Low ==>( 65W)
1
D D
R315 43_4 EC_PECI_R

<2> EC_PECI
FOR SG/DIS H_PECI (50ohm)
Route on microstrip only
<9,28,35,36,37> DGPU_PWROK R320 *0_4/S EC_GPXD1
Spacing >18 mils PROJECT :U83
Trace Length: 0.4~6.125 iches
<4,7,10,11,27,31,34> +1.05V
<6,7,8,9,10,11,12,13,14,20,21,22,23,24,25,26,27,33,34,35> +3V Custom
EC (KB9010QF C4) 1A
<4,7,22,25,26,27,29,30> +3VPCU
1 2 3 4 5 6 7 8
5 4 3 2 1
CN10
29
*PMPCRF-08MLBK2ZZ4H0
BATT+ 1
2 1
SMD 3 2
EC2 +PRWSRC SMC 4 3
1000P/50V_4 4
Do Not add test pad on BATDIS_G signal 5
B_TEMP_MBAT 6 5
DC_JACK +BATCHG 6
AD_ID <28> Place this ZVS close to 7 10
90W EC21 EC24 EC22 EC23 PQ2 8 7 10 9
PL2
5
CN12
+VA_AC +VA
PQ19
Diode away +VIN TPCA8064-H
80/5A 15" 8 9
CN11
*1U/25V_4
*1U/25V_4
*1U/25V_4
*1U/25V_4
PL5 PD8
1 EMB20P03V 3 PMPCRA-08MLBK2ZZ4H4
S
PL1
AD_ID
D VDD 2 80/5A 5 1 1 2 +VAD PQ27 5 2 BATT+ 1 D

VDD 6 2 QM3016D 1 80/5A 2 1
PL6
7 3 P4SMAJ20A 4 3 SMD 3 2
4 3
G
6 80/5A 8 PC3 PC1 SMC
GND 4
0.1U/25V_4
0.1U/25V_4
PR39
4
PC15 5
1
8 3 PC16 PC97 PC102 BQBATDRV BATDIS_ID_DOD B_TEMP_MBAT 6 5
0.1U/25V_4
LED2 GND 4 PC99 PC48 +3VPCU 7 6 10
0.1U/25V_4
0.1U/25V_4
0.022U/50V_6
7 GND *2200P/50V_4 2200P/50V_4 8 7 10 9
LED1 PR47 2K/F_4 +VIN 8 9
RC1206-R010 PR1 PR2
DC-IN CONN BATDIS_G 1 2 330_4 330_4
AC_LED_ON# Place this ZVS close to
Far-Far away +VIN 14"
2
To PWR LED <28> MBDATA PR3

PQ21 200K_4
1
DRC5144
IDEA_G
+VAD <28> MBCLK
PR16 PD9
PR18 3 1 PQ22 1M_4 PR4
+12VALW PR15 P4SMAJ20A TEMP_MBAT <28>
4 3
Q2
1M_4 PQ18 PD3 PD4 1K/F_4
2
1
PDZ5.6B
PDZ5.6B
2N7002K 1M_4 PR46 PR48
PR19
2
5 6 PR55 PR56 *0_2/S *0_2/S PC2 PC123
1 3 PR13
2K/F_4 4.02K/F4
0.01U/25V_4
0.01U/25V_4
+5VPCU 220K_4 PR12
2 1
CSIP
CSIN
2.43K/F_6 +VA
3
Q1
PR20 1K_6
2
220K_4 MMDT2907A PC64 PC9 PC8 PC10
2
2200P/50V_4
1000P/50V_4
PC13
4.7U/25V_8
0.1U/25V_4
AC_LED_ON# <28>
PC4 PC5
*0.1U/25V_4
MBATLED0#
*100P/50V_4
*100P/50V_4
REGN6V
Place this cap
PQ16
close to EC
1
C DRC5144 C
BQACN
BQACP
PQ23 PC52 PC38
DRC5144 PC51 PC54
0.1U/25V_4
8
7
6
5
PR17
3 1 1U/16V_4 PQ12
16
+12VALW
1
1M_4 0.1U/25V_4 0.1U/25V_4 NTTFS4C25N EC28 EC27 EC25 EC26
2
2N7002K
*10U/25V_8
*10U/25V_8
*10U/25V_8
*10U/25V_8
ACP
ACN
REGN
18 BQHIDRV 4
PR14 HIDRV
PQ17 1 3
+5VPCU BQCMSRC 3
CMSRC 1 2
2.43K/F_6 REGN6V
3
3
2
1
PD2 RB501V-40 PR50 +BATCHG
PR42
PC14 2 MBATLED0# <28> BQACDRV 4 17
BQB_2 BQB_1 RC1206-R020
ACDRV BTST F3_2X1_65-2_8
*0.1U/25V_4
0_6
PC39 PL4
PR58 19 1 2
PQ15 BQPHASE 0.047U/25V_4 BQLR
REGN6V
1
DRC5144 PHASE 4.7uH/5.5A(EM-47AM05V08)

100K/F_4
ACIN 5 PU2
<28,34> ACIN ACPRES
8
7
6
5
15 BQLODRV
PR57 LODRV
BQ24738 PQ8 PR5 PC53 PC47 PC6 PC7
10U/25V_8
10U/25V_8
+VAD NTTFS4C25N *2.2_6
0.1U/25V_4
0.1U/25V_4
+VA_AIR +VA 100K/F_4
14 PR51 PR49
PD6 GND 21 4 *0_2/S *0_2/S
PR45 GND
1 2 BQVCC 20 22
VCC GND 23 PC37 PC11
22_8 GND
1N4448WS-7-F 24 *2200P/50V_4 PD7
3
2
1
PC50 GND 25 SX34
PR66 0.47U/25V_6 GND 0.1U/25V_4
75K/F_4 PR43
MBDATA BQDATA 8 13 BQSRP PR40 0_4/P
SDA SRP CSOP
*0_4/S
B 12 BQSRN PR36 0_4/P PC36 CSON B
<28> AD_AIR PR41 SRN
MBCLK BQCLK 9
0.1U/25V_4
ACDET
SCL 11 BQBATDRV
IOUT
*0_4/S BATDRV
ILIM
PC134 PC35
0.1U/10V_4
PR60
10
7
12.4K/F_4 0.1U/25V_4
BQIOUT
Place this cap PR52
close to EC +VAD
PR38 PR37 PR44
430K/F_4 SYS_I <28> +BATCHG
100K/F_4
*100K/F_4
10/F_4
ACDET=13V PR54 PR53 PC49
69.8K/F_4 88.7K/F_4 PC40 PC138
*0.1U/50V_6
100P/50V_4
0.01U/50V_4
PR69
+3VPCU 470_8
3
MIN. BATV=7.2V
3
PR73 Place this cap
2
+PRWSRC close to EC
1M_4
2
<28> BATSHIP
PR72 PQ7
+3VPCU <4,7,22,25,26,27,28,30>
1M_4 2N7002K
1
+5VPCU <13,30>
PQ13
BATT+ <25>
2N7002K
+PRWSRC <25>
1
A A
3
PQ9
+VA_AIR PR59 2 METR3904-G
1M_4
1
PR311
PROJECT :U83
1M_4 Quanta Computer Inc.
Custom 1A
Charger (BQ24738)
5 4 3 2 1
5 4 3 2 1
DC/DC +3VS5/+5VS5
30
D D
+VIN Place these CAPs +VIN_5VS5

PL20 close to FETs
*0_8/S
Place these CAPs +VIN_3VS5 +VIN
close to FETs PL19
PC213
PC204 PC207 PC208 PC211 *0_8/S
0.1U/25V_4
2200P/50V_4
4.7U/25V_8
4.7U/25V_8
0.1U/25V_4
PC218 PC215 PC216 PC210 PC214
+VIN
2200P/50V_4
+5VPCU
0.1U/25V_4
4.7U/25V_8
4.7U/25V_8
0.1U/25V_4
PC197
PR173
4.7U/6.3V_6
10_8
+3VPCU
+2VREF +5VPCU
+5 Volt +/- 5%
+3.3 Volt +/- 5%
Countinue current:4A PC209
PC200 Countinue current:4A
4.7U/6.3V_6
Peak current:6A PC217 PR187
0.1U/25V_4
PR181 1U/6.3V_4 *0_2/S Peak current:6A
OCP minimum:7.5A *665K/F_4
OCP minimum:7.5A
16
17
5
6
7
8
8
7
6
5
C C
+5VS5 PQ50 PQ52 +3VS5
VREG3
VREG5
REF
VIN
NTTFS4C25N PR182 8205EN 13 4 NTTFS4C25N
EN0 TONSEL
*330K/F_4
2
2
4 5V_UGATE121 10 3V_UGATE2 4
PJP3 PC205 UGATE1 UGATE2 PC206 PJP4
PR183 22 9 PR184
*POWER_JP/S 5V_BST1 *POWER_JP/S
BOOT1 BOOT2
2.2_6 2.2_6
1
1
2
3
3
2
1
1
PL17 0.1U/25V_4 PU9 0.1U/25V_4 PL18
+5V_ALWP 5V_PHASE120 RT8223P 11 3V_PHASE2 +3.3V_ALWP
2.2uH/8A(EM-22AM05V04) PHASE1 PHASE2 2.2uH/8A(EM-22AM05V04)
PR150 PR180
5
6
7
8
5V_LGATE1 19 12 3V_LGATE2
LGATE1 LGATE2
8
7
6
5
*0_2/S *0_2/S
1
PR170 24 PR166
ENTRIP1
ENTRIP2
VOUT1
SKIPSEL
+ *2.2_6 5V_FB1 2 7 *2.2_6
FB1 OUT2
1
PC183 PC182 PR192 4
GND
GND
ENC
PR186
15.4K/F_4 PR185 0_4/P PGOOD 23 5 3V_FB2 4 +
220U/6.3V_6X4.5
0.1U/10V_4
+3VS5
2
PQ49 PGOOD FB2 PC184 PC203

10K_4
PC202 MDV1595SURH PQ51 PC194
0.1U/10V_4
220U/6.3V_6X4.5
1
2
3
18
14
25
15
2
*2200P/50V_4
*2200P/50V_4
<4,11,28,31,32> HWPG MDV1595SURH
3
2
1
PR191
10K/F_4 PR193 PR179
Rds(on) 14m ohm 80.6K/F_4 *0_2/S Rds(on) 14m ohm
PR190
6.8K/F_4
PR188
B 90.9K/F_4 B
PR189
10K/F_4
PR178 0_4/P S5_ON
S5_ON <28>
PC201
*1000P/50V_4
A A
PROJECT :U83
Custom 1A
3/5VPCU(RT8223P)
5 4 3 2 1
5 4 3 2 1
31
D D
+VIN_1.05V +VIN +1.05V Volt +/- 5%

PU5
6 1
PL11 Countinue current:4A
NC VIN *0_8/S
Peak current:7.7A
14 PC114 PC116 PC118 PC115 PC120
AGND OCP minimum:9A
2200P/50V_4
0.1U/25V_4
4.7U/25V_8
4.7U/25V_8
0.1U/25V_4
3 2
NC PGND +1.05V
5
NC
2
PR305
*0_4 PC287 +1.05V_S2 PJP2
PR303
10 NB671BSTPCH NB671BSTPCH_S *POWER_JP/S
4 BST
0_6
1
PGOOD 0.1U/25V_4 PL13
8 NB671SW
SW 9 1uH/11A(EM-10AM05V06)
PR307 SW 15
HWPG NB671PGPCH
<4,11,28,30,32> HWPG SW 16
*0_4/S PR101
SW
1
*2.2_6
+
11 PR122 PC154 PC148 PC149 PC165 PC164 PC166 PC167 PC163
VCC *0_2/S
0.1U/10V_4
22U/6.3V_8
22U/6.3V_8
22U/6.3V_8
*22U/6.3V_8
*22U/6.3V_8
*22U/6.3V_8
*330U/2.5V_6X4.5ESR12
2
PC291 PC124
*2200P/50V_4
1U/6.3V_4
C C
7 NB671VOUTPCH
VOUT
MAINON PR306 0_4/P 13

<28,31,32,34> MAINON EN PR304
12 NB671FBPCH
FB
12K/F_4
PC292 PR302
NB671 16.2K/F_4
*0.1U/25V_4
B PR153 +1.5V +/- 5% B

*0_6/S
+3VS5
Countinue current:1.3A
PC181 Peak current:1.5A
4.7U/6.3V_6
OCP current:2A
+1.5V
4
PU8
VIN
PL16
HWPG PR161 0_4/P 5 3 8008LX1.5V
PG LX 2.2uH/1.3A_2520
PR145
MAINON PR159 0_4/P 1 2
<28,31,32,34> MAINON EN GND *0_2/S
PC177 PC178
FB
PC189
10U/6.3V_6
0.1U/10V_4
AWP8824CTI
0.1U/10V_4
R1 +VIN <21,25,29,30,32,33,34,35,36,37>
PR163 +3VS5 <6,9,10,11,25,27,30,34,35,36>
8008VFB1.5V
+5VS5 <13,22,25,26,30,32,33,34,35,36,37>
15K/F_4 +5VPCU <13,29,30>
PR164
R2 10K/F_4
VO=(0.6(R1+R2)/R2)
A A
PROJECT :U83
Custom 1A
+1.05V (NB671)/1.5V
5 4 3 2 1
1 2 3 4 5
32
A A
+1.35VSUS <2,4,12,13,25>
+VIN_DDR +VIN
( VTT/2A ) +1.35VSUS
PL22 +1.35V +/- 5%
+0.675V_DDR_VTT +0.75V_DDR_VTT *0_8/S
PU1 PC225 Countinue current:6A
3 2 PC27 PC26 PC223 PC224 PC25
VTT VLDOIN Peak current:10A
2200P/50V_4
0.1U/25V_4
4.7U/25V_8
4.7U/25V_8
0.1U/25V_4
8
7
6
5
1 *10U/6.3V_6
PC34 VTTSNS OCP minimum:12A
10U/6.3V_6
4 +1.35VSUS
VTTGND 14 51216DRVH 4
DRVH
2
7 PC28 PQ53
GND 15 51216VBST PR28 51216VBST_S NTTFS4C25N PJP5
3
2
1
21 VBST PL21 +1.35VSUS_S
( 3mA ) GND 2.2_6 *POWER_JP/S
PR197 0.1U/25V_4 0.82uH/13A(EM-82BM05V04)
1
B 5 13 51216SW 51216SW B
<12,13> DDR_VTTREF VTTREF SW
*100/F_4
8
7
6
5
1
PC226 PC33 11 51216DRVL PR195
<13> 51216S3 DRVL +
*0.1U/10V_4 0.22U/10V_4 *2.2_6
PR194 PC220 PC219
10 4 *0_2/S
0.1U/10V_4
330U/2.5V_6X4.5ESR12
2
MAINON PR32 0_4/P 51216S3 17 PGND
<28,31,34> MAINON S3 PQ54
9 51216VDDQSNS MDV1595SURH PC221
3
2
1
SUSON PR29 0_4/P 16
51216S5 VDDQSNS *2200P/50V_4
<28,34> SUSON S5 +1.8VREF
<4,11,28,30,31> HWPG HWPG PR35 0_4/P 20
51216PG
PGOOD 6
VREF
PR30 51216TRIP 18
TRIP Rds(on) 14m ohm
120K/F_4 PC32
0.1U/10V_4 PR34
PR33 51216MODE19 10K/F_4
MODE
47K/F_4
8 51216REFIN
12 REFIN
+5VS5 V5IN
APW8819QAI PC31 PR31
PC29 31.6K/F_4
0.01U/25V_4
1U/6.3V_4
C C
D D
PROJECT :U83
Custom 1A
DDR3 (APW8819)
1 2 3 4 5
5 4 3 2 1
Place close
to inductor
33
1
PC187
PR157 PR131
*680P/50V_4 75K/F_4 220K_6 NTC TSENSE
PC188
2
PR158
D PR139 D
165K/F_4
1500P/50V_4 0_4/P
PR152
POP Rb and SWN
no POP Ra 69.8K/F_6
15.4K/F_4
for nex
1
22.6K/F_4
version.
1000P/50V_4
Boot Voltage Table PR136 PR119
100K/F_4
8.25K/F_4
TH05-3L104FR
R_boot V_boot
2
PC198 PC196 PC191
PR168
81101IOUT PR162
470P/50V_4
81101ILIMPR165
49.9/F_4 PC170 30.1K 0V
CSREFPC179
330P/50V_4 10P/50V_4 2.2U/6.3V_6
CSCOMP
PR147
PC199 Ra 49.9K 1.65V Place close
CSSUM
PR169 1K/F_4 PR177
to MOSFET
6.04K/F_4 +5VS5
*1500P/50V_4 69.8K 1.7V
PR176
PR167 POP for DIS
20
21
19
18
17
16
15
0_4 Rb 18.7K/F_4 90.9K 1.75V
+VIN_VCC_CORE +VIN
ILIM
CSSUM
IOUT
CSREF
CSCOMP
IMAX
PVCC
PL12
PC193 81101ROSC 22 14 VBOOT PR143 69.8K/F_4 *0_8/S
ROSC VBOOT
1
81101COM 23 13 TSENSE PC169 0.01U/25V_4 + + + +
C *2200P/50V_4 COMP TSENSE PC119 PC122 PC125 PC113 PC117 PC222 PC43 PC42 PC41 PC212 C
24 9
2200P/50V_4
100U/25V
100U/25V
81101FB 81101_HG PR140 1_6 81101_HG_G
*15U/25V
*15U/25V
4.7U/25V_8
4.7U/25V_8
0.1U/25V_4
0.1U/25V_4
*4.7U/25V_8
2
PR175 0_4/P PR172 0_4/P FB HG
81101DIFFOUT 25 PU7 11
DIFFOUT NCP81101MNTXG PGND PC168
<4> VSS_SENSE
2
PC195 81101VSN 26 8 81101_BST
<4> VCC_SENSE VSN BST
G1
D1
D1
D1
1000P/50V_4
PR174 0_4/P 81101VSP 27 10 81101_PH 0.22U/25V_6
VSP SW +VCC_CORE
PR171 81101VCC 28 12 81101_LG PL15
VR_HOT#
+5VS5
S1/D2
VCC LG
VR_RDY
ENABLE
ALERT#
2.2_6 81101_PH
VRMP
9
SCLK
0.36uH
SDIO
PC192 29
PR27 GND PC132 PC151
1U/6.3V_4
G2
S2
S2
S2
PR116
*22U/6.3V_8
*22U/6.3V_8
*0_4/S
7
*2.2_6
5
PR138 PQ37
81101VRMP RJK03S3DPA
VR_HOT#
ALERT#
VR_RDY
+VIN_VCC_CORE
SCLK
SDIO
1K/F_4
PR160 0_4/P PC140
<28> VRON
PC176 *2200P/50V_4
PR156 *0_4 0.01U/50V_4 PR128 *0_2/S PR26 10/F_4 CSREF
<4> H_VR_ENABLE_MCP
PR127 *0_2/S SWN

PR155 *75/F_4 +VIN_VCC_CORE
+V1.05S_VCCST
+V1.05S_VCCST 81101_HG_G
<2,28> H_PROCHOT# H_PROCHOT# PR154 0_4/P
<4> VR_SVID_DATA PR151 0_4/P Icc_Max=32A
2
B B
I_TDC=14A
G1
D1
D1
D1
<4> VR_SVID_ALERT# PR149 0_4/P
PR148 I_Dynamic=27A
130/F_4 PR144 PR141 PC190
<4> VR_SVID_CLK
PR146 0_4/P V_Operate=1.6V~1.8V
*75/F_4 54.9/F_4 0.1U/10V_4 DC_LL=2m
S1/D2
IMVP_PWRGD PR142 0_4/P
<4,6> IMVP_PWRGD AC_LL=7m
81101_PH 9
SDIO
+3V PR137 *10K/F_4 AC_LL_VOS=9.4m
ALERT# VBOOT=1.7V
G2
S2
S2
S2
SCLK
5
PQ1
*RJK03S3DPA
81101_LG
+VCC_CORE
PC133 PC135 PC139 PC129 PC152 PC153
*22U/6.3V_8
*22U/6.3V_8
*22U/6.3V_8
*22U/6.3V_8
*22U/6.3V_8
*22U/6.3V_8
A A
PROJECT :U83
Custom CPU Core (NCP81101)ULT 1A
Date:Thursday, March 14, 2013 Sheet 33 of 41

5 4 3 2 1
5 4 3 2 1
34
+VAD
PR118
22_6
D D
PC144
0.1U/25V_4
PC145 2 1
17 G5934VOUT
0.1U/25V_4 PC143
20 G5934VIN
19 G5934CN
18 G5934CP
PC142
1U/35V_6
ACIN <28,29>
DCAP
0.47U/25V_6
16
PR121
*0_4 +VAD
VOUT
CP
D_CAP
VIN
CN
1 15 G5934PG
<28> LAN_POWER ON1 PG
PR123
*750K/F_4
MAINON 2 14 G5934VSENSE
<28,31,32> MAINON ON2 VSENSE
PU6 +12VALW
G5934RZ1U PR126
PR125 0_4/P 3 13 *100K/F_4
<28,32> SUSON ON3 REG
PC150
1U/16V_4
MAINON 4
ON4
7 G5934DISC3 PR134 0_4/P +3VSUS
C DISC3 C
PR129 0_4/P 5
G5934DISC1 6 G5934DISC2 PR135 0_4/P
+3VS5 +3VLANVCC DISC1 DISC2 +5V
DRIVER4
DRIVER3
DRIVER1
DRIVER2
DISC4
+5VS5
GND
5
6
7
8
PC172 PQ45
12
11
10
21
0.1U/10V_4 NTTFS4C25N
8
7
6
5
PC159
4 MAIND3.3V G5934DISC4 PQ47 0.1U/10V_4
NTTFS4C25N
5.2A PC162 MAIND 4
1
2
3
0.022U/25V_4
+3V 5.1A
PC156 +5V
3
2
1
for +1.05V_MODPHY timing 2200P/50V_4
PR133
PC155 PC158 0_4/P
0.1U/10V_4 PC171 PC175
*10U/6.3V_6
0.1U/10V_4
*10U/6.3V_6
+3V
+12VALW +1.05V
+1.05V_MODPHY
B +VIN B
MAIND
8
7
6
5
+3VS5 +3VS5 PR113 PQ42 PC23
PR117 1M_4 LQ3E070BNFU7TB 0.1U/10V_4
*22_8
PR105 1.05VMOD_OND 4
PQ48 1M_4
3
PC174 EMB32N03K PC173 PQ34 PQ41
1.84A
6
5
2
1
1
2
5
6
0.1U/10V_4 *2N7002K 2N7002K PC137

0.1U/10V_4
0.04A
3
2
1
+1.05V_MODPHY +1.05V
0.01U/25V_4
3 SUSD LAN_ON 3 2 2 PL14
+3VSUS 0.67A
PQ46 *80/5A
3
EMB32N03K PC161 PC180 +3VLANVCC
4
2200P/50V_4 2200P/50V_4 PR106 PC141 PC147 PC24
1
2 1M_4 0.1U/10V_4
0.1U/10V_4
*10U/6.3V_6
<9> MPHY_PWREN
PC157 PC160
PC186 PC185 PQ35
0.1U/10V_4
*10U/6.3V_6
1
0.1U/10V_4 BSS138W 1.05VMOD_ONG
*10U/6.3V_6
<6,7,8,9,10,11,12,13,14,20,21,22,23,24,25,26,27,28,33,35> +3V
<6,21,22,24,25,26,27> +5V
<21,25,29,30,31,32,33,35,36,37> +VIN
<6,9,10,11,25,27,30,31,35,36> +3VS5
<13,22,25,26,30,32,33,35,36,37> +5VS5
<24,29,36> +12VALW
A <23,27> +3VLANVCC A
<12,13,32> +0.75V_DDR_VTT
PROJECT :U83
Custom 1A
Dis-charge IC (SLG55448)
5 4 3 2 1
5 4 3 2 1
VGA Core +3VS5
PR301
PR300
100K/F_4
+3V
+5VS5
35
100K/F_4
PD10
6
1 2
2 PQ64B PR257
1N4448WS-7-F 2N7002KDW 10_6
3
+VIN_GPU +VIN
PR260
1
D 5 PC319 D
<8,36,37> DGPU_PR_EN
20K/F_4 PL3
PQ64A
4
PC303 2N7002KDW PU3 ADP3211A 1U/6.3V_4 *0_8/S
+VGA +/- 5%
1
0.33U/6.3V_4 3211_EN 32 24 3211_VCC
EN VCC
5
PC55 PC56 PC61 PC46 PC44 PC45 PC58
PR280 31 22 Countinue current:21A
2200P/50V_4
3211_DRVH PR261 1_6 3211_DRVH_G
4.7U/25V_8
4.7U/25V_8
4.7U/25V_8
0.1U/25V_4
0.1U/25V_4
D D
*4.7U/25V_8
2
VID0 DRVH
0_4/P
30 23 3211_BST PC313 4
G
4
3211_DRVH_G
G Peak current:27A
<15> GFX_CORE_CNTRL1 VID1 BST S S
0.22U/25V_6
29 21 PQ4 OCP minimum 33A
<15> GFX_CORE_CNTRL2
1
2
3
1
2
3
VID2 SW TPCA8064-H PQ3
28 20 TPCA8064-H
<15> GFX_CORE_CNTRL3 VID3 PVCC +5VS5 +VGA_CORE
PL8
27 18 0.36U28A(ETQP4LR36AFC)
<15,16> GFX_CORE_CNTRL4 VID4 PGND PC314 DCR=0.76mohm
26 17 2.2U/6.3V_6 3211_SW 800 mils
<15> GFX_CORE_CNTRL5 VID5 AGND
PR272
1
PR274 10K/F_4 25 19 3211_DRVL
+3V VID6 DRVL
5
PR75 PR255 PR263 + + + +
0_4/P
1 16 3211_CSCOMP D D *2.2_6 *0_2/S *0_2/S PC101 PC111 PC91 PC110
<9,28,36,37> DGPU_PWROK PW RGD CSCOMP
*330U_2V_7343_ESR6
330U/2.5V_6X4.5ESR12
330U/2.5V_6X4.5ESR12
330U/2.5V_6X4.5ESR12
G G
2
2 8 3211_ILIM PR271 4 3211_DRVL4
IMON ILIM 3.24K/F_4 S S
3 13 3211_LLINE PR273 PQ20 PQ14
1
2
3
1
2
3
CLKEN# LLINE 20K/F_4 TPCA8A10-H TPCA8A10-H PC62
3211_FBRTN 4 PR279 3211_CSREF *2200P/50V_4
FBRTN 20K/F_4
PR253
3211_FB 5 15 3211_CSFB
FB CSFB
100K/F_4
C 3211_COMP 6 14 3211_CSREF C
PC301 PC317 COMP CSREF
9 12
1000P/50V_4
3211_IREF 3211_RAMP
GNDEP
IREF RAMP
GPU
220P/50V_4 10
RT
PC310 RPM
3211_RPM
47P/50V_4
11
33
PC296
PR277
PR278
20K/F_4 3211_RT PR268
1K/F_4
470P/50V_4 *0_4/S
PR275 PR262 PR276

GPIO10 GPIO30 GPIO16 GPIO20 GPIO15 Sun XT
200K/F_4
340K/F_4
80.6K/F_4
PR256 PR265 Place close to Inductor PWRCNTL5 PWRCNTL4 PWRCNTL3 PWRCNTL2 PWRCNTL1 V-CORE
*0_4 *0_4/S
PR258 PR281
0_4/P 0_4/P PR259 0 1 1 1 1 1.125V
2 1
220K_6 NTC 1 0 0 0 0 1.100V

+5VS5
PR283
110K/F_4 1 0 0 0 1 1.075V
Place close to CPU socket 1 0 0 1 0 1.050V

PC302 PC306 PR270
VCCSENSE & VSSSENSE pins
1200P/50V_4
B 680P/50V_4 178K/F_4 B
PR282 1 0 0 1 1 1.025V
PR269 422K/F_4
PR267
100/F_4
+VGA_CORE PR266 121K/F_4 1 0 1 0 0 1.000V
+VIN_GPU
VGPU_CORE_SENSE
1K/F_4
1 0 1 0 1 0.975V
VSS_GPU_SENSE
PR254 1 0 1 1 0 0.950V
100/F_4 PC297 PC304
1000P/50V_4
1000P/50V_4
1 0 1 1 1 0.925V
Place close to CPU socket
VCCSENSE & VSSSENSE pins 1 1 0 0 0 0.900V Default
1 1 0 0 1 0.875V
1 1 0 1 0 0.850V
1 1 0 1 1 0.825V
1 1 1 0 0 0.800V
A A
1 1 1 0 1 0.775V
PROJECT :U83
Custom +VGACORE (ADP3211) 1A

5 4 3 2 1
1 2 3 4 5 6 7 8
VGA TYPE R2 Value P/N 1.0V_VGA
Thems
MARS
10K
11.3K
CS31002FB26
CS31132FB07
1.0V
0.95V
+0.95V +/- 3%
Countinue current:2A
Peak current:3A
36
OCP minimum:4A
+1.0V_VGA +0.95V_VGA
PC271 PR248
2
A A
*2200P/50V_4 *2.2_6 +1.0V_VGA_S2 PR249
PU13 *POWER_JP/S
PL29
1
PR289 554PG_1.0V 4 1 554LX_1.0V
<9,28,35,37> DGPU_PWROK PG NC
0_4/P 1uH/11A(EM-10AM05V06) 554FB_1.0V_S PR250
2 1 554PVIN_1.0V 9 2 *0_2/S
+5VS5 PVIN LX PC341
PJP7 10 3 *22P/50V_4 PR294 PC295 PC275 PC274
*POWER_JP/S PVIN LX 6.65K/F_4
0.1U/10V_4
10U/6.3V_6
R1
*22U/6.3V_8
RT8068A 7 554NC_1.0V PC330
NC *68P/50V_4
PR252 554SVIN_1.0V 8 6 554FB_1.0V
SVIN FB
10_6
11 5
GND EN
R2 V0=0.6*(R1+R2)/R2
PC272 PC273 PC277 PR298
11.3K/F_4
0.01U/50V_4
10U/6.3V_6
1U/6.3V_4
PR251 10K_4
<8,35,37> DGPU_PR_EN
1.8V +/- 3%
PC278
0.47U/6.3V_4 Countinue current:2A
Peak current:3A
OCP minimum:4A
B +1.8V_VGA B
PC328 PR284
2
*2200P/50V_4 *2.2_6 +1.8V_L PR285
PU15 *POWER_JP/S
PL32
1
DGPU_PWROK PR287 554PG_1.8V 4 1 554LX_1.8V
PG NC 1uH/11A(EM-10AM05V06) 554FB_1.8V_S PR292
0_4/P
2 1 554PVIN_1.8V 9 2 *0_2/S
+5VS5 PVIN LX PC334
PJP6 10 3 *22P/50V_4 PR293 PC327 PC333 PC321
*POWER_JP/S PVIN LX 20K/F_4
0.1U/10V_4
10U/6.3V_6
R1
*22U/6.3V_8
RT8068A 7 554NC_1.8V PC336
NC *68P/50V_4
PR297
554SVIN_1.8V 8 6 554FB_1.8V
SVIN FB
10_6 PR288
11 5 554EN_1.8V
GND EN PR286
69.8K/F_4 R2
PC329 PC331 PC345 10K/F_4
PC320
0.01U/50V_4
10U/6.3V_6
1U/6.3V_4
0.47U/6.3V_4
V0=0.6*(R1+R2)/R2
DGPU_PR_EN
C C
+12VALW
+3V_VGA +VGA_CORE
+3VS5
+VIN
PR130
1
2
5
6
PR299 PR296 1M_4
*22_8 *22_8 PC346
PR295 3VGFX_OND 3 0.1U/10V_4
1M_4
3
PQ59 PQ62 PQ60 PQ61

*2N7002K *2N7002K 2N7002K EMB32N03K 0.06A
4
+3V_VGA
2 2 2
PC343
3
PQ63 2200P/50V_4
2N7002K
PR291 PR290 PC337 PC325
1
DGPU_PR_EN 2 1M_4 0.1U/10V_4

*10U/6.3V_6
0_4/P
D D
PC293 3VGFX_ONG
1
*0.47U/6.3V_4
+1.8V_VGA <14,15,17,27>
PROJECT :U83
+1.0V_VGA <14,15,17>
+3V_VGA <14,17>
Custom +1.0V_VGA/1.8V_VGA/3V_VGA
1A
Date:Thursday, March 14, 2013 Sheet 36 of 41
1 2 3 4 5 6 7 8
5 4 3 2 1
+1.5V_VGA <17,18,19>
37
+VIN_1.5VGA +VIN
D
PR241 PL7
+1.5V Volt +/- 5% D
PR309
+5VS5 Countinue current:6A
RT8238VCC1.1V
RT8238TON1.1V
10_6 360K/F_4 *0_8/S
PC88 PC89 PC81 PC82 PC78 Peak current:8A
2200P/50V_4
PC251
0.1U/25V_4
4.7U/25V_8
4.7U/25V_8
0.1U/25V_4
OCP minimum:12A
8
7
6
5
1U/6.3V_4
PQ65
NTTFS4C25N +1.5V_VGA
11
5
PU12
2
3 RT8238DH1.1V
VCC
TON
PR310 UGATE
10
RT8238ILIM1.1V PC252 PJP1
3
2
1
CS 4 PR229
RT8238BST_1_1.1VRT8238BST1.1V
127K/F_4 BOOST *POWER_JP/S
+1.5VGFX_S2
2_6
1
PR96 0_4/P 9
RT8238HWPG_S2A1.1V RT8228A 0.1U/25V_4 PL9
<9,28,35,36> DGPU_PWROK PGOOD 2 RT8238LX1.1V
DGPU_PR_EN PR231 8
RT8238EN1.1V PHASE 1uH/11A(EM-10AM05V06)
<8,35,36> DGPU_PR_EN EN
30K/F_4 1 RT8238DL1.1V
LGATE
8
7
6
5
MODE
GND
1
PC249 13 PR98
FB
PAD *2.2_6 +
0.47U/6.3V_4
PR100 PC106 PC85 PC74 PC73
12
RT8238FB1.1V 6
4 *0_2/S
0.1U/10V_4
330U/2.5V_6X4.5ESR12
*22U/6.3V_8
*22U/6.3V_8
2
PQ66
Vo=0.5(R1+R2)/R2 MDV1595SURH PC98
3
2
1
*2200P/50V_4
PC250
C PR308 C
+5VS5
0_4/P
*100P/50V_4 RDSon=13m ohm
PR239
20K/F_4
PR240
10K/F_4
+1.5V_VGA
B B
+VIN
PR115
*22_8
3
PR120
*1M_4
2
3
PQ39
RT8238EN1.1V 2 PR114 *2N7002K
1
*1M_4
PC146 PQ40
1
*0.47U/6.3V_4
*DRC5144
A A
PROJECT :U83
Custom 1A
+1.5V_VGA(RT8228)
5 4 3 2 1
1 2 3 4 5 6 7 8
USB3.0 Port Assignment Power control pin SATA Master Port Assignment Power control pin
A A
PORT1 USB2.0/USB3.0 COMBO 1st USBPW_ON#(from EC) SATA0 HDD N/A
USBPW_ON#(from EC) SATA1 mSATA N/A

USB2.0/USB3.0 COMBO 2nd
PORT2
SATA2 NC N/A
PORT3 NC N/A
SATA3/PCIE Card reader N/A
PORT4 NC N/A
PCIE Port Assignment Control pin

USB2.0 Port Assignment Power control pin
B B
USBPW_ON#(from EC) PCIE 5_L0 PEG0
PORT0 USB2.0/USB3.0 COMBO 1st
PCIE 5_L1 PEG1
PORT1 USB2.0/USB3.0 COMBO 2nd USBPW_ON#(from EC)
PCIE 5_L2 PEG2
PORT2 Camera N/A
PCIE 5_L3 PEG3
PORT3 NC N/A
PCIE 1 NC
PORT4 NC N/A
PCIE 2 NC
PORT5 Left side USB daughter B USBPW_ON#(from EC)
PCIE 3 WLAN
PORT6 WLAN N/A
C PCIE 4 LAN C
PORT7 Touch Screen 15" used TS_ON(from EC)
D D
PROJECT :U83
1A

1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
+3V_DEEP_SUS +3VSUS +3V +3V
2.2K 2.2K 2.2K 2.2K *4.7K *4.7K 4.7K 4.7K

+3VSUS
AP2 SMB_PCH_CLK TP_SMB_CLK 1
2N7002KDW
AH1 SMB_PCH_DAT TP_SMB_DATA 2 Touch Pad
2N7002KDW
A A
+3VSUS
Haswell +3V
TP_SMB_CLK 53
ULT 2N7002DW
TP_SMB_DATA 51 XDP
+3V_DEEP_SUS
2N7002DW
+3V
2.2K 2.2K DDR3L DIMM
+3V *0Ω 0Ω
AU3 SMB_ME1_CLK MBCLK2 CSCL1 9
*2N7002DW
AH3 SMB_ME1_DAT MBDATA2 CSDA1 10 RTD2132R-CG
*2N7002DW
*0Ω 0Ω
+3V
B
+3V B
7 CPU heat pipe local thermal sensor (*G781-1P8)
4.7K 4.7K
79 MBCLK2 8
80 MBDATA2 7 DDR thermal sensor (*EMC1412-1-ACZL-TR)
+3VPCU
330
SMC 4
330 SMD 3 Battery

4.7K 4.7K
*short
77 MBCLK BQCLK 9
78 MBDATA BQDATA 8 Charger

+3V *short
C C
EC 4.7K 4.7K
83 GPUT_CLK D9
GPU internal thermal sensor (I2C)
KB9010QF 84 GPUT_DATA D8
+G_SEN_PW
4.7K 4.7K
85 MBCLK3 4
86 MBDATA3 6 G-sensor (AL003DC2A00)
+3VSUS
D 4.7K 4.7K BLM18BA470SN1D D
87 TPCLK TPCLK-1 5
88 TPDATA TPDATA-1 4 Touch Pad

BLM18BA470SN1D
PROJECT :U83
1A
SMBUS
Thursday, March
Date: 14, 2013 Sheet 39 of 41
1 2 3 4 5 6 7 8
5 4 3 2 1
(+VAD)
Adapter
+PRWSRC
D D
(+VIN)
Battery Discharger IC
MAINON SUSON VRON DGPU_PWR_EN DGPU_FB_EN
SLG55448VTR +12VALW
AOS ANC ONS Richtek AOS LAN_POWER MAINON SUSON MAINON

+3VPCU
AOZ1237 APW8819QAI NCP81101MNTWG RT8813A AOZ1237
Richtek
RT8223P Driver 1 Driver 2 Driver 3 Driver 4
+5VPCU
(+3VS5) (+5VS5) (+3VS5) (+3VS5)
S5_ON
+1.05V +1.35VSUS +VCC_CORE +VGACORE +1.5V_GFX
DGPU_VC_EN
C
+3VLANVCC +5V +3VSUS +3V C
+3VS5 +5VS5 MOS

MDU1512RH
MAINON DGPU_PWR_EN USBPW_ON#
+1.05V_GFX
SGY MOS Power SW
SY8002ABC EMB32N03K G547N2P81U
+1.5V +3V_GFX +5V_USBP0
B B
A A
PROJECT :U83
1A
Power Block Diagram
5 4 3 2 1
5 4 3 2 1
+VIN +PWR_SRC +VIN

+3VS5 +3VLANVCC +3VS5 +3V 17 2 1
16 +3VPCU +3VS5
S5 PWR S5 PWR 3 +5VS5

LAN_POWER 10 MAINON 11 PWR +5VPUC 3V/5V
MOS SW MOS SW BTN VR CHARGER Battery
HWPG
D
+5VS5 +5V
17 +3VS5 +3V_GFX
D
19 23
LATCH
3
S5 PWR S5 PWR 13
(NBSWON1#)
MAINON 11 DGPU_PWR_EN
MOS SW MOS SW
SUS_ON 9
22 4 S5_ON
MAINON 11 5
+3VS5 +3VSUS
15 +1.05V +1.05V_GFX VCCDSW3_3
VRON 12 6 DNBSWON#
PWRBTN#
7 SUSC#
LAN_POWER 10 SLP_S4#
S5 PWR S0 PWR 8 SUSB#
SUS_ON 9 DGPU_VC_EN SLP_S3#
MOS SW MOS SW 13 DGPU_PWR_EN
GPIO54
14 EC DGPU_PWROK
25 GPIO17
PCH
C
25 C
27 PLTRST#
DGPU_PWROK PLTRST#
+VIN 21 D1/GPXD1
+1.5V_GFX EC_PWROK
GPIO55 SYS_PWROK
HWPG 0Ω
DGPU_VC_EN 14 GPIO7 26 PCH_PWROK
1.5V
VR 23 *TC7SH08FU
DGPU_PWROK APWROK
PG 25 IMVP_PWRGD
+VIN
+1.35VSUS 15 EC_PWROK
SUS_ON 9
1.35V
VR
HWPG
PG
B B
+VIN 17
+1.05V
MAINON 11
1.05V
VR CPU
HWPG
PG
+3VS5 17 +VIN +VIN

+1.5V 20 18
+VGACORE +VCC_CORE
MAINON 11
LDO +3V IMVP
HWPG
PG
VR 14 VR 24
DGPU_VC_EN IMVP_PWRGD
PG PG
EN
EN
A A
DGPU_PWR_EN 13 VRON 12
PROJECT :U83
1A
Date:
POWER UP Sheet
SEQUENCE
Thursday, March 14, 2013
41 of 41
5 4 3 2 1

HP Pavilion 15 440 G1 Quanta U83 DA0U83MB6E0 Rev-E

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HP Pavilion 15 440 G1 Quanta U83 DA0U83MB6E0 Rev-E

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5 4 3 2 1

U83 DIS (14"/15.6") Ultra/Slim 01

Digital MIC PROJECT :U83

PCI EXPRESS* - GRAPHICS

JTAG & BPM

eDP_COMPIO and ICOMPO signals should be shorted

Processor pull-up (CPU)

XDP_TMS_CPU R410 *51_4

XDP_TRST#_CPU R539 *51_4

XDP_TCK0 R101 51_4

Haswell ULT Processor (DDR3L)

U19C M_A_DQ32 AY31

M_B_DQ14 AR54 SA_DQ29 M_A_DQ48 AY23 SB_DQ31

DDR SYSTEM MEMORY B

M_A_DQ30 M_A_DQSN2 M_B_DQ48 M_B_DQSN6

+VCC_CORE CFG0 TP53 CFG0 AC60

HSW ULT POWER

Lynx Point-LP Platform Controller Hub (LVDS,DDI)

R379 *0_4 B9 SDVO_CLK

System Power Management

PCH Pull-high/low(CLG) PLTRST#(CLG) System PWR_OK(CLG)

SUSACK# R471 10K_4 for DS3 +VCCIO_OUT

RSMRST# R541 10K_4

Lynx Point-LP Platform Controller Hub

JTAGX_PCH SATA3GP R474 10K_4

PCH_SPI1_SO AA4 K10

Pin Name Strap description Sampled Configuration Circuit

Lynx Point-LP Platform Controller Hub

<27> CLK_PCIE_WLANN CLK_PCIE_WLANN C41

GPIO55_ULT U7 GPIO53 CLK_PCIE_LANP C37 CLKOUT_PCIE_N3 K21

<14> CLK_VGA_N CLK_VGA_N A39 C35 R380 10K/F_4

SMBus/Pull-up(CLG) CLK_REQ/Strap Pin(CLG) +3V

+3V R461 4.7K_4 2 PROJECT :U83

Lynx Point-LP Platform Controller Hub RP6

BOARD_ID5 BOARD_ID4 BOARD_ID3 BOARD_ID2 BOARD_ID1 BOARD_ID0

U83 DIS-14 1 0 0 0 0 0 R158 10K_4 BOARD_ID1 R159 *10K_4

U83 UMA-15 0 1 0 0 0 0 R155 10K_4 BOARD_ID2 R154 *10K_4

0 0 0 0 0 0 R160 10K_4 BOARD_ID3 R167 *10K_4 DIS UMA

VCC1_05=1.741A +V1.05S_CORE_PCH U19P

R129 0_4 +1.5V

XDP_DBRESET_N R120 1K_4 +3V H_SYS_PW ROK_XDP R170 *1K_4 +3V_DEEP_SUS

R512 0_4 XDP_TDO

PC2100 DDR3 SDRAM SO-DIMM

PC2100 DDR3 SDRAM SO-DIMM

Place these Caps near So-Dimm0. +1.35VSUS

C340 10U/6.3V_6 +3V PROJECT :U83

PC2100 DDR3 SDRAM SO-DIMM

PC2100 DDR3 SDRAM SO-DIMM

DDR_VTT_PG_CTRL C297 1U/6.3V_4

C301 1U/6.3V_4 C296 *0.1U/10V_4

DP E/F POWER DP A/B POWER

PCI EXPRESS INTERFACE

C V30 W 24 AF17 AE10 C

U29 V27 +1.8V_DPE_VDD18 AG18 DP PLL POWER AG8

M30 P24 +1.0V_DPE_VDD10 L5000

CLOCK Mars stuff

+3V_VGA R5102 0_4

+3V R5101 *0_4

LVDS CONTROL AB11

4 2 MCM2012B900GBE GEN_XTAL25_OUT C263 10P/50V_4 GPU_XTAL27_IN

100K_4 DIS Hi ==> ( 90W ) ME2N7002E