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ISSN : 2248-9622, Vol. 4, Issue 3( Version 1), March 2014, pp.644-652
ABSTRACT
Multilevel inverters are in favor of academia as well as industry in the recent decade for high-power and
medium-voltage applications. In addition, they can synthesize switched waveforms with lower levels of
harmonic distortion compared to a two-level converter. Multilevel converters have received increased interest
recently as a result of their ability to generate high quality output waveforms with a low switching frequency;
the multilevel concept is used to decrease the harmonic distortion in the output waveform without decreasing the
inverter power output. This paper presents a review on most important topologies, control techniques of
multilevel inverters and also the applications powered by multilevel inverters which are becoming an enabling
technology in many industrial and research areas.
Keywords - Multilevel inverter, Neutral point clamped, CHB, FACTS and Renewable energy sources.
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ISSN : 2248-9622, Vol. 4, Issue 3( Version 1), March 2014, pp.644-652
photovoltaic systems without requiring any stabilization of the input DC voltages of five level
modification on the multilevel inverter.[12], flying capacitors (FLFC) voltage source inverters
comparison between three level diode neutral-point- (VSI). A feedback control algorithm of the rectifier is
clamped zero-current transition (DNPC-3L ZCT) proposed. [26], an experimental photovoltaic (PV)
inverter and three-level active neutral-point clamped power conditioning system with line connection in
zero-current-transition (ANPC-3L ZCT) inverter, which the conditioner consists of a flying capacitors
with respect to switching energy, volume, as well as multi-cell inverter fed by a dc-dc boost converter is
parasitic inductance influence, the topologies are carried out. [27], two active capacitor voltage
compared. balancing schemes are proposed for single-phase (H-
bridge) flying-capacitor multilevel converters, based
2.2 CASCADED MULTILEVEL INVERTER on equations of flying capacitor converters. The
[13], Cascaded H-bridge multilevel inverter methods are effective on capacitor voltage regulation
can be implemented using only a single dc power in flying-capacitor multilevel converters.
source and capacitors.[14], cascaded H-bridge
multilevel boost inverter for electric vehicle (EV) and 2.4 SINUSOIDAL PWM
hybrid EV (HEV) applications implemented without [28], multicarrier sub-harmonic pulse width
the use of inductors. [15], new feedback control modulation (PWM), called disposition band carrier
strategy for balancing individual dc capacitor and phase-shifted carrier PWM (DBC-PSC-PWM),
voltages in a three-phase cascade multilevel inverter- method is developed to produce output voltage levels
based static synchronous compensator. [16], single- of (n ×m + 1) and to improve the output voltage
phase cascaded H-bridge converter for a grid- harmonic spectrum with a wide output frequency
connected photovoltaic (PV) application. The range. [29], carrier-based closed-loop control
independent control of each dc link voltage, for the technique has been developed to reduce the switching
tracking of the maximum power point of each string losses based on insertion of ‗no switching‘ zone
of PV panels is carried out. [17], direct torque control within each half cycle of fundamental wave. [30],
(DTC) scheme for electric vehicles (EVs) or hybrid five-level pulse width modulation inverter
EVs using hybrid cascaded H-bridge multilevel configuration, including chopper circuits as DC
motor drive based on DTC operating principles is current-power source circuits using small smoothing
implemented.[18], generalized multiband hysteresis inductors, is verified through computer simulations
modulation and its characterization have been and experimental tests. [31], designed a seven-level
proposed for the sliding-mode control of cascaded H- flying capacitor multilevel inverter by using
bridge multilevel-inverter (CHBMLI)-controlled sinusoidal pulse width modulation technique. [32],
systems. [19], symmetric hybrid multilevel addressed a modified Sinusoidal Pulse Width
topologies are introduced for both single- and three- Modulation (SPWM) modulator with phase
phase medium-voltage high power systems. [20], the disposition that increases output waveform up to 7-
impacts of the connected load to the cascaded H- level while reducing output harmonics.[33], pulse-
bridge converter as well as the switching angles on width modulation (PWM) for single-phase five-level
the voltage regulation of the capacitors are studied. inverter via field-programmable gate array (FPGA) is
[21], used a new topology of a cascaded multilevel carried out.
converter based on a cascaded connection of single-
phase sub multilevel converter units and full-bridge 2.5. SPACE VECTOR PWM
converters then, the structure is optimized. [34], two discontinuous multilevel space
vector modulation (SVM) techniques are
2.3 FLYING CAPACITOR MULTILEVEL implemented for DVR control to reduce inverter
INVERTER switching losses maintaining virtually the same
[22], mathematical analyses of the balancing harmonic performance as the conventional multilevel
process in boost and buck–boost converters and SVM for high number of levels. [35], two carrier-
investigations of voltage sharing stabilization with based modulation techniques for a dual two-level
the use of passive RLC circuit in switch-mode flying inverter with power sharing capability and proper
capacitor dc–dc converters are presented. [23], multilevel voltage waveforms were introduced. Their
topology of flying capacitor multilevel converter main advantage is a simpler implementation
which has several terminals of different dc voltage compared to SVM. [36], focused a novel 3-D space
and an ac voltage terminal proposed to utilize the modulation technique with voltage balancing
topology as an integrated power conversion capability for a cascaded seven-level rectifier stage of
module.[24], control strategy of flying capacitors SST.
multilevel inverters. The analysis of the permissible
switching states, especially the possibility of the
multiple commutations is carried out. [25], the
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