Automotive Interview Questions
Automotive Interview Questions
AUTOMOTIVE BASICS
4. The Controller Area Network (CAN) bus is a serial asynchronous bus used in
instrumentation applications for industries such as automobiles.
USES:
Answer: SOF – 1 Dominant
Arbitration Field – 11 bit Identifier, 1 bit RTR (or) 11 bit, 1SRR, 1IDE, 18 bit, 1RTR
Types of errors – ACK error, Bit error, Stuff error, Form error, CRC error
Answer: To minimize the reflection reference, to reduce noise. To ensure that reflection does
not cause communication failure, the transmission line must be terminated.
Answer: CAN Arbitration is nothing but the node trying to take control on the CAN bus.
Two bus nodes have got a transmission request. The bus access method is CSMA/CD+AMP
(Carrier Sense Multiple Access with Collision Detection and Arbitration on Message
Priority). According to this algorithm both network nodes wait until the bus is free (Carrier
Sense). In that case the bus is free both nodes transmit their dominant start bit (Multiple
Access). Every bus node reads back bit by bit from the bus during the complete message and
compares the transmitted value with the received value. As long as the bits are identical from
both transmitters nothing happens. The first time there was a difference – in this example the
7th bit of the message – the arbitration process takes place: Node A transmits a dominant
level, node B transmits a recessive level. The recessive level will be overwritten by the
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dominant level. This is detected by node B because the transmitted value is not equal to the
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received value (Collision Detection). At this point of time node B has lost the arbitration,
stops the transmission of any further bit immediately and switches to receive mode, because
the message that has won the arbitration must possibly be processed by this node
(Arbitration on Message Priority)
For example, consider three CAN devices each trying to transmit messages:
Assuming all three see the bus is idle and begin transmitting at the same time, this is how the
arbitration works out. All three devices will drive the bus to a dominant state for the start-of-
frame (SOF) and the two most significant bits of each message identifier. Each device will
monitor the bus and determine success. When they write bit 8 of the message ID, the device
writing message ID 433 will notice that the bus is in the dominant state when it was trying to
let it be recessive, so it will assume a collision and give up for now. The remaining devices
will continue writing bits until bit 5, then the device writing message ID 187 will notice a
collision and abort transmission. This leaves the device writing message ID 154 remaining. It
will continue writing bits on the bus until complete or an error is detected. Notice that this
method of arbitration will always cause the lowest numerical value message ID to have
priority. This same method of bit-wise arbitration and prioritization applies to the 18-bit
extension in the extended format as well.
Answer: 40m @1Mbps and if the cable length increases will decrease the speed, due to RLC
on the cable.
9. If master sends 764 and Slave sends 744 which will get the arbitration?
Answer: Starts from MSB, first nibble is same, Master sends 7, slaves also sends 7 the
message with more dominant bits will gain the arbitration, lowest the message identifier
higher the priority.
Number of identifiers more compare to base frame, for extended frame are 2power29.
Answer: CAN uses a Non-Return-to-Zero protocol, NRZ-5, with bit stuffing. The idea behind
bit stuffing is to provide a guaranteed edge on the signal so the receiver can resynchronize
with the transmitter before minor clock discrepancies between the two nodes can cause a
problem. With NRZ-5 the transmitter transmits at most five consecutive bits with the same
value. After five bits with the same value (zero or one), the transmitter inserts a stuff bit with
the opposite state.
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12. What is the use of bit stuffing?
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Answer: Long NRZ messages cause problems in receivers
• Clock drift means that if there are no edges, receivers lose track of bits
Answer: The transceiver provides differential transmit capability to the bus and differential
receive capability to the CAN controller. Transceiver provides an advanced interface between
the protocol controller and the physical bus in a Controller Area Network (CAN) node.
Typically, each node in a CAN system must have a device to convert the digital signals
generated by a CAN controller to signals suitable for transmission over the bus cabling
(differential output). It also provides a buffer between the CAN controller and the high-
voltage spikes that can be generated on the CAN bus by outside sources (EMI, ESD, electrical
transients, etc.).
The can transceiver is a device which detects the signal levels that are used on the CAN bus
to the logical signal levels recognized by a microcontroller.
Answer: LLC (Logical Link Control) – Overload control, notification, Message filtering and
Recovery management functions.
– Hard synchronization is done with a falling edge on the bus while the bus is idle, which is
interpreted as a Start of frame (SOF). It restarts the internal Bit Time Logic.
– Soft synchronization is used to lengthen or shorten a bit time while a CAN frame is
received.
Answer: The J1939 standard has defined a method of communicating more than 8 bytes of
data by sending the data in packets as specified in the Transport Protocol (TP). There are two
types of TP, one for broadcasting the data, and the other for sending it to a specific address.
A DTC is a combination of four independent fields: the Suspect Parameter Number (SPN) of
the channel or feature that can have faults; a Failure Mode Identifier (FMI) of the specific
fault; the occurrence count (OC) of the SPN/FMI combination; and the SPN conversion
method (CM) which tells the receiving mode how to interpret the SPN. Together, the SPN,
FMI, OC and CM form a number that a diagnostic tool can use to understand the failure that
is being reported.
19. What is KWP2000?
20. What is OBDII?
Answer: As systems got more complex the link between cause and symptom became less
obvious. This meant that electronic systems had to have some level of self diagnosis and to
communicate to the outside world. Initially many systems used their own protocols which
meant that garages had to have a large number of tools – even to diagnose a single vehicle.
Answer: Verification and Validation (V&V) is the process of checking that a software system
5 of 65meets
specifications and that it fulfills its intended purpose. It is normally part of the
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software testing process of a project.
23. Can you have two transmitters using the same exact header field?
• Unless you have middleware that ensures only one node can transmit at a time
According to the CAN specification, the bit time is divided into four segments. The
Synchronization Segment, the Propagation Time Segment, the Phase Buffer Segment 1, and
the Phase Buffer Segment 2. Each segment consists of a specific, programmable number of
time quanta (see Table 1). The length of the time quantum (tq), which is the basic time unit of
the bit time, is defined by the CAN controller’s system clock fsys and the Baud Rate
Prescaler (BRP) :tq = BRP / fsys. Typical system clocks are : fsys = fosc or fsys = fosc/2.
The Synchronization Segment Sync_Seg is that part of the bit time where edges of the CAN
bus level are expected to occur; the distance between an edge that occurs outside of Sync_Seg
and the Sync_Seg is called the phase error of that edge. The Propagation Time Segment
Prop_Seg is intended to compensate for the physical delay times within the CAN network.
The Phase Buffer Segments Phase_Seg1 and Phase_Seg2 surround the Sample Point. The
(Re-)Synchronization Jump Width (SJW) defines how far a resynchronization may move the
Sample Point inside the limits defined by the Phase Buffer Segments to compensate for edge
phase errors.
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• Hard Synchronization After a hard synchronization, the bit time is restarted with the end
of Sync_Seg, regardless of the edge phase error. Thus hard synchronization forces the edge
which has caused the hard synchronization to lie within the synchronization segment of the
restarted bit time.
27. What happen when two CAN nodes are sending same identifier at a same time?
Two nodes on the network are not allowed to send messages with the same id. If two nodes
try to send a message with the same id at the same time arbitration will not work. Instead,
one of the transmitting nodes will detect that his message is distorted outside of the
arbitration field. The nodes will then use the error handling of CAN, which in this case
ultimately will lead to one of the transmitting node being switched off (bus-off mode).
28. what is the difference between Bit Rate and Baud Rate?
The difference between Bit and Baud rate is complicated and intertwining. Both are
dependent and inter-related. But the simplest explanation is that a Bit Rate is how many data
bits are transmitted per second. A baud Rate is the number of times per second a signal in a
communications channel changes.Bit rates measure the number of data bits (that is 0′s and
1′s) transmitted in one second in a communication channel. A figure of 2400 bits per second
means 2400 zeros or ones can be transmitted in one second, hence the abbreviation “bps.”
Individual characters (for example letters or numbers) that are also referred to as bytes are
composed of several bits.A baud rate is the number of times a signal in a communications
channel changes state or varies. For example, a 2400 baud rate means that the channel can
change states up to 2400 times per second. The term “change state” means that it can change
from 0 to 1 or from 1 to 0 up to X (in this case, 2400) times per second. It also refers to the
actual state of the connection, such as voltage, frequency, or phase level).The main difference
7 of 65between the two is that one change of state can transmit one bit, or slightly more or less than3:14 pm
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one bit, that depends on the modulation technique
used. So the bit rate (bps) and baud rate (baud per
second) have this connection:bps = baud per
second x the number of bit per baudThe
modulation technique determines the number of
bit per baud. Here are two examples:When FSK
(Frequency Shift Keying, a transmission
technique) is used, each baud transmits one bit.
Only one change in state is required to send a bit.
Thus, the modem’s bps rate is equal to the baud
rate. When a baud rate of 2400 is used, a
modulation technique called phase modulation
that transmits four bits per baud is used. So:2400 baud x 4 bits per baud = 9600 bpsSuch
modems are capable of 9600 bps operation.
C Interview Questions :
1. What is the difference between declaration and definition?
int Count;
register is used to define local variables that should be stored in a register instead of RAM
This means that the variable has a maximum size equal to the register size (usually one
word) and cannot have the unary ‘&’ operator applied to it (as it does not have a memory
location).
{
register int Miles;
}
Register should only be used for variables that require quick access – such as counters. It
should also be noted that defining ‘register’ goes not mean that the variable will be stored in
a register. It means that it MIGHT be stored in a register – depending on hardware and
implementation restrictions.
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(count and road) both have a static storage class.
There is one very important use for ‘static’. Consider this bit of code.
extern defines a global variable that is visable to ALL object modules. When you use ‘extern’
the variable cannot be initalized as all it does is point the variable name at a storage location
that has been previously defined.
——– ——–
{ {
} }
Count in ‘source 1’ will have a value of 5. If source 1 changes the value of count – source 2
will see the new value. Here are some example source files.
3. What is interrupt?
Answer: There are two ways of telling when an I/O device (such as a serial controller or a
disk controller) is ready for the next sequence of data to be transferred. The first is busy
waiting or polling, where the processor continuously checks the device’s status register until
the device is ready. This wastes the processor’s time but is the simplest to implement. For
some time-critical applications, polling can reduce the time it takes for the processor to
respond to a change of state in a peripheral.
An interrupt is a special signal that causes the computer’s central processing unit to suspend
what it is doing and transfers its control to a special program called an interrupt handler.
The responsibility of an interrupt handler is to determine what caused the interrupt, service
the interrupt and then return the control to the point from where the interrupt was caused.
The difference between hardware interrupt and software interrupt is as below:
Hardware Interrupt: This interrupt is caused by some external device such as request to start
an I/O or occurrence of a hardware failure.
Software Interrupt: This interrupt can be invoked with the help of INT instruction. A
programmer triggered this event that immediately stops execution of the program and
passes execution over to the INT handler. The INT handler is usually a part of the operating
system and determines the action to be taken e.g. output to the screen, execute file etc.
Thus a software interrupt as it’s name suggests is driven by a software instruction and a
hardware interrupt is the result of external causes.
6. What is Interrupt latency? How do you measure interrupt latency? How to reduce the
interrupt latency?
Answer: Interrupt latency is the time between interrupt request and execution of first
instruction of the ISR.
We need a oscilloscope or a logic state analyzer. By entering the interrupt service routine
(ISR), you need to activate an available port on your hardware (like a led port or so on) and
deactivate it just before returning from the ISR. You can do that by writing the appropriate
code.
By connecting one input of the oscilloscope (or logic state analyzer) to the INTR pin of the
microprocessor and the second one to the port you activate/deactivate, you can measure the
latency time and the duration of the ISR
The first delay is typically in the hardware: The interrupt request signal needs to be
synchronized to the CPU clock. Depending on the synchronization logic, typically up to 3
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The CPU will typically complete the current instruction. This instruction can take a lot of
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cycles; on most systems, divide, push-multiple or memory-copy instructions are the
instructions which require most clock cycles. On top of the cycles required by the CPU,
there are in most cases additional cycles required for memory access. In an ARM7 system,
the instruction STMDB SP!,{R0-R11,LR}; Push parameters and perm. Registers is typically
the worst case instruction. It stores 13 32-bit registers on the stack. The CPU requires 15
clock cycles. The memory system may require additional cycles for wait states.
After completion of the current instruction, the CPU performs a mode switch or pushes
registers (typically PC and flag registers) on the stack. In general, modern CPUs (such as
ARM) perform a mode switch, which requires less CPU cycles than saving registers.
Pipeline fill: Most modern CPUs are pipelined. Execution of an instruction happens in
various stages of the pipeline. An instruction is executed when it has reached its final
stage of the pipeline. Since the mode switch has flushed the pipeline, a few extra cycles
are required to refill the pipeline.
It is possible to have two separate memory systems for a Harvard architecture. As long as
data and instructions can be fed in at the same time, then it doesn’t matter whether it comes
from a cache or memory. But there are problems with this. Compilers generally embed data
(literal pools) within the code, and it is often also necessary to be able to write to the
instruction memory space, for example in the case of self modifying code, or, if an ARM
debugger is used, to set software breakpoints in memory. If there are two completely
separate, isolated memory systems, this is not possible. There must be some kind of bridge
between the memory systems to allow this.
Using a simple, unified memory system together with a Harvard architecture is highly
inefficient. Unless it is possible to feed data into both buses at the same time, it might be
better to use a von Neumann architecture processor.
Use of caches
At higher clock speeds, caches are useful as the memory speed is proportionally
slower. Harvard architectures tend to be targeted at higher performance systems, and so
caches are nearly always used in such systems.
Von
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instructions and data. The proportion of each in the cache is variable, which may be a good
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thing. It would in principle be possible to have separate instruction and data caches, storing
data and instructions separately. This probably would not be very useful as it would only be
possible to ever access one cache at a time.
Caches for Harvard architectures are very useful. Such a system would have separate caches
for each bus. Trying to use a shared cache on a Harvard architecture would be very inefficient
since then only one bus can be fed at a time. Having two caches means it is possible to feed
both buses simultaneously….exactly what is necessary for a Harvard architecture.
This also allows to have a very simple unified memory system, using the same address space
for both instructions and data. This gets around the problem of literal pools and self
modifying code. What it does mean, however, is that when starting with empty caches, it is
necessary to fetch instructions and data from the single memory system, at the same time.
Obviously, two memory accesses are needed therefore before the core has all the data
needed. This performance will be no better than a von Neumann architecture. However, as
the caches fill up, it is much more likely that the instruction or data value has already been
cached, and so only one of the two has to be fetched from memory. The other can be supplied
directly from the cache with no additional delay. The best performance is achieved when
both instructions and data are supplied by the caches, with no need to access external
memory at all.
This is the most sensible compromise and the architecture used by ARMs Harvard processor
cores. Two separate memory systems can perform better, but would be difficult to implement
Answer:
CISC: (Complex Instruction Set Computer)
RISC: (Reduced Instruction Set Computer)
Fewer, simpler and faster instructions would be better, than the large, complex and slower
CISC instructions. However, more instructions are needed to accomplish a task.
RISC chips require fewer transistors, which makes them easier to design and cheaper to
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it’s easier to write powerful optimized compilers, since fewer instructions exist.
RISC is cheaper and faster.
RISC puts a greater burden on the software. Software needs to become more complex.
Software developers need to write more lines for the same tasks. Therefore they argue
that RISC is not the architecture of the future, since conventional CISC chips are
becoming faster and cheaper
Simple instructions that can be executed within one clock cycle.
“MULT” command described above could be divided into three separate commands:
“LOAD,” which moves data from the memory bank to a register, “PROD,” which finds
the product of two operands located within the registers, and “STORE,” which moves
data from a register to the memory banks.
At first, this may seem like a much less efficient way of completing the operation. Because
there are more lines of code, more RAM is needed to store the assembly level instructions.
The compiler must also perform more work to convert a high-level language statement
into code of this form.
Separating the “LOAD” and “STORE” instructions actually reduces the amount of work
that the computer must perform.
Major problem of RISC – they don’t afford the widespread compatibility, that x86 chips
do.
CISC RISC
Answer:
Answer:
The power supply does a self check and sends a power-good signal to the CPU.
The CPU starts executing the code stored in ROM on the motherboard starts the address
0xFFFF0.
The routines in ROM test the central hardware, search for video ROM, perform a
checksum on the video ROM and executes the routines in video ROM.
The routines in the mother board ROM then continue searching for any ROM, checksum
and executes these routines.
After performing the POST (Power On-Self Test) is executed. The system will search for a
boot device.
Assuming that the valid boot device is found, IO.SYS is loaded into memory and
executed. IO.SYS consists primarily of initialization code and extension to the memory
board ROM BIOS.
MSDOS.SYS is loaded into memory and executed. MSDOS.SYS contains the DOS
routines.
CONFIG.SYS (created and modified by the user. load additional device drivers for
peripheral devices), COMMAND.COM (It is command interpreter- It translates the
commands entered by the user. It also contains internal DOS commands. It executes and
AUTOEXEC.BAT), AUTOEXEC.BAT (It contains all the commands that the user wants
which are executed automatically every time the computed is started).
11. What Little-Endian and Big-Endian? How can I determine whether a machine’s byte
order is big-endian or little endian? How can we convert from one to another?
02 #define BIG_ENDIAN 0
03 #define LITTLE_ENDIAN 1
04 int main()
05 {
10 else
12 }
13 int endian() {
17 }
13. Swap 2 variables without using temporary variable!
a=a+b
b=a–b
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a=a–b
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14. Write a program to generate the Fibonacci Series?
#include<stdio.h>
#include<conio.h>
main()
{
int n,i,c,a=0,b=1;
printf(“Enter Fibonacci series of nth term : “);
scanf(“%d”,&n);
printf(“%d %d “,a,b);
for(i=0;i<=(n-3);i++)
{
c=a+b;
a=b;
b=c;
printf(“%d “,c);
}
getch();
}Output :
Enter Fibonacci series of nth term : 7
0 1 1 2 3 5 8
15. Write a program to find unique numbers in an array?
Answer:
for (i=1;i<=array.length;i++) {
found=false;
for (k=i+1;k<=array.length;k++) {
if (array[i]==array[k]) found=true;
}
if (!found) println(array[i]);
}
16. Write a C program to print Equilateral Triangle using numbers?
01 /* C program to print Equilateral Triangle*/
02 #include<stdio.h>
03 main()
04 {
06
09
11 {
15 }
17 {
19 }
21 }
22 getch();
17. Write a program for deletion and insertion of a node in single linked list?
#include<stdio.h>
#include<stdlib.h>
typedef struct Node
{
int data;
struct Node *next;
}node;
void insert(node *pointer, int data)
{
/* Iterate through the list till we encounter the last node.*/
while(pointer->next!=NULL)
{
pointer = pointer -> next;
}
/* Allocate memory for the new node and put data in it.*/
pointer->next = (node *)malloc(sizeof(node));
pointer = pointer->next;
pointer->data = data;
pointer->next = NULL;
}
int find(node *pointer, int key)
{
pointer = pointer -> next; //First node is dummy node.
/* Iterate through the entire linked list and search for the key. */
while(pointer!=NULL)
{
if(pointer->data == key) //key is found.
{
return 1;
}
pointer = pointer -> next;//Search in the next node.
}
/*Key is not found */
return 0;
}
void delete(node *pointer, int data)
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{
/* Go to the node for which the node next to it has to be deleted */
while(pointer->next!=NULL && (pointer->next)->data != data)
{
pointer = pointer -> next;
}
if(pointer->next==NULL)
{
printf(“Element %d is not present in the list\n”,data);
return;
}
/* Now pointer points to a node and the node next to it has to be removed */
node *temp;
temp = pointer -> next;
/*temp points to the node which has to be removed*/
pointer->next = temp->next;
/*We removed the node which is next to the pointer (which is also temp) */
free(temp);
/* Beacuse we deleted the node, we no longer require the memory used for it .
free() will deallocate the memory.
*/
return;
}
void print(node *pointer)
{
if(pointer==NULL)
{
return;
}
printf(“%d “,pointer->data);
print(pointer->next);
}
int main()
{
/* start always points to the first node of the linked list.
temp is used to point to the last node of the linked list.*/
node *start,*temp;
start = (node *)malloc(sizeof(node));
temp = start;
temp -> next = NULL;
/* Here in this code, we take the first node as a dummy node.
The first node does not contain data, but it used because to avoid handling special cases
in insert and delete functions.
*/
printf(“1. Insert\n”);
printf(“2. Delete\n”);
printf(“3. Print\n”);
printf(“4. Find\n”);
while(1)
{
int query;
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scanf(“%d”,&query);
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if(query==1)
{
int data;
scanf(“%d”,&data);
insert(start,data);
}
else if(query==2)
{
int data;
scanf(“%d”,&data);
delete(start,data);
}
else if(query==3)
{
printf(“The list is “);
print(start->next);
printf(“\n”);
}
else if(query==4)
{
int data;
scanf(“%d”,&data);
int status = find(start,data);
if(status)
{
printf(“Element Found\n”);
}
else
{
printf(“Element Not Found\n”); }
}
}}
18. Can a variable be both const and volatile? Yes. The const modifier means that this code
cannot change the value of the variable, but that does not mean that the value cannot be
changed by means outside this code. For instance, in the example in FAQ 8, the timer
structure was accessed through a volatile const pointer. The function itself did not change the
value of the timer, so it was declared const. However, the value was changed by hardware on
the computer, so it was declared volatile. If a variable is both const and volatile, the two
modifiers can appear in either order.
19. what are Constant and Volatile Qualifiers?
const
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pi = 3.2;
five = 6;
volatile
volatile specifies a variable whose value may be changed by processes outside the
current program
One example of a volatile object might be a buffer used to exchange data with an
external device:
int
check_iobuf(void)
{
volatile int iobuf;
int val;
while (iobuf == 0) {
}
val = iobuf;
iobuf = 0;
return(val);
}
if iobuf had not been declared volatile , the compiler would notice that nothing
happens inside the loop and thus eliminate the loop
The keywords const and volatile can be applied to any declaration, including those
of structures, unions, enumerated types or typedef names. Applying them to a
declaration is called qualifying the declaration—that’s why const and volatile are called type
qualifiers, rather than type specifiers. Here are a few representative examples:
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volatile i;
volatile int j;
const long q;
const volatile unsigned long int rt_clk;
struct{
const long int li;
signed char sc;
}volatile vs;
Don’t be put off; some of them are deliberately complicated: what they mean will be
explained later. Remember that they could also be further complicated by introducing
storage class specifications as well! In fact, the truly spectacular
Const
Let’s look at what is meant when const is used. It’s really quite simple: const means
that something is not modifiable, so a data object that is declared with const as a part of
its type specification must not be assigned to in any way during the run of a program. It is
very likely that the definition of the object will contain an initializer (otherwise, since you
can’t assign to it, how would it ever get a value?), but this is not always the case. For example,
if you were accessing a hardware port at a fixed memory address and promised only to read
from it, then it would be declared to be const but not initialized.
Taking the address of a data object of a type which isn’t const and putting it into a pointer
to the const -qualified version of the same type is both safe and explicitly permitted; you
will be able to use the pointer to inspect the object, but not modify it. Putting the address of a
const type into a pointer to the unqualified type is much more dangerous and consequently
prohibited (although you can get around this by using a cast). Here is an example:
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#include <stdio.h>
#include <stdlib.h>
main(){
int i;
const int ci = 123;
cpi = &ci;
ncpi = &i;
/*
* this is allowed
*/
cpi = ncpi;
/*
* this needs a cast
* because it is usually a big mistake,
* see what it permits below.
*/
ncpi = (int *)cpi;
/*
* now to get undefined behaviour...
* modify a const through a pointer
*/
*ncpi = 0;
exit(EXIT_SUCCESS);
}
EXAMPLE 8.3
As the example shows, it is possible to take the address of a constant object, generate a
pointer to a non-constant, then use the new pointer. This is an error in your program and
results in undefined behaviour.
The main intention of introducing const objects was to allow them to be put into read-only
store, and to permit compilers to do extra consistency checking in a program. Unless you
defeat the intent by doing naughty things with pointers, a compiler is able to check
that const objects are not modified explicitly by the user.
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char c;
char *const cp = &c;
It’s simple really; cp is a pointer to a char , which is exactly what it would be if
the const weren’t there. The const means that cp is not to be modified, although
whatever it points to can be—the pointer is constant, not the thing that it points to. The other
way round is
which means that now cp is an ordinary, modifiable pointer, but the thing that it points to
must not be modified. So, depending on what you choose to do, both the pointer and the
thing it points to may be modifiable or not; just choose the appropriate declaration.
Volatile
After const, we treat volatile . The reason for having this type qualifier is mainly to do
with the problems that are encountered in real-time or embedded systems programming
using C. Imagine that you are writing code that controls a hardware device by placing
appropriate values in hardware registers at known absolute addresses.
Let’s imagine that the device has two registers, each 16 bits long, at ascending memory
addresses; the first one is the control and status register (csr) and the second is a data port.
The traditional way of accessing such a device is like this:
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struct devregs{
unsigned short csr; /* control & status */
unsigned short data; /* data port */
};
/*
* Busy-wait function to read a byte from device n.
* check range of device number.
* Wait until READY or ERROR
* if no error, read byte, return it
* otherwise reset error, return 0xffff
*/
unsigned int read_dev(unsigned devno){
EXAMPLE 8.4
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The technique of using a structure declaration to describe the device register layout and
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names is very common practice. Notice that there aren’t actually any objects of that type
defined, so the declaration simply indicates the structure without using up any store.
To access the device registers, an appropriately cast constant is used as if it were pointing to
such a structure, but of course it points to memory addresses instead.
However, a major problem with previous C compilers would be in the while loop which tests
the status register and waits for the ERROR or READY bit to come on. Any self-respecting
optimizing compiler would notice that the loop tests the same memory address over and
over again. It would almost certainly arrange to reference memory once only, and copy the
value into a hardware register, thus speeding up the loop. This is, of course, exactly what we
don’t want; this is one of the few places where we must look at the place where the pointer
points, every time around the loop.
Because of this problem, most C compilers have been unable to make that sort of
optimization in the past. To remove the problem (and other similar ones to do with when to
write to where a pointer points), the keyword volatile was introduced. It tells the
compiler that the object is subject to sudden change for reasons which cannot be predicted
from a study of the program itself, and forces every reference to such an object to be a
genuine reference.
Here is how you would rewrite the example, making use of const and volatile to get
what you want.
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/*
* Declare the device registers
* Whether to use int or short
* is implementation dependent
*/
struct devregs{
unsigned short volatile csr;
unsigned short const volatile data;
};
/*
* Busy-wait function to read a byte from device n.
* check range of device number.
* Wait until READY or ERROR
* if no error, read byte, return it
* otherwise reset error, return 0xffff
*/
unsigned int read_dev(unsigned devno){
EXAMPLE 8.5
The rules about mixing volatile and regular types resemble those for const . A pointer
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to a volatile object can be assigned the address of a regular object with safety, but it is
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dangerous (and needs a cast) to take the address of a volatile object and put it into a
pointer to a regular object. Using such a derived pointer results in undefined behaviour.
If an array, union or structure is declared with const or volatile attributes, then all of
the members take on that attribute too. This makes sense when you think about it—how
could a member of a const structure be modifiable?
That means that an alternative rewrite of the last example would be possible. Instead of
declaring the device registers to be volatile in the structure, the pointer could have been
declared to point to a volatile structure instead, like this:
struct devregs{
unsigned short csr; /* control & status */
unsigned short data; /* data port */
};
volatile struct devregs *const dvp=DEVADDR+devno;
Since dvp points to a volatile object, it not permitted to optimize references through
the pointer. Our feeling is that, although this would work, it is bad style.
The volatile declaration belongs in the structure: it is the device registers which
are volatile and that is where the information should be kept; it reinforces the fact for a
human reader.
So, for any object likely to be subject to modification either by hardware or asynchronous
interrupt service routines, the volatile type qualifier is important.
Now, just when you thought that you understood all that, here comes the final twist. A
declaration like this:
declares the type struct devregs and also a volatile -qualified object of that type,
called v_decl . A later declaration like this
struct devregs{
/* stuff */
}volatile v_decl;
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If you do want to get a shorthand way of attaching a qualifier to another type, you can
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use typedef to do it:
struct x{
int a;
};
typedef const struct x csx;
csx const_sx;
struct x non_const_sx = {1};
A union is a way of providing an alternate way of describing the same memory area. In this
way, you could have a struct that contains a union, so that the “static”, or similar portion of
the data is described first, and the portion that changes is described by the union. The idea of
a union could be handled in a different way by having 2 different structs defined, and
making a pointer to each kind of struct. The pointer to struct “a” could be assigned to the
value of a buffer, and the pointer to struct “b” could be assigned to the same buffer, but now
a->some field and b->some otherfield are both located in the same buffer. That is the idea
behind a union. It gives different ways to break down the same buffer area.
The difference between structure and union are: 1. union allocates the memory equal to the
maximum memory required by the member of the union but structure allocates the memory
equal to the total memory required by the members. 2. In union, one block is used by all the
member of the union but in case of structure, each member have their own memory space
Structure Union
i. Access Members
We can access all the members of Only one member of union can be accessed at
structure at anytime. anytime.
ii. Memory Allocation
Allocates memory for variable which variable
Memory is allocated for all variables.
require more memory.
iii. Initialization
All members of structure can be Only the first member of a union can be
initialized initialized.
iv. Keyword
‘struct’ keyword is used to declare
‘union’ keyword is used to declare union.
structure.
v. Syntax
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vi. Example
While structure enables us treat a number of different variables stored at different in memory
, a union enables us to treat the same space in memory as a number of different variables.
That is a Union offers a way for a section of memory to be treated as a variable of one type on
one occasion and as a different variable of a different type on another occasion.
There is frequent requirement while interacting with hardware to access access a byte or
group of bytes simultaneously and sometimes each byte individually. Usually union is the
answer.
=======Difference With example=======
Lets say a structure containing an int,char and float is created and a union containing int char
float are declared.
struct TT{ int a; float b; char c; } Union UU{ int a; float b; char c; }
sizeof TT(struct) would be >9 bytes (compiler dependent-if int,float, char are taken as 4,4,1)
sizeof UU(Union) would be 4 bytes as supposed from above.If a variable in double exists in
union then the size of union and struct would be 8 bytes and cumulative size of all variables
in struct.
Detailed Example:
struct foo
{
char c;
long l;
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char *p;
};
union bar
{
char c;
long l;
char *p;
};
A struct foo contains all of the elements c, l, and p. Each element is separate and distinct.
A union bar contains only one of the elements c, l, and p at any given time. Each element is
stored in the same memory location (well, they all
start at the same memory location), and you can only refer to the element which was last
stored. (ie: after “barptr->c = 2;” you cannot reference
any of the other elements, such as “barptr->p” without invoking undefined behavior.)
Try the following program. (Yes, I know it invokes the above-mentioned “undefined
behavior”, but most likely will give some sort of output on most computers.)
==========
#include
struct foo
{
char c;
long l;
char *p;
};
union bar
{
char c;
long l;
char *p;
};
myfoo.c = 1;
myfoo.l = 2L;
myfoo.p = “This is myfoo”;
mybar.c = 1;
mybar.l = 2L;
mybar.p = “This is mybar”;
==========
On my system, I get:
Union: Union is a combination elements, which can be predefined data types or other union .
But, the size/length of union is the maximum of internal elements.
the sizeof() operator returns the size slightly more than calculated size due to padding, which
again depends on OS
== Answer == Union allocates the memory equal to the maximum memory required by the
member of the union but structure allocates the memory equal to the total memory required
by the members. In union,one block is used by all the member of the union but in case of
structure, each member have their own memory space.
Most processors require specific memory alignment on variables certain types. Normally the
minimum alignment is the size of the basic type in question, for instance this is common
char variables can be byte aligned and appear at any byte boundary
short (2 byte) variables must be 2 byte aligned, they can appear at any even byte boundary.
This means that 0x10004567 is not a valid location for a short variable but 0x10004566 is.
long (4 byte) variables must be 4 byte aligned, they can only appear at byte boundaries that
are a multiple of 4 bytes. This means that 0x10004566 is not a valid location for a long
variable but 0x10004568 is.
Structure padding occurs because the members of the structure must appear at the correct
byte boundary, to achieve this the compiler puts in padding bytes (or bits if bit fields are in
use) so that the structure members appear in the correct location. Additionally the size of the
structure must be such that in an array of the structures all the structures are correctly
aligned in memory so there may be padding bytes at the end of the structure too
struct
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char c1;
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short s1;
char c2;
long l1;
char c3;
}
In this structure, assuming the alignment scheme I have previously stated then
c1 can appear at any byte boundary, however s1 must appear at a 2 byte boundary so there is
a padding byte between c1 and s1.
c2 can then appear in the available memory location, however l1 must be at a 4 byte
boundary so there are 3 padding bytes between c2 and l1
c3 then appear in the available memory location, however because the structure contains a
long member the structure must be 4 byte aligned and must be a multiple of 4 bytes in size.
Therefore there are 3 padding bytes at the end of the structure. It would appear in memory in
this order
c1
padding byte
s1 byte 1
s1 byte 2
c2
padding byte
padding byte
padding byte
l1 byte 1
l1 byte 2
l1 byte 3
l1 byte 4
c3
padding byte
padding byte
padding byte
struct example {
long l1;
short s1;
char c1;
char c2;
char c3;
}
Then l1 appears at the correct byte alignment, s1 will be correctly aligned so no need for
padding between l1 and s1. c1, c2, c3 can appear at any location. The structure must be a
multiple of 4 bytes in size since it contains a long so 3 padding bytes appear after c3
It appears in memory in the order
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l1 byte 1
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l1 byte 2
l1 byte 3
l1 byte 4
s1 byte 1
s1 byte 2
c1
c2
c3
padding byte
padding byte
padding byte
I should point out that structure packing is platform and compiler (and in some cases
compiler switch) dependent.
Memory Pools are just a section of memory reserved for allocating temporarily to other parts
of the application
A memory leak occurs when you allocate some memory from the heap (or a pool) and then
delete all references to that memory without returning it to the pool it was allocated from.
Program:
struct MyStructA {
char a;
char b;
int c;
};
struct MyStructB {
char a;
int c;
char b;
};
int main(void) {
int sizeA = sizeof(struct MyStructA);
int sizeB = sizeof(struct MyStructB);
printf(“A = %d\n”, sizeA);
printf(“B = %d\n”, sizeB);
return 0;
}
Macros are replaced by preprocessor, but in constant data type will be checked by compiler.
Macros are replaced without checking the values sometimes the programmer want to change
values only in a single function at that prefer to use constant than a macro.
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The first technique comes from the C programming language. Constants may be defined
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using the preprocessor directive, #define The preprocessor is a program that modifies your
source file prior to compilation. Common preprocessor directives are #include, which is used
to
include additional code into your source file, #define, which is used to define a constant and
#if/#endif, which can be used to conditionally determine which parts of your code will be
compiled. The #define directive is used as follows.
First, the type of the constant is defined. “pi” is float. “id_no” is int. This allows some type
checking by the compiler.&nbs p;
Second, these constants are variables with a definite scope. The scope of a variable relates to
parts of your program in which it is defined. Some variables may exist only in certain
functions or in certain blocks of code.
Answer: Re entrant function is a function which guaranteed that which can be work well
under multi threaded environment. mean while function is access by one thread, another
thread can call it mean there is separate execution stack and handling for each. So function
should not contain any static or shared variable which can harm or disturb the execution.
Mean function which can be called by thread, while running from another thread safely and
properly
Example:
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int t;
void isr()
{
int x = 1, y = 2;
swap(&x, &y);
}
1. Systems development projects usually have a test approach, or test strategy document,
which defines how testing will be performed throughout the lifecycle of the project. The V
model provides a consistent basis and standard for part of that strategy.
2. The V model explicitly suggests that testing (quality assurance) should be considered
early on in the life of a project. Testing and fixing can be done at any stage in the lifecycle.
However, the cost of finding and fixing faults increases dramatically as development
progresses. Evidence suggests that if a fault uncovered during design costs 1.0 monetary unit
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to correct, then the same fault uncovered just before testing will cost 6.5 units, during testing
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15 units, and after release between 60 and 100 units. The need to find faults as soon as
possible reinforces the need for the quality assurance of documents such as the requirements
specification and the functional specification. This is performed using static testing
techniques such as inspections and walkthroughs.
3. It introduces the idea of specifying test requirements and expected outcomes prior to
performing the actual tests. For example, the acceptance tests are performed against a
specification of requirements, rather than against some criteria dreamed up when the
acceptance stage has been reached
4. The V model provides a focus for defining the testing that must take place within each
stage. The definition of testing is assisted by the idea of entry and exit criteria. Hence, the
model can be used to define the state a deliverable must be in before it can enter and leave
each stage. The exit criteria of one stage are usually the entry criteria of the next. In many
organizations, there is concern about the quality of the program code released by individual
programmers. Some programmers release code that appears to be fault-free, while others
release code that still has many faults in it. The problem of programmers releasing code with
different levels of robustness would be addressed in the exit criteria of unit design and unit
testing. Unit design would require programmers to specify their intended test cases before
they wrote any program code. Coding could not begin until these test cases had been agreed
with an appropriate manager. Second, the test cases would have to be conducted successfully
before the program could leave the unit test stage and be released to integration testing.
5. Finally, the V model provides a basis for defining who is responsible for performing the
testing at each stage. Here are some typical responsibilities:
The V model is therefore an excellent basis for the partitioning of testing, highlighting the
fact that all the participants in the development of a system have a responsibility for quality
assurance and testing.
25. What is meant by Black box testing and white box testing?
While white-box testing can be applied at the unit, integration and system levels of the
software testing process, it is usually done at the unit level. It can test paths within a unit,
paths between units during integration, and between subsystems during a system–level test.
Though this method of test design can uncover many errors or problems, it might not detect
unimplemented parts of the specification or missing requirement.
Black-box testing is a method of software testing that tests the functionality of an application
as opposed to its internal structures or workings (see white-box testing). This method
36 of 65 of test3:14 pm
04/11/19,
can be applied to all levels of software testing: unit, integration, system and acceptance. It
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typically comprises most if not all testing at higher levels, but can also dominate unit testing
as well.
White Box Testing: Means testing the application with coding /programming knowledge.
That means the tester has to correct the code also.
Black box testing: Testing the application without coding /programming knowledge that
means the tester doesn’t require coding knowledge. Just he examines the application external
functional behaviour and GUI features.
unit testing
Component testing
Integration testing
System testing
The difference between Bit and Baud rate is complicated and intertwining. Both are
dependent
37 of 65 and inter-related. But the simplest explanation is that a Bit Rate is how 04/11/19,
many data 3:14 pm
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bits are transmitted per second. A baud Rate is the number of times per second a signal in a
communications channel changes.
Bit rates measure the number of data bits (that is 0′s and 1′s) transmitted in one second in a
communication channel. A figure of 2400 bits per second means 2400 zeros or ones can be
transmitted in one second, hence the abbreviation “bps.” Individual characters (for example
letters or numbers) that are also referred to as bytes are composed of several bits.
A baud rate is the number of times a signal in a communications channel changes state or
varies. For example, a 2400 baud rate means that the channel can change states up to 2400
times per second. The term “change state” means that it can change from 0 to 1 or from 1 to 0
up to X (in this case, 2400) times per second. It also refers to the actual state of the connection,
such as voltage, frequency, or phase level).
The main difference between the two is that one change of state can transmit one bit, or
slightly more or less than one bit, that depends on the modulation technique used. So the bit
rate (bps) and baud rate (baud per second) have this connection:
The modulation technique determines the number of bit per baud. Here are two examples:
When FSK (Frequency Shift Keying, a transmission technique) is used, each baud transmits
one bit. Only one change in state is required to send a bit. Thus, the modem’s bps rate is
equal to the baud rate. When a baud rate of 2400 is used, a modulation technique called
phase modulation that transmits four bits per baud is used. So:
1. Similarities
Both flash and EEPROM are digital storage methods used by computers and other
devices. Both are non-volatile ROM technologies to which you can write and from which
you can erase multiple times.
Differences
The primary difference between flash and EEPROM is the way they erase data. While
EEPROM destroys the individual bytes of memory used to store data, flash devices can
only erase memory in larger blocks. This makes flash devices faster at rewriting, as they
can affect large portions of memory at once. Since a rewrite may affect unused blocks of
data, it also adds unnecessarily to usage of the device, shortening its lifespan in
comparison with EEPROM.
Usage
Flash storage is commonly used in USB memory drives and solid state hard drives.
EEPROM is used in a variety of devices, from programmable VCRs to CD players.
#include
<STDIO.H>
main()
{
Func1();
Func2();
}
funcs.c
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/*************************************
*
* Function declarations (prototypes).
*
*************************************/
void Func2(void);
/*************************************
*
* Function definitions
*
*************************************/
void Func1(void)
{
puts("Func1 called");
}
Ans: A declaration introduces a name – an identifier – to the compiler. It tells the compiler
“This function or this variable exists somewhere, and here is what it should look like.”
A definition, on the other hand, says: “Make this variable here” or “Make this function here.”
It allocates storage for the name. This meaning works whether
you’re talking about a variable or a function; in either case, at the point of definition the
compiler allocates storage.
32. What is the difference between pass by value by reference in c and pass by reference in
c?
Pass By Reference :
In Pass by reference address of the variable is passed to a function. Whatever changes made to the
formal parameter will affect to the actual parameters
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– Same memory location is used for both variables.(Formal and Actual)-
– it is useful when you required to return more then 1 values
Pass By Value:
– In this method value of the variable is passed. Changes made to formal will not affect the actual
parameters.
– Different memory locations will be created for both variables.
– Here there will be temporary variable created in the function stack which does not affect the original
variable.
33. What is the difference between flash memory, EPROM and EEPROM?
EEPROM is an older, more reliable technology. It is somewhat slower than Flash. Flash and
EEPROM are very similar, but there is a subtle difference. Flash and EEPROM both use
quantum cells to trap electons. Each cell represents one bit of data. The presence – or absence
– of electons in a cell indicates whether the bit is a 1 or 0.The cells have a finite life – every
time a cell is erased, it wears out a little bit. In EEPROM, cells are erased one-by-one. The
only cells erased are those which are 1 but need to be zero. (Writing a 1 to a cell that’s 0
causes very little wear, IIRC)In Flash, a large block is erased all at once. In some devices, this
“block” is the entire device. So in flash, cells are erased whether they need it or not. This cuts
down on the lifespan of the device, but is much, much faster than the EEPROM method of
going cell-by-cell.
Erasure method: Both Flash and EEPROM erase cells by means of an electric field. I think it
is high-frequency and “pops” the electrons out of the Other similar devices are EPROM
(sometimes UVEPROM) and OTPROM (sometimes PROM). EPROM/UVEPROM lacks the
structures that generate the electrical field for erasure. These devices have a window on top,
usually covered by a paper sticker. To erase, the sticker is removed and the device is exposed
to intense ultraviolet light for 30-45 minutes. The only difference between OTPROM and
UVEPROM is that OTPROM lacks the UV window – there is no way to erase the data.
Adding the UV window to the device package significantly increases cost, so there is a niche
for one-time-programmable devices
The information stored in an EPROM chip can be erased by exposing the chip to strong UV
light. EPROM chips are easily recognized by the small quartz window used for erasure. Once
erased the chip can be re-programmed.
EPROM is more expensive to buy per unit cost, but can prove cheaper in the long run for
some applications. For example if PROM was used for firmware that needed upgraded every
6 months or so – it could prove quite expensive buying new chips!
Memory
This has the added advantage that the information stored can be re-written in blocks and
hence can be used to store system settings that the user may want to change periodically.
This solid state memory has considerably reduced in price over recent years and is nowadays
commonly used to store system settings such as BIOS settings
Volatile memory
Volatile memory is computer memory that requires power to maintain the stored
information. Most modern semiconductor volatile memory is either Static RAM (see SRAM)
or dynamic RAM (see DRAM). SRAM retains its contents as long as the power is connected
and is easy to interface to but uses six transistors per bit. Dynamic RAM is more complicated
to interface to and control and needs regular refresh cycles to prevent its contents being lost.
However, DRAM uses only one transistor and a capacitor per bit, allowing it to reach much
higher densities and, with more bits on a memory chip, be much cheaper per bit. SRAM is
not worthwhile for desktop system memory, where DRAM dominates, but is used for their
cache memories. SRAM is commonplace in small embedded systems, which might only need
tens of kilobytes or less. Forthcoming volatile memory technologies that hope to replace or
compete with SRAM and DRAM include Z-RAM, TTRAM, A-RAM and ETA RAM.
Non-volatile memory
Non-volatile memory is computer memory that can retain the stored information even when
not powered. Examples of non-volatile memory include read-only memory (see ROM), flash
memory, most types of magnetic computer storage devices (e.g. hard disks, floppy discs and
magnetic tape), optical discs, and early computer storage methods such as paper tape and
punched cards. Forthcoming non-volatile memory technologies include FeRAM, CBRAM,
PRAM, SONOS, RRAM, Racetrack memory, NRAM and Millipede.
A Reentrant function is a function which guaranteed that which can be work well under
multi threaded environment. Mean while function is access by one thread, another thread
can call it… mean there is separate execution stack and handling for each. So function should
not contain any static or shared variable which can harm or disturb the execution. 04/11/19, 3:14 pm
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36. Why we are using UDS, If CAN support diagnostics communication?
In CAN it will support internal diagnostic messages. UDS & KWP2000 are used for to test
with external tester and to know the type of problem
On CAN bus controller failure or an extreme accumulation of errors there is a state transition
to Bus Off. The controller is disconnected from the bus by setting it in a state of high-
resistance. The Bus Off state should only be left by a software reset. After software reset
the CAN bus controller has to wait for 128 x 11 recessive bits to transmit a frame. This is
because other nodes may pending transmission requests. It is recommended not to start an
hardware reset because the wait time rule will not be followed then.
Virtual function bus can be described as a system modeling and communication concept. It is
logical entity that facilitates the
concept of relocatability within the AUTOSAR software architecture by providing a virtual
infrastructure that is independent from any actual underlying infrastructure and provides all
services required for a virtual interaction between AUTOSAR components.
39. What is the difference between global and static global variables?
Global variables are variables defined outside of any function. Their scope starts at the point
where they are defined and lasts to the end of the file. They have external linkage, which
means that in other source files, the same name refers to the same location in memory.
Static global variables are private to the source file where they are defined and do not
conflict with other variables in other source files which would have the same name.
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Similarly, in order to use a global variable that has been declared in another file, you have to
use a forward declaration or a header file, along with the extern keyword. Extern tells the
compiler that you are not declaring a new variable, but instead referring to a variable
declared elsewhere.
global.cpp:
1 // declaration of g_nValue
2 int g_nValue = 5;
main.cpp:
global.cpp:
1 // declaration of g_nValue
2 int g_nValue = 5;
global.h:
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#ifndef GLOBAL_H // header guards
1 #define GLOBAL_H
2
3
// extern tells the compiler this variable is declared
4
elsewhere
5
extern int g_nValue;
6
7
#endif
main.cpp:
1 #include "global.h"
2 int main()
3 {
4 g_nValue = 7;
5 return 0;
6 }
Generally speaking, if a global variable is going to be used in more than 2 files, it’s better to
use the header file approach. Some programmers place all of a programs global variables in a
file called globals.cpp, and create a header file named globals.h to be included by other .cpp
files that need to use them.
Local variables with the same name as a global variable hide the global variable inside that
block. However, the global scope operator (::) can be used to tell the compiler you mean the
global version:
int nValue = 5;
1
2 int main()
3 {
4
int nValue = 7; // hides the global nValue variable
5
nValue++; // increments local nValue, not global nValue
6
::nValue--; // decrements global nValue, not local
7
8 nValue
9 return 0;
} // local nValue is destroyed
However, having local variables with the same name as global variables is usually a recipe for
trouble, and should be avoided whenever possible. Using Hungarian Notation, it is common
to declare global variables with a “g_” prefix. This is an easy way to differentiate global
variable from local variables, and avoid variables being hidden due to naming collisions.
New programmers are often tempted to use lots of global variables, because they are easy to
work with, especially when many functions are involved. However, this is a very bad idea. In
fact, global variables should generally be avoided completely!
Global variables should be avoided for several reasons, but the primary reason is because
they increase your program’s complexity immensely. For example, say you were examining a
program and you wanted to know what a variable named g_nValue was used for. Because
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g_nValue is a global, and globals can be used anywhere in the entire program, you’d have to
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examine every single line of every single file! In a computer program with hundreds of files
and millions of lines of code, you can imagine how long this would take!
Second, global variables are dangerous because their values can be changed by any function
that is called, and there is no easy way for the programmer to know that this will happen.
Consider the following program:
Global variables make every function call potentially dangerous, and the programmer has no
easy way of knowing which ones are dangerous and which ones aren’t! Local variables are
much safer because other functions can not affect them directly. Consequently, global
variables should not be used unless there is a very good reason!
Since the AUTOSAR layered software architecture restricts direct access to hardware from
upper layers, an additional concept is provided in order to bypass that restriction for resource
critical and/or Non-AUTOSAR compliant software components. The Complex Device
Driver provides an AUTOSAR Interface to the application layer and has direct access to
values on the physical layer. This is usually used for the implementation of complex sensor or
actuator drivers that need direct control over the underlying hardware.
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42. How to set, clear, toggle and checking a single bit in C?
Clearing a bit
That will clear bit x. You must invert the bit string with the bitwise NOT operator (~), then
AND it.
Toggling a bit
Checking a bit
You didn’t ask for this but I might as well add it.
That will put the value of bit x into the variable bit.
A watchdog timer (or computer operating properly (COP) timer) is a computer hardware or
software timer that triggers a system reset or other corrective action if the main program, due
to some fault condition, such as a hang, neglects to regularly service the watchdog (writing a
“service pulse” to it, also referred to as “kicking the dog”, “petting the dog”, “feeding the
watchdog” or “waking the watchdog”). The intention is to bring the system back from the
unresponsive state into normal operation. Watchdog timers can be more complex, attempting
to save debug information onto a persistent medium; i.e. information useful for debugging
the problem that caused the fault. In this case a second, simpler, watchdog timer ensures that
if the first watchdog timer does not report completion of its information saving task within a
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certain amount of time, the system will reset with or without the information saved. The
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most common use of watchdog timers is in embedded systems, where this specialized timer
is often a built-in unit of a microcontroller.
Different families of micros vary in their capabilities. The number of bits just refers to the
width of the data pipe, which limits the precision of math, although many micros will either
emulate higher order math or have special HW that can perform higher precision math
functions.
The historic difference has been price: 8-bit was cheapest, 32-bit was expensive. This is still
true in generally, but the price of 16-bit parts have come down significantly.
Most 8-bit processors are old and run on old architectures, so they tend to be slower. They are
also made more cheaply, since that is where the competition is at the 8-bit point, and this
makes them tend towards slowness. They also tend to have a low limit on supported
RAM/other storage, but the actual amount depends on the family.
16-bit processors tend to focus on price as well, but there is a large range of parts available,
some of which have fairly high performance and large amounts of on-chip peripherals. These
parts usually perform faster than 8-bit parts on math where the precision is greater than 8
bits, and tend to have more addressable memory.
A function pointer is a variable that stores the address of a function that can later be called
through that function pointer. This is useful because functions encapsulate behavior. For
instance, every time you need a particular behavior such as drawing a line, instead of writing
out a bunch of code, all you need to do is call the function. But sometimes you would like to
choose different behaviors at different times in essentially the same piece of code.
Example: int (*fp) (int, int); -> Function pointer returning an integer
Typedef is used to create a new name to an already existing data type. Redefine the name
creates conflict with the previous declaration.
eg:
typedef unsigned int UINT32
Macros [#define] is a direct substitution of the text before compling the whole code. In the
given example, its just a textual substitution. where there is a posibility of redefining the
macro
eg:
#define chPointer char *
#undef chPointer
#define chPointer int *
typedefs can correctly encode pointer types.where as #DEFINES are just replacements done
by the preprocessor.
For example,
s1,
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intention.
Macros are essentially shorthand representations of arbitrary sections of the source code,
which makes the source code, while its (the macro template’s) expansion replaces each of its
presence prior to compilation. Whatever is there to do with Macros, it is done by the
preprocessor, so that the source code is ready for compilation. Function is a calling routine,
whence a large program is divided into separate portions, each portion doing a separate job,
and proper calling of these portions in different places combines the works done by them
into the required complete output. Thus functions have nothing to do with the preprocessing
period, they are just compiled. To some extent function and macro is similar, for a macro can
occasionally be invoked to perform a task that is generally entrusted to a function. But the
similarity ends there.
1. Macro consumes less time. When a function is called, arguments have to be passed to it,
those arguments are accepted by corresponding dummy variables in the function, they
are processed, and finally the function returns a value that is assigned to a variable
(except for a void function). If a function is invoked a number of times, the times add up,
and compilation is delayed. On the other hand, the macro expansion had already taken
place and replaced each occurrence of the macro in the source code before the source
code starts compiling, so it requires no additional time to execute.
2. Function consumes less memory. While a function replete with macros may look succinct
on surface, prior to compilation, all the macro-presences are replaced by their
corresponding macro expansions, which consumes considerable memory. On the other
hand, even if a function is invoked 100 times, it still occupies the same space. Hence
function is more amenable to less memory requirements
Inline function is the optimization technique used by the compilers. One can simply prepend
inline keyword to function prototype to make a function inline. Inline function instruct
compiler to insert complete body of the function wherever that function got used in code.
Advantages :-
1) It does not require function calling overhead.
2) It also save overhead of variables push/pop on the stack, while function calling.
3) It also save overhead of return call from a function.
4) It increases locality of reference by utilizing instruction cache.
5) After in-lining compiler can also apply intraprocedural optmization if specified. This is the
most important one, in this way compiler can now focus on dead code elimination, can give
more stress on branch prediction, induction variable elimination etc..
Disadvantages :-
1) May increase function size so that it may not fit on the cache, causing lots of cahce miss.
2) After in-lining function if variables number which are going to use register increases than
they may create overhead on register variable resource utilization.
3) It may cause compilation overhead as if some body changes code inside inline function
than all calling location will also be compiled.
4) If used in header file, it will make your header file size large and may also make it
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5) If somebody used too many inline function resultant in a larger code size than it may cause
thrashing in memory. More and more number of page fault bringing down your program
performance.
6) Its not useful for embeded system where large binary size is not preferred at all due to
memory size constraints
Macros :
1. input argument datatype checking can’t be done.
2. compiler has no idea about macros
3. Code is not readable
4. macros are always expanded or replaced during preprocessing, hence code size is more.
5. macro can’t return.
Inline function :
1. input argument datatype can be done.
2. compiler knows about inline functions.
3. code is readable
4. inline functions are may not be expanded always
5. can return.
Consider;
#define FIRST
main()
{
int a, b, c;
#ifdef FIRST
a=2; b=6; c=4;
#else
printf("Enter a:");
scanf("%d", &a);
printf("Enter a:");
scanf("%d", &a);
printf("Enter a:");
scanf("%d", &a);
#endif
additonal code
Note that if FIRST is defined (which it is in the above) the values of a, b and c are hardcoded
to values of 2, 6 and 4. This can save a lot of time when developing software as it avoids
tediously typing everything in each and everytime you run your routine. When FIRST is
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defined, all that is passed to the compiler is the code between the #ifdef and the #else. The 3:14 pm
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code between the #else and the #endif is not seen by the compiler. It is as if it were all a
comment.
Once you have your routine working, and desire to insert the printf and scanfs, all that is
required is to go back and delete the the #define FIRST. Now, the compiler does not see the;
A CRC error has to be detected, if the calculated result is not the same as that received in the
CRC sequence. In this case the receiver discards the message and transmits an Error Frame to
request retransmission.
1. Low cost
2. Consumes less power
3. Can store 4 times as much
4. Information stored on FET transistors
5. Needs to be refreshed
Answer: There are two limitations to the Generator block that limit its effectiveness in
complex tasks. The block is misleading for some people because it requires multiple
windows for setting up the transmit message list. The second problem is the block settings
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if the 3:14 pm
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measurement is running.
Fortunately, CANalyzer has another transmission block that eliminates both practical
limitations: the Interactive Generator block (IG). The IG block combines the configuration
windows of the Generator block into one window; therefore, everything can be setup in one
spot. In addition, changes can be made with the IG.
Without CAPL,can we simulate the other ECU’s CAN Messages except Test ECU in the CAN
Simulation Network in CANoe tool without using IG or G blocks.
How to change the baud rate in CANoe without changing the code?
The bit rate may be changed by either changing the oscillator frequency, which is usually
restricted by the processor requirements, or by specifying the length of the bit segments in
“time quantum” and the prescaler value.
In Canoe tool, we can change the bus timing register 0 & 1 values for correcting the baud
rate.
In Autosar, we can use post build configuration for CAN baudrate values.
Environment variables are data objects global to the CANoe environment and are used to
link the functions of a CANoe panel to CAPL programs.
RTOS Question:
What is RTOS?
In general, an operating system (OS) is responsible for managing the hardware resources of a
computer and hosting applications that run on the computer. An RTOS performs these tasks,
but is also specially designed to run applications with very precise timing and a high degree
of reliability. This can be especially important in measurement and automation systems
where downtime is costly or a program delay could cause a safety hazard. To be considered
“real-time”, an operating system must have a known maximum time for each of the critical
operations that it performs (or at least be able to guarantee that maximum most of the time).
Some of these operations include OS calls and interrupt handling. Operating systems that
can absolutely guarantee a maximum time for these operations are commonly referred to as
“hard real-time”, while operating systems that can only guarantee a maximum most of the
time are referred to as “soft real-time”.
Example: Imagine that you are designing an airbag system for a new model of car. In this
case, a small error in timing (causing the airbag to deploy too early or too late) could be
catastrophic and cause injury. Therefore, a hard real-time system is needed; you need
assurance as the system designer that no single operation will exceed certain timing
constraints. On the other hand, if you were to design a mobile phone that received streaming
video, it may be ok to lose a small amount of data occasionally even though on average it is
important to keep up with the video stream. For this application, a soft real-time operating
system may suffice. An RTOS can guarantee that a program will run with very consistent
timing. Real-time operating systems do this by providing programmers with a high degree of
control over how tasks are prioritized, and typically also allow checking to make sure that
important deadlines are met.
Operating systems such as Microsoft Windows and Mac OS can provide an excellent
platform for developing and running your non-critical measurement and control
applications. However, these operating systems are designed for different use cases than real-
time operating systems, and are not the ideal platform for running applications that require
precise timing or extended up-time. This section will identify some of the major under-the-
hood differences between both types of operating systems, and explain what you can expect
when programming a real-time application.
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Interrupt Latency
Interrupt latency is measured as the amount of time between when a device generates an
interrupt and when that device is serviced. While general-purpose operating systems may
take a variable amount of time to respond to a given interrupt, real-time operating systems
must guarantee that all interrupts will be serviced within a certain maximum amount of
time. In other words, the interrupt latency of real-time operating systems must be bounded
Error Passive receivers can no longer interrupt the data transfer as a recessive Error Flag does
not influence the bus levels. An Error Passive transmitter can still interrupt its own message
by sending a passive Error Flag. Attention, if one Receiver is in error passive mode no data
consistency is guaranteed any more.
How to find the bug in code using debugger if pointer is pointing to a illegal value?
If two CAN messages with same ID sending at a same time, different data which can node
will gain arbitration? How to test it?
Is it possible to declare struct and union one inside other? Explain with example
How many can database files are required for CAN Network simulation in CANoe tool.
Is it possible to simulate other ECU’s Except Test ECU without CAPL Scripting in CANoe
tool?
1. mohit
says:
May 29, 2015 at 9:57 am
Covered almost every topic about CAN. Thanks……….
2. Alok
says:
June 3, 2015 at 11:17 am
Really very helpful……Thank you so much ……
3. Arunkumar
says:
June 8, 2015 at 2:57 pm
It’s nice. Thank you friend I think it’s enough to clear the interview.
If you have any automotive domain material please share.
4. veeresh p s
says:
June 23, 2015 at 8:48 am
Thanks a lot. Very informative
5. Karthik
says:
June 26, 2015 at 2:44 pm
Good Article
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6. Krishnamoorthy
says:
July 16, 2015 at 11:09 am
Fantastic. The real mom to guide the embedded developers
by
krish
8. Bhupinder sharma
says:
July 26, 2015 at 3:45 am
Really these answers helped me during interviews
9. Tushar G
says:
August 7, 2015 at 6:19 pm
malloc()
The name malloc stands for “memory allocation”. The function malloc() reserves a block
of memory of specified size and return a pointer of type void which can be casted into
pointer of any form.
Syntax of malloc()
ptr=(cast-type*)malloc(byte-size)
Here, ptr is pointer of cast-type. The malloc() function returns a pointer to an area of
memory with size of byte size. If the space is insufficient, allocation fails and returns
NULL pointer.
ptr=(int*)malloc(100*sizeof(int));
This statement will allocate either 200 or 400 according to size of int 2 or 4 bytes
respectively and the pointer points to the address of first byte of memory.
calloc()
The name calloc stands for “contiguous allocation”. The only difference between malloc()
and calloc() is that, malloc() allocates single block of memory whereas calloc() allocates
multiple blocks of memory each of same size and sets all bytes to zero.
Syntax of calloc()
ptr=(cast-type*)calloc(n,element-size);
This statement will allocate contiguous space in memory for an array of n elements. For
example:
ptr=(float*)calloc(25,sizeof(float));
This statement allocates contiguous space in memory for an array of 25 elements each of
size of float, i.e, 4 bytes.
free()
Dynamically allocated memory with either calloc() or malloc() does not get return on its
57 of 65 own. The programmer must use free() explicitly to release space. 04/11/19, 3:14 pm
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syntax of free()
free(ptr);
This statement cause the space in memory pointer by ptr to be deallocated.
10. Ashwini
says:
January 19, 2016 at 5:39 pm
Hello Sudhakar,
It will be ungrateful on my part if i dont thank you. I had previous exp in automotive
domain, had a break and want to come back. In this situation I find your site n these
questions form the basic questions and I’m overwhelmed that i find everything related to
my topic on this one site. Thanks a lot. Hope to find suitable job ASAP.
Grateful to you.
Regards,
Ashwini
11. Shiju
says:
April 24, 2016 at 8:39 pm
My understanding about you few open points.
*. If two CAN messages with same ID sending at a same time, different data which can
node will gain arbitration?
Both will be sending messages till one of the node detect the change in data. Once a data
change is detected on the bus it will send the error flag and destroy the data. Its well
defined in the can spec document. please refer it for more details
* What is cross compiler
The process of compiling for a controller in some other controller is called cross
compiling. The compiler that can run in a processor and compile for another controller is
cross compiler.
* SPI & I2C
Number of lines used is 2 + GND (SDA, SCL)in i2c. In SPI it is 4 + GND (MOSI. MISO, CS,
CLK). i2c is half duplex. SPI is full duplex. SPI is a data exchange protocol. It should send
data while receiving and receive data while sending.
*what is the difference between CANalyzer,CANoe and CANape tools?
Difference between CANoe and CANalyzer
1, Number of node simulated is one CANalyzer and it may be more than one in CANoe
2. Graphic panel interface is not available in CANalyzer. It is present in CANoe
12. Janarthanan
says:
May 21, 2016 at 11:46 am
Good Work…………
13. lax_raj
says:
June 11, 2016 at 2:55 pm
What is the difference between dominant bit and recessive bit by giving example, please?
14. girish
says:
58 of 65 04/11/19, 3:14 pm
July 24, 2016 at 9:32 pm
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It was useful info… Thank u very much…
15. akhilesh
says:
September 16, 2016 at 5:52 pm
Very informative for Automotive domain jobs .Thanks alot
16. subhash
says:
October 2, 2016 at 8:15 pm
very nice
17. Ramakrishna S
says:
October 4, 2016 at 6:39 am
Good Info for interviewpoint
18. Akash
says:
October 10, 2016 at 6:25 am
Thanks for the article.
So,
int myInt;
is same as:
extern int myInt;
Assuming of course this is global declaration.
Answer: If this happens, both the CAN nodes will detect it as an error and throw an error
frame without even trying to broadcast their message. The arbitration phase only lasts
until the CAN ID is being transmitted. Hence, the data will not make any difference even
if it was allowed for two CAN nodes to transmit data with same ID.
21. Raghu
says:
October 27, 2016 at 2:30 pm
EXcellent sudhakar, I tottally agree with one of the blogger feedback, it is tottal
ungratefull, IF I won’t tell you Thanks..
23. Santosh
says:
November 14, 2016 at 1:58 am
hello, the information above is very help full, it would be great if you share some
interview questions about the UDS/ diagnostics services, which commonly asked
thanks in advance
Santosh
24. Jyoti
says:
December 23, 2016 at 8:25 am
This is really helpful. Thanks for sharing.
Regression Testing: when the testing is done on the updated code instead for running
whole suite of test procedures to conserve time and resources regression testing is carried
out. Regression testing identifies the direct impact of code change test procedure plus the
series of test which are very critical to the system. For example stack, memory and worst
case margin test are critical test every time the code has changed.
Unit or Module testing: In this testing only a single module is tested at one time and other
modules are stubbed or made passive. This is also called functional testing where in with
in a module each and every function is being tested.
Types of testcases:
Nominal
Robustness check testcases
Out of range value testcases in case for float variables like NaN, +infinity and -infinity
Callback routines appear to be the most common scenario put forth thus far. However,
there are many others …
Finite State Machines where the elements of (multi-dimensional) arrays indicate the
routine that processes/handles the next state. This keeps the definition of the FSM in one
place (the array).
Enabling features and disabling of features can be done using function pointers. You may
have features that you wish to enable or disable that do similar yet distinct things. Instead
of populating and cluttering your code with if-else constructs testing variables, you can
code it so that it uses a function pointer, and then you can enable/disable features by
changing/assigning the function pointer. If you add new variants, you don’t have to track
down all your if-else or switch cases (and risk missing one); instead you just update your
function pointer to enable the new feature, or disable the old one.
Reducing code clutter I touched upon this in the previous example. Examples such as …
switch (a) {
case 0:
func0();
break;
case 1:
func1();
break;
case 2:
func2();
break;
case 3:
func3();
break;
default:
funcX();
break;
}
Can be simplified to …
/* This declaration may be off a little, but I am after the essence of the idea */
void (*funcArray)(void)[] = {func0, func1, func2, func3, funcX};
… appropriate bounds checking on ‘a’ …
funcArray[a]();
There are many more. Hope this helps
28. Daniel
says:
May 21, 2017 at 2:11 pm
very helpful.Thank you
29. Raghaava
61 of 65 04/11/19, 3:14 pm
says:
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June 13, 2017 at 10:26 am
Spi and I2C difference.?
30. Vaishali
says:
July 6, 2017 at 10:07 am
Good article for CAN… Really very helpful…Thanks for sharing.
struct manager
{
short int age;
float shares;
short int level;
} manager;
struct worker
{
short int age;
short int skill;
short int department;
} worker;
} company[10];
in this case you will be able to access the struct elements via company[i].manager.age,
company[i].worker.skill and so on.
32. Nidhi
says:
October 19, 2017 at 10:18 am
This is also a good article for automotive questions -http://blogcheater.com/can-
protocol-interview-questions/
34. renuka
says:
November 20, 2017 at 6:59 am
62 of 65 It’s actually a great and helpful piece of information. I am really thankful to the04/11/19,
blog 3:14 pm
owner for helping us by giving valuable study materials.
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35. Arjun
says:
December 3, 2017 at 7:36 pm
Nice blog! would have been easy to find and read new questions if questions are sorted
into different sections
36. Vinit
says:
January 6, 2018 at 1:45 pm
Static is not default storage class for global variables.
Extern is default storage class for global variables.
37. swathi v
says:
April 17, 2018 at 5:16 pm
How many can database files are required for CAN Network simulation in CANoe tool?
ans: it is according to the project requirements:
case1 : we need “n” number of dbc files if we are communicating with”n” number of
nodes.
case2: few signals will be completely under control of customer, in that case we will be
having separate dbc from customer for particular signals.
38. swathi v
says:
April 17, 2018 at 5:42 pm
How many can database files are required for CAN Network simulation in CANoe tool?
ans: it is according to the project requirements:
case1 : we need “n” number of dbc files if we are communicating with”n” number of
nodes.
case2: few signals will be completely under control of customer, in that case we will be
having separate dbc from customer for particular signals.
39. Rohan
says:
May 5, 2018 at 4:46 am
Hey,
Grazie! Grazie! Grazie! Your blog is indeed quite interesting around Automotive
Interview QuestionsI agree with you on lot of points!
Getting memory violation error when I use string function “strlwr”, what wrong in step
3, please help, I am new to c language
Very useful article, if I run into challenges along the way, I will share them here.
Kind Regards,
Rohan
Interesting piece!Great to see someone write Automotive Interview Questions who is not
a fanatic or a complete skeptic.
How can I access a database ( in Mysql platform, Ubuntu, Linux ) using C language ( in
gcc platform, Ubuntu, Linux ). I want to add , delete, update any record in any moment
using C.
Kind Regards,
Irene Hynes
41. chandu p
says:
October 11, 2018 at 1:08 am
Hi
64 of 65 Can you please post article about UDS (Unified Diagnostic Services)also. 04/11/19, 3:14 pm
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65 of 65 04/11/19, 3:14 pm