Lab#04 Frequency Modulation/Demodulation Objective
Lab#04 Frequency Modulation/Demodulation Objective
Objective
The objective of this lab is to study frequency modulation/Demodulation and design its models on
Simulink.
In-Lab:
Task 1: Implement the Simulink model for frequency modulation/Demodulation using built-in
blocks.
Task 2: Implement the Simulink model for FM modulator without using built-in blocks.
Introduction
Angle Modulation
Phase Modulation, and Frequency Modulation are both the modulation techniques analyzed in
angle modulation. In this experiment, we will examine the most common modulation scheme used
in daily life, namely, the Frequency Modulation, or FM.
Frequency Modulation
The phase deviation of the carrier ϕ(t)is related to the baseband message m(t). Then,
𝑑[𝜃(𝑡)}
𝑑𝑡
=Kf m(t)
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Analog and Digital Communication Lab (EE-322L)
Dhanani School of Science and Engineering, Habib University
Carson’s rule is used to determine the bandwidth of the FM wave. According to the
Carson’s rule, the bandwidth is given by:
Frequency Demodulation
PLL Demodulation
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Analog and Digital Communication Lab (EE-322L)
Dhanani School of Science and Engineering, Habib University
Table 1
Waveform (Time-domain)
Message Signal
FM Signal
Demodulated Signal
Task 2: Implement the Simulink model for frequency modulation without using built-in
blocks. (Hint: using Sine wave, constant, Discrete time integrator and Trigonometric function.
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Analog and Digital Communication Lab (EE-322L)
Dhanani School of Science and Engineering, Habib University
Waveform (Time-domain)
Message Signal
FM Signal
Waveform (Time-domain)
Input Signal
Demodulated Signal
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Analog and Digital Communication Lab (EE-322L)
Dhanani School of Science and Engineering, Habib University
5
Analog and Digital Communication Lab (EE-322L)
Dhanani School of Science and Engineering, Habib University
Components are wired Components are wired Few but not all Complete components
and didn’t show neat with untidy connection Components are wired are wired with neat and
Neat and Clean Circuit and clean connections and didn’t show neat with neat and clean clean tight connections
LR1
layout and minimal efforts and clean connections connections and task completed in
shown due time
Unable to identify the Able to identify the fault Able to identify the fault Able to identify the fault
fault/minimal effort but unable to remove it but partially removes it and able to make
LR3 Troubleshooting
shown necessary steps and
actions to correct it
Figures, graphs, tables Most figures, graphs, All figures, graphs, All figures, graphs,
contain errors or are tables OK, some still tables are correctly tables are correctly
poorly constructed, have missing some important drawn, but some have drawn and contain
LR5 Results & Plots
missing titles, captions, or required features minor problems or could titles/captions
units missing or still be improved
incorrect, etc.
No summary provided. Couldn’t provide good Good summary of In-lab Outstanding Summary of
The number/amount of summary of in-lab tasks. tasks. All major tasks In-Lab tasks. All task
tasks completed below Some major tasks were completed except few completed and explained
the level of satisfaction completed but not minor ones. The work is well, submitted on time,
LR9 Report and/or submitted late explained well. supported by some good presentation of
Submission on time. decent explanations, plots and figure with
Some major plots and Submission on time, All proper label, titles and
figures provided necessary plots, and captions
figures provided
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Analog and Digital Communication Lab (EE-322L)