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Test 2 Answer

The document provides instructions for a test on computer organization and architecture. It includes: 1) An assembly code snippet and questions about translating parts of the code to machine code and determining register values after instructions. 2) Questions about translating machine code to assembly code, determining a jump target address, and correctly sequencing steps in a function call. 3) A question asking to name the three physical locations where operands can be stored.

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0% found this document useful (0 votes)
115 views6 pages

Test 2 Answer

The document provides instructions for a test on computer organization and architecture. It includes: 1) An assembly code snippet and questions about translating parts of the code to machine code and determining register values after instructions. 2) Questions about translating machine code to assembly code, determining a jump target address, and correctly sequencing steps in a function call. 3) A question asking to name the three physical locations where operands can be stored.

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Raymond Foo
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UNIVERSITI TUNKU ABDUL RAHMAN

ACADEMIC YEAR 2019/20

TEST 2 (Anwer)

UCCD1133 INTRODUCTION TO COMPUTER ORGANISATION AND ARCHITECTURE

Instruction to candidates :
Answer ALL questions by writing your final answers on the table given. Candidates are allowed to
use non-programmable scientific calculator.

Q1. Answer the following questions based on the assembly code below:

[00400020] loop: lb $t1, 0($t0)


[00400024] beq $t1, $zero, exit
[00400028] andi $t1, $t1, 0xFF
[0040002c] add $t2, $t2, $t1
[00400030] addi $t0, $t0, 1
[00400034] j loop
[00400038] exit: move $a0, $t2
[0040003c] li $v0, 1
[00400040] syscall

Figure 1

(a) Translate the following assembly code to machine code. Express your answer in hexadecimal.

(i) andi $t1, $t1, 0xFF (5 marks)

Answer:

 From the MIPS green sheet, andi is I-format.


 I –format has the following fields: opcode (6 bits), rs (5bits), rt (5bits), and imm (16bits).
 From the MIPS green sheet, opcode for andi = chex = 0011002
 From Appendix B, rs for the andi instruction above is $t1.
 From Appendix B, rt for the andi instruction above is $t1.
 From MIPS green sheet, the register number for $t1 is 9 = 010012
 From the instruction, immediate = FFhex.

Opcode rs rt immediate
Chex 910 910 FFhex
0 0 1 1 0 0 0 1 0 0 1 0 1 0 0 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
3 1 2 9 0 0 F F
 Answer = 0x3129 00FF
(ii) beq $t1, $zero, exit (5 marks)

Answer:

 From the MIPS green sheet, beq is I-format.


 I –format has the following fields: opcode (6 bits), rs (5bits), rt (5bits), and imm (16bits).
 From the MIPS green sheet, opcode for beq = 4hex = 0001002
 From Appendix B, rs for the instruction above is the $t1 = 9 = 010012
 From Appendix B, rt for the instruction above is the $zero = 0 = 000002
 From the code, the label exit is 4 lines away from beq. Therefore, immediate = 4.

Opcode rs rt immediate
4hex 910 010 410
0 0 0 1 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0
1 1 2 0 0 0 0 4
 Answer = 0x1120 0004

(b) Assuming that the initial value of $t1 is equal to 0x2F45, and $t2 is equal to 0x001F,
determine the new values of the following registers. Express your answer in hexadecimal.

(i) $t1 after the instruction “andi $t1, $t1, 0xFF”. (5 marks)

Answer:

 $t1 = 0x2F45 = 0010 1111 0100 0101


 Imm = 0xFF = 0000 0000 1111 1111
--------------------
Andi = 0000 0000 0100 0101 (bitwise and)
--------------------
0 0 4 5 (hex)
 New St1 = 0x45

(ii) $t2 after the instruction “add $t2, $t2, $t1”. (2 marks)

Answer:

 New $t1 = 0x45 = 0000 0000 0100 0101


 $t2 = 0x001F = 0000 0000 0001 1111
--------------------
Add = 0000 0000 0110 0100
--------------------
0 0 6 4 (hex)
 New $t2 = 0x64
(c) Name the addressing mode of the following instructions:

(i) add $t2, $t2, $t1 (2 marks)

Answer:

 All operands are in registers.


 Therefore, the answer is register addressing modes.

(ii) lb $t1, 0($t0) (2 marks)

Answer:

 Load and store instructions involved memory access, where the memory
address is calculated from base address + offset.
 Therefore, the answer is base (displacement) addressing modes.

(d) Name TWO (2) pseudoinstructions that were used in the assembly code above. (4 marks)

Answer:

 Move
 Li

[25 marks]
Q2. (a) Translate the following machine code to assembly code: 0x022B8025. (5 marks)

Answer:

 First, convert the hexadecimal code to binary.


o 0x022B8025 = 0000 0010 0010 1011 1000 0000 0010 01012
 Then, from the opcode (first 6-bits),

the instruction is identified as R-format, since it is zero.

 R –format has the following fields: opcode (6 bits), rs (5bits), rt (5bits), rd (5bits), shamt
(5bits), and funct (6bits).
 Break the number according to the fields:

0 2 2 B 8 0 2 5
0 0 0 0 0 0 1 0 0 0 1 0 1 0 1 1 1 0 0 0 0 0 0 0 0 0 1 0 0 1 0 1
opcode rs rt rd shamt funct

0 1710 1110 1610 0 25hex

 From the MIPS green sheet, 0/25hex opcode/funct refers to or.


 From the register table, rs = 1710 = $s1; rt = 1110 = $t3; rd = 1610 = $s0.
 From Appendix B, instruction syntax for or is
Or rd, rs, rt
 Therefore, the answer is or $s0, $s1, $t3
(b) Determine the jump target address of the machine code 0x08100009. (5 marks)

Answer:

 First, convert the hexadecimal code to binary.


o 0x08100009 = 0000 1000 0001 0000 0000 0000 0000 10012
 Then, from the opcode (first 6-bits),

the instruction is identified as J-format, since it is 0000 10 = 2.

 J–format has the following fields: opcode (6 bits), address (26bits).


 The 26 bits address is 00 0001 0000 0000 0000 0000 10012
 Augment the address to 32bits

000000 0001 0000 0000 0000 0000 100100

 Convert to hexadecimal: 0000 0000 0100 0000 0000 0000 0010 0100
 The answer is 0x0040 0024

(c) Arrange the following action in the correct sequence during a function call. (5 marks)

C → F → A. → B → D → E

Acquire the storage resources Perform the Put parameters in a place


needed for the callee. desired task. (registers) where the callee
can access them.
A. B.
C.
Put the result value in a place Return to place of
(registers) where the caller can call. Transfer control to the
access it. callee.
E.
D. F.
(d) Operands can be stored in three different locations. Name the THREE (3) physical locations
that can hold the operands. (6 marks)

Answer:

 Register
 Memory
 Instruction / Constant / Immediate

(e) Name the registers with the following function:

(i) A register that hold the address after a jal instruction. (2 marks)

Answer:

 $ra

(ii) A special register that hold the address of the current instruction being executed.
(2 marks)
Answer:

 Program Counter (PC)

[25 marks]

___________________________

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