•

•
•
GENERAL ELECTRIC
•
• TRANSISTOR
• MANUAL
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•
third edition
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•
General Electric Company

• Semiconductor Products
1224 West Genesee Street
Syracuse, New York
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The circuit diagrams included in this manual are included for

illustration of typical transistor applications and are not intended
as constructional information. For this reason, wattage ratings of
resistors and voltage ratings of capacitors are not necessarily given.
Similarly, shielding techniques and alignment methods which may
be necessary in some circuit layouts are not indicated. Although
reasonable care has been taken in their preparation to insure their
technical correctness, no responsibility is assumed by the General
Electric Company for any consequences of their use.
The semiconductor devices and arrangements disclosed herein
may be covered by patents of General Electric Company or others.
Neither the disclosure of any information herein nor the sale of
semiconductor devices by General Electric Company conveys any
license under patent claims covering combinations of semiconductor
devices with other devices or elements. In the absence of an express
written agreement to the contrary General Electric Company as-
sumes no liability for patent infringement arising out of any use
of the semiconductor devices with other devices or elements by any
purchaser of semiconductor devices or others.

I
Copyright 1958
by the
General Electric Company

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•
•
•
contents
Page

• BASIC SEMICONDUCTO R THEORY........ ........ 5

TRANSISTOR CONSTRUCTION TECHNIQUES... . 8

• Major Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Rectifier Construction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

• BIASING .................... .................... ........ 15

• BASIC AMPLIFIERS .................... ..............

Single Stage Audio Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
18
18
Two Stage R-C Coupled Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Class B Push-Pull Output Stages .................... ........ 19
• Class A Output Stages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Class A Driver Stages .................... .................
20
21
Design Charts .................... .................... ... 21

• Amplifier Circuit Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

HI-FI CIRCUITS .................... .................... 30

• Preamplifiers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Hybrid Preamplifier. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
30
31
Tone Controls . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Power Amplifiers .................... ........... : . . . . . . . . . 34
• Stereophonic Tape System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Hi-Fi Circuit Diagrams .................... ................
35
36

RADIO CIRCUITS .................... ................. 38

Autodyne Converters. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
IF Amplifiers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Automatic Volume Controls. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Reflex Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Complete Radio Circuit Diagrams. . . . . . . . . . . . . . . . . . . . . . . . . . . 44

Continued - following page

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Page
UNIJUNCTION TRANSISTOR CIRCUITS .. .......... 56
Theory of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Parameters - Definition and Measurement. . . . . . . . . . . . . . . . . . . . 57
Relaxation Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
Sawtooth Wave Generator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Multivibrator .................... .................... .... 60
Hybrid Multivibrator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
Relay Delay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62

TRANSISTOR SWITCHES .................... ........ 63

Temperature Effects on Switching Circuits. . . 64
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
Saturation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
Transient Response Time . . .................... ...... 73
Flip-Flop Design Procedures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
Triggering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87

LOGIC .................... .................... ......... 91

Binary Arithmetic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98

TETRODE TRANSISTORS .................... . . . . . . . 99

SILICON CONTROLLED RECTIFIER .............. 103

POWER SUPPLIES .................... .. ............. 105

Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108

TRANSISTOR SPECIFICATION S .................. . llO r

How to Read a Specification Sheet .................... .... .
Explanation of Parameter Symbols .................... ..... .
G-E Transistor Summary .................... ............ .
llO
ll3
ll5
•
G-E Transistor Specifications .................... ......... .
Registered JETEC Transistor Types with Interchangeability
Information . . . . . . . ............................
ll6

150
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G-E Outline Drawings .................... ..... .

CIRCUIT DIAGRAM INDEX .................... .... . 165

161
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Notes on the Circuit Diagrams .............. . 167

READING LIST .................... ................... 168

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•
BASIC SEMICONDUCTOR THEORY
• Transistors and junction rectifiers are the natural outgrowth of our rapidly advanc-
ing technology and the need for electronic devices with small size and high efficiency

• and reliability. They are made from materials known as semiconductors - materials
that will pass more current than an insulator, but not as much as a metal. The two
materials now being utilized in the manufacture of semiconductor products are
Germanium and Silicon .
• It is possible to change the electrical characteristics of semiconductor materials by
adding closely controlled amounts of certain impurities. Impurities such as arsenic
and antimony cause a surplus of electrons, or free negative charges, while others such
• as gallium and indium cause a deficiency of electrons, which may be considered as
holes in the crystalline structure, and act as mobile positive charges.
A crystal with a surplus of holes, or positive active electric "particles" is known as

• p-type while a crystal with a surplus of electrons, or negative active electric particles
is known as n-type. As might be expected, when a positive charge and a negative
charge meet in the crystal, they combine and cease to exist as mobile charge carriers -
the excess mobile electron meets a mobile electron deficiency or hole and fills the hole,
• becoming a fixed part of the crystalline structure .
Therefore, in a semiconductor material such as silicon or germanium, we have a
material which is a very poor conductor of electricity unless we add mobile charge

• carriers, and we can add either positive or negative charge carriers. The significance
of this will become apparent when we consider what happens when we join a crystal
of p-type and a crystal of n-type material together forming a distinct boundary, or
junction, between the two types, as in Figure 1.
•
+ + + +-- P TYPE

• +--
~NTYPE
JUNCTION

• FIGURE 1

This crystal is now capable of passing current readily in one direction while blocking
current in the opposite direction and we have a useful electronic device, a rectifier .
•
+ + + p +
• N
B

• FIGURE 2

When a battery is attached as shown .in Figure 2 the electrons will be pushed
• towards the junction by the negative voltage of the battery and combine with holes
attracted towards the junction by the battery's negative voltage. Electrons constantly
enter the crystal at the n-terminal to replenish the electrons that have combined with

• holes, and electrons leave the p-terminal to replenish the hole supply of the p-type
portion of the crystal, and current flows.

5
BASIC SEMICONDUCTOR THEORY I
If we reverse the polarity of the battery as in Figure 3 we have the following
situation:

p
+ + + B
N
+
FIGURE 3

Now the positive and negative particles are drawn away from the junction by the
battery's voltage, leaving the section of the crystal near the junction practically void
of charge carriers and crystal effectively blocks current. A few random charge carriers
do remain in the junction area allowing a minute current to pass. This current is known
as "leakage current" and is usually in the order of a few microamperes.
We have seen how semiconductors are capable of rectifying current by the use of a
single junction within a crystal. By adding a second junction and making a P-N-P or
N-P-N sandwich of N and P types we have a device capable of amplification known
as a transistor.
The transistor may be compared to a triode tube in some ways, so let's quickly (
review the triode tube. The tube represented in Figure 4 has three distinct elements: I

f
FIGURE 4

1. The cathode, which emits electrons; 2. The plate which collects the emitted elec-
•
trons, and 3. The control grid, which controls the charge concentration -of the spaces
A and B separating the elements by altering the charge of these spaces. When a large
I
fixed voltage is applied between the cathode and plate and a small varying voltage
is applied to the control grid, the plate current varies as much as it would if we made
large changes in the plate voltage, giving us a device capable of amplifying voltage.
Now consider the transistor. Again we have three elements, separated by junctions
I
as shown in Figure 5.
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N

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EMITTER BASE
FIGURE 5
COLLECTOR
I -

6
• BASIC SEMICONDUCTOR THEORY

Here the emitter emits electrons, the collector collects electrons and the base controls
the flow of electrons by controlling the charge concentration in the base region, · so
• in the broadest sense, the function of the three elements in the triode tube and the tran-
sistor are similar. However, in the transistor we are amplifying current, not voltage, and
its operation is not really as analogous to the tube's operation as this comparison shows.

• Let's look a little closer at how a transistor works. First of all we will put the
transistor in a circuit as in Figure 6 .

•
EMITTER JUNCTION COLLECTOR JUNCTION
N N
•
• EMITTER BA SE COLLECTOR
+

•
• FIGURE 6

. Here we see that the emitter junction will pass current easily, because it has a forward
bias. The collector junction however, will not pass current from the collector to base,
because this junction is back biased. These bias conditions are necessary for transistor
operation. It is found that the majority of the current flows between the emitter and the
collector because of the large number of electrons from the emitter which diffuse
• through the very thin base region and into the collector without combining with the
holes in the base. As the base is made more positive, more electrons are pulled out of
the emitter and are made available for diffusion into the collector.

• If the base is made less positive, less electrons are pulled from the emitter, so less
reach the collector. The electrons that enter the base, but do not reach the collector,
combine with holes in the base and contribute to the base current, reducing the gain

• of the transistor. To reduce the base current, the base is kept as thin as possible
(usually less than a thousandths of an inch thick) and the hole content kept to a mini-
mum by using high-purity material, or in other words, the base material is only slightly
"p" type material.

• The ratio of the collector current to the base current is called beta, usually shown
on specification sheets as hFE, and the ratio of the collector current to the emitter
current is called alpha, usually shown as hFB. Of course it is desirable to have the alpha
of a transistor as high as possible and alphas of 0.95 to 0.99 are common in com-
• mercial transistors.
No current (except a small leakage current) will flow in the collector circuit unless
current is introduced into the emitter. Since very little voltage (.1 to .5 volts) is needed
• to cause appreciable current flow into the emitter, the input power is very low. Almost
all the emitter current (emitter current times alpha) will flow in the collector circuit
where the voltage can be as high as 45 volts. Therefore, a relatively large amount of

• power can be controlled in an external load and the power gain (Ge) of a transistor
(power out/power in) can be up to 40,000 in some applications.

7
 TRANSISTOR CONSTRUCTION TECHNIQUES

The most common type of junction transistor is the PNP diffused alloyed type.
This transistor is made by taking a wafer of "N" type germanium, mounting it on a
holder and pressing indium dots into each side. The assembly is then heated in a
furnace until the indium melts and alloys with the germanium forming a "P" layer
within the "N" type germanium. The complete assembly is shown by Figure 7. f
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FIGURE 7

By changing the size of the indium dots and the depth to which the indium is r
alloyed into the base material, it is possible to obtain a transistor optimized either for
audio amplifiers or high speed switching. In addition, by starting with P type germa-
nium, it is possible to make a NPN transistor. With the alloy type of structure, it is
•
possible to pass currents of up to 112 an ampere through the transistor. This structure
is not generally suitable for high frequency linear amplifiers since the indium dots
produce a high capacitance between collector and base making the unit inherently
unstable at high frequencies.
The rate grown transistor is produced by an entirely different technique. A bar
of germanium is grown from a bath of molten germanium so doped that the material
will change from "P" type to "N" type depending on the temperature and rate of
pulling. By suitable growing techniques, 10 to 15 thin "P" type layers are formed in
a bar about the size of a cigar. This bar is then sawed up into pieces about 10 mils
I
by 10 mils by 100 mils with the thin "P" layer in the center and long "N" regions
on each side. About 7 to 10 thousand transistor bars can be cut from each ingot of
germanium. The internal appearance of one of these transistors is shown in Figure 8.
This transistor has a low collector capacitance and has excellent gain up to several
megacycles. It is stable at high frequencies and is ideally suited for the radio fre-
quency section of broadcast receivers. A rate grown transistor also makes an excellent
unit for high speed gates and counting circuits. I
8
• TRANSISTOR CONSTRUCTION TECHNIQUES

•
•
•
•
FIGURE 8

• The meltback method of transistor construction starts off with a bar of germanium
about 10 x 10 x 100 mils. The end of the bar is melted and allowed to refreeze very
quickly. By suitable doping of the original material, the junction between the melted

• portion and the unmelted portion becomes a thin layer of "P" type material and the
melted and unmelted portion of "N" type material remains "N" type material. This
transistor is essentially a rate grown transistor, but the rate growing is done on an
individual small bar rather than on the large germanium ingot. By the addition of an
• extra base connection to a triode, a tetrode is formed. If a current is passed through
the base region from one base lead to the other, the active portion of the base region
is electrically narrowed and high gain is possible up to 200 me.

• Another method of making semiconductor devices is by gaseous diffusion of impuri-

ties. In this type of construction, the base material and the impurity are sealed together
in a quartz tube and the complete assembly heated to about 1200°C. At this high
temperature, the impurities form a gas which diffuses into the surface of the base
• material forming P or N type layers. With this technique, it is possible to form very
large flat junctions of precisely controlled thickness. An example of a transistor built
using this technique is the 2N451 silicon 85 watt power transistor shown in Figure 9 .

• EMITTER TIN-
TIN CLAD
NICKEL LEAD

ETCH

• ALUMINUM
ALLOY

REGROWTH

• N SILICON
COLLECTOR
GOLD

GOLD - ANTIMONY
TUNGSTEN

• INDIUM
COPPER HEAT SINK OF

•
• FIGURE 9

9
 r
TRANSISTOR CONSTRUCTION TECHNIQUES I
By using two impurities diffused simultaneously, it is possible to form a P type layer
.2 mil thick and an N type emitter layer .3 mil thick. By making contacts to the base
and emitter regions, a transistor is produced capable of carrying up to 10 amperes.
Since the diffused layers are very thin, the frequency response of this power transistor
is good up to 5 to 10 me.
Another recently developed device using diffusion techniques is the Controlled
Rectifier. A Controlled Rectifier is a four layer PNPN structure as shown in Figure 10.

CATHODE GATE

N
f'

p
'
FIGURE 10

By making connections to three of the layers, a regenerative switch is obtained which

acts in a manner very similar to a vacuum tube thyratron. This device will switch on
in less than 1 µsec and with the large areas made possible by diffusion, it will carry
15 amperes continuously and 150 amperes on a surge basis.
G-E silicon signal transistors are grown junction devices with a diffused base and
utilize an entirely new type of pellet mounting to obtain maximum mechanical strength
and reliability. This construction, used with both the silicon triode and the silicon
unijunction transistors is called the ceramic disk construction or fixed-bed mounting,
and is shown in Figure 11. A wafer of ceramic which has the same coefficient as the
pellet forms the basic mechanical structure. Gold is deposited on the disk in three areas
to form the electrical contacts. The silicon bar is mounted across a narrow slit in the
disk and between two of the gold contacts. The third connection is made between
the silicon bar and the third gold contact by means of a small aluminum wire. The
aluminum wire forms the base contact of the silicon triode, and the emitter contact
of the uni junction transistor. After the transistor is assembled on the ceramic disk, the
entire disk assembly is mounted on a standard header by soldering the gold to the
transistor leads.
The use of this fixed-bed construction results in a number of important
advantages:
1. The mechanical strength of the structure is increased greatly since the basic
transistor structure is not subjected to stress during shock and vibration.
2. The transfer of heat between the transistor bar and the case is improved
permitting higher power ratings.
3. The possibility of failure from extreme temperature cycling is greatly reduced
because of the matched temperature coefficients of the structure.
4. The electrical characteristics are more stable and reproducible from unit to
unit because of the improved uniformity of the mechanical structure.
10
• TRANSISTOR CONSTRUCTION TECHNIQUES

GOLD FILM

•
.
• TOP VIEW
FIGURE 11
SIDE VIEW

• MAJOR PARAMETERS

There are many properties of a transistor which can be specified, but this section
will only deal with the more important specifications. A fundamental limitation to the

• use of transistors in circuits is BVCER, the breakdown voltage in the grounded emitter
connection. The grounded emitter breakdown voltage is a function of the resistance
from the base to the emitter and it is necessary to specify this resistance shown as
R in Figure 12.
•
•
R
• VcER +FOR NPN
_J_-FOR PNP

• FIGURE 12

• Since the breakdown voltage is not sharp, it is also necessary to specify a value of
collector current at which breakdown will be considered to have taken place. For
example, in PNP audio transistors the collector current is specified to be less than
600 µa with 25 volts applied and the resistance R equal to 10,000 ohms. With NPN
• transistors, the collector current should be less than 300 µa with 15 volts applied, and
the base open-circuited.
The small signal parameters of transistors are usually specified in terms of the "h"
• or hybrid parameters. These parameters are defined for any network by the following
equations:

•
e1n =ht itn + hr eout
• iout = hr i1n + ho eout
where h1 = input impedance (ohms)
hr =feedback voltage ratio (dimensionless)

• ht =forward current transfer ratio (dimensionless)

ho = output conductance (mhos)
11
TRANSISTOR CONSTRUCTION TECHNIQUES

For transistors, a second subscript is added to designate which terminal of the

transistor is grounded. For example, hre is the grounded emitter forward current trans-
fer ratio.
The current transfer ratio is equal to the ratio of an a-c variation in collector
current to an a-c variation in base current. This current gain can be specified either

FIGURE 13

for small a-c values of base current or for large values of base current in which case
it would be known as hFE, the d-c current gain. The current gain is the most important
property of a transistor in determining the gain of audio amplifiers.
The small signal "h" parameters of a transistor are a function of frequency and
bias conditions. For a P-N-P alloy audio transistor, typical h parameters at 270 cps,
and bias conditions of 5 volts (collector to emitter) and 1 ma collector current are:
Grounded Base Grounded Emitter
h1b 30 ohms hie 1500 ohms
hrb 4 X 10-4 hre 11 X 10-4
htb -0.98 hte 50
1 X 10-6 mhos hoe 50 x 10-6
The h parameters at other bias conditions are shown by Figure 14.

10.0 ~-~--..----.....--~--..-------.

...:::> ...
3~ 5.0 ~~+---1---+--+---t--'""7"1
~ 5.0
4
~
~
1\ hfe
..,
II

~ 2.0 1---3..,......+----lt---+--+---+t----t ~ 2.0

> 0
0
~ hob
~ 1.0 l:::~......;;==-~-r::;:_-+---J.hh:.::jb~ ~ l.Ob~::::;;t;;~~~~~~====:t~~
~
0
~
.; 0.5 l---+----lt---+-'""'=",....~_...,,.1-h-"rb=--t ~0.51--'-"-+-,,,.-.=--+---+--~.---t----"'1
~ ~
~
l-
o
t; CHARACTERISTICS :5 CHARACTERISTICS
vs
~ 0.
2
1---+--COLLECTi;VOLTAGE - - - t - - - t
0.2
EMITTER CURRENT
:c
0
0.1 .___......___ _...__...___....__ _
-1.0 -2.0 -5.0 -10 -20 -50
COLLECTOR VOLTAGE <veal VOLTS
..__~

-100
0.1 OL.l--OL.2---0L..5--l.L...0---'-2.-0--5.._.0_~IO
EMITTER CURRENT (IE} MA
i
FIGURE 14
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12
• TRANSISTOR CONSTRUCT ION TECHNIQUE S

With transistors used as radio frequency amplifiers, it is necessary to specify a

transformer coupled power gain as indicated in Figure 15. The power gain is the ratio
• of output power to input power under conditions where the input and output im-
pedances are matched by means of the transformers . The input and output impedances
must also be specified to select the proper transformer.

• 15K:500

•
•
• FIGURE 15

Another common transistor specification is the alpha cut-off frequency. This is the
frequency at which the grounded base current gain has decreased to 0.7 of its low
• frequency value. For audio transistors, the alpha cut-off frequency is in the region of
1 me. For transistors used in the rf section of radios, the alpha cut-off frequency
should be 3 to 15 mes. Other examples of transistor specifications are shown on the
specification sheets starting on page 110.
• RECTIFIE R CONSTRU CTION

Germanium and Silicon rectifiers are two-elemen t semiconduc tor devices con-
• structed around the single P-N junction described earlier in Figures 1, 2 and 3. Because
of their inherently low forward resistance and high reverse resistance, these devices
are widely used for converting alternating current to direct current, to block reverse
currents in control circuits, and to increase the power gain of magnetic amplifiers
• through the effects of self-saturati on.
Rectifiers are generally designed to handle power rather than small signals, and
sizeable currents in addition to high voltages. These capabilities are attained through

• use of large cross-section al area junctions and efficient means for dissipating heat
losses, such as fins, heat sinks, etc.
A section through a typical low power germanium rectifier is shown in Figure 16.
The germanium pellet, which is soldered to the base disc, is approximate ly II 16 inch
• square. Yet the junction of this germanium pellet with the indium alloy can rectify

TOP LEAD

•
•
•
Ill
FIGURE 16

13
 r
TRANSISTOR CONSTRUCTIO N TECHNIQUES i
over II 4 ampere at room temperature and block voltages in the reverse direction up
to 300 volts peak. This latter rating is called the "Peak Inverse Voltage" of the cell.
When this same cell is mounted on a 1-1/2 inch square fin as shown in Figure 17, its
current carrying capabilities are increased to over 3/4 ampere at room temperature.

FIGURE 17

Germanium rectifiers of this type offer outstanding advantages over other types of
rectifiers:
1. Low forward drop, unexcelled by any other type of rectifier with the same
inverse voltage rating.
2. Reverse resistance so high as to be negligible for most applications.
3. No aging, and therefore indefinitely long life. Also, no filament to burn out.
4. No junction forming required ... it is always ready to function after prolonged
idleness.
5. Withstands corrosive atmospheres and fluids ... the junction is protected by a
welded hermetic seal.
6. Wide temperature range, from -65°C to as high as +85°C.
7. Ability to withstand shock and vibration . . . no moving parts, flimsy supports,
or sensitive filament.

~
I .... ,
11116
• GLASS
I
ALUMINJM-SILICON
JUNCTION

WELDED SEAL

FIGURE 18

When ambient temperatures exceed 85°C, or when extremely low reverse currents
are required, the silicon rectifier shown in cross-section in Figure 18 can be used. In
outward appearance, the silicon rectifier looks identical to the germanium rectifier.
However, instead of a germanium-in dium junction inside, this cell employs the junction
of a piece of aluminum wire alloyed into a wafer of the metal silicon. This device can
operate in ambients up to 165°C and can handle currents up to 3/4 ampere at room
temperature. Whereas its forward resistance is approximately 40 % higher than a
germanium device of the same rating, its reverse leakage current may be several
hundred times less than a comparable germanium cell. It too can be mounted on a fin
for higher current rating.
i
14
•
BIASING

A major problem with transistor amplifiers is establishing and maintaining the

• proper collector to emitter voltage and collector current (called biasing conditions)
in the circuit. These biasing conditions must be maintained despite variations in
ambient temperature and variations of gain and leakage current between transistors

• of the same classification .

If the Current gain (hFE) Of a transistor WaS COnStant With temperature and the
leakage current was negligible, it would be possible to set up the bias conditions by
feeding a base current of the proper magnitude into the transistor as indicated by
• Figure 19.

•
•
•
• FIGURE 19

The collector current that Hows is equal to hFE : • This type of biasing is extremely
1

• dependent upon the hFE of the transistor and is not recommended except in cases
where the biasing resistance can be individually adjusted for optimum results.
In general, it is necessary to use some type of feedback circuit so that the bias
conditions of the transistor tend to be relatively independent of the transistor param-
• eters. The use of an emitter resistor will provide feedback to stabilize the operating
point. This type of biasing is shown by Figure 20 .

•
•
•
• I
• FIGURE 20

15
BIASING

A voltage divider consisting of resistors R1 and R2 is connected to the base and the
resistance Re is placed in the emitter. Since the emitter junction is forward biased,
the current that flows in the emitter circuit is essentially equal to the voltage at the
base divided by Re. To prevent degeneration of the a-c signal to be amplified, the
emitter resistance is by-passed with a large capacitance. Good design practice is to
make R2 no larger than 5 to 10 times Re. A typical value of Re is 500-1000 ohms. The
method outlined above does not consider the variations of base to emitter voltage drop
or the variations of leakage current with temperature. A more general approach to
the biasing problem is to consider the circuit of Figure 21.

FIGURE 21

From this general circuit, the following equations can be derived:

VB= [(l - a) RB+ RE] h + VBE -IcoRB
VBE is the base to emitter voltage drop at the specified biasing point. At 25 °C this
is 0.2 volts for germanium and 0.7 volts for silicon. At higher temperatures, VBE is
-0.1 for germanium and 0.5 for silicon. If the minimum acceptable emitter current,
minimum alpha, maximum emitter current and maximum alpha and maximum leakage
current are known, the following equation can be derived for the value of RB:
(JEmax - JEmln) RE + VBEmln - VBEmax
RB = Icomax _ (1 _ amnx) hmax + (1 _amin) IE min
As an example, consider the 2N525 transistor with the following characteristics
used in a typical circuit:
E = 20 volts
RL = 8.2 K ohms
Icomax = 100 µamp 55°C
h FE max _ 66 amax _ ~
- ' - 67

hFE min_ 30 amln -~

- ' - 31
VBEmax = 0.2, VBEmln = -0.1
Desired hmax = 1.24 ma
Desired hmtn = 0.81
Substituting these values into the equation and assuming various RE's gives the
following results for RB:
for RE = lk, RB = 1.2k
RE = 2.2k, RB = 5.8k
RE = 3.3k, RB = lOk
16
• BIASING

By substituting the value of RB into the original equation, a value of VB can be

obtained. For example, using a 3.3K emitter resistance and a IOK value of RB, the
• value of VB equals 3.1 volts. Transforming from VB and RB to a more practical voltage
·divider type biasing is done with the equations in Figure 22.

+E
• ReE
R1"--
Ve

• Ve
R1 Ve
R2:---
E-Ve

• -
FIGURE 22

• By use of the above approach, it is possible to design a bias circuit which will
accommodate all the variations of the transistor and maintain the bias points within
the value desired .

•
•
Ill

•
•
..
•
Ill

17
 BASIC AMPLIFIERS

SINGLE STAGE AUDIO AMPLIFIER

Figure 23 shows a typical single stage audio amplifier using a 2Nl90 PNP
transistor.
.....----------12

SINGLE STAGE AUDIO AMPUFIER

FIGURE 23

With the resistance values shown, the bias conditions on the transistor are 1 ma
of collector current and six volts from collector to emitter. At frequencies at
which C1 provides good by-passing, the input resistance is given by the formula:
Ran=( 1 +hie) h1b. At 1 ma for a design center 2Nl90, the input resistance would
be 37 X 30 or about 1100 ohms.
The a-c voItage gam--;:-is .
. eout . approximate Iy equaI RL
to~.
. . sh own this
F or th e circuit

5000 .
would be 30 or approximately 167.
The frequency at which the voltage gain is down 3 db from the 1 Kc value
depends on rg. This frequency is given approximately by the formula:

I f '11 l+hfe
ow 3db "\J 6.28( rg c 1
1
TWO STAGE R-C COUPLED AMPLIFIER

The circuit of a two stage R-C coupled amplifier is shown by Figure 24. The
input impedance is the same as the single stage amplifier and would be ap-
proximately llOO ohms. i
.

FIGURE 24
I
18
• BASIC AMPLIFIERS

The load resistance for the first stage is now the input impedance of the second
stage. The voltage gain is given approximately by the formula:
•
•
More exact formulas for the performance of audio amplifiers may be found in

• the Reading List at the end of this manual.

CLASS B PUSH-PULL OUTPUT STAGES

In the majority of applications, the output power is specified so a design will

• usually begin at this point. The circuit of a typical push-pull Class B output stage is
shown in Figure 25 .

•
FROM
DRIVER
STAGE

•
•
FIGURE 25

• The voltage divider consisting of resistor, R and the 47 ohm resistor gives a slight
forward bias on the transistors to prevent cross-over distortion. Usually about 1/10 of
a volt is sufficient to prevent cross-over distortion and under these conditions, the

• no-signal total collector current is about 1.5 ma. The 8.2 ohm resistors in the emitter
leads stabilize the transistors so they will not go into thermal runaway when the junc-
tion temperature rises to 60°C. Typical collector characteristics with a load line are
shown below:
• I MAX .

• COLLECTOR CURRENT

POINT

• Ee
COLLECTOR VOLTAGE

FIGURE 26

• It can be shown that the maximum a-c output power without clipping using a push-
pull stage is given by the formula:
I max Ee
• Pout= 2
Since the load resistance is equal to
Ee
RL = Imax
19
BASIC AMPLIFIERS

and the collector to collector impedance is four times the load resistance per collector,
the output power is given by the formula:
2 Ec 2
Po= Rc-c (1)
Thus, for a specified output power and supply voltage the collector to collector load
resistance can be determined. For output powers in the order of 50 mw to 750 mw,
the load impedance is so low that it is essentially a short circuit compared to the out-
put impedance of the transistors. Thus, unlike small signal amplifiers, no attempt is
made to match the output impedance of transistors in power output stages.
The power gain is given by the formula:
Pout lo2 RL
Power Gain= Pi:-= Ln2 Rin "'
Since Io is equal to the current gain, Beta, for small load resistance, the power gain ~
I1n
formula can be written as:
Rc-c
=
P. G. {32 Rb-b (2)

where Rc-c =collector to collector load resistance.

Rb-b = base to base input resistance.

{3 = grounded emitter current gain.

Since the load resistance is determined by the required maximum undistorted output
power, the power gain can be written in terms of the maximum output power by com-
bining equations (1) and (2) to give:
(3)

CLASS A OUTPUT STAGES

A Class A output stage is biased as shown on the collector characteristics below:

IMAX.

COLLECTOR CURRENT

Ee 2Ec
COLLECTOR VOLTAGE

FIGURE 27

The operating point is chosen so that the output signal can swing equally in the posi-
tive and negative direction. The maximum output power without clipping is equal to:
Ee le
Pout =--2-

The load resistance is then given by the formula:

Ee
RL=1c

20
• BASIC AMPLIFIERS

Combining these two equations, the load resistance can be expressed in terms of the
supply voltage and power output by the formula below:
• RL =
E/
2 Po {4)
For output powers of 10 mw and above, the load resistance is very small compared to
the transistor output impedance and the current gain of the transistor is essentially the
short circuit current gain Beta. Thus for a Class A output stage the power gain is given
by the formula:
{3 2 RL
• P. G.
{3 2
= R:- = 2 R1n Po
Ec2
(S)

• CLASS A DRIVER STAGES

For a required output power of 250 mw, the typical gain for a push-pull output
stage would be in the order of 23 db. Thus the input power to the output stage would

• be about 1 to 2 mw. The load resistance of a Class A driver stage is then determined
by the power that must be furnished to the output stage and this load resistance is
given by equation (4). For output powers in the order of a few milliwatts, the load
resistance is not negligible in comparison to the output impedance of the transistors,
• therefore, more exact equations must be used to determine the power gain of a Class A
driver stage. From four terminal network theory, after making appropriate approxima-
tions, it can be shown that the voltage gain is given by the formula:

• Av=~~ (6)
=
where h1 b grounded base input impedance.
The current gain is given by the formula:
• 1 -
a
A----- ---
1- a + RL hob (7)
where hob =
grounded base output conductance.
The power gain is the product of the current gain and the voltage gain, thus unlike
the formula for high power output stages, there is no simple relationship between
required output power and power gain for a Class A driver amplifier .

• DESIGN CHARTS

• Figures 28 through 36 are design charts for determination of transformer imped-

ances and typical power gains for Class A driver stages, Class A output stages, and
Class B push-pull stages. Their use can be best understood by working through a
typical example. It will be assumed that it is desired to design a driver and push-pull
amplifier capable of delivering a 250 mw with a 9 volt supply. Using Figure 28, for
250 mw of undistorted output power, the required collector to collector load resistance
is 450 ohms. From Figure 30 using a typical 2Nl87, the power gain is 22.5 db. In

• numerical terms, a power gain of 22.5 db is 178. Therefore, the required input power
to the driver stage would be:
250
Pin= 178
• or 1.4 mw. Assuming about 70% efficiency in the transformers, the required output
power of the driver stage will be 2 mw. From Figure 32, for 2 mw of undistorted out-
put power, the load resistance is slightly over 10,000 ohms so a 10,000 ohm trans-

• former could be used. From Figure 35 assuming a 2Nl91 driver transistor, the power
gain is 41 db. The typical power gain of the two stages using a 2Nl91 driver and

21
BASIC AMPLIFIERS I
2Nl87's in the output would be 63.5 db. The secondary impedance of the driving
transformer should be 2,000 ohms center tapped as shown on the specification sheet
for the 2Nl86, 2Nl87 and 2Nl88. The secondary impedance of the output transformer
I
should be selected to match the impedance of the load.
1000

700
'
'
"
'
'
I
'

I
500 ' '
'
' ' '
300 "' ' I'\

"" " ', '

I"'
200

6 VOLT SUPPLY
'r-..
''~ ...
' ~!'-.
', ......
"~
'~12 VOLT SUPPLY
Ii'. 9 VOLT SUPPLY
I
100 '

70

50
"
' I'
',
'

'
'\.
'
'
'
'
"' I
~- '
1--- DESIGN CHART FOR
' ' "' I\
30

20
1---
~-

1---
OUTPUT TRANSFORMER
IN CLASS B PUSH-PULL
AUDIO AMPLIFIERS
"'
'
'
"'
'
' ',
' I
11
I\
' ',
10
100 200 300 500 1000 2000 3000 5000
II
~,

',
10,000
I
COLLECTOR TO COLLECTOR LOAD-OHMS

FIGURE 28 I
U>
I-
1000 - -,
.,,... _ _ _ .,_.......__ _ P " " _ ....... _

........ ........ ~
---~--~~~l.!-'~~T~AI~~~~~~
I- 600 ........
~
~\2Nl8BAJ I
~
:::; 400 "' 2N187A
_<3~!_8~~,~~
~ ~ ~T---,---r---
MAXIMUM RATED POWER
...J
i
I
I-
=>
a..
200
.........

(2N186)~
"-... "'" ........ I"'-...
-
~l2N188)
...............
(2N187)
""Ir-...
I
I-
=> 100 -- -- -- ,......

I
0 ...... .....
...... ...... ......
~ 60 ......... .........

~ 40
... I'.. I.........._ "
a..
TYPICAL POWER GAIN
"" ~
'
20

10
FOR CLASS 8,
PUSH- PULL AMPLIFIERS

6 VOLT SUPPLY
I
6

4 I
2

I
I
12 14 16 18 20 22 24 26 28 30
POWER GAIN-DECIBELS

FIGURE 29
I
22
I
• BASIC AMPLIFIERS

1000
--
.......
........
--- ....... ___
..... ,,...,
....... -- ._ __ ~A)(_!~U~_R_A_I_gp_~!'.~ ==
•
1....... I
600 ....... (2Nl88A)
........... ........ ~ I
(/)
.......... .... ....... ... ~ ~(2N187A)
1-400

~
!2_N~!~~-=-
~['.....
-~
I- MAXIMUM RATED POWER
; ~--r--,---

• :J200
...J
:::E (2N186)
.........
~ ~(2Nl88)
"" ['...,.
1

~Nl87)
~100
:::>
a..
.......
.., .... ....
.....
- .......

• I-
:::>
0
a::
60
40
.......
........
f'.....
.......
........
..........
.......

.....
11.1 ~
3:
~
• ~ 20
0
w
TYPICAL POWER GAIN
FOR CLASS 8,
PUSH-PU LL AMPLIFIERS
Ii: 10
9 VOLT SUPPLY
0

• 0
~ 6
z:::> 4
:::E

• ~ 2
x
ct

..
2: I
14 16 18 20 22 24 26 28 30 32
POWER GAIN- DECIBELS

FIGURE 30

• IOOO

- - - --.......
,.......

.......
.....
~
- M~x~~u~-~T~~ ~~w~~~
I I I
600 ....... ........ ........ I I
(2N 188A~

•
(/)
I-
!;i
~
:J
...J
400

200
<~N1~2~
...........

~~
....... ~
........... ~

rs..
.......
(2N187A I
MAXIMUM RATED POWER
~

~ .... ~(2N188)
- ---,- - -,- -·

•
:E
~
:::>
a..
I-
:::>
100
l2Nl86)-
""'~ ........
"'
........
......_
........
...,~N187)
.......
.......
........
........
.......
0 ...... ....... .......
a:: 60 ........... ....... ........
11.1 ........... .............

• 3:
0
a..
0
11.1
40
...............

[~
........

I- 20
a:: TYPICAL POWER GAIN
0 FOR CLASS 8,

• ~
5
z
:::>
10
PUSH-PULL AMPLIAERS
12 VOLT SUPPLY
2: 6
:::>
2:
ii x
ct
4
2:
2

• I
18 20 22 24 26 28 30 32 34 36

. POWER GAIN DECIBELS

FIGURE 31

23
...
BASIC AMPLIFIERS

10
I
'\~
~
I-
ct
3:
7

5 "' '\ '\. '\

~
'\

r'\
\,.

' '\
\,.

I\
I
..J
..J
:i
I-
:::>
3
"''\ '\~
'\
' r-..
I\
I
SUPPL~ ""''\."
a. '\.
I- 2
:::>
0
a::
ILi
9VOLTS
6 VOLTS SUPPLY
""'"
~2 VOLTS SUPPLY
i
a.
3:
0
1.0 -""' '
'\.
'
I-
0
ILi
0.7

"" ""' "'"\ I

"'"~ ""
a:: 'I\
I-
0
0.5
'\
!!! '\
DESIGN CHART FOR
0
z
:::>
2
0.3 -
OUTPUT TRANSFORMER
IN CLASS A-SINGLE
ENDED OUTPUT STAGES
'\
'\
'\
'\
I
:::::>
2
xct
~
0.2

""""' '\I\
' '\

0.1
IK IOK
COLLECTOR LOAD RESISTANCE OHMS
IOOK
I
FIGURE 32

1000 I
DESIGN CHART FOR
i
I- OUTPUT TRANSFORMER

I
:::> IN CLASS A-SINGLE
a.
I- ENDED OUTPUT STAGES
:::>
0
a::
ILi
3:
0
a. en
ol-
ILi~
3:
100 ..... .....
'\.
I
I-
a::_ '
0..J
I- ..J
!!! :i
70
'" ' 'I

'\
' I\.
\ I
0
z 50
' r'\ ----
"'
::::> "1(1--12 VOLTS SUPPLY
2 '\ "°"\.
9 VOLTS SUPPLY
::::>
2
~::!:
30

20
'\
'\

I\
'\.
\
I\
'\
I
6VOLTS SUPPLY
'\
-~~ ""' I
""'"" ~
I I I \
10
100 1000 10,000
COLLECTOR LOAD RESISTANCE OHMS

FIGURE 33
I
24
I
• BASIC AMPLIFIERS

FIGURE 34

• 20 24 28 32 36
POWER GAIN - DECIBELS
40 44
(/)

::10 0
<l ---- - -
I
MAXIMUM RATED POWER-
--------- - - - - -- - -
I I
! 70 ' ',. 2NIB8A
j 50
"
~2N186A·~
\.
~ '-
-2Nl87A

•
I I
~
~
0 ---- -~ l'\~-~l!-1~~ R~T_EE _PO!'°~R- _
~ 20

~~
2Nl92
0
2N191
~ I 0 t:::::::== 2N190'

• ;r::
:? 5
7~ 2Nl89,..
" \.
'
\.
'
',
"
~
l-
a::
3
' '
' '\.' I\.'\.'\.
0 \,\..\..!\.
•
2
FIGURE 35 ~
I.____
TYPICAL POWER GAIN
FOR CLASS A-
\

SINGLE ENDED AMPLIFIERS

9 VOLT SUPPLY
\
I\\
:l! 0.7 1----
=> ''
~ 0.5 ' ''
• <l
:l!

• 100
70
-
" ''
I I
MAXIMUM RATED POWER-
I
-
I
22 26 30 34
POWER GAIN - DECIBELS
38 42 46

(/) 50
I-
" \. " ----rn~:~:1 I
I-
~~~6~)~ ~~R~~~ ~T!=~P~l~~R __
• ~ 30

.
j 20
:l!
~"\~~
~ 10 =
:
(2N192)

~
' ' ' ==
-- '
' (2N191)
i:>Nl9
a::
?r.J ICllO\- "
\. \.
ILi \. I\ \. \.
~ 3 \ \ \ \

·~~
0
ILi

I
TYPICAL POWER GAi N
FOR CLASS A-
SINGLE ENDED AMPLIFIERS
\ \\ 1\
Ci 0.7 I
I----
---- 12 VOLT SUPPLY \

~ 0.5
'
~

·~ <l
:l! FIGURE 36

24 2B 32 36 40 44 48
POWER GAIN - DECIBELS

25
AMPLIFIER CIRCUIT DIAGRAMS I
I
G.E. 2N107
2000J1...
HEAD
I
IT
AUDIO PHONES
I
3V T+ I
-
SIMPLE AUDIO AMPUFIER
I
FIGURE 37

I
lµfd 2Nl07

INPUT I 2N170
2K
PHONE
I
I
330K I
+3
R SHOULD BE
R
ADJUSTED FOR OPTIMUM RESULTS I
DIRECT COUPLED "BATTERY SAVER" AMPUFIER
FIGURE 38 i
I
2K.O.
PHONES
(MAGNETIC)
I
22K I
I
CODE PRACTICE OSCILLATOR
FIGURE 39
I
26
I
• BASIC AMPLIFIERS

•
•
• Tl=TRIAD A-SIX
OR EQUIV.
T2=TRIAD S-51X
OR EQUIV.

•
6V 6V

• LOUDSPEAKER AUDIO AMPUFIER

FIGURE 40

•
•
• INPUT

•
•
• I
L_

• R1, - - 220,000 OHM

R 2 , - - VOLUME CONT!lOL 10,000 OHM
1/2 W AUDIO TAPER
R3,--· 68,000 OHM
cl --6,.fd, 12V
C2 --IOOl'fd, 3V
C3, C4 -50,.td, 12V
C5,--.02j.fd
MAXIMUM POWER OUTPUT : .35 WATTS
MAXIMUM POWER OUT AT 10%
HARMONIC DISTORTION : .25 WATTS
SENSITIVITY FOR 50 MILLIWATTS
TRt. --GE. 2N192 OR 2N265 REFERENCE POWER OUTPUT: .2 VOLTS
R 4 , - - to,000 OHM FOR USE WITH MAGNETIC CARTRIDGE
TR2, TR3,-G.E. 2N241A

• *
R 5 , - - 470 OHM OMIT RI, IN THIS CONDITION SENSITIVITY:
T1 --6K.nt5Kn.cT
R 5 , - - 220 OHM
R7.--1eoo OHM
* T2--500QCT/ V.C.
5 MILLIVOLTS

R5,--·- 33 OHM
Rg,R10·- 8.2 OHM
~11,--4.7K OHM * FOR FURTHER COMPONENT INFORMATION SEE PAGE 167

•
• THREE TRANSISTOR PHONO AMPUFIER
FIGURE 41

27
 R11
m
>
Ul
G.E. RELUCTANCE
n
>
R3 s:
"D
!:
HI LEVEL CARTRIDGE ~
fl1
:u
Ul

TO SPEAKER

R1 Rs

~< I I 9VOLTS

-1l1l1J
!c3I+
~
CXl
I :~A l r?r+~
_ _ _j SW
0
I_

FREQUENCY RESPONSE Ri,-5000 OHM VOLUME CONTROL MAXIMUM POWER OUTPUT : .75 WATTS
OF FOUR TRANSISTOR AMPLIFIER 1/2 W AUDIO TAPER R13,---47 OHM MAXIMUM POWER OUT AT 10% HARMONIC
MAXIMUM BASS POSITION --- R2,--150,000 OHM R14. R15, - - 8. 2 OHM DISTORTION : .45 WATTS
MAXIMUM TREBLE POSITION---------- DISTORTION AT 100 MILLIWATTS
R3,--470,000 OHM C1, C3,C7,C9,-50JJ.fd AT 100 C/S : 5%
+5~------~---~ R4 1--IO,OOO OHM C2,Cs,--50JJ.fd AT 1000 C/S : 2%
R5,R9,-4700 OHM C4,---l5fLfd AT 5000C/S : 5%
OI ~.-·, _ IC l SENSITIVITY FOR 50 MILLIWATTS REFERENCE
R7, --1000 OHM C5,---.02JJ.fd
POWER OUTPUT: CRYSTAL CARTRIDGE : 150 M V.
db -5r-----l'-!----+--4.----~
Ra, --33,000 OHM TR1 ,TR2 1 -G.E. 2Nl91 OR 2N323
MAGNETIC PICKUP: 2MV.
Ru ,--25,000 OHM LINEAR TR3,TR4,-G.E. 2Nl88A OR 2N320
-10..__ __,.,__._ _ _- - + - - - + - - 1 R12,--22.0 OHM *T1 1 ---4K/2.6K CT.
Rs,R10~470 OHM *T2,---20on C.T.IVC.
-15 ----'
10 102 103 10 4
*FOR FURTHER COMPONENT INFORMATION SEE PAGE 167
AMPLIFIER LOADED WITH 3.211. VOICE
COIL SPEAKER RESONANCE@ 130 CPS

FOUR TRANSISTOR PHONO AMPUFIER

FIGURE 42

.. ~ ~ ~ ~~ ~"! ~
r • • • • • • I
• I I I
• • • • •
R13
I
R14 _! TR4

R2 R10

INPUT

f~w-=-
t:.o
c:D = 6V

Rt - - - 10,000 OHMS R11---2200 OHMS C1--Bmfd PERFORMANCE DATA•

R 2 - - 150,000 OHMS R12--4700 OHMS c2--.5o
MAXIMUM POWER
R 3 - - 6800 OHMS R13--33,000 OHMS C3--.02 OUTPUT 1.00 WATTS
R4--50,000 OHMS R14--47,000 OHMS C4--.20 MAXIMUM POWER
BASS LINEAR R15--1500 OHMS C5--.005 OUTPUT (ci) 10%
R5--1000 OHMS DISTORTION---- .75 WATTS
R15--330 OHMS C5--.IO DISTORTION AT
R5--IO,OOOOHMS
R7--IOO,OOO OHMS R 1 7 - - 220 OHMS C7--IOmfd 100 MILLIWATTS:
R19--1200 OHMS C9--IOmfd 60c/s 3.0 %
R9--50,000 OHMS IOOOc/s I. 5 %
TREBLE LINEAR R19--330HMS C9--50mfd
5000c/s 3.0%
Rg--10,000 OHMS c 10 --50mfd SENSITIVITY FOR 50
m
TAPER AUDIO V.C. )>
C11--50mfd MILLIWATTS REFERENCE Ul
R i o - - 220,000 OHMS POWER OUTPUT
*T1--IK/IKC.T. (CRYSTAL CARTRIDGE)--3. 8 mv 0
TR1,TR2,TR3-GE2N323
*T2 IOOll C.T/V.C.
TR4,TR5---GE2N321 (WITH CLIP-ON HEATSINK) )>
JI( FOR FURTHER INFORMATION SEE PAGE 167 s::
"D
r
:!!
FIVE TRANSISTOR AUDIO AMPUFIER l'1
;o
FIGURE 43 Ul
 UHi-Fi" CIRCUITS

Transistors are ideally suited for Hi-Fi amplifiers since there is no problem with
microphonics or hum pick-up from filaments as there is with tubes. Transistors are
inherently low impedance devices and thus offer better matching to magnetic pick-ups
I
and loudspeakers for more efficient power transfer.
Transistor circuits with negative feedback can give the wide frequency response
and low distortion needed in hi-fi equipment. i
'

PREAMPLIFIERS

Preamplifiers have two major functions {I) increasing the signal level from a
pick-up device to I or 2 volts rms, and (2) providing compensation if required to
I
equalize the input signal for a constant output with frequency.
The circuit of Figure 44 meets these requirements when the pick-up device is a ~
variable reluctance phono cartridge such as the General Electric VRII, or a tape head. i
TAPE
(NARTB)

[A) PHONO

L
.01 ~9V
1.5K -18V
l
15K

3V
IOK

TR3
2N332
i
TRI
2N508
VOLUME
MAGNETIC
TAPE OR
is;t
330K ISV
PHONO - IOO~f
PICKUP 47n 3K +IOV
RI

PHONO-TAPE PREAMPUFIER
FIGURE 44

This preamp will accommodate most magnetic pick-up impedances. The input
impedance to the preamp increases with frequency because of the frequency selective
I

'I
negative feedback to the emitter of TRI. The impedance of the magnetic pick-ups
will also increase with frequency but are below that of the preamp.
· The first two stages of this circuit have a feedback bias arrangement for current
stabilization of both stages. The 330K from the emitter of TR2 provides this DC
current feedback to the base of TRI. The output stage is well stabilized with a 5K
emitter resistance.
The AC negative feedback from the collector of TR2 to the emitter of TRI is fre-
quency selective to compensate for the standard NARTB recording characteristic for
tape or the standard RIAA for phonograph records. The flat response from a standard
NARTB pre-recorded tape occurs with the tone control {RI2) at mid-position or I2K
ohms. (See Figure 45.) There is 7 to 8 db of treble boost with the control at 25K
maximum position, and approximately 20 db of treble cut with RI2=0. Mid-position
of the tone control also gives flat response from a standard RIAA recording. I
.

30
• "HI-Fl" CIRCUITS

--- ...____-
+10 Rl2=2:!K-

- --............
~
Rl2:::::12K

•
-10
~
-20

" Rl2•0-

•
• 40 100 IKC
TAPE PREAMPLIFIER RESPONSE FROM NARTB RECORDING
10 15KC

FIGURE 45
• The voltage feedback from the collector of TR2 decreases at low frequencies
because of the increasing reactance of the feedback capacitor in series with the tone
control. Each of the two feedback networks give the desired increase in gain at the
• lower frequencies to accomplish the correct compensation. If this feedback capacitor
were shunted by an electrolytic capacitor, the preamplifier would give constant gain
at all frequencies (in the "Tape" switch position). This gain is determined by Rl2/Rl.

• The RIAA feedback network (with tone control at mid-position) has a net feedback
resistance of 6K to decrease the gain because of the higher level input. This resistance
has a .01 µ,f capacitor in parallel for decreasing the amplifier gain at the higher

• frequencies in accordance with RIAA requirements. This eliminates the need to load
a reluctance pick-up with the proper resistance for high frequency compensation. If
it is desirable to build the preamplifier for phonograph use only, the compensating
feedback network would consist only of a .04 µ,f feedback capacitor in series with a 6K
• resistor {or a lOK Tone control) which has a .01 µ,f capacitor in parallel.
The emitter-follower output stage of the preamp gives a low impedance output for
a cable run to a power amplifier, and acts as a buffer so that any preamp loading will

• not affect the equalization characteristic .

The Tone control should have a linear taper and the Volume control an audio
taper. Two 9 volt batteries will give good life in this application since the total supply
drain is approximately 3.5 ma DC. This 18 volts may also be obtained by suitable
• decoupling from a higher voltage supply that is available.

HYBRID PREAMPLIFIER

• The hybrid preamplifier circuit of Figure 46 uses a similar feedback equalization

technique to that of Figure 44. There is a small amount of treble boost above 10 KC
due to the .01 µ,f capacitor from the 12AX7 cathode to ground. The Treble Control is
=
• set at the same position (R4 20K) for a compensated output from a standard RIAA
recording or an NARTB recorded tape.
The 2N508 transistor is biased at approximately .7 ma from a constant current
source for good current stability with temperature and transistor interchangeability. Rl
biases the base for the desired V cE, and since this bias is taken from the collector, the
31
 I
"HI-Fl" CIRCUITS
I
+llOV.D.C.

20K
220K
.05

2N508
'"~ OUTPUT

MAGNETIC
PICKUP
IOK
.01

HYBRID PHONO-TAPE PREAMPLIFIER

FIGURE 46

d-c feedback helps to keep VcE in the range of 1 to 5 volts. This voltage varies with
leakage current of Cl and with hFE for different transistors. This range of VcE bias
has little effect on the operation of the preamplifier.
The standard reference level for S/N (signal-to-noise) measurements in tape
recording is the maximum level at which a 400 cycle signal can be recorded at 2 %
harmonic distortion. The hybrid preamplifier of Figure 46 is capable of a S/N in
excess of 60 db. The signal output from this reference level is approximately 1.5 volts.
The variation of treble equalization for tape is shown in Figure 47.
r
..c
:s
I.LI
(!)
<I
+5

-5
0
- -- ----
--....... ~
---........
--......... ...................... R4'" 30K
R4 "20K
j

I-
...J
0
-10 ~
>
I- -15 ~
.........
I
::::>
a..
I- -20 r--..... ....
::> R4" 0
0
-25
100 IKC 10 15KC

FIGURE 47
i
A dual preamp for a stereophonic disc or tape system could be built with two
identical preamps as in Figure 46, using only one tube (12AX7) and two transistors
(2N508).

TONE CONTROLS

Tone control circuits for transistor amplifiers are somewhat different than con-
ventional vacuum tube tone controls since the impedance levels in transistor circuits
are lower. A satisfactory bass and treble tone control for use between transistor stages
is shown by Figure 48. *
* "Transistor Electronics," Lo, Endres et al (Prentice-Hall). I
32
• "HI-FI" CIRCUITS

IOK 5
--+-e-vvv~----<1{--+QUTPUT
.008
FROM 5 TREBLE
• PRE-AMPLIFIER~
VOLUME
50K
BASS
:>+-*"'41,___ ___.'<. 50K

IOOK .08
•
• FIGURE 48

The action of the tone controls is easily understood if they are considered as
• current transfer networks rather than voltage transfer networks as in vacuum tube
amplifiers. The output current from the preceding stage goes to the volume control
where part of it is shunted to ground and the rest goes to the junction of the 0.02 µfd
and 0.2 µfd capacitors and the center arms of the potentiometers. At 1000 cycles, the
• equivalent circuit of the tone controls is very simple, as shown in Figure 49(A). At this
frequency, the current is divided so that 10/llths of the current is shunted to ground
and l/llth goes on to the next transistor. The low-frequency equivalent circuit for the

• "bass boost" condition is shown in Figure 49(B). With the movable arm of the potenti-
ometer near the top, the 0.02 µfd capacitor is bypassed and more of the current is
shunted into the 10,000 ohm resistor as the impedance of the 0.2 µfd capacitor rises
at low frequencies .
• The high-frequency equivalent circuit of the tone control is shown in Figure 49( C)
for the "treble cut" condition. Depending on the potentiometer setting, most of the
higher frequencies will be shunted to ground as compared to a 1000 cycle signal.
• With the potentiometer arm at the top, the higher frequency current would bypass
the 10,000 ohm resistor and a treble boost would be achieved.
The performance of the tone control is shown by Figure 50 .

• ~OUT
IOK IOK
r------t.....,,vvv--nOUT
IOK
....-l'VVV----41...._-n OUT
~-----4.----o IN .008
• T02 2K

IN~ 48K

• .2 IN

•
..
I IK

(A) (Bl
IK

(C)

(A) A I KC EQUIVALENT CIRCUIT. (8) LOW - FREQUENCY EQUIVALENT

CIRCUIT, AND (C) THE EQUIVALENT CIRCUIT AT HIGH FREQUENCIES .
• FIGURE 49

33
"HI-FI" CIRCUITS I
,_ ,..._,_

I
+15
~x.~ 11
+10
~ ... I I or~ .---
~.#,
+5
......... ~
~ 0
-5

-10 ll"'i-c~
...-
~ ..... _.I-' ~~c
11 fl; ----- I
-15
~- '--TTTI 11 ['..........
< 20 100 IKC. IOKC.
FREQUENCY - CPS

FIGURE 50

POWER AMPLIFIERS

A great deal of effort has gone into developing transformerless push-pull amplifiers
using vacuum tubes. Practical circuits, however, use many power tubes in parallel to
I
provide the high currents necessary for direct driving of low impedance loudspeakers.
The advent of power transistors has given new impetus to the development of
transformerless circuits since the transistors are basically low·.voltage, high current
devices. The emitter follower stage, in particular, offers the most interesting possi-
bilities since it has low inherent distortion and low output impedance.

I
I
22ll r
4,B,ORl6.'2
SPEAKER
I

SIX WATT POWEi AMPUf/EI

FIGURE 51 I
Figure 51 is a direct coupled power amplifier with excellent low frequency response,
and also has the advantage of a feedback arrangement for current stabilization of all E
stages. The feedback system also stabilizes the voltage division across the power output I
transistors TR4 and TR6 which operate in a Class B push-pull arrangement. TR3 and
TR5 also operate Class B in the Darlington connection to increase the current gain.
Using an NPN for TR5 gives the required phase inversion for driving TR6 and also
has the advantage of push-pull emitter follower operation. TR4 and TR6 have a small
I
forward bias to minimize crossover distortion. This bias is set by the voltage drop
across the lK resistors that shunt the input to TR4 and TR6. TR3 and TR5 are biased
for the same reason with the voltage drop across the 1N91. A 68 ohm resistor would
serve the same function as the 1N91 except there would be no temperature compensa-
i
I
tion. Thermistors have also been used to compensate for the temperature variation of
the emitter-base resistance, but they do not track this variation as well as a germanium
junction diode which has temperature characteristics similar to the transistor.
34
I
• "HI-Fl" CIRCUITS

TR2 is a Class A driver requiring a very low impedance drive which is accomplished
by an emitter follower TRI. TRI needs a current source for low distortion thus RI
• and the Level Control supply the desired drive impedance. The Level Control should
be set for a value of approximately IK ohms when this amplifier is driven by the
preamplifier of Figure 44. This will permit the amplifier to be driven to full output.

• TRI has an emitter current of .8 to I ma, and TR2 has a 2.5 to 3 ma bias .
The bias adjuster R2 is set for one-half the supply voltage across TR6. TR4 and TR6
have a beta cut-off at approximately 7Kc. The phase shift and drop in beta gives rise
to a decline in transistor efficiency which causes an elevation of junction temperature .
• To help stabilize this runaway condition, the higher frequency drive has been decreased
by the .005 µf capacitors in parallel with the IK ohm drive resistors. This reduces the
drive by 3 db at 30 Kc. The .001 µf feedback from collector to base of TR2 also aids

• in this stabilization by reducing the high frequency gain of this stage. The 220 µµf
capacitor shunting the bias network further aids the stabilization of the amplifier
with high frequency negative feedback from output to input. This circuit has approxi-
mately I 7 db of overall voltage feedback with the 20K resistor from load to input. The
• output to speaker is shunted by 22 ohms in series with .2 µf to prevent the continued
rise of speaker impedance and its accompanying phase shift beyond the audio spectrum.
The overall result, from using direct coupling, no transformers, and ample degenera-

• tion, is an amplifier with output impedance less than one ohm for good speaker
damping, and very low total harmonic distortion. The frequency response at IOO
milliwatts is flat over the audio spectrum. When checking for maximum power out
at the higher frequencies, a sinewave can be applied ·only for a short duration before
• sufficient heating for runaway results as indicated above. To protect the power tran-
sistors, a current meter should be used in series with the voltage supply for quick, visual
indication of runaway while checking power output above approximately 2Kc. There
is not sufficient sustained high frequency power in regular program material to precipi-
• tate this instability. Thus the actual performance of the amplifier does not suffer since
the power level in music and speech declines as the frequency increases beyond
about IKc.
• This amplifier is capable of a 5 watt output with less than 1 % harmonic distortion
into a 4, 8 or 16 ohm speaker when used with the power supply of Figure 153, page 108.
The power transistors TR4 and TR6 should be mounted on an adequate heat

• radiator such as used for transistor output in an automobile radio, or mounted on a

3" x 4" x l/s" aluminum plate.

STEREOPHONIC TAPE SYSTEM

A complete semiconductor, stereophonic tape playback system may be assembled

by using the following circuits in conjunction with a stereophonic tape deck.

• #I
TRACK
TAPE
PREAMP
FIG.44
6 WATT
POWER
AMP.
SPEAKER
FIG.51

• STEREO
TAPE
DECK
POWER
SUPPLY
FIG.154

• TAPE 6 WATT
#2 POWER SPEAKER
PREAMP
TRACK FIG.44 AMP
FIG.51

• BLOCK DIAGRAM OF STEREOPHONIC TAPE SYSTEM

FIGURE 52

35
"HI-FI" CIRCUITS
I
Two identical tape preamplifier circuits can use a common 18 volt battery supply.
The circuitry of Figure 44 may be used with the switch and RIAA network eliminated
if the preamps are to be used for tape only.
The output of each preamp is fed to a power amplifier as indicated in Figure 52.
Two identical power amplifiers with circuitry as in Figure 51 can use a common power
supply as shown in Figure 154, page 108. The output coupling capacitor of the pre-
amps may be eliminated when fed to an amplifier with an input coupling capacitor
I
as in Figure 51. The output of each amplifier fed to its respective speaker completes
the stereo system as shown in Figure 52.
A dual 10 watt stereo system consists of two identical amplifiers with circuitry of
Figure 53 using the common power supply of Figure 155, page 109. This power supply
I
has separate decoupled outputs for each amplifier. The 1Nlll5 rectifiers should be
mounted on a metal chassis with the electrically insulating mounting kit provided with
each unit. The stereo system uses the same tape preamplifiers as that of Figure 52.
I
-50V
( 15ma-NO SIGNAL
.4A @ IOWATTS)
r

TR4
2Nl73
'
1000111
- +
50V
22n.

o----=.i~+-+-l\JV'.~>/VV-4--1>---+~
20µ1 B OR
20V 16.0. SPEAKER

I
TR6
2Nl73
.2

INPUT

i~
TEN WATT POWER AMPUFIER
FIGURE 53
•
The power amplifier of Figure 53 is the same circuit as Figure 51 except for the
transistors which have a higher voltage rating. This amplifier with the power supply of
I
Figure 155, page 109, is capable of a 10 watt output with very low distortion into an
8 or 16 ohm speaker.
HI-Fl CIRCUIT DIAGRAMS I
I
I
I
NPN PREAMPUFIER FOR MAGNETIC PICKUPS
FIGURE 54
I
36
I
 • • I
• • • I
• I
• I I
• • • •
R4 R17

a:
C3
R1 "'ii::J
Q.
C5 ::I
C(

cl a:

R1 f GE
RELUCTANCE
PICKUP
Ra
TRz

Rg
RIO

R11
"'3t
0
Q.

VOLUME BASS TREBLE

RI, 2700 OHM R 16, 6800 OHM

R2, R5, R14,R1a.- 180,000 OHM (SEE NOTE) R17, 1800 OHM
w R3, R 1 5 , - - - 15,000 OHM R2~ 100 OHM
-1
R4, 2200 OHM C1, C2,C5,C10,C11,C13;-51'fd
Rs, 22,000 OHM C3, C 12, 50~ fd
R7, 8200 OHM C4 1 DIS~fd

RB, 220 OHM C5, .02~ fd

Rg VOLUME CONTROL C7, .21'fd
100,000 OHM 1/2 W AUDIO TAPER Ce, ,QI~ fd
Rio, R13,---so,ooo OHM, LINEAR TAPER POT C91 .I ~fd
Ru, 1000 OHM TR I, TR 2 , TR 31 TR 41 - - GE 2Nl90
R12,R19,---10,ooo OHM

NOTE:
HIGHER OR LOWER VALUES MAY BE NECESSARY DEPENDING ON TRANSISTORS
AND SUPPLY VOLTAGE. SELECT RESISTORS SO THAT COLLECTOR TO EMITTER
D-C VOLTAGE IS 4 TO 8 VOLTS.
n
:ti
n
c
PREAMPUFIER AND DRIVER
-I
FIGURE 55 Ul
 RADIO CIRCUITS

AUTODYNE CONVERTER CIRCUITS

The converter stage of a transistor radio is a combination of a local oscillator, a

mixer and an IF amplifier. A typical circuit for this stage is shown in Figure 56.
I
i
I

FOR ADDITIONAL INFORMATION SEE PAGE 167

AUTODYNE CONVERTER
FIGURE 56

Redrawing the circuit to illustrate the oscillator and mixer sections separately, we
obtain Figures 57A and 57B.
i
I

PRIMARY
---------+------o+9V
I
SECONDARY

..,_--~---------------o+9V
FIGURE 578
I
'

FIGURE 57A I
The operation of the oscillator section (57 A) is as follows:
Random noise produces a slight variation in base current which is subsequently
amplified to a larger variation of collector current. This A.C. signal in the primary of
I
L2 induces an A.C. current into the secondary of L2 tuned by CB to the desired
oscillator frequency. C2 then couples the resonant frequency signal back into the
emitter circuit. If the feedback (tickler) winding of L2 is properly phased the feedback
will be positive (regenerative) and of proper magnitude to cause sustained oscillations.
The secondary of L2 is an auto-transformer to achieve proper impedance match be-
tween the high impedance tank circuit of L2 and the relatively low impedance of the
emitter circuit. I
38
• RADIO CIRCUITS

C1 effectively bypasses the biasing resistors R2 and Rs to ground, thus the base is
A.C. grounded. In other words, the oscillator section operates essentially in the
• grounded base configuration.
The operation of the mixer section (57B) is as follows:
The ferrite rod antenna L1 exposed to the radiation field of the entire frequency
• spectrum is tuned by CA to the desired frequency (broadcast station) .
The transistor is being biased in a relatively low current region, thus exhibiting
quite non-linear characteristics. This enables the incoming signal to mix with the

• oscillator signal present, creating signals of the following four frequencies:

1. The local oscillator signal.
2. The received incoming signal,.
3. The sum of the above two .
• 4. The difference between the above two.
The IF load impedance Ti is tuned here to the difference between the oscillator
and incoming signal frequencies. This frequency is called the intermediate frequency
• (I.F.) and is conventially 455 KC/S. This frequency will be maintained fixed since CA
and CB are mechanically geared (ganged) together. & and Ca make up a filter to pre-
vent undesirable currents to flow through the collector circuit. C2 essentially bypasses

• the biasing and stabilizing resistor R1 to ground. Since the emitter is grounded and
the incoming signal injected into the base, the mixer section operates in the "grounded
emitter" configuration .

• IF AMPLIFIERS

A typical circuit for a transistor IF amplifier is shown by Figure 58 .

•
•
• +9V

FIGURE 58

• The collector current is determined by a voltage divider on the base and a large
resistance in the emitter. The input and output are coupled by means of tuned IF
transformers. The .05 capacitors are used to prevent degeneration by the resistance
• in the emitter. The collector of the transistor is connected to a tap on the output
transformer to provide proper matching for the transistor and also to make the per-
formance of the stage relatively independent of variations between transistors of the
same type. With a rate-grown NPN transistor such as the 2N293, it is unnecessary
• to use neutralization to obtain a stable IF amplifiH. With PNP alloy transistors, it
is necessary to use neutralization to obtain a stable amplifier and the neutralization
capacitor depends on the collector capacitance of the transistor. The gain of a tran-
• sistor IF amplifier will decrease if the emitter current is decreased. This property
of the transistor can be used to control the gain of the IF amplifier so that weak
stations and strong stations will produce the same audio output from a radio. Typical
circuits for changing the gain of an IF amplifier in accordance with the strength
• of the received signal are explained in the A.V.C. section of this chapter.
39
RADIO CIRCUITS

AUTOMATIC VOLUME CONTROLS

A.V.C. is a system which automatically varies the total amplification of the signal
in a radio receiver with changing strength of the received signal carrier wave.
From the definition given, it would be correctly inferred that a more exact term
to describe the system would be automatic gain control (A.G.C.).
•'
Since broadcast stations are at different distances from a receiver and there is a
great deal of variation in transmitted power from station-to-station, the field strength
around a receiver can vary by several orders of magnitude. Thus, without some sort
of automatic control circuit, the output power of the receiver would vary considerably
when tuning through the frequency band. It is the purpose of the A.V.C. or A.G.C.
circuit to maintain the output power of the receiver constant for large variations of
signal strengths.
Another important purpose of this circuit is its so-called "anti-fading" properties.
The received signal strength from a distant station depends on the phase and amplitude
I
relationship of the ground wave and the sky wave. With atmospheric changes this
relationship can change, yielding a net variation in signal strength. Since these changes
may be of periodic and/or temporary nature, the A.V.C. system will maintain the
average output power constant without constantly adjusting the volume control.
The A.V.C. system consists of taking, at the detector, a voltage proportional to the
incoming carrier amplitude and applying it as a negative bias to the controlled amplifier
thereby reducing its gain.
In tube circuits the control voltage is a negative going DC grid voltage creating
a loss in transconductance (Gm).
In transistor circuits various types of A.V.C. schemes can be used:

EMITTER CURRENT CONTROL

As the emitter current of a transistor is reduced (from 1.0 ma to .1 ma for instance)

various parameters change considerably (see Figure 59).
0 .
V11. •S'4 ', .,.-
'I""--.. I/
............ /

2
'1'.. /

m
("..)',

I
",... / - .._..i-
i..-"'

.
.....
.... ..... ~~f:.~
~"' .......... GNO.~
L.,....-- r--... EMITTER

i--- ~,...."'
~
11
2

I
.5 I 2
EMITTER llAS,MA.
CHAftACTERISTICS VS. EMITTER CURRENT

FIGURE 59

The effect of these changes will be twofold:

1. A change in maximum available gain and
2. A change in impedance matching since it can be seen that both hob
and htb vary radically.
Therefore, a considerable change in power gain can be obtained as shown by Figure 60. I
40
I
• RADIO CIRCUITS

db

•
34
! VcE =9v I
32
....--- -~1 I

30

28 ~---·---
,___ / v-- -------- VcE :5v ~ l'\
\
V/
• 26

24
// --- ~-

22
// I
GE 2N168A
;,'/ AGC CURVE

• z
~
' 20

0:
18
II
// POWER GAIN VS EMITTER CURRENT
INPUT MATCHED AT IE = Ima
OUTPUT TUNED AT 455 KC
ZLOAO= 15K";VcE = 5VOLTS
"' 16
~ 14
I/
• 12

10

• .04 .2 4
EMITTER CURRENT - ma
.6 .8 I 6 8

FIGURE 60

• On the other hand, as a result of Ico (collector leakage current) some

current always flows, thus a transistor can be controlled only up to a
point and cannot be "cut-off" completely. This system yields generally
• fair control and is, therefore, used more than others. For performance
data see Figure 61.

• +6
EMITTER CURRENT
PLUS AUXILIARY A.V.C DIODE

+4 ~/ I
/
• +2 IDEAL CURVE
___ ..,,,·""
./

CD -2
- - -- -- -- - - - ---..., /6"6~i~~L cg~~;NT
(~~~~~o~~ Vim
Cl

• ~
>-
:::>
a.
>-
-4

-6
OBTAINABLE
CURVE
""
\.
\
\
YIELDS DISTORTION)

:::>
0 -9
~
• ~
a>
-JO

-12

-14 STRONG

•
SIGNALS
-16

-18
0.0001 0.001 0.01 0.1 1.0

VOLTS I METER

•
SIGNAL STRENGTH IN

FIGURE 61

AUXILIARY A.V.C. SYSTEMS

• Since most A.V.C. systems are somewhat limited in performance, to
obtain improved control, auxiliary diode A.V.C. is sometimes used.
The technique used is to shunt some of the signal to ground when
• operating at high signal levels, as shown by Figure 62.
41
RADIO CIRCUITS

CR.

[J o
nd 1.F.

I
..J

l
0
~
z
0
u-=-

---VV"l.r-----<>A·V·C
FROM DETECTOR
~c

FIGURE 62

In the circuit of Figure 62 diode CR1 is back-biased by the voltage drops across
Ri and R2 and represents a high impedance across T 1 at low signal levels. As the signal
strength increases, the conventional emitter current control A.V.C. system creates a
bias change reducing the emitter current of the controlled stage. This current reduction
coupled with the ensuing impedance mismatch creates a power gain loss in the stage.
As the current is further reduced, the voltage drop across R2 becomes smaller thus
changing the bias across CR1. At a predetermined level CR1 becomes forward biased,
constituting a low impedance shunt across Ti and creating a great deal of additional
A.V.C. action. This system will generally handle high signal strengths as can be seen
from Figure 61. Hence, almost all radio circuit diagrams in the circuit section of this
manual use this system in addition to the conventional emitter current control.

"TETRODE" OR BASE #2 CONTROL

In tetrode transistor amplifiers the high frequency gain of the transistor

depends on the base-to-base bias voltage, varying the latter will give
good gain control. For circuit see Figure 63.

R2 R3
A.V.C
TETRODE DETECTOR
+ 1~
R6 i
R1 R5
c,

-
FIGURE 63

42
. RADIO CIRCUITS

REFLEX CIRCUITS

• "A reflex amplifier is one which is used to amplify at two frequencies - usually
intermediate and audio frequencies."*
The system consists of using an l.F. amplifier stage and after detection to return
the audio portion to the same stage where it is then amplified again. Since in Figure 64,
•
AUXILIARY

• A.V.C.

IN64G AUDIO

• AUTODYNE
CONVERTER
FIRST l.F.
AMPLIFIER
2nd l.F.
AUDIO DRIVER
+ DIODE
DETECTOR
A.V.C.
+
AUDIO
POWER
OUTPUT

2Nl68A 2N292 2Nl69 IN64G 2Nl88A

• A.V.C .
AUDIO

• FIGURE 64

two signals of widely different frequencies are amplified, this does not constitute a
• "regenerative effect" and the input and output loads of these stages can be split audio
- I.F. loads. In Figure 65, the l.F. signal (455 Kc/s) is fed through T2 to the detector
circuit CRl, C3 and R5. The detected audio appears across the volume control R5
• and is returned through C4 to the cold side of the secondary of T 1.

• +
C4

. IF~-:
T1

TR1

INPUT I -
I I
• L__ _J AUDIO INPUT
c 0

··r
+

• R4

°I
R1 C2
AUDIO
OUTPUT

- -
•
B PLUS

•
FIGURE 65
• * F. Langford-Smith, Radiotron Designers Handbook, Australia, 1953, p. 1140
43
RADIO CIRCUITS

Since the secondary only consists of a few turns of wire, it is essentially a short
circuit at audio frequencies. Cl bypasses the l.F. signal otherwise appearing across
the parallel combination of Rl and R2. The emitter resistor R3 is bypassed for both
audio and l.F. by the electrolytic condenser C2. After amplification, the audio signal
appears across R4 from where it is. then fed to the audio output stage. C5 bypasses R4

i'
for l.F. frequencies and the primary of T2 is essentially a short circuit for the
audio signal.
The advantage of "reflex" circuits is that one stage produces gain otherwise
requiring two stages with the resulting savings in cost, space, and battery drain. The
disadvantages of such circuits are that the design is considerably more difficult,
although once a satisfactory ·receiver has been designed, no outstanding production
difficulties should be encountered. Other disadvantages are a somewhat higher amount
of playthrough (i.e. signal output with volume control at zero setting), and a minimum
volume effect. The latter is the occurrence of minimum volume at a volume control
setting slightly higher than zero. At this point, the signal is distorted due to the
balancing out of the fundamentals from the normal signal and the out-of-phase play-
through component. Schematics of complete radios are on pages 44 through 55.

COMPLETE RADIO CIRCUIT DIAGRAMS

I

365
µufd

DIRECT COUPLED VEST POCKET RADIO

FIGURE 66

MILLER
LOOP
STICK
#6300
OR
EQUIV.

220K

SIMPLE RADIO RECEIVER

i
FIGURE 67

~i

•
t,11·
MILLER
LOOP
STICK
"6300
OR
EQUIV

Tl-PRI 200Kfl
SEC I K.n.
ARGONNE
ARIOO OR
EQUIV.

TWO TRANSISTOR RADIO RECEIVER

FIGURE 68

44
 I
• I I I I I I
• I I I I I I I

Lt

TR1

*T3

""[}<J
450..A./V.C.

~~.....----..,·

~
tit 'R1 R4> >R5 >R7 :>Rs I 9v

~1111~
R1 47,000 OHMS C1 .02µ.f TR1 2N168A
R2 10,000 .OHMS C2 .01 µ.f TR2 2Nl69 OR 2Nl68A CR1 IN64G OR EQUIV.
R3,R7 1500 OHMS C3 .01 µ.f TR3 2N241A
R4 270 OHMS C4 .01 µ.f T1, AUTOMATIC BS725G-
.002µ.f T2 AUTOMATIC BS614&
R5 33,000 OHMS C5
NOMINAL SENSITIVITY: 2.0 MILLIVOLTS/METER
R6 2,000 OHMS Cs 5µ.f
(MEASURED WITH 5 MILLIWATTS REFERENCE POWER OUTPUT)
VOLUME CONTROL C7 50µ.f MAXIMUM POWER OUTPUT : 75 MILLI WATTS
Cs .05µ.F SELECTIVITY AT -6 db '. 10 KC/S ::u
RS IOOO OHMS
4700 OHMS
Cg 50µ.fd-12V SELECTIVITY AT -60db: 120KC/S >
R9 !:!
RtQ 100 OHMS TOTAL BATTERY DRAIN: 19 MILLIAMPS 0
n
*FOR FURTHER COMPONENT INFORMATION SEE PAGE 167 ::u
n
THREE TRANSISTOR REFLEX RECEIVER c
~
FIGURE 69 (I)
 Tz ::u
AUTOMATIC
>
0
BS-614G
0
T3*
20K/IK il
*T4
450il/V.C. n
ii
n
c
:f
U>

C12

~
J• "OL°'
SW
+

R 1 , - - - - 1500 OHM C1, C4,C5,-.02µfd L1, 435}lh!IO%

Rz,R5,R5,--10,ooo OHM C2, C 3 , - - .OIJ1fd L 2 , - - - - 250}lh! IO"lo
R3, - - - - 47,000 OHM C5, C11,-- 50>Jfd, 3V CR1, CR2,--IN64G OR EQUIV.
R 4 , - - - - 270 OHM C s , - - - - 15}lfd, 12V
Ll.C1-l 9 0· 6 } R/C MODEL 242
R s , - - - - 330 OHM C7, - - - 6>Jld, 6V Ll.C2-89.3
R 1 , - - - - 330,000 OHM C9, - .- - 50}lfd, 12V
NOMINAL SENSITIVITY: 600 MICROVOLTS/METER
R g , - - - - VOLUME CONTROL C10• - - - .002}lld, (MEASURED WITH 5 MILLIWATTS REFERENCE POWER OUTPUT)
10,000 OHM 1/2W AUDIO TAPER C12.---0.l>Jld MAXIMUM POWER OUTPUT: 75 MILLIWATTS
R 1 0 . - - - IOOO OHM TRI, - - - G.E. 2Nl68A CONVERTER SELECTIVITY AT -6db 10 KC/S
R 1 1 , - - - - 4700 OHM TR2,---G.E. 2Nl68A OR 2Nl69 REFLEX SELECTIVITY AT -60db 120 KC/S
R12----IOO OHM TR3,---G.E.2N241A AUDIO TOTAL BATTERY DRAIN 17.5 MILLIAMPS

* FOR FURTHER COMPONENT INFORMATION SEE PAGE 167

THREE TRANSISTOR REFLEX RECEIVER

FIGURE 70

~ ....,,,,., lr'Frctf ••?i•!l""' .,,_,~

m;'fR'""f •.•••.. ,t _._ 9'"'7'"'!!
 I I I
• • I I I I I I I I I
• I

AU10MATIC CR1 AUTOMATIC

BS725G BS725G AUTOMATIC
BS614G

I
I
I
I
I
I

'

L _________J SW

~
Ri.R7,R9,-IO,OOO OHM NOMINAL SENSITIVITY : 500 MICROVOLTS I METER
(MEASURED WITH 5 MILLIWATTS REFERENCE POWER OUTPUT)
R 12 -VOLUME CONTROL 10,000 OHM
MAXIMM POWER OUTPUT : 75 MILLIWATTS
• l/2W AUDIO TAPER C1.--.02p.fd SELECTIVITY AT -6db : 8.0 KC/S
R2.- 27,000 OHM C2, C3,-.0lp.fd SELECTIVITY AT -60db : 65.0KC/S
R3~1500 OHM C4,C5,C7, C9, Cg,- 05p.fd TOTAL BATTERY DRAIN : 2QO MILLIAMPS.
R4,R11,-470 OHM C5,-- 15p.fd, 12V
R5,-39,000 OHM CIQ - - Sp.fd, 12V
Rs,-330 OHM c 11 :--.1,,.td
Ra,-1800 OHM C12,-- IOOp.fd, 12V
RIQ, - 68,000 OHM C13,--50p.fd, 12V
R13,--'- IOOO OHM TRI,-- G.E. 2Nl68A CONVERTER
R14o-5600 OHM TR2, TR3,-G.E.2N293 ISTa 2ND l.F.
TR4,-- G.E. 2N241A OR 2N321 AUDIO
* R15,-68 OHM
Ti,--500!1/V.C. * L1,---4351'h, i:10%
** C.Ci.-l 9 0.S} R~ MODEL 242
6C2;--89.3
* L2-·- - - 250p.h, ±10%
CR ,CR2,-DRll7, IN64G,ORCK706A OR EQUIV.
1
:u
)o
c
if FOR FURTHER COMPONENT INFORMATION SEE PAGE 167 0
n
:u
0
FOUR TRANSISTOR SUPERHETERODYNE BROADCAST RECEIVER c
=tCD
FIGURE 71
 AUTOMATIC AUTOMATIC ;u
EX-05168 BS725G )o
0
0
0
;u
0
c
:j
Ul

~
00

R1, - - - 6800 OHM Ci. C4,C5,-.05,.fd NOMINAL SENSITIVITY : 300 MICROVOLTS I METER
R2, ---27,000 OHM C2,C3,--.0l,.fd (MEASURED WITH 5 MILLIWATTS REFERENCE POWER OUTPUT)
R3, ---1500 OHM C5,---15,.td, 12V MAXIMUM POWER OUTPUT : 75 MILLIWATTS
R4, R5,-470 OHM C7,C11,--.02f'fd, SELECTIVITY AT -6 db 8.0 KC/S
R5,---120,000 OHM C5,---6µfd, 12V SELECTIVITY AT -60db : 65.0 KC/S
Rs,---330 OHM Cg,Cio,C12 0 -50,.fd, 12V TOTAL BATTERY DRAIN: 18.0 MILLIAMPS
R1, ---12,000 OHM CR1,---DRll7,IN64G,OR CK706A OR EQUIV
R10,---47,000 OHM TR1 ---G.E. 2Nl68A CONVERTER
R11---10,ooo OHM TR2---G.E. 2N293 I. F.
R12. R13, -1000 OHM TR3---G.E. 2N192 OR 2N324 DRIVER
R14,---5600 OHM TR4 ---G.E. 2N241A OR 2N321 AUDIO
R15, - - - 6 8 OHM * T1 ---20Kn/600il
~ T2 - - - 5 0 0 il/V.C.
R 9 ,---~~~u~5~gN~:~t~o,ooo_,,_
* L i , - - - 4 3 5 ,.h ±10%
* t.C1,-ISO.S}R/C MODEL 242
it t.C2,-89.3
* L 2 , - - - 250 /"h ±10%
*FOR FURTHER COMPONENT INFORMATION SEE PAGE167

FOUR TRANSISTOR SUPERHETERODYNE BROADCAST RECEIVER

FIGURE 72

.,P,li[!':J ~ ~ ~l!'J~ ~ ~'I -~ft( ••·"!>'"'ll\ ~ _,.,.,yC••'!; ~~ •'··~·~'J

 I
• I. I I I I
• I I I I
• I I I

T1 IN64G T2 T3
AUTOMATIC AUTOMATIC
c A AUTOMATIC
BS-725G .~ BS-725G BS-614G

Ir-------, r-----
CR 1
* T4
2001

I f ~Ill,
n
R12

L1
lllf17l-- Li I II I i I I I HH I

R13

.i;:...
(,!:)

RI , - - - 1500 OHM C1 ,C11.---.02µfd L1,---- 435µh~IO%

R2, R 9 , - - I0,000 OHM C2,C3,C7,--.0lµfd L2, - - - 250µh±IO%
R3, - - - 15,000 OHM C4,C6,C9,-- .05µfd CR1, CR2,~ IN64G OR EQUIV.

~~=~g~~GJ
R4, - - - 2 7 0 OHM
C 5 , - - - 1 5 µ f d , 12 V RIC MODEL 242
Rs, - - - 5 6 , 0 0 0 OHM
Ce.---50µfd, 3 V
R5, - - - 330 OHM
C 1 0 . - - - 6 µ f d , 12 V
R7, - - - 3 3 0 0 OHM
C12.----50µfd, 12 V
Re, - - - 1 8 0 0 OHM
C13,----0.lµfd
RIO• - - - 6 8 , 0 0 0 OHM
C 1 4 - - - IOOµfd, 12 V NOMINAL SENSITIVITY: 150 MICROVOLTS/METER
R 1 1 , - - - - 4 7 0 OHM TR I - - - 2N168A CONVERTER (MEASURED WITH 5 MILLIWATTS REFERENCE POWER OUTPUT)
R12. - - - VOLUME CONTROL TR2 - - - 2N292 IST \.F. MAXIMUM POWER OUTPUT: 75 MILLIWATTS
10,000 OHM Y2 W AUDIO TAPER TR3 - - - 2N169 REFLEX
SELECTIVITY AT -6db
SELECTIVITY AT -60db
: 8.0 KC/S
: 65.0 KC/S
:u
)>
R13 1 - - - 39 OHM TR4 - - - 2N241A OR 2N321 AUDIO TOTAL BATTERY DRAIN : 25.0 MILLIAMPS
0
R 1 4 , - - - - 1000 OHM
* FOR FURTHER COMPONENT INFORMATION SEE PAGE 167
0
~
:u
0
SIX VOLT FOUR TRANSISTOR REFLEX RECEIVER c
-I
FIGURE 73 Ul
 :u
T3
>
c
TI IN64G T2
AUTOMATIC
BS-7256
C A AUTOMATIC 0
BS-Sl 4 G
11111111
1 DETECTOR
----, r-------l 1N64G 0
i
: CR1
!
I
_n r----U 0
c:
I =i
(I)
L R12

L1

R15

Cg I C10' +

J'~m
~
SW
R1
+

R1, R14,-- 1500 OHM C1, Cll• --.02}Jfd L1, 435,uh± 10%
R2,--- 6800 OHM C2, C3, C7, -.01,ufd L 2 , - - - - 250,uh:!:. IO'l'o
R3, - - - 27,000 OHM C4,C5,C9,C13- .05,ufd CR1,CR2-,--IN64G OR EQUIV.
R4, R11.--
Rs,---
470 OHM
82,000 OHM
C5, - - - 15,ufd, 12V
c 8 , - - - 50,ufd, 3V
~~12 _ :;~6} R/C MOOEL 242

Rs, - - - 330 OHM CIO• - - - 6,ufd, 12V

R1. R e - - - 3300 OHM C 1 2 . - - - 50,ufd, 12V NOMINAL SENSITIVITY: 200 MICROVOLTS/METER
R9,--- 10,0000HM C14, - - - IOO}Jfd, 12V !MEASURED WITH 5 MILLIWATTS REFERENCE POWER OUTPUT)
R 10• - - - 91,000 OHM TR1, - - - 2N168A CONVERTER MAXIMUM POWER OUTPUT: 75 MILLIWATTS
R12• - - - VOLUME CONTROL T R 2 , - - - 2N292 IST 1.F. SELECTIVITY AT -6db e.o KC/S
10,000 OHM AUDIO TAPER TR3, - - - 2Nl69 REFLEX SELECTIVITY AT -60db 60.0 KC/S
R13, - - - 100 OHM TR4, - - - 2Nl88A OR 2N320 AUDIO TOTAL BATTERY DRAIN : 17.0 MILLIAMPS
R 1 5 , - - - 120 OHM
*FOR FURTHER COMPONENT INFORMATION SEE PAGE 167

NINE VOLT FOUR TRANSISTOR REFLEX RECEIVER

FIGURE 74

~ ~ • •,,,,.'l S'c'l';Ft -i"r<!"'!! .,.,..;;,. ~ _...," .,,,,.

... ""~ .,,,,•••••11' .-•·•N•JI!
 I I
• I I
AUTOMATIC
I
;R1
I
AUTOMATIC
I I I
• I I I I I

BS725G BS725G
AUTOMATIC
BSSl4G
~--lCR
"' 2
'* T1

I
I
I
I
I
I
I __ - - --------

L ____________________ J SW

R7
CJl
......
R1 , - - - - s a o o OHM c,, .02pfd ~c 1 ,-1so.6}
R 2 , - - - - 27,000 OHM C2,C3, .Olpfd ~C2,- as.3 RIC MODEL 242
R3,----1500 OHM C4, Cs. C7, ca. Cg, C14.- .05pfd
R4,R11,R15,- 470 OHM C5, 15pfd, 12V
R s , - - - - sa,OOO OHM C10,C13, 6pfd, 12V
R s , - - - - 330 OHM C11,C15. 100pfd, 12V
R 1 , - - - - 2700 OHM Cl2• 50pfd, 12V
Ra, R1s.-- 3300 OHM TR1, G.E. 2NISaA CONVERTER
R g - - - - 10,000 OHM TR2, G.E. 2N293 IST l.F.
R 1 0 . - - - a2,000 OHM TR3, G.E. 2NIS9 2ND l.F.
R12 ,---VOLUME CONTROL TR4, G.E. 2N2S5 DRIVER
NOMINAL SENSITIVITY : 150 MICROVOLTS/ METER
10,000 OHM l/2W AUDIO TAPER TR5, G.E. 2Nla8A OR 2N320 OUTPUT
R13,---4700 OHM * T1, 500il/VC
(MEASURED WITH 5 MILLIWATTS REFERENCE POWER OUTPUT)
MAXIMUM POWER OUTPUT: 75 MILLIWATTS.
R14 , - - - 5S,OOO OHM L1, 435ph!IO% SELECTIVITY AT -6db: a.O KC /S.
R17,---5SOO OHM L2, 250ph!IO% SELECTIVITY AT -60db: 65.0KC/ S. :u
R 1 a . - - - 1000 OHM CR1, CR2, DRll7, INS4G OR CK70SA TOTAL BATTERY DRAIN: la.O MILLIAMP$. >
R 1 9 , - - - Sa OHM 0
*FOR FURTHER COMPONENT INFORMATION SEE PAGE 167 0
9
:u
n
FIVE TRANSISTOR SUPERHETERODYNE BROADCAST RECEIVER c
FIGURE 75 =i
(I)
 AUTOMATIC
BS725G
CR 1 AUTOMATIC
BS725G
AUTOMATIC
BS614G * T2 ill
)>
0
0
n
lJ
n
c
~
(I)

-'
~
R1, Ra ,--10,000 OHM c 1,---.02p.fd C1z-.003p.fd NOMINAL SENSITIVITY: 250 MICROVOLTS I METER
R2, -·---33,000 OHM C2,C3, --.Olp.fd (MEASURED WITH 5 MW REFERENCE POWER OUTPUT)
C4,C5 ,C7 ,C5,C9 , - .05p.fd MAXIMUM POWER OUTPUT: 100 MILLIWATTS.
R3, R11. --470 OHM
SELECTIVITY AT -6 db 8.0 KC /S
R4, - - - 2 7 0 OHM C5 ,C1Q,--6p.fd ,6V
SELECT! VITY AT -60db 65.0 KC/S
R5 ,---12,000 OHM C11,C13,C14,-50p.fd, 6V ZERO SIGNAL BATTERY DRAIN : 7.0 MILLIAMP$.
Rs,---330 OHM C15,---0.lp.fd
R1,---1500 OHM TR1 - - - G . E . 2Nl6BA CONVERTER
Rg,---2700 OHM TR2---G.E. 2N293 IST 1.F.
R10,---l8,000 OHM TR3---G.E. 2N169 2ND 1.F.
R13,---4700 OHM TR4---G.E. 2Nl92 OR 2N324 DRIVER
R14 ,---15,000 OHM TR5 ,TR5,-G.E. 2N188 AUDIO
R15,---390 OHM -*"Ti ---2600/2600.n.. CT.
Rl6 , - - - 1 0 0 OHM
R17, - - - 3 9 OHM
** T2----300nCT/V.C.
LI , - - 435p.h ± 10%
R19,R19,--5.0 OHM
R12• -VOLUME· CONTROL 10,00C * ~~1'.CR2, g~~l7,~~~~G,ORCK706A OR EQUIV.
25

** t>C
OHM 112 W AUDIO TAPER 190 6
I'--- · }R/C MODEL 242
t.C2 . - - - 89. 3

* FOR FURTHER COMPONENT INFORMATION SEE PAGE 167

THREE VOLT BROADCAST RECEIVER
CAN BE POWERED BY SUN OR FLASHLIGHT BATTERIES
FIGURE 76

~ ~ ~~ ~ ~··~ -ec<l;""l! ~ ~ .,,.,,,

.. ~
~ ~~=~ ~-"""!! 91"''·'"!11 ~
 I I I I I I I I I I
• I I I
• •
AUTOMATIC AUTOMATIC AUTOMATIC
BS-725G BS-725G BS-614G
T1 CR1 T2 T3

R12

I
I
I
C1l I
(JJ
I I
L-----------------~
Ru

R1.R5, 10,000 OHM C1. .02p.fd.

R2• 15,000 OHM C2, C3, C5, C5, C7, C5, - .Olp. fd.
R3, 1500 OHM C4,C10• 6p.fd.
R4, 270 OHM "Cg, .05p.fd. NOMINAL SENSITIVITY : 200 MICRO VOLTS I METER
R5, 47,000 OHM Cu, C12•Cl3• 50p.fd. (MEASURED WITH 50 MILLIWATTS REFERENCE POWER)
R5, 220 OHM C14. .2p.fd. MAXIMUM POWER OUTPUT : 200 MW
R1,R9,---2200 OHM CRl,CR2, IN64G OR EQUIV SELECTIVITY AT-6 db : 8.0 Kc/$
R10• 1000 OHM TR1, G.E. 2Nl68A SELECTIVITY AT-60 db : 60.0 Kc/$
R11.R14.--- 4700 OHM TR2, G. E. 2N293 ZERO SIGNAL BATTERY DRAIN: B MILLIAMP$
R12. VOLUME CONTROL TR3, G. E.2Nl69
10,000 OHM 112W AUDIO TAPER TR4, G. E.2Nl92
R13, 68,000 OHM TR5, TR5, G.E. 2Nl88
R15. 470 OHM * T4 =36000/2000£1 CT
:u
* >
Rl6• 100 OHM ~ •3600CT/VC c
R17,R15,----8.2 OHM
0
R19, 330HM
* FOR FURTHUR INFORMATION SEE PAGE 167 0
:u
0
SIX VOLT SIX TRANSISTOR BROADCAST RECEIVER
c
-i
FIGURE 77 Ul
 ;u
)>
AUTOMATIC
BS~
CR1 c
TR5 *T2 0
0
;u
0
c
~
Ul

C11
~

R19, R19, - - 8.2 OHM * LI - - - 435)Jh !:10%

R 1 , - - - - 6800 OHM
R 2 , - - - · - 27,000 OHM c,, ----.021'-fd * L2 - - - 250)Jh 110%
CR1,CR2,- DRll7,IN64G, OR CK706A OR EQUIV.
R3,---1500 OHM C2, C3, - - .Olpfd
R4,R10,R15,- 470 OHM C4,C5,C7,C9,-.05,ufd ** ACI, - l90. 6l RIC MODEL 242
AC2-89.3j ·
R5, - - - 68,000 OHM C5, CIO• - - 6pfd, 12V
R5, - - - 330 OHM Cg, - - - .05)Jfd
R7, - - - 3300 OHM C1 I• - - - .003pfd
R 9 , - - - IO,OOOOHM C12,C13,C14, - 50pfd,12V
TR1 1 - - - G.E. 2Nl68A CONVERTER
Rg, - - - 82,000 OHM
TR2 1 - - - G.E. 2N293 IST l.F. NOMINAL SENSITIVITY= 200 MICROVOLTS I METER
R1 i, - - - 2700 OHM
TR3, - - - G.E. 2Nl69 2ND 1.F. (MEASURED WITH 50 MILLIWATTS REFERENCE POWER OUTPUT)
R12, - - - VOLUME CONTROL
10,000 OHM l/2W AUDIO TAPER TR4, - - - G.E. 2Nl92 OR 2N324 DRIVER MAXIMUM POWER OUTPUT .6 WATTS.
TR5,TR5,- G.E. 2N188A OR 2N320 AUDIO SELECTIVITY AT -6db 8.0 KC/S
R13, - - - 4700 OHM
* T1, - - - 5,000 I 26000 CT SELECTIVITY AT -60db: 60.0 KC /S
R14, - - - 56,000 OHM
R15, - - - 220 OHM
* T2, - - - 2500 CT/V.C. ZERO SIGNAL BATTERY DRAIN 7.0 MILLIAMPS.

R 1 7 , - - - 33 OHM
* FOR FURTHER COMPONENT INFORMATION SEE PAGE 167

SIX TRANSISTOR SUPERHETERODYNE BROADCAST RECEIVER

FIGURE 78

.,,,,..'!: •".""'''~ ··/'4' r~ ~i IF"-"?!• ·:.;·1t-·t·; 9'.-?:~J~ S'Y""'" mi~.,

.,,.,._ •. 'I! _..,,,.•,.,'I
~
 • • • • I I I I I I I I I I
• I

AUTOMATIC CR 1 AUTOMATIC AUTOMATIC

EXO~ EX05460 *T2
EX0-3015 OR
BS614G

= 12V
en
en J+
~ SW.
-'
R1, R11,--6800 OHM c 1,----.02JJfd * Ti.----2000/2600 CT.
R2,----33,000 OHM
R3,----1500 OHM
C2, C3,--.0IJJfd * T2,----200Q CT/VC
C4,Cs,C7,C9,-. l,ufd L1,----435)Jh:!:IO%
R4, R10.R15,-470 OHM C5,---6,ufd, 12V L2,----250)Jh± 10%
R5,----100,ooo OHM Cg,----.05JJfd
R 5 , - - - - 330 OHM AC1.-l 9 0.S} R/C MODEL
C10.---6,ufd, 6V AC2,-a9.3
R7, R13,-- 4700 OHM C11,---.003)Jfd
CR1,CR2--IN64 OR IN295 OR EQUIV.
R a , - - - - 2200 OHM C12.C13,C14,-50)Jfd, 12V
Rg,----27 00 OHM C15----.2JJfd
R12.---VOLUME CONTROL TR1,---G.E. 2Nl68A
10,000 OHM l/2W AUDIO TAPER CONVERTER NOMINAL SENSITIVITY: 150 MICROVOLTS/METER
R14,---15,000 OHM TR2, ---G.E. 2N2931ST. I.F: (MEASURED WITH 50 MILLIWATTS REFERENCE
R1s.---220 OHM TR3, ---G.E. 2Nl69 OR 2ND. I.F. POWER OUTPUT) ::u
)o
MAXIMUM POWER OUTPUT : I WATT
R17.---2700 OHM TR4, ---G.E. 2Nl92 OR 2N324 DRl\IE
SELECTIVITY AT -6db : 8.0 KC/S c
R1a, R19,-- IO OHM
R2o,---33 OHM
TR5,TR5,--G.E. 2Nla8A OR 2N320 AUDIO 1&2
WITH CLIP-ON HEAT SINK
SELECTIVITY AT-60db : 3a.O KC/S 0
ZERO SIGNAL BATTERY DRAIN: IO MILLIAMPS
~
*FOR FURTHER COMPONENT INFORMATION SEE PAGE 167 ::u
0
SIX TRANSISTOR, 1 WA TT RECEIVER c
FIGURE 79 -t
(I)
 UNIJUNC TION TRANSIS TOR CIRCUIT S

The unijunction transistor is a three-terminal semiconductor device which has

electrical characteristics that are quite different from those of conventional two-junction
transistors. Its most important feature is its highly stable negative resistance character-
istic which permits its application in oscillator circuits, timing circuits and bistable
circuits. Circuits such as sawtooth generators, pulse generators, delay circuits, multi-
vibrators, one-shots, trigger circuits and pulse rate modulators can be greatly simplified
by the use of the unijunction transistor.

THEORY OF OPERATION

The construction of the unijunction transistor is shown in Figure 81. Two ohmic
contacts, called base-one (Bl) and base-two (B2) are made at opposite ends of a
small bar of n-type silicon. A single rectifying contact, called the emitter ( E), is made
on the opposite side of the bar close to base-two. An interbase resistance, Ras, of
between 5K and lOK exists between base-one and base-two. In normal circuit opera-
tion, base-one is grounded and a positive bias voltage, V ss, is applied at base-two.
With no emitter current flowing, the silicon bar acts like a simple voltage divider
(Figure 82) and a certain fraction, 17, of V ss will appear at the emitter. If the emitter
voltage, VE, is less than 11 V ss, the emitter will be reverse-biased and only a small
emitter leakage current will flow. If VE becomes greater than 11 Vas, the emitter will be
forward biased and emitter current will flow. This emitter current consists primarily
of holes injected into the silicon bar. These holes move down the bar from the emitter
to base-one and result in an equal increase in the number of electrons in the emitter
to base-one region. The net result is a decrease in the resistance between emitter and
base-one so that as the emitter current increases, the emitter voltage decreases and a
negative resistance characteristic is obtained (Figure 84).

OHMIC
82 CONTACTS
P-N EMITTER
Bl JUNCTION
N-TYPE
SILICON BAR

Symbol for unijunction transistor with Construction of unijunction transistor-

indentification of principle voltages and cross sectional view
currents
FIGURE 80 FIGURE 81

The operation of the unijunction transistor may be best understood by the repre-
sentative circuit of Figure 82. The diode represents the emitter diode, Rs1 represents
the resistance of the region in the silicon bar between the emitter and base-one and
Rs2 represents the resistance between the emitter and base-two. The resistance Rs1
varies with the emitter current as indicatd in Figure 83.
56
• UNIJUNCTION TRANSISTOR CIRCUITS

IE RBI
B2
(MA·) (OHMS)

• E
0
I
4600
2000
2 900
5 240
• Bl Bl
10
20
50
150
90
40
Unijunction transistor representative Variation of RB1 with IE in representa-
• circuit
FIGURE 82
tive circuit (typical 2N492)
FIGURE 83

The large signal properties of the unijunction transistor are usually given in the
• form of characteristic curves. Figure 84 gives typical emitter characteristic curves as
plots of emitter voltage vs. emitter current for fixed values of interbase voltage. Figure
85 gives typical interbase characteristic curves as plots of interbase voltage vs. base-two

• current for fixed values. of emitter current. On each of the emitter characteristic curves
there are two points of interest, the peak point and the valley point. On each of the
emitter characteristic curves the region to the left of the peak point is called the cut-off
region; here the emitter is reverse biased and only a small leakage current flows. The
• region between the peak point and the valley point is the negative resistance region.
The region to the right of the valley point is the saturation region; here the dynamic
resistance is positive and lies in the range of 5 to 200.

• :~
I" I

I ~ I

I /PEAi< POiNTS

• I
~/
I

\
I

I ~ti
~ 10
//
/
!~OMA
t-i--t-/+,,~-+--+-~-+---+~=--+-=+--+--+-+-+-t---t-i--t-+-1

\ I \ '
~ Sf----+--+/-+-+----+-/--+-l-/-t.-<-+--+--+-t---4~IE~.,O-M+A-+----+---+--+--+-+---<

• I
\
~ \
I

f :r---t11--t/---f/--+--+--:b-t=-+f---+--+---+--+--t=7<tt.r-t-i--t~-1
.-- / . . . . . J.-- ~·~MA
\ \ ~ 6 1--/r---.i'
/'-/+/,,.!<':+--+--tc----+_-+_-f=~=,~='f=-t---tIE-.21,.,,~·.,-JA-+--c----1
"' ~ 51---JfL/-fT'+~-+l.--"--b-i-""f'-+--f-~_\---t-~f----+----=1=-f-'~---!---i--+---i
\ \. '-
\ '\.
~ ,...._ ~ 4 / / L---- i -~I---~ - lE"O

• '
' '-
'
'-....
'r-- ,....__
15V
v98·30Y
---r-i
__

V99•2011
[VRR"OY
~ : I I/
/I/
_...,.....-......-
--~i.--
I

pp-
"'-...._ i

5V

v
/' - I .1
VALILEY IPO'ITS
INTERBASE VOLTAGE -Vee-VOLTS

• I 2

Typical emitter characteristics

3 4

E~ITTER
5 6 7 8 9

CURRENT- IE - MILLIAMPERES
10 tr 12 13 14

Typical interbase characteristics

(type 2N492) (type 2N492)

• PARAMETERS-DEFINITION AND MEASUREMENT

FIGURE 84 FIGURE 85

1. RBB - Interbase Resistance. The interbase resistance is the resistance measured

• between base-one and base-two with the emitter open circuited. It may be measured
with any conventional ohmmeter or resistance bridge if the applied voltage is five
volts or less. The interbase resistance increases with temperature at about 0.8% /°C.

• This temperature variation of RBB may be utilized for either temperature compensation
or in the design of temperature sensitive circuits.
2. 71 - Intrinsic Stand-off Ratio. This parameter is defined in terms of the peak
point voltage, VP, by means of the equation: VP 11VBB + Vo . . . where Vo is =
• about 0.70 volt at 25°C and decreases with temperature at about 3 millivolts/°C. It is
57
UNIJUNCTION TRANSISTOR CIRCUITS

found that .,, is constant over wide ranges of temperature and interbase voltage. A
circuit which may be used to measure T/ is shown in Figure 86. In this circuit Ri, C1,
and the unijunction transistor form a relaxation oscillator and the remainder of the
circuit serves as a peak voltage detector with the diode automatically subtracting the
voltage Vn. To use the circuit, the voltage V1 is set to the value desired, the "cal."
button is pushed and Rs adjusted to make the meter read full scale. The "test" button
is then pushed and the value of T/ is read directly from the meter ( 1.0 full scale). If
the voltage V1 is changed, the meter must be recalibrated.
3. h - Peak Point Current. The peak point current corresponds to the emitter
current at the peak point. It represents the minimum current which is required to fire
the unijunction transistor or required for oscillation in the relaxation oscillator circuit.
IP is inversely proportional to the interbase voltage. IP may be measured in the circuit
of Figure 87. In this circuit, the voltage V1 is increased until the unijunction transistor
fires as evidenced by noise from the loudspeaker. V1 is then reduced slowly until the
unijunction ceases to fire and the current through the meter is read as h.

+V1 oo-------a 2011-a

5V-40V
+v, .----o+Vee
0- 200V

I0014a

TIST CIRCUIT FOR INTRINSIC STANDOFF RATIO (7,) TIST CIRCUIT FOR PEAK POINT EMITTER
CUllENT (IP)
FIGURE 86 FIGURE 87

4. VP - Peak Point Emitter Voltage. This voltage depends on the interbase voltage
as indicated in (2). VP decreases with increasing temperature because of the change
in Vn and may be stabilized by a small resistor in series with base-two.
5. VE (sat) - Emitter Saturation Voltage. This parameter indicates the forward
drop of the unijunction transistor from emitter to base-one when it is conducting the
maximum rated emitter current. It is measured at an emitter current of 50 ma and
an interbase voltage of 10 volts.
6. Is2 (mod) - Interbase Modulated Current. This parameter indicates the effective
current gain between emitter and base-two. It is measured as the base-two current
under the same condition used to measure VE (sat).
7. IEo - Emitter Reverse Current. The emitter reverse current is measured with
60 volts between base-two and emitter with base-one open circuit. This current varies
with temperature in the same way as the Ico of a conventional transistor.
8. Vv - Valley Voltage. The valley voltage is the emitter voltage at the valley
point. The valley voltage increases as the · interbase voltage increases, it decreases
with resistance in series with base-two and increases with resistance in series with
base-one.
9. Iv - Valley Current. The valley current is the emitter current at the valley
point. The valley current increases as the interbase voltage increases and decreases
with resistance in series with base-cine or base-two.
58
• RELAXATION OSCILLATOR
UNIJUNCTION TRANSISTOR CIRCUITS

The relaxation oscillator circuit shown in Figure 88 is a basic circuit for many appli-
• cations. It is chiefly useful as a timing circuit, a pulse generator, a trigger circuit
or a sawtooth wave generator.
+V1

-B
R2 - --- --- - - - VE (MAX)
V
E
V 82

V Bl
VE
_U]Zj_
! : ___
V9 I __)\___J\_J\_
1
VE (MIN)
BASIC RELAXATION OSCILLATOR
WITH TYPICAL WAVEFORMS
V92~
FIGURE 88
• R3

Conditions for Oscillation.

• V1 - VP > I V1 - Vv <I
R1 p, R1 v
It is found that these conditions are very broad permitting a 1000 to 1 range of Ri

• from about 2K to 2M. R2 is used for temperature compensation, its value may be cal-
culated from the equation:
~ 0.65 RBB
R2= .,,v1
The maximum and minimum voltages of the emitter voltage waveform may be
calculated from:
VE (max.) =VP= .,,vBB + 0.7
VE (min.) ==: 1/2 VE (sat)
• The frequency of oscillation is given by the equation:
1
f ==: RiC In ( ~ .,, )
• 1
and may be obtained conveniently from the nomogram of Figure 89.
RESISTANCE - RI - KI LO HMS
0

• ... ...
0 0
,._ 0
,._
•. ! I I I

•
•
MAXIMUM FREQUENCY

NON ON" " ' 0"'"" H m

TYPES
7
7""
2N4J1, 2N492

2 N 490

FREQUENCY - f - eve LES PER SECOND T/. 0.56

•
• NOMINAL FREQUENCY TYPES 2N 493, 2N 494

• 1 11 1 , 1 , 1 ' 1 1 '"""""'I' l'I' I'

gdcicidci
L. . , , I' I 'I,,' l'""""I'
d6~gq~
CAPACITANCE - C- MICROFARADS
q
I
,._
0
~
I I
"'0
~

• Nomogram for calculating frequency of relaxation oscillation

FIGURE 89

59
UNIJUNCTION TRANSISTOR CIRCUITS
rI
The emitter voltage recovery time, tvE, is defined as the time between the 90% f!'

and 10% points on the emitter voltage waveform. The value of tvE is determined ~· ·
primarily by the size of the capacitor C in Figure 88 and may be obtained from I
Figure 90.
100
;;;
~ 50 MAX 80"1.

~ 30 >-+-H-+-t-++---+-+-+-++ -++++--+-+-+-->-++<>++ ---+---+--+-+-t-++ffo',, MEAN -

20 MIN eo•/;
,, f'
~ •" ~
!
.!.
10
i
----
5
~
w (I;,ls1•I4
I•
:E 2
t= ~tr~
...J
...J
~
.OOI .01 0.1 1.0 10
CAPACITANCE -C-(MICROFARADS)

Recovery time of unijunction transistor relaxation oscillator vs. capacity

FIGURE 90

The pulse amplitude at base-one or base-two may be determined from the equations:
[VP - 1/2 VE (sat)] C
IE(peakl 2:: tvE

h2 (mod) _ , - -
IB2 (pen kl 2:: 7 'J IE(peakl

SAWTOOTH WAVE GENERATO R

The circuit of Figure 91 may be used as a linear sawtooth wave generator. The NPN
transistor serves as an output buffer amplifier with the capacitor C2 and resistor R2
serving in a bootstrap circuit to improve the linearity of the sawtooth. The output of
the circuit shown has an amplitude of about 12 volts peak to peak and a frequency of
about 2 Kc. Note that a negative synchronizing pulse may be used at base-two.

SYNC l.OC2
Ir
2N335
2Nl69A

2.2K OUTPUT /Vt

-----Q -IOV

UNEAR SAWTOOTH GENERATOR

FIGURE 91

MULTIVIBRA TOR

Figure 92 shows a unijunction transistor multivibrator circuit which has a frequency

of about 1 Kc. The conditions for oscillation of this circuit are the same as for the
relaxation oscillator. The length of time during which the unijunction transistor is off
(no emitter current flowing) is determined primarily by R1. The length of time during
60
• UNIJUNCTION TRANSISTOR CIRCUITS

which the unijunction transistor is on is determined primarily by R2. The periods may
be calculated from the equations:
• ti = R1C In [V1
V1 -_ VE]
Vp

t2 = R2C In [V1 + ~: - VE J
• Where VE is measured at an emitter current of IE= Vi (~:-it R
2
) and may be obtained
from the emitter characteristic curves .

•
+ v,
• + 25V

•
Vo
• HD6001

•
• UN/JUNCTION TRANSISTOR MUlTIVIBRATOR
WITH TYPICAL WAVE FORMS
FIGURE 92

• An NPN transistor may be direct coupled to the multivibrator circuit by replacing

the diode as shown in Figure 93. This circuit has the advantage that the load does
not have any effect on the timing of the circuit .

•
• RELAY

•
•
• --
• Unijunction transistor multivibrator used to drive NPN transistor
FIGURE 93

61
UNIJUNCTION TRANSISTOR CIRCUITS

HYBRID MULTIVIBRATO R

The circuit of Figure 94 illustrates how the unijunction transistor may be used in
conjunction with conventional transistors to obtain the maximum advantages of each.
· The two PNP transistors form a conventional flip-flop with the unijunction serving the
timing and· triggering function. The timing capacitor CT is charged alternately through
RT1 and RT2. The advantages obtained by a circuit of this type are:
(1) The two periods may be adjusted independently over a range
of as much as 1000 to 1. (2) The output at the collector of each of the
transistors is very nearly an ideal rectangular waveform. (3) The circuit
will tolerate large changes in Ico or beta of the transistors. It is not
prone to "lock-up" or non-oscillation. (4) The timing stability is very
good. (5) A small timing capacitor CT may be used, avoiding the use
of electrolytic capacitors in many applications .

.-------.-----------'!~-<> - 20 v

4.?n

HYBRID MULTNIBRATOR
ffATUllNG WIDE IANGI OPllATION
FIGURE 94

RE-LAY DELAY
Figure 95 shows the use of the unijunction transistor to obtain a precise delay in
the operation of a relay. When the switch SWl is closed, the capacitor C is charged to
the peak point voltage at which time the unijunction transistor fires and the capacitor
discharges through the relay thus causing it to close. One set of relay contacts hold the
relay closed. For supply voltages of 30 volts or above, about one second of delay can
be obtained per microfarad of capacitance.
RELAY
CONTACTS
.------+-----. '-o.-o+25V
SWI
3K-300K
CHOOSE FOR
DESIRED PERIOD

1-IOOMFD

TIME DELAY CIRCUIT WITH RELAY

FIGURE 95

62
•
TRANSIS TOR SWITCH ES
• A switch is characterized by a high resistance when it is open and a low resistance
when it is closed. Transistors can be used as switches. They offer the advantages of no
• moving or wearing parts and are easily actuated from various electrical inputs. Transis-
tor collector characteristics as applied to a switching application is shown in Figure 96.
The operating point A at which le =loo/I-a indicates the transistor's high resistance

•
•
• VcE

COLLECTOR
-

CHARACTERISTICS

FIGURE 96

• when Is = 0. Since 1-a is a small number, le may be many times greater than loo.
Shorting the base to the emitter results in a smaller le. If the base to emitter junction
is reversed biased by more than .2v, le will approach loo. Reverse biasing achieves
• the highest resistance across an open transistor switch.
When the transistor switch is turned on, the voltage across it should be a minimum.
At operating point B of Figure 96, the transistor is a low resistance. Alloy transistors

• such as the 2N525 have about one ohm resistance when switched on. Grown junc-
tion transistors, such as the 2N 167 have approximately 80 ohms resistance which
makes them less suitable for high power switching although they are well suited for
high speed computer applications. In order that a low resistance be achieved, it is
• necessary that point B lie beyond the knee of the characteristic curves. The region
beyond the knee is referred to as the saturation region. Enough base current must
be supplied to ensure that this point is reached. It is also important that both the on

• and off operating points lie in the region below the maximum rated dissipation to
avoid transistor destruction. It is permissible, however, to pass through the high dissi-
pation region very rapidly since peak dissipations of about one watt can be tolerated
for a few microseconds with a transistor rated at 150 mw. In calculating the Is neces-
• sary to reach point B, it is necessary to know how hFE varies with le. Curves such as
Figure 97 are provided for switching transistors. Knowing hFE from the curve gives

•
,,-----·-,______
• /

-r--__ ::::::::::::
--
-~2N!i27
FIGURE 97

~--r--+-_l2N!i2~ I

•
• -80 -100 -120
COlLECTORCURl'IENTic(MA)

0 C BASE CURRENT GAIN {hFE: l VS COLLECTOR CURRENT

63
TRANSISTOR SWITCHES

Is min since Is min = hicFE . Generally Is is made two or three times greater than Is min

to allow for variations in hFE with temperature or aging. The maximum rated collector
voltage should never be exceeded since destructive heating may occur once a transistor
breaks down. Inductive loads can generate injurious voltage transients. These can be
avoided by connecting a diode across the inductance to absorb the transient as shown
in Figure 98.

DIODE
IN34 FOR SMALL INDUCTANCE
IN91 FOR LARGE INDUCTANCE

DIODE USED TO PROTECT TRANSISTOR FROM INDUCTIVE

VOLTAGE TRANSIENTS

FIGURE 98

Lighted incandescen t lamps have about 10 times their off resistance. Consequent ly,
Is must be increased appreciably to avoid overheating the switching transistor when
lighting a lamp.
A typical switching circuit is shown in Figure 99. The requirement is to switch a
- 25V

125n Ic • 801-' A
TYPICAL VALUES

SWITCH OPEN
r
I
5 WATTS
I:c • 0.2A SWITCH CLOSED

I: 5 • IOmA • CURRENT THROUGH SWITCH

Yee• .19V SWITCH CLOSED

2N525

vbe: .48V SWITCH CLOSED

INPUT POWER : 15 MILLIWATTS

LOAD POWER • 5 WATTS

Typical transistor switch application

FIGURE 99

200 ma current in a 25 volt circuit, delivering 5 watts to the load resistor. The
mechanical switch contacts are to carry a low current and be operated at a low voltage
to minimize arcing. The circuit shown uses a 2N525. The lK resistor from the base
to ground reduces the leakage current when the switch is open. Typical values are
indicated in Figure 99.

TEMPERA TURE EFFECTS ON SWITCHIN G CIRCUITS

At high junction temperature s, Ico can become a problem. In the off condition,
both the emitter and collector junctions are generally reverse-bias ed. As a rule, the
bias source has an appreciable resistance permitting a voltage to be developed across
the resistance by Ico. The voltage can reduce the reverse bias to a point where the
base becomes forward biased and conduction occurs. Conduction can be avoided by
reducing the bias source resistance, by increasing the reverse bias voltage or by
reducing Ico through a heat sink or a lower dissipation circuit design.
i
64
 TRANSISTOR SWITCHES

The Ico of a transistor is generated in three ways. One component originates in

the semiconductor material in the base region of the transistor. At any temperature,
Ill
there are a number of interatomic energy bonds which will spontaneously break into
a hole-electron pair. If a voltage is applied, the hole and electron drift in opposite
directions and can be seen as the Ico current. If no voltage is present, the hole and
• electron eventually recombine. The number of bonds that will break can be predicted
theoretically to double about every 10°C in germanium transistors and every 6°C in
silicon. Theory also indicates that the number of bonds broken will not depend on

• voltage over a considerable voltage range. At low voltages, Ico appears to decrease
because the drift field is too small to extract all hole-electron pairs before they recom-
bine. At very high voltages, breakdown occurs.
A second component of Ico is generated at the surface of the transistor by surface
II energy states. The energy levels established at the center of a semiconductor junction
cannot end abruptly at the surface. The laws of physics demand that the energy levels
adjust to compensate for the presence of the surface. By storing charges on the surface,

• compensation is accomplished. These charges can generate an Ico component; in fact,

in the processes designed to give the most stable Ico, the surface energy levels con-
tribute much Ico current. This current behaves much like the base region component
with respect to voltage and temperature changes. It is described as the surface
• thermal component in Figure 100.

BASE

•
0 •HOLE
• • ELECTRON MATERIAL
ARROWS SHOW DIRECTION Ico
OF CARRIER DRIFT

EMITTER

•
,,.,Q?

•
COLLECTOR
O•O.
SURFACE/~ 'SURFACE
THERMAL
LEAKAGE
CURRENT Ico
CROSS- SECTION OF PNP ALLOY
TRANSISTOR SHOWING REGIONS GENERATING I CO

• (A)

• I
I LOW
..r---mrtNGE BRREtG~gzwN II
I

CURVES A-INDICATE THE BASE REGION Ico

: I CURVES 8- INDICATE THE SUM OF BASE REGION

• Ico
I
I
I

:
I
I
I ,,,,f
I
SURFACE LEAKAGE
Ico
- - AND SURFACE THERMAL Ico
CURVES C-INCLUOE THE SURFACE LEAKAGE
- - COMPONENT ANO INDICATE THE
MEASURED !co

l-----f------1"" I
• /I SURFACE THERMAL

,r--e;s1;E~o-;; ~;;- -i
COLLECTOR VOLTAGE
Ico I/

COLLECTOR VOLTAGE

VARIATION OF lco COMPONENTS VARIATION OF I CO COMPONENTS

WITH COLLECTOR VOLTAGE WffH TEMPERATURE

( 8) ( C)

• FIGURE 100

65
TRANSISTOR SWITCHES I
A third component of loo is generated at the surface of the transistor by leakage
across the junction. This component can be the result of impurities, moisture or surface
imperfections. It behaves like a resistor in that it is relatively independent of tempera-
ture but varies markedly with voltage. Figure lOO(a) shows the regions which contribute
I
to the three components. Figure lOO(b) illustrates how the components vary with
voltage. It is seen that while there is no way to measure the base region and surface
energy state components separately, a low voltage loo consists almost entirely of these
I
two components. Thus, the surface leakage contribution to a high voltage loo can be
readily determined by subtracting out the low voltage value of Ico.
Figure lOO(c) shows the variation of loo with temperature. Note that while the
surface thermal and base loo components have increased markedly, the leakage com-
ponent is unchanged. For this reason, as temperature is changed the high voltage loo
will change by a smaller percentage than the low voltage loo. I
I
•oo.oc::::=i=::::::i:::::::::::i:::::=:E~E=E::::;a
!~~r--+--+--+---+---+-+--+--+-1
500 f---+---+-+-,---lr'.,'--l---.l/./"'---1
I
.'ff' / /

I
I

l
I
;

~$t=;$/$$=$$$=$=!=1"' !
I }
~

~ v
v
I
l'"~vD'*'"-N·-"'·ttE·-
.., r=:

ID
I

4Q 2t1 0 +20+4QffO+I0+100
T,IN"C
I
COLLECTOR CUTOFF CURRENT VS IO 20 JO 40 !IO IO ·'27rf ~!<f'~~4d'-oo"~~.rf~~,rfc---e~rf~•rf

I
TEMPERATURE NORMALIZED TO 2!5•C
TElif'ERATUfllE,fA("C) T,·JUNCTION TEMPERATURE-DEGREES CENTIGRADE
INTERMEOtATEGRIOSAREATZ,4,6,8

(A) ( B) (C)

FIGURE 101

Figure 101 shows the variation of loo with temperature and voltage for a number
I
of transistor types. Note that the three curves for the 2N396 agree with the principles
above and show a leakage current less than one microampere.
The variation of current gain at high temperatures is also significant. Since hFE is
defined as Io/Is, hFE depends on loo since le ~ hre (Is + Ico). If Is 0 i.e., if the base =
I
=
is open circuited, a collector current still Hows, Io hrelco. Thus hFE is infinite when
Ia = 0. As base current is applied, the ratio le/Is becomes more meaningful. If hFE
is measured for a sufficiently low le, then at a high temperature hrelco will become
I
equal to le. At this temperature hFE becomes infinite since no Is is required to maintain
le. The AC current gain ·hre, however, is relatively independent of Ico and generally
increases about 2:1 from -55°C to+ 85°C.
The different electrical properties of the base, emitter and collector regions tend
I
to disappear at high temperatures with the result that transistor action ceases. This
temperature usually exceeds 85°C and 150°C in germanium and silicon transistors
respectively.
I
At high junction temperatures, it is possible for the transistor to heat itself regen-
eratively until it destroys itself. The factors which enter into this problem are Ico, VcB,
and collector load resistance and the thermal impedance of the transistor. If the load I
66
I
• TRANSISTOR SWITCHES

resistance is large enough, it can limit the transistor dissipation to a safe value; other-
wise, the transistor is heated by Ico X VcB. As the temperature rises, this heating can
• become appreciable.
The following procedure, illustrated in Figure 102 gives a conservative estimate of
the run-away temperature for a transistor with both junctions reverse biased. Thermal
• run-away will occur at the temperature where the rate at which Ico increases heating,
exceeds the thermal derating factor. To calculate this temperature, let us assume a
1°C rise in junction temperature. The increased heating due to the rise will be, 0.08
Ico ( Vcc - 2Rdco), since Ico increases about 8 % per 1 ° C. If this power will in fact
• raise the junction temperature by 1°C according to the derating factor, run-away occurs.

CIRCUIT Vcc =
30 volts. The solution by

• RL. I K Vee •-30V

substitution is
IeoM = 1. 75 ma or 13.2 ma.

+IV~
The smaller value is always the correct
one.
Using Ieo = 10 µa max at T1 =
II 25°C, from Figure lOlA,
TJ = l00°C when Ico = 1.75 ma.
Heating due to IcoM is
CALCULATE P = leoM (Vee - RL lcoM) =49.5mw .
• 0.08 IeoM ( Vcc - 2RL lcoM) = l/K
Rise in junction temperature above
ambient temperature is

..
where Ico at run-away tempera- KP= (.27) (49.5) = 13.4°C = TJ
ture = IcoM. Use: -TA
Data from specifications TA = 86.6°C = thermal run-away
temperature.
K = .27°C/mw
Since worst condition values were
Data from circuit used throughout, the circuit can safely
• RL= lK
Calculation of Thermal Run-away Temperature
be used to 86°C.

FIGURE 102

• The major problem encountered in low temperature operation is the reduction of

hFE· Figure 103 shows the variation of hFE for the 2N525 indicating that hFE drops about
50% from its 25°C value when TJ = -55°C. Most transistors show approximately this
• variation in hFE .

v
/
/
v
• /
V'
/

L....--
_..,..v ~/----
~
~

• 0
-oo +10 +30
JUNCTION TEMPERATURE (•C)

CURRENT GAIN (h,,l VS TEMPERATURE NORMALIZED TO 25°C

• FIGURE 103

67
TRANSISTOR SWITCHES I
POWER DISSIPATION

As with most electrical components, the transistor's range of operating conditions

is limited by the transistor power dissipation.
I
Because the transistor is capable of a very low VcE when it is in saturation it is
possible to use load lines which exceed the maximum rated dissipation during the
switching transient, but do not exceed it in the steady state. Such load lines can be
used safely if the junction temperature does not rise to the runaway temperature
I
during the switching transient. If the transient is faster than the thermal time constant
of the junction, the transistor case may be considered to be an infinite heatsink. The
junction temperature rise can then be calculated on the basis of the infinite heatsink
I
derating factor. Since the thermal mass of the junctions is not considered, the calcula-
tion is conservative.
In some applications there may be a transient over-voltage applied to transistors
when power is turned on or when circuit failure occurs. If the transistor is manufactured
I
to high reliability standards, the maximum voltages may be exceeded provided the
dissipation is kept within specifications. While quality alloy transistors and grown
junction transistors can tolerate operation in the breakdown region, low quality alloy
I
transistors with irregular junctions should not be used above the maximum voltage
ratings.
Quality transistors can withstand much abuse. In experimental work, a 2N43 was
operated at a peak power of 15 watts and a peak current of 0.5 amperes with no
I
change in characteristics. 2N396 Transistors in an avalanche mode oscillator were
operated at peak currents of one ampere. 3N37 Tetrodes rated at 50 milliwatts and
25 milliamperes maximum were operated at a peak power of one watt and a peak
I
current of 200 milliamperes without change in characteristics. Standard production
units however should be operated within ratings to ensure consistent circuit perform-
ance and long life.
It is generally desirable to heatsink a transistor to lower its junction temperature
I
since life expectancy as well as performance decreases at high temperatures. Heat
sinks also minimize thermal fatigue problems, if any exist.

SATURATION

A transistor is said to be in saturation when both junctions are forward biased.

Looking at the common emitter collector characteristics shown in Figure 104(a) the
saturation region is approximately the region below the knee of the curves, since hFE
-I SO COLLECTOR DISSIPATION

_
140
IOOmw t50mw

t--<~\_,..,,.__._.,,~~+---1 COMMON EMITT~~RC~L\\~~:LC~~~CTERISTICS

t--<H\>-++-\B~·--~.0m_'~~~i---.~~~-,TYPE
1 3
2N39r-6-r---r--.---T""""""".---T--+--+---1
I
I \....Vi:0•-2.5ma v TA=25°C
-1201--+l/l-t1--r-\f-1J-rl-"-r-,,.-4--+--+-~-+-'-'r--,---+-+--~-+--+--+--+-+--i

-100 Hl""~=-t~r-t.--+r-"-0'-r:-==-2.0,...m-aF'--=-t~----!~-+-+-+-t--t--l--t-+-+-t-H----1-t---i
~-r
I
'
'

8 --c--:;;..1.s.,. m_aF.__'--i~--t~-+~-+-+-+--+---+---+-+-+-+--1---11--+-+--t
_80 r+ll--+-11-+-\.+-1.>0.

-60
~~-~

t-t-!H-t~-','k:r_,,_0':i:::-:=1.o...m_.a--=<==-:+>---+..--+,_-±::::::P-t-"'F+-+-+-HH-t-1
--~ --~18 =-0.Smo _1--- --i--
I
~~~'--~,_~~~'!,__~~~,~~~I~9'~0.6~m~a~~~~~~~~~~~~
-40

I
1 6 =-0.4mo

-20 -1- - t- _J _ !9 •-0.2mo

I I ·---

-2 -3 -4 -5 -6 -7 -8 -9 -10 -II -12

COLLECTOR VOLTAGE, VcE (VOLTS)

FIGURE 104 (A)

I
68
I
• TRANSISTOR SWITCHES

.. usually falls rapidly when the collector is forward biased. Since all the characteristic
curves tend to become superimposed in the saturation region, the slope of the curves
is called ·the saturation resistance. If the transistor is unsymmetrical electrically -
and most transistors are unsymmetrical - then the characteristics will not be directed

. towards the zero coordinates but will be displaced a few millivolts from zero. For ease
of measurement, generally the characteristics are assumed to converge on zero so that
. . .
t h e saturat ion resistance is r.
VcE{sat)
-- • = --
10

•
• ~

!~ -120 l--+-+--+--t-+-+--+--+--+-+--+--i7<-+--
/+---11-+-t-+-t-+-+--+--t-+-+--+--±=l
/ -~L-i--

.:; -1001--+-+--+--t-+-+--+--+--+--b'/'-+-+---ll-+~I~a·~-5~mo-4i..--+-i.--+-t-+-+--+--t-+-+--I
Ill ,.: / .....1--1'
a:: / ,,,,/ t 8 •-3mo

a ~/ l_c--n
v v i.--r
I

• v ./ v i..-,_. r8 :-lma

0
o -20 -40 -60 -140 -160 -180 -200 -220 -240 -260 -280

• FIGURE 104 ( B)
COLLECTOR VOLTAGE, \lcE (MILLIVOLTS)

While the characteristic curves appear superimposed, an expanded scale shows

Ill that VcE(sat) depends on Is for any given le. The greater IB is made, the lower V cE{sat)
becomes until Is is so large that it develops an appreciable voltage across the ohmic
emitter resistance and in this way increases VcE{sat). In most cases the saturation

• voltage, VcE(sat), is specified rather than the saturation resistance. Figure 104(b) show-
ing the collector characteristics in the saturation region, illustrates the small voltage
off-set due to asymmetry and the dependence of r. on Is. Note also that r. is a low
resistance to both AC and DC .
•
Ill

-0.02V

• VcE(sat.)

• DIRECT COUPLED TRANSISTOR LOGIC (DCTL) fUP-fLOP

FIGURE 105

Some circuits have been designed making specific use of saturation. The direct
coupled transistor logic (DCTL) flip-flop shown in Figure 105 utilizes saturation.
In saturation VcE{sat) can be so low that if this voltage is applied between the base
and emitter of another transistor, as in this flip-flop, there is insufficient forward bias
to cause this transistor to conduct appreciably. The extreme simplicity of the circuit
69
TRANSISTOR SWITCHES I
is self evident and is responsible for its popularity. However, special requirements are
placed on the transistors. The following are among the circuit characteristics:
First, the emitter junction is never reverse biased permitting excessive current to
I
How in the off transistor at temperatures above 40°C in germanium. In silicon, how-
ever, operation to 150°C has proved feasible.
Second, saturation is responsible for a storage time delay, slowing up circuit speed.
In the section on transient response we see the importance of drawing current out of
I
the base region to increase speed. In DCTL, this current results from the difference
between VcE(sat) and V BE of a conducting transistor. To increase the current, VcE(sat)
should be small and r'b should be small. However, if one collector is to drive more
I
than one base, r' b should be relatively large to permit uniform current sharing between
bases since large base current unbalance will cause large variations in transient
response resulting in circuit design complexity.
Third, since VcE(sat) and VBE differ by less than .3 volt, in germanium, stray
I
voltage signals of this amplitude can cause faulty performance. While stray signals
can be minimized by careful circuit layout, this leads to equipment design com-
plexity. Silicon transistors with a .7 volt difference between VcE(sat) and VBE are less
I
prone to being turned on by stray voltages but are still susceptible to turn off signals.
This is somewhat compensated for in transistors with long storage time delay since
they will remain on by virtue of the stored charge during short turn-off stray signals.
This leads to conflicting transistor requirements - long storage time for freedom from
noise; short storage time for circuit speed.
Another application of saturation is saturated flip-flops of conventional configura-
tion. Since VcE(sat) is generally very much less than other circuit voltages, saturating
I
the transistors permits the assumption that all three electrodes are nearly at the same
potential making circuit voltages independent of transistor characteristics. This yields
good temperature stability, and good interchangeability. The stable voltage levels are
useful in generating precise pulse widths with monostable flip-flops. The section on
I
flip-flop design indicates the ease with which saturated circuits can be designed.
In general, the advantages of saturated switch design are: (a) simplicity of circuit
design, (b) well defined voltage levels, (c) fewer parts required than in non-saturating
i
circuits, (d) low transistor dissipation when conducting, and (e) immunity to short
stray voltage signals. Against this must be weighed the reduction in circuit speed.
Speed is affected in a number of ways: (a) much higher trigger power is required
to turn off a saturated transistor than an unsaturated one, (b) since VcE(sat), hFE and
I
VBE all vary markedly with temperature, circuit speed also depends on temperature.

I
I
I
Ecc-vcE
DIODE COLLECTOR COLLECT CHARACTERISTICS
CLAMPING CIRCUIT TO SHOWING LOAD LINE AND OPERATING
AVOID SATURATION POINT PATH

Collector voltage clamp

FIGURE 106
I
70
• TRANSISTOR SWITCHES

. A number of techniques are used to avoid saturation. The simplest is shown in

Figure 106. The diode clamps the collector voltage so that it cannot fall below the
base voltage to forward bias the collector junction. Response time is not improved
appreciably over the saturated case since le is not clamped but rises to hFElu. With
typical variations of lu and hFE with temperature and life for a standard transistor, le

• may vary by as much as 10: 1. Care should be taken to ensure that the diode prevents
saturation with the highest Io. When the transistor is turned off, le must fall below the
value given by (Ecc-En)/Rr, before any change in collector voltage is observed. The
time required can be determined from the fall time equations in the section on transient
• response. The diode can also have a long recovery time from the high currents it has
to handle. This can further increase the delay in turning off.

•
R2 (Ecc+I3RLhFE)
Collector current clamp without bias
• supply
FIGURE 107 (A)
VcE::::::: RL hFE+ R2

z R-(~
RLhFE
•r;::
+I3)

• it vcE« Ecc

.. Collector current using bias supply

FIGURE 107 (8)

.. VcE ::::::: 0. 7V at 25° c .

• Collector current clamp using silicon

and germanium diodes

• FIGURE 107(C)

A much better way of avoiding saturation is to control lu in such a way that le is

• just short of the saturation level. This can be achieved with the circuit of Figure
107(a). The diode is connected between a tap on the base drive resistor and the
collector. When the collector falls below the voltage at the tap, the diode conducts
diverting base current into the collector, preventing any further increase in le. The
• voltage drop across R2 is approximately lcR2/hFE since the current in R2 is lu. Since
the voltage drop across the diode is approximately the same as the input voltage to
the transistor, VcE is approximately lcR2/hFE· It is seen that if the load decreases (le

• is reduced) or hFE becomes very high, VcE decreases towards saturation. Where the
change in hFE is known and the load is relatively fixed, this circuit prevents saturation.
71
TRANSISTOR SWITCHES I
To avoid the dependence ofVcE on le and hFE, Rs may be added as in Figure 107(b).
By returning Rs to a bias voltage, an additional current is drawn through R2. Now
VcE is approximately (hie + Is) R2. Is can be chosen to give a suitable minimum VCE·
FE
The power consumed by Rs can be avoided by using the circuit of Figure 107(c). The
silicon diode replaces R2. Since the silicon diode has a forward voltage drop of
approximately .7 volts over a considerable range of current, it acts as a constant
I
voltage source making VcE approximately .7 volts. If considerable base drive is used, it
may be necessary to use a high conductance germanium diode to avoid momentary
saturation as the voltage drop across the diode increases to handle the large base drive
current.
I
In applying the same technique to silicon transistors with low saturation resistance,
it is possible to use a single germanium diode between the collector and base. While
this permits VCE to fall below VBE, the collector diode remains essentially non-
I
conducting since the .7 volt forward voltage necessary for conduction cannot be
reached with the germanium diode in the circuit.
The diode requirements are not stringent. The silicon diode need never be back
biased, consequently, any diode will be satisfactory. The germanium diode will have
to withstand the maximum circuit VcE, conduct the maximum base drive with a
low forward voltage and switch rapidly under the conditions imposed by the circuit,
but these requirements are generally easily met.
I
Care should be taken to include the diode leakage currents in designing these
circuits for high temperatures. All the circuits of Figure 107 permit large base drive
currents to enhance switching speed, yet they limit both h and le just before saturation
I
is reached. In this way, the transistor dissipation is made low and uniform among
transistors of differing characteristics. !
It is quite possible to design flip-flops which will be non-saturating without the I
use of clamping diodes by proper choice of components. The resulting flip-flop is
simpler than that using diodes but it does not permit as large a load variation before
malfunction occurs. The design procedure for an undamped non-saturating flip-flop
can be found in Transistor Circuit Engineering by R. F. Shea, et al (Wiley).
I

I
R c
I '

Stored neutralization by capacitor

FIGURE 108
I
Another circuit which is successful in minimizing storage time is shown in Figure
108. If the input is driven from a voltage source, it is seen that if the input voltage
and capacitor are appropriately chosen, the capacitor charge can be used to neutralize
I
the stored charge, in this way avoiding the storage time delay. In practical circuits,
the RC time constant in the base necessary for this action limits the maximum pulse
repetition rate. I
72
I
 TRANSISTOR SWITCHES

TRANSIENT RESPONSE TIME

The speed with which a transistor switch responds to an input signal depends on
the load impedance, the gain expected from the transistor, the operating conditions just
prior to the input signal, as well as on the transistor's inherent speed. The following
discussion will assume that the collector load resistance is sufficiently small that
• 211"RLCcfa<< 1 where Cc is the collector capacitance. If this is not the case, all the
response time equations must be multiplied by the correction factor (1 + 211"RLCcfa).

(o) TYPICAL CIRCUIT

• lei" 1 82 zo.5 mo
le= 10 mo
I,./ > hFE
7101

•
• I
I I

+IO~ I
1

•
( b) WAVEFORM GENERATED
AT A BY SWITCH
0- --------- -
-IOV
I I
I I

~--------~-
(c) WAVEFORM AT B

• -IOVI
I
--------1-~-'
I I I
--- -
SHOWING FORWARD BIAS
ON BASE OUR I NG
SATURATION
I I I I
I I I I

LL__ __
I I I I

• 0
la1~ __
:---------~
: , 1 Ie2
(d) BASE CURRENT WAVEFORM
NOTE REVERSE CURRENT
1B2 DUE TO BASE Bl AS
DURING SATURATION
: ! !i
• +IOV I
I

: I
I
I
--------~-r
:
I
I

: i
I
---10% ( e ) COLLECTOR WAVEFORM
SHOWING STANDARD
DEFINITIONS OF
+lfdl -------~- • +--·90%
ov--h t------i- -:-~-- RESPONSE TIMES

• :+:'r\+ -+\ ~l;:._

--+TIME

Transient response
• FIGURE 109

Let us consider the simple circuit of Figure 109(a). If we close and open the switch
to generate a pulse as shown in 109(b), we will obtain the other waveforms shown in
• the figure. When the switch closes, current flows through the 20K resistor to turn on
the transistor. However there is a delay before collector current can begin to flow since
the 20K must discharge the emitter capacitance which was charged to -10 volts prior
to closing the switch. Time must also be allowed for the emitter current to diffuse
• across the base region. A third factor adding to the delay time is the fact that at low
emitter current densities current gain and frequency response decrease. The total delay
from all causes is called the "delay time" and is measured conventionally from the
beginning of the input pulse to the 10% point on the collector waveform as shown in
Figure 109(e). Delay time can be decreased by reducing the bias voltage across the
emitter capacitance, and by reducing the base drive resistor in order to reduce the
charging time constant. At high emitter current densities, delay time becomes neg-
• ligible. Figure 110 shows typical delay times for the 2N396 transistor.

73
TRANSISTOR SWITCHES
I
PNP ALLOY TRANSISTOR TYPE 2N396
PULSE RESPONSE DELAY Tl ME
0.4f--_-H-,,__-~ td 1,.si vs r 81 !mal

I
Vee• - 5V
Ie • - 5ma
RL • I Kn
Re • 10 Kn

r
I
I
%'--~~-o~.5~~-_J1.o=--~---1.~5~~--2~.o~~--~2.s=--~-_-='30
Ie1 lmal

FIGURE 110

The rise time refers to the turn-on of collector current. By basing the definition of
rise time on current rather than voltage it becomes the same for NPN and PNP tran-
sistors. The collector voltage change may be of either polarity depending on the tran-
sistor type. However, since the voltage across the collector load resistor is a measure
of collector current, it is customary to discuss the response time in terms of the collector
voltage. The theoretical analysis of rise time suggests that a single exponential curve as
defined in Figure 111 fits the experimental results.

---------------------------
h FE Ie1

11

r I
/1

TIME --+

I
GRAPHICAL ANALYSIS OF RISE TIME
SYMBOLS DEFINED IN FIGURE I09
THE INTERCEPT OF Ic AND THE CURVE GIVES tr.
FIGURE 111

If the load resistor RL in Figure 109(a) is small enough that a current, hFEh1, through
it will not drive the transistor into saturation, the collector current will rise expon-
entially to hFEBB1 with a time constant, hFE/2'1rfa. However, if RL limits the current to
i
less than hFEh1, the same exponential response will apply except that the curve will
be terminated at le= ~e:. Figure 111 illustrates the case for le = hFEh1/2. Note that I
the waveform will no longer appear exponential but rather almost linear. This curve
can be used to demonstrate the roles of the circuit and the transistor in determining
rise time. For a given hFE and f .. , it is seen that increasing hFEIB1/Ie will decrease rise
time by having le intersect the curve closer to the origin. On the other hand, for a given
h1 and le, speed will be proportional to f .. but nearly independent of hFE since its
effect on the time constant is balanced by its effect on the curve amplitude. A useful
expression for rise time is tr = le/IB1 2'1rfa. It is valid for le/h <
hFE/5. Since this I
'

74
 TRANSISTOR SWITCHES

analysis assumes that hFE and fa are the same for all operating points the calculated
results will not fit experimental data where these assumptions are invalid. Figure 112
• shows that the rise time halves as the drive current doubles, just as the expression for
tr suggests. However the calculated value for tr is in error by more than 50 % . This
shows that even though the calculations may be in error, if the response time is specified

• for a circuit, it is possible to judge fairly accurately how it will change with circuit
modifications using the above equations.
4

• .2 \ PNP ALLOY TRANSISTOR TYPE 2N396

PULSE RESPONSE RISE TIME

.o \ tr (11Sl VS lei (ma)

Vee= 5V

• ~o·-- \ Ie "
RL •
5mo
IKQ
10 KQ

\'
Re •

Zo ,..
• Q4 ~
~ r---..
• 0 .2
-
~

•> -0.5 -1.0 -1.5 -2.0 -2.5

• Ie1 -
FIGURE 112
ma

Storage time is the delay a transistor exhibits before its collector current starts to
• turn off. In Figure 109, Rs and RL are chosen so that RL rather than hFE will limit the
collector current. The front edge of the collector waveform, Figure 109{e), show~ the
delay time followed by the nearly linear risetime. When the collector voltage falls

• below the base voltage, the base to collector diode becomes forward biased with the
result that the collector begins emitting. By definition, the transistor is said to be in
saturation when this occurs. This condition results in a stored charge of carriers in
the base region. Since the flow of current is controlled by the carrier distribution in
• the base, it is impossible to decrease the collector current until the stored carriers are
removed. When the switch is opened in Figure 109, the voltage at A drops immedi-
ately to -10 volts. The base voltage at B however cannot go negative since the tran-
sistor is kept on by the stored carriers. The resulting voltage across Rs causes the
• carriers to flow out of the base to produce a current ls2. This is illustrated in Figure
109{c) and 109{d). As soon as the stored carriers are swept out, the transistor starts to
turn off; the base voltage dropping to -10 volts and the base current decreasing to
• zero. The higher ls1 is, the greater the stored charge; the higher ls2 is, the faster
they are swept out. Since both junctions are forward biased during storage time, the
inverse characteristics of the transistor are involved. The inverse characteristics are
obtained by interchanging the collector and emitter connections in any test circuit .
• They are identified by the subscript I following the parameter, e.g., hFEI is the inverse
DC beta. Figure 113 shows a curve which is useful for calculating storage time graph-
ically. The maximum value is hFE(ls1 +ls2) where ls2 is given the same sign as ls1,

• ignoring the fact it flows in the opposite direction. The time constant of the curve
involves the forward and inverse current gain and frequency cut-off. The storage time
corresponds to the time required to reach the current hFEls1-lc. It can be seen that
for a given frequency response, high hF~: gives long storage time. The storage time
also decreases as ls2 is increased or ls1 is decreased.

75
TRANSISTOR SWITCHES I
______ /l ___________________ _

I
...
hFE let-Tc

~ /
/ I
I
i ·- I
~ TIME ____.

i;-r(~+t-;;) c~aa1)
GRAPt<ICAL ANALYSIS OF STORAGE TIME.
THE INTERCEPT OF lhFE 191-Icl AND THE CURVE GIVES Is
I
FIGURE 113
I
The time
. · 1 transistor
constant for a very unsymmetnca · · approximate
is · 1y hrn+l
"R"fai • It is
I
2
seen that the generally specified normal hFE and f .. are of little use in determining
storage time. For a symmetrical transistor, the time constant is approximately
+ 1 . I t is
hFE7rf" . 1 transistor
. poss1'ble f or a symmetnca . to h ave a longer storage time
. t h an
I
2

PNP TRANSISTOR TYPE 2N396

Vee· - 5v
1.4 Ic • - 5ma
RL" • IKO
1.2 R0 = IOKO

-1.0 -1.5 -2.0 -2.5

I
191 - ma

FIGURE 114

an unsymmetrical transistor with the same hFE and f ... Figure 114 shows the depend-
ence of storage time on IBI and h2 for the 2N396 transistor.
Ia2 h FE+ Ic
------~--------------------
I
/I
I I EXPONENTIAL CURVE

r I
I
I

I
GRAPHICAL ANALYSIS OF FALL TIME
THE INTERCEPT OF le AND THE CURVE GIVES ft.

FIGURE 115

The collector current fall time can be analyzed in much the same manner. Figure
115 indicates the exponential curve of amplitude le + hFEh2, and a time constant, I
76
I
• TRANSISTOR SWITCHES

hFE/21rfa. The fall time is given by the time it takes the exponential to reach Ic. If
>
hFEln2 > Ic, fall time is given by the expression,
• t F - -1- hFE Ic/In2
- 21rfa hFE Ic/In2 +
As hFE becomes large, this expression reduces to,

• t __ l_ k_
F - 21rfa h~
which is identical to the expression for tr except that Is2 replaces Is1. Figure 116 shows
typical fall time measurements for a 2N396 .
• 1.0,.-----,.-------------~-----,

o.s -vc_c_=--5v-
PNP ALLOY TRANSISTOR TYPE 2N396
PULSE RESPONSE FALL TIME
Ic = -5ma If ll'Sl vs lei (ma)
0.8 RL = I K O l - - - - , . - - - - - , . - - - - - , - - - - - 1 f - - - - - - 1

•
Re = KJKn Ie 2 lmol
o.1f---f---f-==--l--====9F====!~·202..5--1
J----
0.61----7"'/.::::+----+----+----+----t-----1

"'
• .3- 0 . 5 1 - - - - 1 - - - - 1 - - - - 1 - - - - f - - - - - - 1 - - - - j

0.41----+----+----+----+----t------t
--1----t----t----r------j .50
0.3f-----+----+----+----+-----ir-----i
--+---+---+---r---j .75
• ~t---===:l=======l=======l======t---h,~.0---j

O.Jf----f----f----f----1------t----t

0 o'----_~o~.5----17 o---7
.o---~1.5=----~~7 2.5=--~

• FIGURE 116
Ie 1 (mo)

FLIP-FLOP DESIGN PROCEDURES

• The bistable Eccles-Jordan circuit or flip-Hop is a building block for counters,
shift registers, data storage and control machinery. At the outset, the designer has
the choice of using saturating or non-saturating circuits. If he chooses saturating
• circuits, the design becomes very straightforward.

SATURATING FLIP-FLOPS

• The simplest flip-Hop possible is shown in Figure 105, however, for standard
transistor types the circuit in Figure l l 7(a) is preferable at moderate temperatures.
We shall refer to the conducting and non-conducting transistors as the on and off

• . - - - - - - - - - - - - - -25v Vee

•
2N525 2N525

•
•
• FIGURE 117 (A)
SATURATED FUP-FLOPS
FIGURE 117(8)

77
TRANSISTOR SWITCHES

transistors respectively. For stability, the circuit depends on the low collector to
emitter voltage of the saturated on transistor to reduce the base current of the off
transistor to a point where the circuit gain is too low for regeneration. The 2200
emitter resistor could be removed if emitter triggering is not used. By adding
resistors from base to ground as in Figure 117 (b), the off transistor has both junctions
reverse biased for greater stability. While the 33K resistors divert some of the formerly
available base current, operation no longer depends on a very low saturation voltage
I
consequently less base current may be used. Adding the two resistors permits stable
operation beyond 50°C ambient temperature.
I

2N396
I
I
(C)
.SATURATED fUP-flOP
FIGURE 117(C) I
The circuit in Figure 117(c) is stabilized to 100°C. The price that is paid for the
stability is (1) smaller voltage change at the collector, (2) more battery power con-
sumed, (3) more trigger power required, (4) a low Ieo transistor must be used. The
capacitor values depend on the trigger characteristics and the maximum trigger repeti-
tion rate as well as on the flip-flop design.
By far, the fastest way to design saturating flip-flops is to define the collector and
emitter resistors by the current and voltage levels generally specified as load require-
I
ments. Then assume a tentative cross-coupling network. With all components specified,
it is easy to calculate the on base current and the off base voltage. For example, the
circuit in Figure 117(b) can be analyzed as follows. Assume VuE = .3 volt and VeE =
.2 volt when the transistor is on. Also assume that V EB = .2 volts will maintain the off
i
transistor reliably cut-off. Transistor specifications are used to validate the assumptions.
I. Check for the maximum temperature of stability.
~Vee 220
I
VE =
R1 ~+ +
2200 220 (25) =
2.3 volts
Ve on= VE+ VeE on= 2.3 + .2 = 2.5 volts
Assuming no Ieo, the base of the off transistor can be considered connected to
I
a potential,
V' B= + Rs t h rough a resistor.
Ve on R2 Rs . R' B=
(2.5) (33K)
V'u = (42K + 33K) = 1.1 volts
(33K) (42K)
R' =
B 75K = 18.5K
78
 TRANSISTOR SWITCHES

The Ico of the off transistor will flow through R' B reducing the base to emitter
potential. If the Ico is high enough, it can forward bias the emitter to base junction
causing the off transistor to conduct. In our example, VE = 2.3 volts and V EB = .2 volts
will maintain off conditions. Therefore, the base potential can rise from 1.1 volts to
2.1 volts (2.3 - .2) without circuit malfunction. This potential is developed across

• R ' B b Y I co =
21
· lB.- K1.1
5
54 µa. A germanium transistor with I co = 10 µa at 2 5° C
will not exceed 54 µa at 50°C. If a higher operating temperature is required, R2 and Rs
may be decreased and/or & may be increased .
• II. Check for sufficient base current to saturate the on transistor.
VB on= VE+ VBE on= 2.3 + .3 = 2.6 volts

;;~
• The current through Rs = Is = = .079 ma

The current through Ri and R2 in series is 12 = Vcc - VB on 25 - 2.6

Ri + R2 42K + 2.2K

• = .506ma
The available base current is h = 12 - 1 = .43 ma
. I
The co11ector current is c =
VCC - VC on 25 - 2.5
Ri = . K = 10.25 ma
22
• The transistor will be in saturation if hFE at 10 ma is greater than
k = 10.25 =24
h .43
• If this circuit were required to operate to -55°C, allowance must be made for
the reduction of hFE at low temperatures. The minimum allowable room temperature
hFE should be doubled, or hFE min = 48.

• Generally it is not necessary to include the effect of Ico flowing through Ri when
calculating 12 since at temperatures where Ico subtracts from the base drive it simulta-
neously increases hFE. If more base drive is required, R2 and Rs may be decreased.
If their ratio is kept constant, the off condition will not deteriorate, and so need not be
• rechecked.
Ill. Check transistor dissipation to determine the maximum junction temperature.
The dissipation in the on transistor is
• (.3) (.43)
VBE on h + VcE on le= ------rooo-~ +
(.2) (10.25)
1000 = 2.18 mw
The dissipation in the off transistor resulting from the maximum Ico is
• VcBlco"""" ( iS
25 55
0
) = 1.4 mw

Generally the dissipation during the switching transient can be ignored at speeds

• justifying saturated circuitry. In both transistors the junction temperature is within 1°C
of the ambient temperature if transistors in the 2N394-97 or 2N524-27 series are used.

NON-SATURATED FLIP-FLOP DESIGN

• The abundance of techniques to prevent saturation makes a general design pro-

cedure impractical if not impossible. While it is a simple matter to design a flip-flop
as shown above, it becomes quite tedious to check all the worst possible combinations
of component change to ensure manufacturability and long term reliability. Often the
job is assigned to a computer which calculates the optimum component values and
tolerances. While a number of Hip-flop design procedures have been published, they
generally make simplifying assumptions concerning leakage currents and the voltages
• developed across the conducting transistors.
79
TRANSISTOR SWITCHES

CIRCUIT CONFIGURATION FOR

NON-SATURATING
FLIP-FLOP DESIGN PROCEDURE i
Characteristics:
Trigger input at points E
Trigger steering by D2 and R5
Collector clamping by D1 and Ra
I
Connect points A, B, C, D, E as shown in
· Figure 119 to get counter or shift register
operation
Cl and C2 chosen on basis of speed re-
I
quirements

FIGURE 118(A)
I
The design procedure describAd here is for the configuration in Figure 118(a). No
simplifying assumptions are made but all the leakage currents and all the potentials
are considered. The design makes full allowance for component tolerances, voltage
I
fluctuations, and collector output loading. The anti-saturation scheme using one resistor
(R3) and one diode (Dl) was chosen because of its effectiveness, low cost and
simplicity. The trigger gating resistors (R5) may be returned to different collectors to
I
get different circuit functions as shown in Figure 119. This method of triggering offers
the trigger sensitivity of base triggering and the wide range of trigger amplitude
permissible in collector triggering. The derivation of the design procedure would
require much space, therefore for conciseness, the procedure is shown without any
substantiation. The procedure involves defining the circuit requirements explicitly then r
determining the transistor and diode characteristics at the anticipated operating points.
A few astute guesses of key parameters yield a fast solution. However, since the I
procedure deals with only one section of the circuit at a time, a solution is readily
reached by cut and try methods without recourse to good fortune. A checking pro-
cedure permits verification of the calculations. The symbols used refer to Figure
118(a) or in some cases are used only to simplify calculations. A bar over a symbol
denotes its maximum value; a bar under it, its minimum. The example is based on
polarities associated with NPN transistors for clarity. The result is that only E2 is
negative. While the procedure is lengthly, its straightforward steps lend themselves
to computation by technically unskilled personnel and the freedom from restricting
I
assumptions guarantees a working circuit when a solution is reached. The circuit
designed by this procedure is shown in Figure 118(b).
-16V
I
-9V
I
I
2.2K

220~~1T +1sv
I
NON-SATURATED FLIP-FLOP
FIGURE 118(8)
I
.

80
• TRANSISTOR SWITCHES

The same procedure can be used to analyze existing Hip-flops of this configuration
by using the design check steps .
•
r---------------j.--- - I0 V

•
•
•
•
•
.
• 2.2K

•
• A
C E D
B A
C
B
E D
INPUT
• (b) INTER CONNECTION AS COUNTER

• A B A B A B t--n--+--

.. C E D C E D C E D

• (C) INTERCONNECTION AS SHI FT REGISTER

500 KC COUNTER-SHIFT REGISTER FUP-FLOP

• FIGURE 119

81
 -I
::u
NON-SATURATING FLIP-FLOP DESIGN PROCEDURE >
z
~
STEP! DEFINITION OF OPERATION -- ISYMBOL I SAMPLE DESIGN FOR 2N396 TRANSISTOR Ul
-I
0
::u
(A) Circuit Requirements and Device Characteristics Ul
~
1 Assume maximum voltage design tolerance Ae Let Ae = ± 5% :j
0
Ar Let Ar= ± 7% (assuming± 5% resistors) :I
2 Assume maximum resistor design tolerance
3 Assume maximum ambient temperature TA Let TA= 40°C
"'
Ul

4 Assume maximum load current out of the off side Io Let Io= 1 ma
5 Assume maximum load current into the on side I1 Let I1 = 0.2 ma
6 Estimate the maximum required collector current in the on Ii Let I1 < 17.5 ma
transistor
~ 7 Assume maximum design Ico at 25 ° C From spec sheet Ico < 6 µa
8 Estimate the maximum junction temperature T1 Let T1 = 60°C
9 Calculate Ico at T1 assuming Ico doubles every 10°C or I2 I2 = 6e· 07 TJ = 71 µa; Let I2 = 100 µa
IcoT.J = Ico2s e· 07 <TJ-25>
10 Assume the maximum base leakage current is equal to the Ia Let Ia = 100 µa
maximum Ico
11 Calculate the allowable transistor dissipation 2N396 is derated at 2.5 mw/°C. The junction temperature
rise is estimated as 20 ° C therefore 50 mw can be allowed.
Let Pc= 50 mw
12 Estimate hFE minimum taking into account low temperature {Jmln Let am1n = 0.94 or fJm1n = 15.67
degradation and specific assumed operating point
13 Estimate the maximum design base to emitter voltage of V1 Let V1 = 0.35 volts
the "on" transistor
14 Assume voltage logic levels for the outputs Let the level separation be > 7 volts

.,,,~ .,.~
~.''C~;
I. I
• I
• I I I
• I I
• I I I I
•
STEP DEFINITION OF OPERATION SYMBOL SAMPLE DESIGN FOR 2N396 TRANSISTOR
15 Choose the maximum collector voltage permissible for the V2 Let V2 < 2.0 volts
"on" transistor
16 Choose suitable diode types Let all diodes be 1Nl98
17 Estimate the maximum leakage current of any diode 14 Maximum leakage estimated as < 25 µa. Let 1 = 40 µa at
end of life
18 Calculate Is= Ia+ 1 15 40 + 100 = 140 µa
19a Choose the minimum collector voltage for the "off" transistor Va Let Va> 9.0 volts
keeping in mind 14 and 15 above
19b Choose the maximum collector voltage for the "off' tran- V4 Let V. < 13.0 volts
sis tor
20 Choose the minimum design base to emitter reverse bias to Vs Let Vs= 0.5 volt
assure off conditions
CX>
c.u 2la Estimate the maximum forward voltage across the diodes Vo Let Vo= 0.8 volt
2lb Estimate the minimum forward voltage V1 Let V1 = 0.2 volt
22 Estimate the worst saturation conditions that can be tol-
erated.
22a Estimate the minimum collector voltage that can be tolerated Vs Let Vs= 0.1 volt
22b Estimate the maximum base to collector forward bias volt- V9 Let Vo= 0.1 volt -f
;u
age that can be tolerated >
z
m
23a Calculate V2 + V1 V10 2 + 0.2 = 2.2 volts
m
-f
23b Calculate V2 +Vo Vu 2 + 0.8 = 2.8 volts 0
:u
24a Calculate Vs+ V1 V12 0.1 + 0.2 = 0.3 volt m
~
V13 0.1 + 0.8 = 0.9 volt :j
24b Calculate Vs+ Vo 0
I:
25 Calculate Vs+ V.i Vu 0.1 + 0.1 = 0.2 volt l"1
m
 -I
;u
NON-SATURATING FLIP-FLOP DESIGN PROCEDURE <CONTINUED)
z>
~
STEP I DEFINITION OF OPERATION I SYMBOL I SAMPLE DESIGN FOR 2N396 TRANSISTOR Ul
-I
0
(B) Cut and Try Circuit Design ;u
(I)

1 Assume E2 E2 Let E2 = -16 volts± 5%; E2 = -15.2 v;~ = -16.8 v ~

::j
(1 + .:lr) 0
Ki 1.07 1 5 x
2a Calculate (l _ .:lr) 0.93 = .l
"'
(I)

(1 +.:le) 1.05 5
2b Calculate (1 _ .:le) K2 0.95 =I.IO

Calculate _Ii_ 17.5 l

2c
{3mtn
Ka 15.67 = . ll 7 ma

2d Calculate I2 + Io + 2I4 K4 0.1+1.0 + 0.08 = 1.18 ma

00
~ Va -Vo 0.8 - 0.1 0 0454
2e Calculate - K5
Vs+ Vo - E2 0.1 + 0.1 + 15.2 = ·

3 Calculate -R, < ~

1 - Vi - Ki (V1 - ~)
[V10KiKs J 1.:17 [ (l~i~)(o~~~4 ) - 1.15 (0.35 + 16.8)] = 14.03 K

4 Choose & & Let R4 = 13K ± 7%; R4 = 13.91 K; R4 = 12.09 K

5 Calculate Ra > Ks R4 (0.0454) (13.91K) = 0.632 K

6 Choose R3 Ra Let Ra= 0.68 K ± 7%; Ra= 0.7276 K; !!:i = 0.6324 K

~ (V10 - V1) (12.09 K) (2.2 - 0.35) O K h . f

7 Check Ra by calculating Ra <
V1 - E2 +Ka &
0.35 + 16.8 + (1.117) (12.09) = .730 ; C OICe O
Ra satisfactory

R4 13.91 K
8 Calculate Ka = 1.091 K/V
- Vs - E2 - Is R4 -0.5 + 15.2 - (0.14) (13.91)
I I
• I I I I
• I I I I
• I
• I
•
STEP DEFINITION OF OPERATION SYMBOL SAMPLE DESIGN FOR 2N396 TRANSISTOR
Ke (V2 + V5) - Ra (1.091) (2.0 + 0.5) K - 0.632 K _ K
9 Calculate R2 > _ KeL - 2 19
1 1 - (1.091) (0.04) - .
Choose R2 - If there are difficulties at this point, assume a
10
different E,. R2 Let R2 = 2.7 K ± 7%; R2 = 2.889 K; R2 = 2.511 K
Ki2 [Va - V12 + K, R2] (1.15) 2[9.0 - 0.3 + (1.18) (2.511)]
11 Calculate
V, - V11
K7
13.0 - 2.8
= 1.51
- K7V, - Va (1.51) (13.0) - 9.0
12 Calculate Ei < K7 _ l/K2 1.51 - 1/1.105
= 17.63 volts
13 Choose Ei Ei Let Ei = 16 volts ± 5%; Ei = 16.8 volts; Ei = 15.2 volts
_ (E1 - Va) R2 (15.2 - 9.0) (2.511)
14 Calculate Ri < Va-= V12 + K. R2 9.0 - 0.3 + (1.18) (2.511) = I.335 K
00
> (16.8 - 13.0) (2.889)
Qt
15 C 1 1t R
a cu a e ____! _
(E1 - V,) (R2)
V _ V
4 11 13.0 - 2.8
= 1.077 K
16 Choose Ri Ri Let Ri = 1.2 K ± 7%; Ri = 1.284 K; Ri = 1.116 K

(C) Design Checks

1 Check "off" stability. Reverse bias voltage is given by:
13.91
v EB < -E2 + & -
[V2 - E2 + I, R2 + 15 (R2 + Ra)] VEB - 15·2 + 17.05
"'i
;u
&+Ra+~ - - - >
[2 + 15.2 + ( 0.04) ( 2.511) + ( 0.14) (3.14)] = -0.7 volts z
U>
Circuit stable if VEB < - Vs The design value of V5 was 0.5 volts. Therefore, the "off" (ii
condition is stable. "'i
0
;u
2 Check for non-saturation under the worst conditions.
U>
v BE_
< E2 + & -(V13 - E2) VBE - 15 2 + 13.91 (0.9 + 15.2) = 0.19 volts ~
. 14.54 :j
~+Ra 0
The design maximum of Vu was 0.2 volts. J:
Circuit non-saturated if VBE <Vu I'll
U>
 -I
NON-SATURATING FLIP-FLOP DESIGN PROCEDURE <CONTINUED) ::u
>
z
~
STEP DEFINITION OF OPERATION SYMBOL SAMPLE DESIGN FOR 2N396 TRANSISTOR Ul
-I
0
;u
3 Check for stability. Calculate:
Ul
3a RA= R1 + R2 RA 1.284 + 2.889 = 4.173 K ~
=i
3b RB=R1+Rii+R3+& RB 1.284 + 2.889 + .728 + 12.09 = 16.99 K n
x
Pl
Ul
3c Re= Ra+ R4 Re .728 + 12.09 = 12.82 K

3d E'1 = E1 - ~ R1 E'1 15.2 - (1.18) (1.284) = 13.68 volts

3e Rn = R1 + R2 + Ra + & Rn 1.116 + 2.889 + .728 + 13.91 = 18.643 K

Rn (E1 - V2) - R1 [E1 - E2 - Is & - L (Ra+&)] 18.64 (16.8 - 2) - 1.116 [16.8 + 16.8 - (0.14) (13.91)
3£ 16
16 = 1.116 (18.64 - 1.116)
00
~ ~(Rn - R1)
- (.04) (.728 + 13.91)]
= 12.34 ma

+
-

3g 17 = RR~
Ae
(E'1 - V10) -
e
(E'1 - E2)
-
17
16.99
(4.173) (12.82) (13.68 - 2.2) -
(13.68 + 16.8)
12.82 = 1.266 ma

3h Is _ 11 + le + 17 0.2 + 12.34 + 1.266

+&/Re Is 0 831
- {Jmtn 15.67 + 12.09/12.82 = · ma

12.09 ( 4.173 ) ( )
- 16.8 + 16.99 1 + 12.818 13.683 + 16.8

3i R4
V' BE = ~ + RB ( 1+ ~
RA)('
E 1 - E2 ) 12.09 ( ) 12.09
- 12.818 13.683 - 2.2 - 0.831 16.99
V'BE
& ( E ,i
- ---=--
Re
- V10 ) - Is --=----
& ( --=--
RB
RA& - RA - Ra
Re
- ) c 4 · 1 ~~~~~:·09) - 4.173 - 0.7276) = .55V
.55V is greater than V1 = .35V, therefore the design is
satisfactory.
• TRIGGERING
TRANSISTOR SWITCHES

Flip-flops are the basic building blocks for many computer and switching circuit
• applications. In all cases it is necessary to be able to trigger one side or the other into
conduction. For counter applications, it is necessary to have pulses at a single input
make the two sides of the Hip-flop conduct alternately. Outputs from the Hip-flop must
have characteristics suitable for triggering other similar Hip-flops. When the counting
• period is finished, it is generally necessary to reset the counter by a trigger pulse to
one side of all Hip-flops simultaneously. Shift registers, and ring counters have similar
triggering requirements .

• In applying a trigger to one side of a flip-Hop, it is preferable to have the trigger

turn a transistor off rather than on. The off transistor usually has a reverse-biased
emitter junction. This bias potential must be overcome by the trigger before switching

• can start. Furthermore, some transistors have slow turn on characteristics resulting in
a delay between the application of the trigger pulse and the actual switching. On the
other hand, since no bias has to be overcome, there is less delay in turning off a
transistor. As turn-off begins, the Hip-flop itself turns the other side on .
• A lower limit on trigger power requirements can be determined by calculating
the base charge required to maintain the collector current in the on transistor. The
trigger source must be capable of neutralizing this charge in order to turn off the
• transistor. It has been determined that the base charge for a non-saturated transistor is
approximately QB = 1.22 lc/2'11"fa. The turn-off time constant is approximately
hFE/2'11"fa. This indicates that circuits utilizing high speed transistors at low collector
. currents will require the least trigger power. Consequently, it may be advantageous to
• use high speed transistors in slow circuitry if trigger power is critical. If the on tran-
sistor was in saturation, the trigger power must also include the stored charge. The
stored charge is given by

• Qs _ _
- 211"
l (-1 + _ l ) (
fa f al
1
1 - aNar
) (hi _ ~)
hFE
where the symbols are defined in the section on transient response time.
• Generally, the trigger pulse is capacitively coupled. Small capacitors permit more
frequent triggering but a lower limit of capacitance is imp.osed by base charge con-
siderations. When a trigger voltage is applied, the resulting trigger current causes the
• charge on the capacitor to change. When the change is equal to the base charge just
calculated, the transistor is turned off. If the trigger voltage or the capacitor are too
small, the capacitor charge may be less than the base charge resulting in incomplete

• turn-off. In the limiting case C = S: . The speed with which the trigger turns off a
transistor depends on the speed in which QB is delivered to the base. This is determined
by the trigger source impedance and r'b·
• In designing counters, shift registers or ring counters, it is necessary to make
alternate sides of a flip-Hop conduct on alternate trigger pulses. There are so-called
steering circuits which accomplish this. At low speeds, the trigger may be applied at
• the emitters as shown in Figure 120. It is important that the trigger pulse be shorter
than the cross coupling time constant for reliable operation. The circuit features few
parts and a low trigger voltage requirement. Its limitations lie in the high trigger
current required .
• At this point, the effect of trigger pulse repetition rate can be analyzed. In order
that each trigger pulse produce reliable triggering, it must find the circuit in exactly
the same state as the previous pulse found it. This means that all the capacitors in the
• circuit must stop charging before a trigger pulse is applied. If they do not, the result
87
TRANSISTOR SWITCHES

2Nl67

1501414f

Cf-o~E
T WAVE
INPUT
r
EMITTER TRIGGERING
MAXIMUM TRIGGER RATE EXCEEDS 500KCS WITH TRIGGER
•
AMPLITUDE FROM 2V TO 12V

FIGURE 120 i
is equivalent to reducing the trigger pulse amplitude. The transistor being turned off
presents a low impedance permitting the trigger capacitor to charge rapidly. The
capacitor must then recover its initial charge through another impedance which is
generally much higher. The recovery time constant can limit the maximum pulse rate .
. - - - - - - - - -.....--0+ IOV

Cr 2N167
.-----;::====~:--~---,~(-o..IUL
1501414f ~'i~~RE
INPUT

I
COLLECTOR TRIGGERING
MAXIMUM TRIGGER RATE EXCEEDS IMC WITH TRIGGER BASE TRIGGERING
AMPLITUDE FROM 4V TO 12V.
MAXIMUM TRIGGER RATE EXCEEDS I MC
WITH TRIGGER AMPLITUDE FROM 0.75 TO
3 VOLTS.

FIGURE 121 FIGURE 122

Steering circuits using diodes are shown in Figures 121 and 122. The collectors
I
are triggered in 121 by applying a negative pulse. As a diode conducts during trigger-
ing, the trigger pulse is loaded by the collector load resistance. When triggering
is accomplished, the capacitor recovers through the biasing resistor RT. To minimize
trigger loading, RT should be large; to aid recovery, it should be small. To avoid the
I
recovery problem mentioned above, RT can be replaced by a diode as shown in 123.
The diode's low forward impedance ensures fast recovery while its high back im-
pedance avoids shunting the trigger pulse during the triggering period.
Collector triggering requires a relatively large amplitude low impedance pulse but
has the advantage that the trigger pulse adds to the switching collector waveform to
enhance the speed. Large variations in trigger pulse amplitude are also permitted. i
88
• TRANSISTOR SWITCHES

2.7K

•
• 2N167

68i<l'fd

(CT~
• SQUARE
WAVE
IMPUT

• COLLECTOR TRIGGERING
DIODE TO SUPPLY VOLTAGE REDUCES
TRIGGER POWER AND EXTENDS MAXIMUM
TRIGGER RATE.
COLLECTOR TRIGGERING WITH TRIGGER AMPLIFIER
FOR I MC TRIGGER RATE LESS
AMPLITUDE REQUIRED.
THAN I VOLT TRIGGER

FIGURE 123 FIGURE 124

• In designing a counter, it may be advantageous to design all stages identically the

same to permit the economies of automatic assembly. Should it prove necessary to
increase the speed of the early stages, this can be done by adding a trigger amplifier
• as shown in Figure 124, without any change to the basic stage.
Base triggering shown in Figure 122 produces steering in the same manner as
collector triggering. The differences are quantitative with base triggering requiring
w less trigger energy but a more accurately controlled trigger amplitude. A diode can
replace the bias resistor to shorten the recovery time .

•
•
•
• BASE TRIGGERING WITH HYBRID GATE

FIGURE 125

• Hybrid triggering illustrated in Figure 125 combines the sensitivity of base

triggering and the trigger amplitude variation of collector triggering. In all the other
steering circuits, the bias potential was fixed, in this one the bias potential varies in

• order to more effectively direct the trigger pulse. By returning the bias resistor to the
collector, the bias voltage is VcB. For the conducting transistor, VcB is much less than
for the off transistor, consequently, the trigger pulse is directed to the conducting
transistor. This steering scheme is particularly attractive if VcB for the conducting

• transistor is very small as it is in certain non-saturating circuits such as shown in

Figure 107.
Care should be taken that the time constant CTRT does not limit the maximum
counting rate. Generally RT can be made approximately equal to RK the cross-coupling
• resistor.

89
 TRANSISTOR SWITCHES

To design a shift register or a ring counter, it is only necessary to return RT

to the appropriate collector to achieve the desired switching pattern. The connections
for the shift register are shown in Figure 119(a) and (b). A ring counter connection
results from connecting the shift register output back to its input as shown in Figure
119(c).

f
I

- - - +°'"'
SYMMETRICAL TRANSISTOR TRIGGERS BOTH SIDES OF
-6V
TRIGGER TRANSISTORS SIMULTANEOUSLY SUPPLY CURRENT
TO TURN OFF ONE SIDE OF FLIP-FLOP AND TO DEVELOP A
I
FLIP-FLOP SIMJLTANEOlJSLY, VOLTAGE ACROSS THE COLLECTOR LOAD ON THEOTtERSIDE.

FIGURE 126(A) FIGURE 126(8)

I
I
CIRCUIT OF FIGURE 126(b} WITH TRIGGER STEERING
ADDED FOR COUNTER APPLICATION

TRIGGER CIRCUITS
USING TRIGGER POWER TO INCREASE SWITCHING SPEED
FIGURE 126(C)

By using transistors as trigger amplifiers, some circuits superpose the trigger on the
I .

output of the Hip-Hop so that an output appears even if the Hip-Hop is still in the
transient condition. Figure 126(a) shows a symmetrical transistor used for steering. The
transistor makes the trigger appear in opposite phase at the Hip-Hop collectors speeding
up the transition. The circuit in Figure 126(b) can have Re and RK so chosen so that
I
a trigger pulse will bring the collector of the transistor being turned on to ground even
though the transistor may not have started conducting. The circuit in 126(b) may be
converted to a steering circuit by the method shown in 126(c).
I .

90
•
LOGIC
•
Large scale scientific computers, smaller machine control computers and electronic
animals all have in common the facility to take action without any outside help when
• the situation warrants it. For example, the scientific computer recognizes when it has
completed an addition, and tells itself to go on to the next part of the problem. A
machine control computer recognizes when the process is finished and another part

• should be fed in. Electronic animals can be made to sense obstructions and change
their course to avoid collisions. Mathematicians have determined that such logical
operations can be described using the conjunctives AND, OR, AND NOT, OR NOT.
Boolean algebra is the study of these conjunctives, the language of logic. Transistors
• can be used to accomplish logic operations. To illustrate this an example from automo-
bile operation will be used.
Let us consider the interactions between the ignition switch, the operation of the motor
• and the oil pressure warning light. If the ignition is off, the motor and light will both be
off. If the ignition is turned on, but the starter is not energized the warning lamp
should light because the motor has not generated oil pressure. Once the motor is
running, the ignition is on and the lamp should be off. These three combinations of
• ignition, motor and lamp conditions are the only possible combinations signifying
proper operation. Note that the three items discussed have only two possible states
each, they are on or off. This leads to the use of the binary arithmetic system, which

• has only two symbols corresponding to the two possible states. Binary numbers will be
discussed later in the chapter.

• I M L Result
I =IGNITION
I 0 0 0 v M =MOTOR
2 x
• 3
0
0
0
I 0
I
x
L=LAMP
R =RESULT
I =ON
4 0 I I x 0 =OFF
5 I 0 0 x
• 6 I 0 I v
V= ACCEPTABLE
X =UNACCEPTABLE
N = 3 =NO. OF VARIABLES
7 I I 0 v
x 2N=a
• 8 I I I

Table of all possible combinations of ignition, motor and lamp conditions

FIGURE 127
• To write the expressions necessary to derive a circuit, first assign letters to the
variables, e.g., I for ignition, M for motor and L for lamp. Next assign the number one

• to the variable if it is on; assign zero if it is off. Now we can make a table of all pmsible
combinations of the variables as shown in Figure 127. The table is formed by writing
ones and zeros alternately down the first column, writing ones and zeros in series of
two down the second; in fours down the third, etc. For each additional variable,
• double the number of ones or zeros written in each group. Only 2N rows are written,
where N is the number of variables, since the combinations will repeat if more rows
are added. Indicate with a check mark in the result column if the combination repre-
sented in the row is acceptable. For example, combination 4 reads, the ignition is off
• and the motor is running and the warning light is on. This obviously is an unsatisfactory

91
 I
'
situation. Combination 7 reads, the ignition is on and the motor is running and the
warning light is off. This obviously is the normal situation while driving. If we indicate I
that the variable is a one by its symbol,and that it is a zero by the same symbol with
a bar over it, and if we use the symbol plus ( +) to mean "OR" and multiplication to
mean "AND" we can write the Boolean equation I.ML + IML + IML = R where R
means an acceptable result. The three terms on the left hand side are combinations 1, 6,
and 7 of the table since these are the only ones to give a check mark in the result
column. The plus signs indicate that any of the three combinations individually is
acceptable. While there are many rules for simplifying such equations, they are beyond
the scope of this book.

i
INPUTS

I
A PICTORIAL PRESENTATION
A PICTORIAL PRESENTATION
OF THE GATES REQUIRED TO
OF THE GATES REQUIRED TO EXPRESS THE BOOLEAN EQU-
EXPRESS THE BOOLEAN ATION
EQUATION ( I+M+LHT+M+LHI+M+U. R
IM[+IML+IMl• R

FIGURE 128 FIGURE 129

To express this equation in circuitry, two basic circuits are required. They are
named gates because they control the signal passing through. An "AND" gate generates
an output only if all the inputs representing the variables are simultaneously applied and
an "OR" gate generates an output whenever it receives any input. Our equation trans-
lated into gates would be as shown in Figure 128. Only if all three inputs shown for an
"AND" gate are simultaneously present will an output be generated. The output will
pass through the "OR" gate to indicate a result. Note that any equation derived from
the table can be written as a series of "AND" gates followed by one "OR" gate.
It is possible to rearrange the equation to give a series of "OR" gates followed by one
"AND" gate. To achieve this, interchange all plus and multiplication signs, and remove
bars where they exist and add them where there are none. This operation gives us,
I
(I + M + L) (I+ M + L) (I+ M + L) = R
In ordinary language this means if any of the ignition or motor or lamp is on, and
simultaneously either the ignition is off or the motor is on or the lamp is off, and
I '

simultaneously either the ignition is off or the motor is off or the lamp is on, then the
result is unacceptable. Let us apply combination 4 to this equation to see if it is accept-
able. The ignition is off therefore the second and third brackets are satisfied. The first
bracket is not satisfied by the ignition because it requires that the ignition be on.
I
However, the motor is on in combination 4, satisfying the conditions of the first bracket.
Since the requirements of all brackets are met, an output results. Applying combination
7 to the equation we find that the third bracket cannot be satisfied since its condi-
tions are the opposite of those in combination 7. Consequently, no output appears.
I '

Note that for this equation, an output indicates an unacceptable situation, rather than
an acceptable one, as in the first equation. In gate form, this equation is shown in
Figure 129.
92
•
Consider the circuits in Figure 130. The base of each transistor can be connected
through a resistor either to ground or a positive voltage by operating a switch. In
• Figure 130(a) if both switches are open, both transistors will be non-conducting except
for a small leakage current. If either switch A or switch B is closed, current will flow
through RL. If we define closing a switch as being synonymous with applying an input

• then we have an "OR" gate. When either switch is closed, the base of the transistor
sees a positive voltage, therefore, fo an "OR" gate the output should be a positive
voltage also. In this circuit it is negative, or "NOT OR". The circuit is an "OR" gate
with phase inversion. It has been named a "NOR" circuit. Note that if we define
• opening a switch as being synonymous with applying an input, then we have an
"AND" circuit with phase inversion since both switch A and switch B must be open
before the current through RL ceases. We see that the same circuit can be an "AND"

• or an "OR" gate depending on the polarity of the input .

• .--------e------------e + IOV

•
• (A)

• GATE USING NPN TRANSISTORS

IF CLOSING A SWITCH IS AN INPUT, THIS IS AN "OR" GATE
IF OPENING A SWITCH IS AN INPUT, THIS IS AN "AND" GATE

• NOTE: PHASE INVERSION OF INPUT

+1ov----------------.

• A 8

•
( 8)

• IK

• GATE USING PNP TRANSISTORS

IF CLOSING A SWITCH IS AN INPUT THIS IS AN "AND" GATE
IF OPENING A SWITCH IS AN INPUT THIS IS AN "OR" GATE
NOTE: PHASE INVERSION OF INPUT

• BASIC LOGIC CIRCUITS USING PARALLEL TRANSISTORS

FIGURE 130

The circuit in Figure 130(b) has identically the same input and output levels but
• uses PNP rather than NPN transistors. If we define closing a switch as being an input,
93
we find that both switches must be closed before the current through RL ceases. There-
fore, the inputs which made the NPN circuit an "OR" gate make the PNP circuit an
"AND" gate. Because of this, the phase inversion inherent in transistor gates does not
complicate the overall circuitry excessively.
Figure 13l(a) and (b) are very similar to Figure 130(a) and (b) except that the
r:
transistors are in series rather than in parallel. This change converts "OR" gates into I
"AND" gates and vice versa.

~
I

(A)

GATE USING NPN TRANSISTORS

IF CLOSING A SWITCH IS AN INPUT THIS IS AN ''.ANO" GATE
11 11
IF OPENING A SWITCH IS AN INPUT THIS IS AN 0R GATE
NOTE: PHASE INVERSION OF INPUT

(B)

GATE USING PNP TRANSISTORS

I
IF CLOSING A SWITCH IS AN INPUT THIS IS AN "OR u GATE
11 11
IF OPENING A SWITCH IS AN INPUT THIS IS AN AN0 GATE
NOTE: PHASE INVERSION OF INPUT
BASIC LOGIC CIRCUITS
USING SERIES TRANSISTORS
FIGURE 131

Looking at the logic of Figure 129, let us define an input as a positive voltage; a
lack of an input as zero voltage. By using the circuit of Figure 130(a) with three
transistors in parallel, we can perform the "OR" operation but we also get phase
inversion. We can apply the output to an inverter stage which is connected to an
"AND" gate of three series transistors of the configuration shown in Figure 13l(b).
I
An output inverter stage would also be required. This is shown in Figure 132(a).
By recognizing that the circuit in Figure 130(a) becomes an "AND" gate if the input
signal is inverted, the inverters can be eliminated as shown in Figure 132(b).
94
..
•
• (A)

INVERTERS COMPENSATE FOR PHASE INVERSION OF GATES

•
•
(8)
• PHASE INVERSION UTILIZED TO ACHIEVE "ANO" AND "OR" FUNCTIONS FROM THE SAME CIRCUIT.

Circuits representing (I + M + L) (f + M + L) (f + M + L) = R
• FIGURE 132

If the transistors are made by processes yielding low saturation voltages and high
base resistance, the series base resistors may be eliminated. Without these resistors the

• logic would be called direct-coupled transistor logic DCTL. While DCTL offers ex-
treme circuit simplicity, it places severe requirements on transistor parameters and
does not offer the economy, speed or stability offered by other logical circuitry.
The base resistors of Figure 132 relax the saturation voltage and base input voltage
• requirements. Adding another resistor from each base to a negative bias potential
would enhance temperature stability.
Note that the inputs include both "on" and "off" values of all variables e.g., both
• I and 1 appear. In order that the gates function properly, I and 1 cannot both be posi-
tive simultaneously but they must be identical and oppositely phased, i.e. when I is
positive T must be zero and vice versa. This can be accomplished by using a phase
inverter to generate T from I. Another approach, more commonly used, is to take I
• and Tfrom opposite sides of a symmetrical flip-fl.op.
+20V

•
•
27K

• -10
IF A OR B OR C IS RAISED FROM ZERO TO
12 VOLTS THE TRANSISTOR WILL CONDUCT.

• BASIC NOR CIRCUIT

FIGURE 133

"NOR" logic is a natural extension of the use of resistors in the base circuit. In the
• circuit of Figure 133, if any of the inputs is made positive, sufficient base current
95
 results to cause the transistor to conduct heavily. The "OR" gating is performed by
the resistors; the transistor amplifying and inverting the signal. The logic of Figure
129 can now be accomplished by combining the "NOR" circuit of Figure 133 with
the "AND" circuit of Figure 13l{a). The result is shown in Figure 134. In comparing the
circuits in Figure 132{a) and 134, we see that the "NOR" circuit uses one-fourth as r
many transistors and one-half as many resistors as the brute force approach. In fact if I
we recall that the equation we are dealing with gives R rather than R, we see that
we can get R by removing the output phase inverter and making use of the inherent
inversion in the "NOR" circuit.

IK
i
ALL TRANSISTORS
2N635

-IOV

(B)
"NOR" logic using inversion for
(A) "AND" gate

"NOR" logic using series transistors for

"AND" gate
FIGURE 134

Because of the fact that a generalized Boolean equation can be written as a series
of "OR" gates followed by an "AND" gate as was shown, it follows that such equations
can be written as a series of "NOR" gates followed by a "NOR" gate. The low cost
of the resistors used to perform the logic and the few transistors required make "NOR"
logic attractive.

I
I
DEFINITIONS
IK •MINIMUM CURRENT THROUGH RK FOR
TURNING TRANSISTOR ON
le •MINIMUM BASE CURRENT FOR
TURNING TRANSISTOR ON
I r •BIAS CURRENT TO KEEP TRANSISTOR
OFF AT HIGH TEMPERATURES
M •MAX. NUMBER OF INPUTS PERMITTED
N •MAX. NUMBER OF OUTPUTS PERMITTED
VBE •MAX. BASE TO EMITTER VOLTAGE WHEN
THE TRANSISTOR IS ON.
VcE' ¥~~·ir?.t~~ICS~~~ i~ g~.ITTER VOLTAGE WHEN

Circuit used for design of "NOR" circuitry

FIGURE 135

96
• LOGIC

A detailed "NOR" building block is shown in Figure 135. The figure defines the
basic quantities. The circuit can readily be designed with the aid of three basic
• equations. The first derives the current h under the worst loading conditions at the
collector of a stage.

(A)
• is the maximum Ico that is expected at the maximum junction temperature. The second
eqiiation indicates the manner in which h is split up at the base of the transistor.

• IK =In+ M (VcEM - VcEN + VBE -

RK
VEii)__ - (VBE - VcEN) + IcoM (B)

. where V cEN is the minimum expected saturation voltage, V CEM is the maximum expected
saturation voltage and V EB is the reverse bias required to reduce the collector current
to Ico. V EB is a negative voltage. The third equation ensures that V EB will be reached
to turn off the transistor.
lcoM + (V c_EM ;KV EB) M = J.r (C)
• Knowing h and choosing a convenient bias potential permits calculation of RT. In
using these equations, first select a transistor type. Assume the maximum possible
supply voltage and collector current consistent with the rating of the transistor and the
• maximum anticipated ambient temperature. This will ensure optimization of N and
M. From the transistor specifications values of IcoM, VBE, VcEN, and In (min) can be

.. calculated. Ia (min) is the minimum base current required to cause saturation. Re is

calculated from the assumed collector current. In equation (A) solve for h using the
desired value of N and an arbitrary value for RK. Substitute the value for IK in equa-
tion (B) along with a chosen value for M and solve for Is. While superficially Ia need
only be large enough to bring the transistor into saturation, increasing Ia will improve
• the rise time.

• INPUTS

•
•
•
• (o) CLAMPING DIODE REDUCES STORAGE
TIME TO INCREASE SPEED
IW CAPACITORS REDUCE STORAGE
TI ME TO INCR EASE SPEED

• FIGURE 136

Circuit speed can also be enhanced by using a diode as shown in Figure 136(a)
to prevent severe saturation or by shunting RK by a capacitor as in 136(b). The capaci-
• tors may cause malfunction unless the stored charge during saturation is carefully

97
controlled; they also aggravate crosstalk between collectors. For this reason it is pref-
erable to use higher frequency transistors without capacitors when additional speed
is required.

BINARY ARITHMETIC

Because bistable circuits can be readily designed using a variety of components

from switches to transistors, it is natural for counters to be designed to use binary
numbers, i.e. numbers to the base 2. In the conventional decimal system, a number
written as 2904 is really a contraction for 2 X 10 +
3
9 X 102 +
0 X 101+ 4 X 1. We
see that each place refers to a different power of 10 in ascending order from the right.
In the binary system, only two symbols are permitted, 0 and 1. All numbers are
constructed on the basis of ascending powers of 2. For example, llOll means
1 X 24 + 1 X 23+ 0 X 22 + 1 X 21+ 1 X 1. This is 27 in the decimal system. Using
this construction, we can compare the form of binary and decimal numbers.
Binary Decimal
0 0
1 1
10 2
ll 3
100 4
101 5
llO 6
lll 7
We see that the table in Figure 127 is actually a list of the first 8 binary numbers. The
count in a binary counter can be determined by noting whether each stage is in the
1 or 0 condition, and then assigning the appropriate power of 2 to the stage to construct
the number as in our examples.
To multiply a number by 10 we add a zero to the right hand side in the decimal
system. In the binary system, we add a zero when multiplying by two. This is equiva-.
lent to shifting the number one place to the left. This operation is done by a shift
register.
If it is required to count to a base other than 2, a binary counter can be modified
to counter to another base.
The rules for accomplishing the modification will be illustrated by constructing a
counter to the base 10.
Rule Example
1) Determine the number of binary stages M =
10
(N) required to count to the desired 23 < 10<24
new base (M) N=4
2) Subtract M from 2N 24 - 10 =6
3) Write the remainder in binary form 6=110
4) When the count reaches 2N-1, feed 2N-l 23 = =
1000
back a one to each stage having a one Feedback added gives
in the remainder 1 110
As additional pulses are added they will count through to M and then recycle to
zero. This method is based on advancing the count at the point 2N-i to the extent that
the indicated count is 2N when M input pulses are applied. The feedback is applied
when the most significent place becomes a one but it is imperative that feedback
be delayed until the counter settles down in order to avoid interference with the
normal counter action.
98
•
TETRODE TRANSISTORS
• Transistor types 3N36 and 3N37 are grown germanium NPN tetrodes manufac-
tured by the meltback process. The 3N36 is generally used between 30 MC and 90

• MC while the 3N37 is used from 90 MC to 200 MC. Primarily intended for high
frequency use as RF amplifiers, IF amplifiers, mixers and oscillators, these transistors
are also excellent for wide band video amplifiers. The use of base-two for AGC control
is also attractive in that very little detuning of the collector circuit results.
Formerly designated by the development number ZJ-22, these types are now in
quantity production. The case dimensions of these transistors conform to the
JETEC T0-12 package. They are electrically isolated from the case, which may be

• grounded by the indexing tab, if required for shielding purposes. The design is suitable
for automatic insertion into printed circuit boards.
It has long been recognized that smaller bar size will improve high frequency
transistor performance. In particular, small cross section base regions will reduce the
• base spreading resistance, r'b, (or high frequency base resistance). High r'1i is the most
degradating high frequency parameter and is almost always the performance-limiting
factor. One approach to reducing r' b is to use physically minute bars. While this solves

• the electrical problem and is technically possible, the cost of manufacture is high and
mechanical reliability is low. To overcome these problems, G.E. uses a reasonable
size bar and obtains the high frequency performance by electrical means. With the
addition of a second base lead and the application of a suitable cross-base bias, an
• electric field is established which "compresses" the active base region and thereby brings
about a significant reduction in the high frequency base resistance. See Figure 137 .

•
.. c
•
•
• -------tll
Effect of base-two bias on current distribution
FIGURE 137

• Improvements in base resistance of the order of 10 to 1 are achieved by the tetrode

over the triode. Since the collector-base junction is normally biased in the inverse
direction, the addition of base-two bias has relatively little effect on the collector

• junction. It merely increases the average bias by VB 1 B2 /2 which at any collector bias
over a few volts has practically no effect.
Operation in the common emitter configuration is generally recommended for sev-

• eral reasons. Operation is more stable and is less likely to be regenerative. Power gain
is higher except at the upper frequency limits. The effect of collector capacity on
99
TETRODE TRANSISTORS

internal feedback is approximately halved when base-two is connected to a-c ground.

See Figure 138 for a simplified equivalent circuit.

c
cc
2

Bl i--~~~--t +---- OUTPUT

1DE AL
INPUT

f'.·

Approximate equivalent circuit of tetrode

FIGURE 138

As can be seen, half the collector capacity is across the load and can be tuned
out. Thus, it does not contribute to the internal feedback. Output impedance is
increased by a factor of 2, with a corresponding improvement in high frequency
available power gain. Figure 139 shows the typical power gain variations of a 3N36
at 60 MC with collector voltage, emitter current and base-two bias. Curves for the
3N37 at 150 MC have the same general shape.
14 14

12
~

12 -
-...........
10
..........
~

10
( "'- ...
I 'r--
~ 8

ci 6
0.:
I
4 4

4 6 3 4
COLLECTOR VOLTS EMITTER CURRENT
(MA.)

14

12
v--
10
/
I
I
4

.5 L5 2.5 3 3.5
CROSS-BASE BIAS
(VOLTS)

Power gain variations with bias

FIGURE 139

100
• TETRODE TRANSISTORS

Typical d-c biasing methods are shown in Figures 140 and 141. Recommended
conditions are:
• Collector to emitter voltage, V cE
=
voltage, VB 1 B 2
=
5 volts; base-one to base-two
2 volts; base-one to base-two current, h 1 B 2=
=
.5 ma; emitter current, IE 1.5 ma .
•
• +7

•
• COMMON EMITTER

Typical biasing methods

-12

FIGURE 140

•
82

• 92

•
• +

• COMMON BASE

Typical biasing methods

FIGURE 141

• Typical circuit configurations utilizing tetrode transistors are shown in Figures

142, 143, and 144.
+
•
•
•
•
CRYSTAL CONTROLLED OSCILLATOR

FIGURE 142

101
TETRODE TRANSISTORS

AGC AMPLIFIER

BASE 2 AGC FOR RF AND IF AMPLIFIERS

FIGURE 143

RETRACE
SUPPRESSION

TV VIDEO AMPLIFIER (FOR HIGH Gm PICTURE TUBES)

FIGURE 144

102
• SILICON CONTROLLED RECTIFIER

• The Silicon Controlled Rectifier is neither completely a transistor nor a rectifier,

but by combining features of both of these devices, the Controlled Rectifier opens up
broad new fields of application for semiconductors. The Controlled Rectifier is a
• PNPN semiconductor consisting of three rectifying junctions with three terminals as
indicated in Figure 145A. Its corresponding schematic symbolis depicted in Figure 145B.
A 15 ampere, 300 volt version of the Controlled Rectifier is shown in Figure 145C .

• CATHODE GATE

• N
p
N
• p

• FIGURE 145 (A) FIGURE 145(8) FIGURE 145(C)

The anode to cathode electrical characteristics of the Controlled Rectifier are shown
• in Figure 146. With reverse voltage impressed on the device (cathode positive), the
Controlled Rectifier blocks the flow of current as shown in the third quadrant of Figure
146. With positive voltage applied to the anode (first quadrant), the Controlled Rectifier

• also blocks the flow of current up to the breakover point indicated by V Bo. At this
point, the blocking resistance of the Controlled Rectifier decreases almost instanta-
neously to a very low value and current flow is then limited only by the external
voltage and circuit impedance. At anode to cathode voltages less than VBo, the Con-
• trolled Rectifier can be switched into the high-conduction state by a low-level gate-to-
cathode current. This latter method of "turning on" the Controlled Rectifier is· used
in the majority of applications since it permits precise control of large blocks of power

• by very low power signal sources. The Controlled Rectifier can be "turned off" by
reducing the flow of anode current to less than the holding value Iu. This can be ac-
complished by reducing the supply voltage to zero as occurs every cycle in a-c circuits,

r
or by diverting anode current around the Controlled Rectifier for the few microseconds

• required for the device to recover its blocking state .

IF
CATHODE GATE
roRWARD
•
•
J3
J2
N

N
VR
I
;~·~-~-- ~ Vso.Iso

Is
JI PIV
p

• ANODE
REVERSE

IR

• FIGURE 146

103
SILICON CONTROLLED RECTIFIERS

Figure 147 illustrates one way in which the Controlled Rectifier can be used to switch
d-c loads. To close the switch, the gate circuit is energized momentarily from the
main d-c supply through capacitor C and some kind of signal device, here represented
by a "Start'' push button. As soon as the "Start" button is released, C charges to
essentially the d-c supply voltage through resistor r. When the "Stop" button is de-
pressed momentarily, the positive terminal of C is connected to ground. This action
impresses a reverse voltage across the Controlled Rectifier for the few microseconds
necessary to return it to the blocking state.

r I
+ MEGOHM

rsTOP
•
D.C. STATIC SWITCH
FIGURE 147

An a-c static switch is illustrated in Figure 148. It is ideal for applications involving
a high duty cycle because it eliminates contact bounce and wear as experienced on
relays or contactors. The control device indicated can consist of the contacts of a
thermostat, pressure switch, current relay, or a voltage sensitive device. Signals from
magnetic cores, transistors, or tubes can also be used to control sizeable blocks of
power in this type of circuit. Resistor R is provided to limit gate current, and the
diodes serve to channel the gate current through the proper Controlled Rectifier as the
a-c input voltage swings alternately positive and negative.
CONTROL DEVICE

AC
INPUT

LOAD
A.C. STATIC SWITCH
FIGURE 148

By phase shifting the gate signal with respect to the anode voltage, the Controlled
Rectifier can be used to control the magnitude of the output voltage in addition to
switching it "on" and "off".
104
•
POWER SUPPLIES
II
Both silicon and germanium cells can be used in the types of power supplies illus-
trated in Figures 149, 150, 151, and 152. All four of these power supplies are designed for

• low ripple output and high reliability at minimum expense. However, they are limited
to Class A types of load in which the average load current does not vary with the
amplitude of the impressed signal. Class B loads require a stiffer voltage source than

• RI
G.E.
IN91

•
• OUTPUT
VOLTAGE
v
OUTPUT
CURRENT RI Cl R2* APPROX.
RIPPLE

• 12 VOLTS I MA. 43K, l/2W

250µ.f
15 VOLT
ELECTROLYTIC
IBOK
l/2W
0.1%

PRE-AMP POWER SUPPLY

250µ.f FIGURE 149
12 VOLTS 2 MA. 22K,l/2W

•
15 VOLT IOOK 0.1%
ELECTROLYTIC l/2W

250µ.f
25 VOLTS 2 MA. 18K,l/2W 30 VOLT IBOK 0.1%

•
ELECTROLYTIC l/2W

*TO ADJUST VOLTAGE OUTPUT FOR OTHER OUTPUT CURRENTS,

ADJUST R2 .

•
G. E.
Cl RI IN91 R2

• o---1
117\l AC G. E.
IN91
C2
+
C3

• OUTPUT OUTPUT Cl
VOLTAGE CURRENT RI R2 R3* METALLIZED C2 C3 APPROX.
v AllPER RIPPLE

THREE 250141 250141

12 VOLTS IOOMA. 2n 100'2 2200'2
2-14! IN 15 l.a..T 15 VOLT 0.5%
IWATT 2W IW
PARALLEL ELECTROLYTIC ELECTROIYTIC
GENERAL PURPOSE 200V
TRANSISTOR.
FOUR 250141 25014!
• POWER SUPPLY 2n 100'2 2200'2 2-141 IN 15 VOLT 15 VOLT
12 VOLTS 150MA 0.5%
FIGURE 150 IWATT IOW IW PARALLEL ELECTROLYTIC ELECTROLYTIC
200V

TWO

•
100141 250141
2n 250'2 10.ooon 2-141 IN 50VOLT 30 VOLT
25\IOLTS 50MA 0.5%
IWATT 2W IW AllRALLEL ELECTROLYTIC ELECTROLYTIC
200V

* TO
• .0.DJUST VOLTAGE OUTPUT FOR OTHER OUTPUT CURRENTS,
ADJUST R3.

105
POWER SUPPLIES

Tl

117V. AC

I
OUTPUT OUTPUT RECT. APPROX
RI R2 Cl C2 I RIPPLE
VOLTAGE CURRENT
v

40 VOLTS I AMP. 3,n 20.n 300µf IOOOµf 1%

IO WATTS 20WATTS 150 VOLT 50VOLT
ELECTROLYTIC ELECTROLYTIC
~
~
u.i
(!)
0:
:::>
~

Tl - U. TC. R-43 AUTOTRANSFORMER OR EQUAL

2: I WINDING RATIO

POWER SUPPLY FOR HIGH POWER CLASS A TRANSISTOR AMPUFIER

FIGURE 151

the resistance-capacity combinations of the illustrated power supplies can provide. For
Class B and other loads that require good voltage regulation, it is recommended that
the line voltage be reduced through transformers rather than series resistance or
capacitance, and that chokes be substituted for the series resistance in the filter
elements. Alternately, a regulated power supply such as shown on page 108 can be used.
This circuit uses a step-down transformer and full-wave rectifier as a source of
unregulated DC. A power transistor acts as a series regulator and mercury batteries
are used for the voltage reference. The battery drain is very small so their life is essen-
tially equal to the shelf life.
When a semiconductor rectifier feeds a capacity-input filter such as in Figures 149
through 152, it is necessary to limit the high charging current that flows into the input
capacitor when the circuit is energized. Otherwise this surge of current may destroy
the rectifier. Resistor Rl is used in Figures 149 through 152 to limit this charging
current to safe values.
As shown, the four power supplies do not isolate the load circuit from the 117 volt
AC line. In Figures 149and150, the load circuit may be grounded provided a polarized
106
• POWER SUPPLIES

•
• RI

• OUTPUT OUTPUT
VOLTAGE CURRENT RI R2 Cl C2 R3* RECT APPROX.
v
• I RIPPLE

40VOLTS I AMP 5.0. 75.0. 100µ.f 300µ.f 1000.n 1%

II 20W IOOW 150 VOLTS 50 VOLTS 2W
<XI
M
II)
ELECTROLYTIC ELECTROLYTIC ~
w
ci
a::
::>
0
u.

.. * TO ADJUST
ADJUST R3.
VOLTAGE OUTPUT FOR OTHER OUTPUT CURRENTS,

• POWER SUPPLY FOR HIGH POWER CLASS A TRANSISTOR AMPUFIER

FIGURE 152

plug is used on the AC line cord to ensure that the grounded side of the AC line is

• always connected to the grounded side of the load. Figures 151 and 152 utilize what is
called a single phase bridge rectifier circuit to achieve full wave rectification, and
hence, lower ripple. Since ground cannot be carried through on a common line to the

• load in this type of circuit, it is necessary to insulate the load "ground" from accidental
contact with true ground, or to insert an isolation transformer ahead of the power
supply to isolate the two systems. Careful attention to these factors is of particular
importance when supplying DC to high gain amplifiers to eliminate hum.
As illustrated, Figures 149 and 150 develop a negative· output voltage with respect
to ground as required when supplying P-N-P transistors with grounded emitters. To
develop a positive voltage with respect to ground, it is only necessary to reverse the

• rectifiers and electrolytic capacitors in the circuit .

The power supply of Figure 151 uses an autotransformer to reduce the line voltage
to one-half normal value before applying to the rectifiers. Provided the additional heat
dissipation is not objectionable, Figure 152 provides a cheaper means of achieving the
same objective by using resistor R2 to reduce the voltage to the desired value.

107
 I
I
COMPLETE POWER SUPPLY CIRCUITS

I
I
I
I
117VAC Cl-15001-'f,50 VOLTS
SILICON BRIDGE-FOUR- IN1692
POWER SUPPLY FOR FIVE-WATT AMPUFIER
I
FIGURE 153

I
I
I
I
I
Cl-15001-'f ,50V
1
SILICON BRIDGE - FOUR- IN537 S
POWER SUPPLY FOR DUAL SIX-WATT AMPUFIER
I
FIGURE 154

I
I
108
r
·----' .'"
Ir'_,,,, .~c

• I I
• • • • • • • • •

TRIAD
2.n
F-61U 5W
__ 50V (NO LOAD)
45V (.4A)

f~*C3
I E ·-·~

Tl ~ +
33 V.A.C.

! I~
.....i...-c1
T -, ' - 11? w AMPLIFIER #2
50V (NO LOAD)
- - 45V C.4A)

......
0
115VAC - 2.n
5W
tD

Cl - 1500 )Jf, 50 VOL TS

C2 - 1500 )Jf 1 50 VOL TS
C3- 1500 )Jf, 50 VOLTS
C4- 1500 )Jf, 50 VOLTS
SILICON BRIDGE- FOUR- INlll5 "D
0
~
I'll
;u
POWER SUPPLY FOR DUAL TEN-WATT AMPUFIERS Cl>
FIGURE 155 c
"D
"D
!:
I'll
Cl>
 TRANSISTOR SPECIFICATIONS

HOW TO READ A SPECIFICATION SHEET

Semiconductors are available in a large variety of different types, each with its own
unique characteristics. At the present time there are over 2200 different types of diodes
and rectifiers and over 750 different types of transistors being manufactured.
The Characteristics of each of these devices are usually presented in specification
sheets similar to the ones represented on the next two pages. These specifications,
particularly the transistor specification on the next page, contain many terms and
ratings that are probably new to you, so we have selected several of the more important
ones and explained what they mean.

NOTES ON TRANSISTOR SPECIFICATION SHEET

(j) The lead paragraph is a general description of the device and usually contains
three specific pieces of information - The kind of transistor, in this case a silicon NPN
triode, - A few major application areas, amplifier and switch, - General sales features,
electrical stability and a standard size hermetically sealed package.
® The Absolute Maximum Ratings are those ratings which should not be exceeded
under any circumstances. Exceeding them may cause device failure.
@ The Power Dissipation of a transistor is limited by its junction temperature.
Therefore, the higher the temperature of the air surrounding the transistor (ambient
temperature), the less power the device can dissipate. A factor telling how much the
transistor must be derated for each degree of increase in ambient temperature in de-
I
grees centigrade is usually given. Notice that this device can dissipate 150mw at 25°C.
By applying the given derating factor of lmw for each degree increase in ambient
temperature, we find that the power dissipation has dropped to Omw at 175°C, which I
is the maximum operating temperature of this device.
@ All of the remaining ratings define what the device is capable of under specified
test conditions. These characteristics are needed by the design engineer to design
matching networks and to calculate exact circuit performance.
I
@ Current Transfer Ratio is another name for beta. In this case we are talking about
an a-c characteristic, so the symbol is hre. Many specification sheets also list the d-c
beta using the symbol hFE· Beta is partially dependent on frequency, so some specifica-
I
tions list beta for more than one frequency.
@ The Noise Figure is a measurement derived to evaluate the amount of electrical
noise produced by the transistor in a circuit.
(j) The Frequency Cutoff L11 of a transistor is defined as that frequency at which the
grounded base current gain drops to .707 of the lkc value. It gives a rough indication
of the useful frequency range of the device.
@ The Collector Cutoff Current is the leakage current from collector to base when
no emitter current is being applied. This leakage current varies with temperature
changes and must be taken into account whenever any semiconductor device is de-
signed into equipment used over a wide range of ambient temperature. I
@ The Switching Characteristics
given show how the device re-
sponds to an input pulse under the
ojf=l_.--- - I i
specified driving conditions. These l ..jts
I --------- -
I 90%
response times are very dependent

I
I
I
----1~!!_ ___ _
on the circuit used. The terms used
tr
are explained in the curves at right. 'td

llO
I
• TRANSISTOR SPECIFICATIONS

The General Electric Type 2N332 is a silicon NPN triode

transistor intended for amplifier applications in the audio 2N332
• and radio frequency range and for general purpose switch-
ing. It is a grown junction device with a diffused base.
Outline Drawing No. 4

Electrical stability is insured by means of a minimum 150

1
• hour 200°C cycled aging operation included in the manufacturing process. All units
are subjected to a rigorous mechanical drop test to control mechanical reliability. This
transistor is hermetically sealed in a welded case. The case dimensions and lead con-
figuration conform to the JETEC T0-5 package and are suitable for insertion in
• printed boards by automatic assembly equipment.

SPECIFICATIONS
• ®-< ABSOLUTE MAXIMUM RATINGS: (25°Cl
Voltages
Collector to Base (Emitter Open) VcBo 45 volts
Emitter to Base ( Collector Open) VEHO
II I volt

Collector Current le 25ma

.. Power':'
Collector Dissipation ( 25°C)
Collector Dissipation ( I 25°C )
p('
Pr:
I50mw
50mw
Temperature Range
- Storage T~n~ -65°C to 200°c
Ill Operating TA -55°C to I 75°C
':'Derate Imw /°C increase in ambient temperature.

• ~
ELECTRICAL CHARACTERISTICS : (25°Cl
(Unless otherwise specified; VcB = 5v;
IE =-1 ma; f = lkcl

Small Signal Characteristics MIN. HOM. MAX.

• @-c Current Transfer Ratio

Input Impedance
Reverse Voltage Transfer Ratio
hre
hib
hrb
9
30
.25
I5
53
1.0
20
80
5.0
ohms
x lQ-4
Output Admittance hob 0.0 .25 1.2 µmhos
Power Gain
( V cE = 20v; IE = -2ma; f = Ikc;
• @-c Ro= IK ohms; RL = 20K ohms)
Noise Figure
Ge
NF
35
28
db
db

High Frequency Characteristics

• ®-( Frequency Cutoff

(VcB = 5v; IE= -Ima)
Collector to Base Capacity
(VcB = 5v; IE= -Ima; f = Imc)
fab
Cob
I5
7
me
µµ£
Power Gain (Common Emitter)
( V CB = 20v; IE = -2ma; f= 5mc) Ge I7
•
db

D-C Characteristics
Collector Breakdown Voltage
(IcBo = 50µa; IE= O; TA= 25°C) BVcBo 45 volts

• @{
Collector Cutoff Current
(VcB = 30v; IE= O; TA= 25°C) le BO .02 2 µa
(VcB = 5v; IE= O; TA= I50°C) le BO 50 µa
Collector Saturation Resistance
(IB =Ima; Ic = 5ma) Hsr: 80 200 ohms

• Switching Characteristics
( lB 1 = 0.4 ma; lB 2 = -0 4 ma;

• ®{
Ic = 2.8 ma)
Delay Time td .75 µsec
Rise Time tr .5 µsec
Storage Time ts .05 µsec
Fall Time tr .I5 J,tSeC

.. 111
 TRANSISTOR SPECIFICATIONS I
NOTES ON RECTIFIER SPECIFICATION SHEET

The performance of a rectifier is judged primarily on four key measurements, or

parameters. They are always given for specific ambient conditions, such as still air
I
and 55°C, and are based on a 60 cycles per second (A-C) input with the rectifier
feeding a resistive or inductive load (see @ below). A capacitive load will increase
the Peak Inverse Voltage and necessitate a different set
of ratings than shown here. These key parameters are: n
n______l_PEAKINVERSE
I
\_/Vt VOLTAGE
(j) Maximum Peak Inverse Voltage (usually referred
to as PIV), the peak a-c voltage which the unit will
withstand in the reverse direction; ® Maximum Allow-
60 CPS (CYCLES PER SECOND)
A-C INPUT
I
able D-C Output Current, which varies with ambient
temperature; @ Maximum Allowable One-cycle Surge Current, representing the
maximum instantaneous current which the rectifier can withstand, usually encount-
ered when the equipment is turned on; @ Maximum Full-load Forward Voltage Drop,
measured with maximum d-c output flowing and maximum PIV applied. This is a
measure of the rectifier's efficiency.

1N1692, 1N1693
These alloy junction silicon rectifiers are designed
for general purpose applications requiring maxi-
mum economy. These rectifiers are hermetically
I
1N1694, 1N1695 sealed and will perform reliably within the oper-
ating specifications.

RATINGS AND SPECIFICATIONS

@ f - - - - - - - - - - - - - - - 1 ( ( 6 0 CPS, Resistive or Inductive)
1 N1692 1N1693 1N1694 1N1695
J)-{ Max. Allowable Peak Inverse Voltage 100 200 300 400 volts
Max. Allowable RMS Voltage 70 140 210 280 volts
Max. Allowable Continuous Reverse
DC Voltage 100 200 300 400 volts
~ Max. Allowable DC Output 100°C Ambient 250 250 250 250 ma
Max. Allowable DC Output 50°C Ambient 600 600 600 600 ma
~ Max. Allowable One Cycle Surge Current 20 20 20 20 amps
@---(Max. Full Load Forward Voltage Drop
(Full cycle average at I00°C) .60 .60 .60 .60 volts
Max. Leakage Current at Rated PIV
(Full cycle average at I00°C)
Peak Recurrent Forward Current
Max. Operating Temperature ~
0.5
2.0
0.5
2.0
+ 115°C
0.5
2.0
0.5 ma
2.0 amps
... I
The other ratings or specifications are .additional yardsticks of performance which
are more or less critical depending on the operating conditions to be experienced.
For instance, the 1N1692 Series for which specifications are shown, being silicon recti-
I
fiers, are able to show a higher range of Ambient Operating Temperatures with higher
output than a germanium unit would, and are preferred on this basis for many appli-
cations. Maximum Leakage CuN"ent refers to the reverse current which will How when
I
voltage is applied, and here, too, can be a critical measure of performance for specific
applications such as magnetic amplifiers.
Sometimes there is confusion as to whether a unit is a Diode or a Rectifier. Actually
the word Diode means "two" and both rectifiers and diodes have two elements.
I
However, rectifiers are capable of handling much larger currents than diodes. The term
diode is used to describe units used in high frequency, low current, signal applications
such as in high frequency circuits of television receivers.
I
112
I
• TRANSISTOR SPECIFICATIONS

EXPLANATION OF PARAMETER SYMBOLS

• SMALL SIGNAL & HIGH FREQUENCY PARAMETERS (at specified bias)

Symbols Abbreviated Definitions
hob Com. base - output admittance, input AC open-circuited

• htb Com. base - input impedance, output AC short-circuited

h
hrb

hrb Com. base

Com. emitter
_ _r e _ _ _ _ _ _ _ _ _ _ _ _
!
Com. base - reverse voltage transfer ratio, input AC open-circuited

forward current transfer ratio,

output AC short-circuited
hrc Com. collector

hoe, hte Examples of other corresponding com. emitter symbols

• fab Com. base the frequency at which the magnitude of the small-
signal short-circuit forward current transfer ratio is
fae Com. emitter 0.707 of its low frequency value.

fMAX Maximum frequency of oscillation

1111
Cob Collector to base } Capacitance measured across the output terminals
_C_o_e_ _ _ _ _ _C_o_l-le_c_t_o_r-to_e_m_i_·u_e_r_ with the input AC open-circuited

• Ge
Base spreading resistance

Com. emitter Power Gain (use Gb for com. base )

CGe Conversion gain

• NF Noise Figure

SWITCHING CHARACTERISTICS (at specified bias)

Ohmic delay time

II tr Rise time These depend on both transistor

Storage time and circuit parameters
ts
tr Fall time

• VcE (SAT.) Saturation voltage at specified le and Is. This is defined only with the collector
saturation region.

Com. emitter - static value of short-circuit forward current transfer ratio, hFE =-ii--
• hFE (INV) Inverted hFE (emitter and collector leads switched)

• Is2 (MOD)
UNIJUNCTION TRANSISTOR MEASUREMENTS
Modulated interbase current

Ip
• Iv
Peak point emitter current

Valley current

lnterbase resistance

• Vv
lnterbase voltage

Valley voltage

7/ Intrinsic stand-off ratio. Defined by VP= 71 Vss + 2~~ (in ° Kelvin)

113
 DC MEASUREMENTS
le, IE, IB DC currents into collector, emitter, or base terminal

Ven, VEB Voltage collector to base, or emitter to base

VcE Voltage collector to emitter

VBE Voltage base to emitter

Breakdown voltag<>, collector to base junction reverse biased, emitter open-circuited

BVcno (value of le should be specified)

Voltage collector to emitter, at zero base current, with the collector junction
VCEO reverse biased. Specify le.

Breakdown voltage, collector to emitter, with base open-circuited. This may be a

BVCEO function of both "m" (the charge carrier multiplication factor) and the hrb of the
transistor. Specify le.

I
VcER Similar to V CEO except a resistor of value "R" between base and emitter.

VcEs Similar to V CEO but base shorted to emitter.

Punch-through voltage, collector to base voltage at which the collector space

VPT charge layer has widened until it contacts the emitter junction. At voltages above
punch-through, VPT = VcB - VEB

VccB Supply voltage collector to base ~ NOTE - third subscript

VccE Supply voltage collector to emitter may be omitted if no
VBBE Supply voltage base to emitter confusion results.

Collector current when collector junction is reverse biased and emitter is DC

leo, leno open-circuited.

I
IEo, IEBO Emitter current when emitter junction is reverse biased and collector is DC
open-circuited.

foEO Collector current with collector junction reverse biased and base open-circuited.

·collector current with collector junction reverse biased and base shorted to emitter.

IE cs Emitter current with emitter junction reverse biased and base shorted to collector.

Rsc Collector saturation resistance

OTHER SYMBOLS USED

I
I
PcM Peak collector power dissipation for a specified time limit

PcAv Average maximum collector power dissipation

Po Power output

Z1
Zo
Input impedance

Output impedance
I
Operating Temperature

Junction Tempnature
I
I
TsTG Storage Temperature

NOTE: In devices with several electrodes of the same type, indicate electrode by number. Example:
IB2. In multiple unit devices, indicate device by number preceding electrode subscript. Example: he.
Where ambiguity might arise, separate complete electrode designations by hyphens or commas. Exam-
ple: V ic1-2c1 (Voltage between collector # 1 of device # 1 and collector # 1 of device #2. )
NOTE: Reverse biased junction means biased for current flow in the high resistance direction. I
114
I
 TRANSIST OR SPECIFICA TIONS
• TRANSIS TOR SUMMAR Y

The table below shows all current General Electric Signal Transistor types along
• with the maximum dimension of the package base and general application area.
PNP PNP NPN NPN
INLINE LEAD TRIANGULAR LEAD INLINE LEAD TRIANGULAR LEAD
.370 MAX .530 MAX .370 MAX
• AMPLIFIER
.460 MAX
2N332
2N333
>-0:: z
~-

& COMPUTER 2N335

0-----

• <(
I-
0
u ,__ 2N489*
2N490*
J
-::i
2N491*
UNIJUNCT ION 2N492*
(/)
~ 2N493*
• 2N494*
• *A PN Device
2N43
0::
• I.LI
I-
::> AUDIO
~N43A
2N44
----zN44A

. 0..
~
0
u :E
PNP 2N524
2N525
2N526
2N527
:::> 2N123
2N394
• z ..--2N395
• .J
<(
:E
COMPUTER
PNP
2N396
2N397
:$ 0:: 2N450
0:: lL1 2N518
• I-
U)
::>
C>
COMPUTER
2N78
2N167
2N634
c NPN 2N635
z 2N636
• TETRODE NPN
3N36
3N37
2N168A

• IF NPN
2Nl69
2NI69A
2N292
2N293
2Nl86
• I-
z
2N186A
2N187
I.LI :E 2N187A
~ :::> 2Nl88

• z z ---missA

<
I-
<(
:E
2N189
2N190
2N191
0:: 0:: ~N192
AUDIO
• I.LI
I-
z
lL1
C> PNP ~241
2N241A
I.LI 2N265
2N319

• 2N320
2N321
2N322
2N323
2N324
• 2N508

115
TRANSISTOR SPECIFICATIONS
I
GENERAL ELECTRIC
TRANSISTOR SPECIFICATIONS

2N43
Outline Drawing No. 1
The General Electric Type 2N43
tion Transistor Triode is a PNP
mended for high gain, low power
enclosure is provided by use of
Germanium Alloy Junc-
unit particularly recom-
applications. A hermetic
glass-to-metal seals and
I
welded seams.

I
SPECIFICATIONS

ABSOLUTE MAXIMUM RATINGS: (25°C)

Voltages
Collector to Base Vea -45 volts
Collector to Emitter VeE -30 volts
Emitter to Base VEa -5 volts

Collector Current le -300ma

Power
Total Transistor Dissipation 240mw

Temperature
Storage
.Operating Junction
Ts Ta
Ti
Max. +100 °C Min. -65 °C
Max.+ 85 °C
I
ELECTRICAL CHAR4CTERISTICS: <25°C) DESIGN
Small Signal Characteristics MIN. MAX. CENTER
(Vea or VeE
f=
= -5 volts, lu =
1 ma;
270 cps unless otherwise specified)
Common base output admittance
(input A-C open circuited) hob .1 1.5 .8 µmhos
Forward current transfer ratio
(output A-C short circuited)
Common base input impedance
(output A-C short circuited)
Common base reverse voltage transfer
hte
h1b
30
25
66
35
42
29 ohms
I
ratio (input A-C open circuited) hrb 1 15 5 x 10-•
Common base output capacity (input
A-C open circuited; f
Noise Figure (f = 1 Kc; BW
=
1 me)
Frequency cutoff (Common Base)
= 1 cycle)
Cob
NF
fab
20
.5
60
20
3.5
40
6
1.3
µµ£
db
me
I
D-C Characteristics
Collector cutoff current ( V cao = -45v)
Emitter cutoff current ( VEBO =
Base input voltage, common emitter
-5v)
leo
h:o
-16
-10
-8
-4
µamps
µamps
j
(VeE = -1 volt; le= -20 ma) VaE -.23 volts
Common emitter static forward current
=
transfer ratio (VeE
le= -20 ma)
-1 volt;
Common emitter static forward current
transfer ratio ( V CE
le = -100 ma)
= -1 volt;
hFE

hFg
34

30
65 53

48
I
Collector to emitter voltage ( 10 K ohms
resistor base to emitter; le = -0.6 ma)
Punch-through voltage

Thermal Characteristics
V c~m
V PT
-30
-30
volts
volts
I
Junction temperature rise/unit collector
or emitter dissipation (in free air)
Junction temperature rise/unit collector
or emitter dissipation (infinite heat sink)
0.25
0.11
°C/mw
°C/mw I
116

I
• TRANSISTOR SPECIFICATIONS

The 2N 43A is a commercial version of the military type

2N43A per MIL-T-19500, and is tested to the same elec- 2N43A
• trical, mechanical and degradation tests .
Outline Drawing No. 1

•
The General Electric Type 2N44 Germanium Alloy Junc-
• tion Transistor Triode is a PNP unit particularly recom-
mended for medium gain, low power applications. A her-
2N44
metic enclosure is provided by use of glass-to-metal seals Outline Drawing No. 1
and welded seams .
• ABSOLUTE MAXIMUM RATINGS: (25°Cl
SPECIFICATIONS

.. Voltages
Collector to Base
Collector to Emitter
Emitter to Base
Collector Current
VcB
VcE
VEB
le
-45 volts
-30 volts
-5 volts
-300 ma
Power
Total Transistor Dissipation 240mw
• Temperature
Storage TsTG Max. +100 °C Min. -65 °C
Max.+ 85 °C
Operating Junction TJ
ELECTRICAL CHARACTERISTICS: (25°Cl DESIGN

• Small Signal Characteristics

(VcR or VcE = -5 volts, IE= 1 ma;
f = 270 cps unless otherwise specified)
MIN. MAX. CENTER

Common base output admittance

(input A-C open circuited) hob .1 1.5 .9 µ,mhos
Forward current transfer ratio
• (output A-C short circuited)
Common base input impedance
(output A-C short circuited)
hte

htb 27 38
25
31 ohms
Common base reverse voltage transfer
ratio (input A-C open circuited) hrb 1.0 13 4 x 10-~
Common base output capacity (input
• A-C open circuited; f
Noise Figure ( f =
=
1 Kc; BW
Frequency cutoff (Common Base)
1 me)
= 1 cycle)
Cob
NF
fab
20
.5
60
15
3.0
40
6
1.0
µ,µ,£
db
me
D-C Characteristics
Collector cutoff current ( V CRO = -45v) leo -16 -8 µ,amps

• Emitter cutoff current (VERO = -5v )

Base input voltage, common emitter
Common emitter static forward current
ho
VBE
-10 -4
-.25
µ,amps
volts

transfer ratio (VcE = -1 volt;

18 43 31
le= -20 ma)
Common emitter static forward current
• transfer ratio (VcE
le= -100 ma)
= -1 volt;
Collector to emitter voltage ( 10 K ohms
13 25

=
resistor base to emitter; le -0.6 ma) VcER -30
-30
volts
volts
Punch-through voltage VPT

• Thermal Characteristics
Junction temperature rise/unit collector
or emitter dissipation (in free air) 0.25 °C/mw
Junction temperature rise/unit collector
or emitter dissipation (infinite heat sink) 0.11 °C/mw

•
• The 2N44A is a commercial version of the military type
2N44A per MIL-T-19500, and is tested to the same elec- 2N44A
• trical, mechanical and degradation tests .
Outline Drawing No. 1

117
TRANSISTOR SPECIFICATIONS
I
The General Electric 2N78 is a grown junction NPN high
2 N7 8
Outline Drawing No. 3
frequency transistor intended for high gain RF and IF
amplifier service and general purpose applications. The
G.E. rate-growing process used in the manufacture of the
2N78 provides the uniform and stable characteristics re-
I
I
quired for military and industrial service.

SPECIFICATIONS

I
ABSOLUTE MAXIMUM RATINGS: (25°Cl
Collector to Emitter Voltage (base open), V CEO 15 volts
Collector to Base Voltage (emitter open), V CBO . 15 volts
Collector Current, le . . ....... . 20ma
Emitter Current, IE . . . . . . . . ....................... . -20ma
Collector Dissipation*, PcM. 65mw
Storage Temperature, TsTG ..

ELECTRICAL CHARACTERISTICS: 125°Cl

85 °C

I
Low Frequency Characteristics (Common Base) DESIGN LIMITS
(VcB = 5 V, IE= -1 ma, f = 270 cps)
Input Impedance (output short circuit ) , h 1 b
Voltage Feedback Ratio (input short circuit), hrb
Current Amplification (output short circuit), htb
DC Base Current Gain ( IB = 20 µ,a; V CE = 1 V) hFE
CENTER
55
-.983
70
2
MIN.

.8
45
MAX.

IO
135
ohms
x lQ-4 I
Output Admittance (input open circuit), hob .2 µmhos
Noise Figure (VcB = 1.5 V; IE= -0.5 ma; f = 1 KC), NF

High Frequency Characteristics (Common Base)

(VcB = 5 V, IE= -1 ma)
12 db
I
Alpha Cutoff Frequency, fab 9 5 me

I
Output Capacity (f = 2 me), Cob 3 6 µµf
Voltage Feedback Ratio (f = 1 me), hrb 12 X 10-s
Power Gain in Typical IF Test Circuit, Ge 27 db

Cutoff Characteristics
Collector Cutoff Current (VcB = 15 V), Ico 5 µa
Collector Cutoff Current ( V CB = 5 V), Ico
*Derate 1.1 mw/°C increase in ambient temperature.
.7 µa
I
The General Electric type 2N107 is an alloy junction
2N107 PNP transistor particularly suggested for students, ex-
perimenters, hobbyists, and hams. It is available only from
franchised General Electric distributors. The 2N107 is
Outline Drawing No. 1 hermetically sealed and will dissipate 50 milliwatts in
25 ° C free air. I
I
SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS: 125°C)
Collector Voltage ( referred to base ) , V CB . . . . . . . . . . . .... ................. -12 volts
Collector Current, le . . . . . . . . . . . . . . . . . . . . . . . . . . . ................ . -!Oma
Emitter Current, IE . . . . . . ........................ ............ 10 ma
Junction Temperature, TJ

ELECTRICAL CHARACTERISTICS: (25°C)

........ . 60 °C
j
(Common Base, T J = 30°C, f = 270 cps
VcB = -5v, IE= 1 ma)
Collector Voltage, VcB
Emitter Current, IE . . .... . . . . . ............................
Output Admittance (input open circuit), hob ..............................
.
.
-5.0 volts
1.0 ma
1.0 µmhos
I
Current Amcf:lification (output short circuit), htb .......................... . -.95

i
Input Impe ance (output short circuit), h 1 b .............................. . 32 ohms
Voltage Feedback Ratio (input open circuit), hrb. 3 x 10-4
Collector Cutoff Current, Ico . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 µa
Output Capacitance, Cob . . ....... . 40 µµf
Frequency Cutoff, fab. 0.6mc
Common Emitter, (VcE =-Iv, IE = 1 ma)
Base Current Gain, hte .............................. . 20

118
I
 TRANSISTOR SPECIFICATIONS

• The General Electric type 2N 123 is a PNP alloy junction

high frequency switching transistor intended for military, 2N123
industrial and data processing applications where high re-
• liability at the maximum ratings is of prime importance. Outline Drawing No. 8

SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS: (25°C)
• Collector to Emitter Voltage (base open), V CEO
Collector to Base Voltage ( emitter open ) , V cBo
-15 volts
-20 volts
Emitter to Base Voltage (collector open ) , V EBO -10 volts
Collector Current, le -125 ma
Peak Collector Current ( 10 µs max.), frM -500 ma

• Emitter Current, fa ...

Collector Dissipation*, PrAv
Peak Collector Dissipation ( 10 µs max.)**, PcM
Total Transistor Dissipation***, PAv.
125 ma
lOOmw
500mw
150mw
Storage Temperature, TsTG -55 to 85 °C

• ELECTRICAL CHARACTERISTICS: (25°Cl

Switching Characteristics (Common Emitter)
D.C. Base Current Gain ( V CE - 1 v; le :;::: 10 ma) hn;
DESIGN
CENTER
50
LIMITS
MIN.
30
MAX.
150
Saturation Voltage (fo:;::: .5 ma; le:;::: 10 ma), VcE .15 0.2 volts

.. Pulse Response Time ( I c :;::: 10 ma)

Delay & Rise Time, td
Storage Time, ts
Fall Time, tr
Cutoff Characteristics
+ tr .9
.5
.5
µsec
µSt'C
µsec

Collector Cutoff Current ( V CB :;::: -20v), Ico 2 6 µa

Emitter Cutoff Current (VEB:;::: -lOv), IEo 2 6 µa
• Collector to Emitter (Base open, Ic:;::: -0.6 ma), VcE
High Frequency Characteristics (Common Base)
25 15 volts

(VcB = -5v; IE:;::: 1 ma)

Alpha Cutoff Frequency, fab 8 5 111C
Collector Capacitance ( f = 1 me), Cob 15 µµf

• Voltage Feedback Ratio (£ = 1 me), hrb

Base Spreading Resistance, r'b
8
80
x 10-3
ohms
Low Frequency Characteristics (Common Base)
(VcB:;::: -5v; IE:;::: 1 ma; f:;::: 270 cps)
Input Impedance, hib 28 ohms
• Voltage Feedback Ratio, hrb
Current Amplification, htb
Output Admittance, hob
-.980
8
.9
-.970
x 10-•
µmhos
Derate for increase in ambient temperature:
•l.67 mw/°C, **8 mw/°C, ***2.5 mw/°C

•
• The General Electric types 2Nl35, 2Nl36 and
2N 137 are PNP alloy junction germanium tran- 2N135. 2N136.
sistors intended for RF and IF service in broadcast
2N137
• receivers. Special control of manufacturing proc-
esses provides a narrow spread of characteristics,
resulting in uniformly high power gain at radio Outline Drawing No. 8
frequencies. These types are obsolete and avail-
able for replacement only .
• SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS: (25°Cl 2N135 2N136 2N137
Collector Voltage:
• Common Base ( emitter open), V CBO
Common Emitter (RBE:;::: 100 ohms), VcER
Common Emitter (RBE:;::: 1 megohm), VcER
-20
-20
-12
-20
-20
-12
-50
-10
-10
- 6
-50
volts
volts
volts
ma
Collector Current, le -50
Emitter Current, IE 50 50 50 ma
100 100 mw

•
Collector Dissipation, PcM 100
Storage Temperature, TsTG 85 85 85 oc
ELECTRICAL CHARACTERISTICS: Design Center Values
(Common Base, 25°C, Vcu:;::: 5v, lE:;::: 1 ma)
Voltage Feed back Ratio (input open circuit,
f:;::: 1 me), hrb 7 7 7 X 10-3

• Output Capacitance (f:;::: 1 me), Cob

119
14 14 14 µµ£
TRANSISTOR SPECIFICATIONS

The General Electric type 2N 167 is an NPN high fre-

2N167 quency, high speed switching transistor intended for in-
dustrial and military applications where reliability is of
Outline Drawing No. 3 prime importance.
SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS: (25°C>
Collector to Emitter Voltage (base open), V CEO . 30 volts
Collector to Base Voltage (emitter open), Veno .. 30 volts
Emitter to Base Voltage (collector open), V EBO . 5 volts
Collector Current, le 75 ma
Emitter Current, IE ...
Collector Dissipation*, PcM .
Transistor Dissipation**, PM.
Storage Temperature, TsTG.
-75 ma
65mw
75mw
85 °C
I
ELECTRICAL CHARACTERISTICS: (25°C) DESIGN LIMITS
Switching Characteristics (Common Emitter) CENTER MIN. MAX.
D-C Base Current Gain (VcE = 1 v; le= 8 ma), hFE 30 17
Saturation Voltage (In= .8 ma; le= 8 ma), VcE 0.35 volts
Pulse Response Time ( le = 8 ma)
Delay & Rise Time, td + tr .5 µsec
Storage Time, ts .3 µsec
Fall Time, tr
Cutoff Characteristics
Collector Cutoff Current ( V CB = 15 v ) , Ico
Emitter Cutoff Current (VEB = 5 v), lEo
.2

.7
.6
1.5
5
µsec

µa
µa
I
Collector to Emitter Voltage (Base open,
le= 0.3 ma), VcE 30 volts
High Frequency Characteristics (Common Base)
(Ven= Sv; IE= 1 ma)
Alpha Cutoff Frequency, fab 9.0 5.0 me
Collector Capacity (f = 1 me), Cob 2.5 8 µµ£
Voltage Feedback Ratio (f = 1 me), hrb 7.3 x10-a
Low Frequency Characteristics (Common Base)
(Ven= 5v; IE= -1 ma; f = 270 cpsl
Input Impedance, h1b 55 ohms
Voltage Feedback Ratio, hrb 1.5 x10-~
Base Current Amplification, hrb
Output Admittance, hob
-.985
.2
*Derate 1.1 mw/°C increase in ambient temperature.
**Derate 1.25 mw/°C increase in ambient temperature.
-.952
µmhos
I
I
2 N 16 8 A
The 2Nl68A is -a rate grown NPN germanium transistor
intended for mixer I oscillator and IF amplifier applications
I
in radio receivers. Special manufacturing techniques pro-
Outline Drawing No. 3 vide a low value and a narrow spread in collector capacity
so that neutralization in many circuits is not required. The
2Nl68A has a frequency cutoff control to provide proper operation as an oscillator or
autodyne mixer. For IF amplifier service the range in power gain in controlled to 3 db.
I
CONVERTER TRANSISTOR SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS: (25°C)
Voltage
I
Collector to Emitter (base open), V CEO 15 volts
Collector to Base (emitter open), V cno .
Current
Collector, le
Power
15 volts

20ma
I
Collector Dissipation at 25°C*, Pc11r1 . 65mw
Temperature Range
Operating and Storage, TA, TsTG .................. . -55 to 85 °C
TYPICAL ELECTRICAL CHARACTERISTICS: (25°C)
Converter Service
Maximum Ratings
Collector Supply Voltage, Vee ........................................ . 12 volts I
120
I
 TRANSISTOR SPECIFICATIONS

• Design Center Characteristics

Input Impedance (IE= 1 ma; VcE = 5v; f = 455 KC), Z1 . . . . . . 400 ohms

.. Output Impedance ( IE = 1 ma; V CE = 5v; f = 455 KC), Zo ... .

Voltage Feedback Ratio (IE= 1 ma; VcB = 5v; f = 1 me), hrb
Collector to Base Capacitance (IE= 1 ma; VcB = 5v; f = 1 me), Cob
Frequency Cutoff (IE = 1 ma; V CB = 5v), fab . . . .
Min. Frequency Cutoff (IE = 1 ma; V CB = 5v), fab . . . .......... .
12 K ohms
5x10-3
2.4 µ.µ.£
8mc
5 me min
Base Current Gain ( IB =
20 µa; V CE 1 v), hFE .= 40
23
Minimum Base Current Gain, hFE
135
• Maximum Base Current Gain, hFE
Convenion Gain, CGe .
IF Amplifier Performance
25 db

Collector Supply Voltage, Vee .......... . 5 volts

Collector Current, le . . . 1 ma

• Input Frequency, f .................................... .

Available Power Gain, Ge ........................................... .
Minimum Power Gain in typical IF circuit, Ge
455KC
39 db
28 db min
Power Gain Range of Variation in typical IF circuit, Ge. 3 db
Cutoff Characteristics

• Collector Cutoff Current ( V CB = 5v ) , Ico . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Collector Cutoff Current (VcB = 15v), Ico.
*Derate 1.1 mw /°C increase in ambient temperature over 25°C .
.5 µ.a
5 µ.a max

•
The 2Nl69A and 2Nl69 are rate grown NPN
germanium transistors intended for use as IF 2N 169A, 2N 169
• amplifiers in broadcast radio receivers. The col-
lector capacity is controlled to a low value so
that neutralization in most circuits is not required.
Outline Drawing No. 3

The power gain at 455 KC is maintained at a 3 db spread for the 2Nl69A. The 2Nl69A
is a special high voltage unit intended for second IF amplifier service where large
• voltage signals are encountered. The 2Nl69 is also intended for low gain IF amplifier
and power detector applications.

IF TRANSISTOR SPECIFICATIONS
• ABSOLUTE MAXIMUM RATINGS: 125°Cl
Voltage
2N169A 2N169

Collector to Emitter (base open), V CEO 25 15 volts

Collector to Base ( emitter open ) , V CBO 25 15 volts

• Current
Collector, le
Power
20 20 llH\

Collector Dissipation*, PcM 65 65 mw

Temperature Range
• Operating and Storage, TA, TsTG
TYPICAL ELECTRICAL CHARACTERISTICS: (25°C)
-55 to 85 -55 to 85 oc
IF Amplifier Service
Maximum Ratings

• Collector Supply Voltage, V cc

Design Center Characteristics
(IE= -1 ma; VcE = 5v; f = 455 KC except as noted)
12 12 volts

Input Impedance, Z 1 700 700 ohms

Output Impedance, Zo 7 7 K ohms

• Voltage Feedback Ratio (VcB = 5v; f = 1 me), hrb 10 10 x10-s

Collector to Base Capacitance (VcB=5v; f=l me), Cob 2.4 2.4 µ.µ.£
Frequency Cutoff (VcB = 5v), fab 9 9 me
Base Current Gain ( IB = 20 µ.a; V CE = 1 v ) , hF ~; 72 72
Minimum Base Current Gain, hFE 36 36
Maximum Base Current Gain, hFE 220 220

• IF Amplifier Performance
Collector Supply Voltage, V cc
Collector Current, le
5
1
5
1
volts
ma
Input Frequency, f 455 455 KC
Available Power Gain, Ge 36 36 db

• Minimum Power Gain in typical IF circuit, Ge

Power Gain Range of Variation in typical IF circuit, Ge
Cutoff Characteristics
24
3
24
3
dbmin
db

Collector Cutoff Current ( V CB 5v), Ico=

Collector Cutoff Current (VcB = 15v), Ico
.5
5
.5
5
µ.a
µa max

• *Derate 1.1 mw/°C increase in ambient temperature .

121
 TRANSISTOR SPECIFICATIONS
I
The 2Nl 70 is a rate grown NPN germanium transistor in-
2 N 17 0
Outline Drawing No. 3
tended for use in high frequency circuits by amateurs,
hobbyists, and experimenters. The 2Nl 70 can be used in
any of the many published circuits where a low voltage,
high frequency transistor is necessary such as for re-
I
generative receivers, high frequency oscillators, etc. If you desire to use the 2Nl 70
NPN transistor in a circuit showing a PNP type transistor, it is only necessary to
change the connections to the power supply. I
SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS: (25°Cl
Voltage
Collector to Emitter, VcE. 6 volts
I
Current
Collector, fo 20ma
Power
Collector Dissipation*, PcM 25mw
Temperature Range
Operating and Storage, TA., TsTG. -55 to 50 °C
TYPICAL ELECTRICAL CHARACTERISTICS: (25°Cl
High Frequency Characteristics
(IE= 1 ma; VcE = 5v; f = 455 KC except as noted)
Input Impedance ( Common Emitter), Z 1 . . .
i
800 ohms
Output Impedance ( Common Emitter), Zo ............ .

i
15 Kohms
Collector to Base Capacitance ( f = 1 me), Cob . 2.4 µ,µ.£
Frequency Cutoff (VcB = 5V), fab ........ . 4mc
Power Gain (Common Emitter), Ge .. . 22 db
Low Frequency Characteristics
(IE= 1 ma; VcE = 5v; f = 270 cps)
Input Impedance, h1b ................................ .
Voltage Feedback Ratio, hrb ........................... .
Current Gain, htb .................................... .
Output Admittance, hob . . . . . . . . . . . . . . . . . . . . ........ .
Common Emitter Base Current Gain, hre.
55 ohms
4 X IO-'
.95
.5 X 10-0 µ.mhos
I
20
Cutoff Characteristics
Collector Cutoff Current ( V CB = 5v ) , Ico .
*Derate 1 mw /°C increase in ambient temperature.
5 µ.a max
I
I
2 N 18 6, 2 N 18 7,
2N188
The 2N186, 2N187, and 2N188 are medium
power PNP transistors, intended for use as audio
output amplifiers in radio receivers and quality
I
sound systems. By unique process controls the
current gain is maintained at an essentially con-
Outl ine Drawing No. 1 stant value for collector currents from 1 ma to
200 ma. This linearity of current gain provides
low distortion in Class B circuits, and permits use of any two transistors from a par-
I
ticular type without matching.
SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS: (25°Cl
Voltages
Collector to Base (emitter open), V CBO ....... .
Collector to Emitter (REB = lOK ohm), VcER.
-25
-25
volts
volts
.I
Emitter to Base (collector open), V EBO - 5 volts
Collector Current, le
Power
Collector Dissipation*, PcM .
-200

lOOmw
ma
I
Temperature
Operating Range, TA. . . . . ........ .
Storage Range, TsTG ...
-55 to 60 °C
.-55 to 85 °C
i
TYPICAL ELECTRICAL CHARACTERISTICS: (250C)
I
Class B Audio Amplifier Operation
(Values for two transistors. Note that matching
is not required to hold distortion to less than
5% for any two transistors from a type)
I
122
I
• Maximum Class B Ratings <Common Emitter) 2N186
TRANSISTOR SPECIFICATIONS

2N187 2N188
Collector Supply Voltage, V cc -12 -12 -12 volts

•
Power Output (Distortion less than 5% ) , Po 300 300 300 mw
Design Center Characteristics
Input Impedance large signal base to base
(.6.h = 100 ma), hie 1200 2000 2600 ohms
Base Current Gain (VcE = -1 v; le= 100 ma), h~'tJ 24 36 54
Collector Capacity ( V CB = -5 v; IE = 1 ma;
• f = 1 me), Cob
Frequency Cutoff (VcE = -5 v; IE= I ma), fab
40
.8
40
1.0
40
1.2
µµf
me
Class B Circuit Performance (Common Emitter)
Collector Voltage, V cc -12 -12 -12 volts

• Minimum Power Gain at 100 mw power output, Ge

Cutoff Characteristics
Maximum Collector Cutoff Current (VcB = -25 v), Ico
28

16
30

16
32

16
mindh

maxµ,a
Maximum Emitter Cutoff Current (VEn = -5 v), IEo 10 10 10 max µa
*Derate 3 mw /°C increase in ambient temperature within range 25°C to 60°C .
•
• The 2Nl86A, 2Nl87A, and 2Nl88A are medium
power PNP transistors intended for use as audio 2N 186A, 2N 187A
output amplifiers in radio receivers and quality 2N 188A
sound systems. By unique process controls the
• current gain is maintained at an essentially con-
stant value for collector currents from 1 ma to Outline Drawing No. 1
200 ma. This linearity of current gain provides
low distortion in both Class A and Class B circuits, and permits the use of any two

• transistors from a particular type without matching in Class B Circuits .

SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS: (25°CI

• Voltages
Collector to Base ( emitter open), V cno ....... .
Collector to Emitter (REB = lOK ohm), VcER.
Emitter to Base (collector open), V EBO .
-25 volts
-25 volts
- 5 volts
Collector Current, le -200 ma

• Power
Collector Dissipation*, PcM
Temperature
200mw

Operating Range, T ! . -55 to 75 °C

Storage Range, TsTG. -55 to 85 °C

• TYPICAL ELECTRICAL CHARACTERISTICS: <25°CI

Class B Audio Amplifier Operation 2N186A 2N187A 2N188A
(Values for two transistors. Note that matching
is not required to hold distortion to less than
5% for any two transistors from a type)
• Maximum Class B Ratings (Common Emitter)
Collector Supply Voltage, V cc
Power Output (Distortion less than 5%), Po
-12 -12 -12 volts
mw
750 750 750
Design Center Characteristics

• Input Impedance large signal base to base

(.6.lE = 100 ma), hie
Base Current Gain (VcE = -1v;le=100 ma), hFE
Collector Capacity (Ven = 5 v; IE = 1 ma;
1200
24
2000
36
2600
54
ohms

f = 1 me~, Cob 40 40 40 µµf

Frequency utoff (Ven= -5 v; IE= 1 ma), fab .8 1.0 1.2 me

• Class B Circuit Performance (Common Emitter)

Collector Voltage, V cc
Minimum Power Gain at 100 mw power output, Ge
-12
28
-12
30
-12
32
volts
mindh
Class A Audio Amplifier Operation (Common Emitter)

• <Vee= 12v; IE= 10 ma)

Power Gain at 50 mw power output, Ge
Cutoff Characteristics
30 32 34 db

Maximum Collector Cutoff Current (Ven = -25 v), leo 16 16 16 max µa

Maximum Emitter Cutoff Current (VEn = -5 v), ho 10 10 10 max µa

• *Derate 4 mw/°C increase in ambient temperature within range 25°C to 60°C.

123
TRANSISTOR SPECIFICATIONS I
The 2Nl89, 2Nl90, 2Nl91, and 2Nl92 are alloy
2N189, 2N190, junction PNP transistors intended for driver I
2N191, 2N192
service in transistorized audio amplifiers. By con-
trol of transistor characteristics during manufac-
I
ture, a specific power gain is provided for each
Outline Drawing No. 1
type. Special processing techniques and the use
of hermetic seals provides stability of these char-
acteristics throughout life.
SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS: (25°C)
Voltage
Collector to Emitter ( REB = lOK ohm), V c~JR ..
Collector Current, le
-25 volts
-50ma
I
Power
Collector Dissipation ( 25°C ) *, PcM 75mw
Temperature
Operating Range, TA . -.5.5 to 60 °c
Storage Range, TsTG. ..... . .. -55 to 85 °C
TYPICAL ELECTRICAL CHARACTERISTICS: (25°Cl
Audio Driver Class A Operation 2N189 2N190 2N191 2N192
(Values for one transistor driving a transformer
coupled output stage)
Maximum Class A Ratings (Common Emitter)
Collector Supply Voltage, V cc -12 -12 -12 -12 volts
Design Center Characteristics
Input Impedance base to emitter (IE = 1 ma), h1 e 1000 1400 1800 2200 ohms
Base Current Gain ~VcE = -5 v; IE= 1 ma), hre 24 36 54 75
Collector Capacity Vcu = -5 v; IE= 1 ma), Cob 40 40 40 40 µµ£
Frequency Cutoff (Vcu = -5 v; IE= 1 ma), fab
Noise Figure (Vcu = -5 v; IE= 1 ma;
f = 1 KC; BW = 1 cycle), NF
Audio Circuit Performance (Common Emitter)
.8
15
1.0
15
1.2
15
1.5
15
me
db I
Collector Supply Voltage, V cc -12 -12 -12 -12 volts
Emitter Current, IE
Minimum Power Gain at 1 mw power output, Ge
Small Signal Characteristics (Common Base)
(Vrn = -5v; h~ = 1 ma; f = 270 cps)
37
1
39
1
41
1
43
1 ma
mindh
I
Input Impedance, hib 29 29 29 29 ohms
Voltage Feedback Ratio, hrb 4 4 4 4 x10-4
Current Amplification, htb -.96 -.973 -.98 -.987
Output Admittance, hob 1.0 .8 .6 .5 µmhos
Cutoff Characteristics
Maximum Collector Cutoff Current ( V CB = -25 v), Ico 16 16 16 16 max µa
*Derate 2 mw/°C increase in ambient temperature within range 25°C to 60°C.
I
The 2N241, and 2N241A are medium power PNP
2 N 241 • 2 N 2 4 1A
transistors intended for use as audio output
amplifiers in radio receivers and quality sound
systems. By special process controls the current
I
gain is maintained at an essentially constant value
Outline Drawing No. 1 for collector currents from 1 ma to 200 ma. This
linearity of current gain insures low distortion in
both Class A and Class B circuits, and permits the use of any two transistors from
a particular type without matching in Class B Circuits.
I
SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS: (25°Cl
2N241 2N241A
Voltages
Collector to Base ( emitter open) Vcso -25 -25 volts
=
I
Collector to Emitter ( REB lOK ohm) VctJR -25 -25 volts
Emitter to Base (collector open ) v~rno - 5 - 5 volts
Collector Current le -200 -200 ma
Power
Collector Dissipation Pot 100* 200** mw
Temperature
Operating Range
Storage Range
-5.5 to 60 -55 to 7.5
-55 to 85 -55 to 85
oc
oc I
124
I
• I_RAN5_1STOR SPECIFICATIONS

TYPICAL ELECTRICAL CHARACTERISTICS: (25°C)

Class B Audio Amplifier Operation

• (Values for two transistors. Note that matching

is not required to hold distortion to less than
5 % for any two transistors from a type)
Maximum Class B Ratings (Common Emitter) 2N241 2N241A
Collector Supply Voltage Vee -12 -12 volts

• Power Output (Distortion less than 5%)

Design Center Characteristics
Input Impedance large signal base to base
Po 300 750 mw

(,6.IE = 100 ma) hie 4000 4000 ohms

Base Current Gain (VcE = -lv; le= 100 ma) hFE 73 73

• Collector Capacity ( V CB = -5v; IE = 1 ma; f = 1 me) Cob

Frequency Cut off (VcE = -5v; IE= 1 ma)
Class B Circuit Performance (Common Emitter)
fab
40
1.3
40
1.3
µµ£
me

Collector Voltage V cc -12 -12 volts

Minimum Power Gain at 100 mw power output Ge 34 34 mindb

• Class A Audio Amplifier Operation (Common Emitter)

(Vee= -12v; IE= 10 ma)
Power Gain at 50 mw power output Ge 35 35 db
Cutoff Characteristics

• Maximum Collector Cutoff Current ( V CB = -25v)

Maximum Emitter Cutoff Current ( VEB = -5v)
Ico
IEo
16
10
16
10
*Derate 3 mw /°C increase in ambient temperature within range 25°C to 60°C.
max µa
max µa

**Derate 4 mw/°C increase in ambient temperature within range 25°C to 75°C .

• The 2N265 is an alloy junction PNP transistor intended

for driver service in transistorized audio amplifiers. By 2N265
control of transistor characteristics during manufacture, a
• specific power gain is provided for each type. Special
processing techniques and the use of hermetic seals pro-
Outline Drawing No. 1

vides stability of these characteristics throughout life .

• ABSOLUTE MAXIMUM RATINGS: <25°CJ

SPECIFICATIONS
Voltage
Collector to Emitter (REB = lOK ohm), VcER. -25 volts

• Collector Current, le
Power
Collector Dissipation ( 25°C) *, PcM .
-50ma

75mw
Temperature
Operating Range, TA . -55 to 60 ·c
• Storage Range, TsTG.
TYPICAL ELECTRICAL CHARACTERISTICS: (25°C)
-55 to 85 °C

Audio Driver Class A Operation

(Values for one transistor driving a transformer coupled output stage l

• Maximum Class A Ratings (Common Emitter)

Collector Supply Voltage, V cc. -12 volts
Design Center Characteristics
Input Impedance base to emitter (IE = 1 ma), h1 e. 4000 ohms
Base Current Gain (Vcl!l = -5 v; IE = 1 ma), hte ... 110
• Collector Capacity (VcB = -5 v; ll!l = 1 ma), Cob. . ......... .
Frequency Cutoff ( V CB = -5 v; IE = 1 ma), fab ................. .
Noise Figure (VcB = -5 v; IE= I ma; f = 1 KC; BW = 1 cycle), NF.
40
1.5
15
µµ£
me
db
Audio Circuit Performance (Common Emitter)
Collector Supply Voltage, V cc ........ . -12 volts
• Emitter Current, IE . . . . . . . . . . . . . . . . . . . .....
Minimum Power Gain at 1 mw power output, Ge .
Small Signal Characteristics (Common Bose l
1 ma
4.5 min db

<VcB = -5v; IE= 1 ma; f = 270 cps)

Input Impedance, h 1b ...... . 29 ohms
• Voltage Feedback Ratio, hrb.
Current Amplification, htb ..
Output Admittance, hob ...
-.991
4 x 10-4
.5 µmhos
Cutoff Characteristics
Maximum Collector Cutoff Current ( V CB = -25 v), Ico. 16 max µa
• *Derate 2 mw/°C increase in ambient temperature within range 25°C to 60°C.

125
TRANSISTOR SPECIFICATIONS I
Types 2N292 and 2N293 are rate grown NPN
2N292, 2N293
Outline Drawing No. 3
germanium transistors intended for amplifier ap-
plications in radio receivers. Special manufactur-
ing techniques provide a low value and a narrow
I
spread in collector capacity so that neutralization
in many circuits is not required. The type 2N293 is intended for receiver circuits
where high gain is needed. In IF amplifier service the range in power gain is controlled
to 3 db.
I
IF TRANSISTOR SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS: (25°Cl
Voltage
Collector to Emitter (base open), V CEO ..
Collector to Base ( emitter open ) , V CBO .
2N292

15
15
2N293

15
15
volts
volts
I
Current
Collector, Io . . . . . .. . . .... 20 20 ma
Power
Collector Dissipation*, PcM 65 65 mw
Temperature Range
Operating and Storage, TA, TsTG .. -55 to 85 -55 to 85 oc
ELECTRICAL CHARACTERISTICS: (25°Cl ~'*
IF Amplifier Service
Maximum Ratings
Collector Supply Voltage, Vee. 12 12 volts
Design Center Characteristics
Input Impedance (IE= 1 ma; VcE = 5v; f = 455 KC), Z1 ..... . 350 350 ohms
Output Impedance (IE = 1 ma; V CE = 5v; f = 455 KC), Zo ... . 16 18 Kohms
Voltage Feedback Ratio (IE = 1 ma; V CB = 5v; f = me), hrb. 10 5 x lQ-3
Collector to Base Capacitance (IE =
1 ma;
VcB = 5v; f =
1 me), Cob ................ .
Frequency Cutoff (IE =
1 ma; V CB =
5v), fab .. .
2.4 2.4 µ,µJ
6 7 me
Base Current Gain ( IB =
20 µ,a; V CE =
1 v), hFE 25 25
Min. Base Current Gain, hFE . . . . . . .......... . 6 6
Max. Base Current Gain, hFE . . . . . .......... . 44 55
IF Amplifier Performance
Collector Supply Voltage, Vee. 5 5 volts
Collector Current, le 1 1 ma
Input Frequency, f ............... . 455 455 KC
Available Power Gain, Ge ..................... . 36 39 db
Min. Power Gain in Typical IF Test Circuit, Ge ... . 24 28 dbmin
Power Gain Range of Variation in Typical IF Circuit . 3 3 db
Cutoff Characteristics
Collector Cutoff Current ( V CB = 5v), loo .... .5 .5 µ,a
Collectr1r Cutoff Current (VcB =15v), loo. 5 5 µ,a max
*Derate I.I mw/°C increase in ambient temperature over 25°C.
**All values are typical unless indicated as a min or max.

The 2N319, 2N320, and 2N321 are miniaturized

2N319, 2N320, versions of the 2Nl86A series of G-E transistors.
2N321
Outline Drawing No. 2
Like the prototype versions, the 2N319, 2N320,
and 2N321 are medium power PNP transistors
intended for use as audio output amplifiers in
i
radfo receivers and quality sound systems. By
unique process controls the current gain is main-
tained at an essentially constant value for collector currents from 1 ma to 200 ma.
This linearity of current gain provides low distortion in both Class A and Class B cir-
cuits, and permits the use of any two transistors from a particular type without match-
I
ing in Class B Circuits.

ABSOLUTE MAXIMUM RATINGS: (25°Cl

SPECIFICATIONS I
Voltages

I
Collector to Emitter VcE -20 volts
Collector to Base VcB -30 volts
Emitter to Base VEB - 3 volts
Collector Current le -200 ma

126
I
• TRANSISTOR SPECIFICATIONS

Power
Collector Dissipation Pc.111 200mw

• Temperature
Operating and Storage Range
TYPICAL ELECTRICAL CHARACTERISTICS: (25°Cl
TA-TSTG -65 to 85 °C

D.C. Characteristics 2N319 2N320 2N321

Base Current Gain (le = -20 ma;

• VcE =-lv)
Base Current Gain (le = -100 ma;
VcE =-lv)
hFE
hFE
33
30
48
44
80
70
Collector to Emitter Voltage ( REB = lOK;
le= .6 ma) VcER -20 -20 -20 volts
Collector Cutoff Current (VEn2 -25v) leo 8 8 8 µ,a
• Maximum Collector Cutoff Current
(Ven =-25v)
Emitter Cutoff Current (VEB = 3v)
leo
IEo
16
2
16
2
16
2
µ,a
µ,a
Small Signal Characteristics (Common Basel
(Ven= -Sv; h; = 1 ma; f = 270 cps)
• Frequency Cutoff
Collector Capacity (f,= I me)
Noise Figure
fab
Cob
NF
2.0
25
6
2.5
2.5
6
3.1
25
6
me
µ,µ,£
db
Input Impedance h1b 30 30 30 ohms
Thermal Characteristics

• Thermal Resistance
Without Heat Sink (Junction to Air)
With Clip On Heat Sink (Junction to Case)
.27
.2
.27
.2
.27
.2
°C/mw
°C/mw
Performance Data (Common Emitter)
Class A Power Gain ( V cc = -9v) Ge 30 31 32 db
• Power Output
Class B Power Gain (Vcc=-9v)
Power Output
Po
Ge
Po
50
27
100
50
29
100
50
31
100
mw
db
mw

• The 2N322, 2N323, 2N324 are alloy junction

PNP transistors intended for driver service in 2N322, 2N323,
audio amplifiers. They are miniaturized versions
2N324
• of the 2Nl90 series of G.E. transistors. By con-
trol of transistor characteristics during manu-
facture, a specific power gain is provided for Outline Drawing No. 2
each type. Special processing techniques and the
use of hermetic seals provides stability of these characteristics throughout life.
• SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS: (25°C)

• Voltages
Collector to Emitter
Collector to Base
VcE
Ven
-16 volts
-16 volts
Collector Current le -100 ma
Power

• Collector Dissipation
Temperature
Operating and Storage Range
PcM

TA-TSTG
140 mw

-65 to+ 65 °C
TYPICAL ELECTRICAL CHARACTERISTICS: (25°Cl

• D.C. Characteristics
Base Current Gain (le=-20 ma; VcE = -1 v) hFE
Collector to Emitter Voltage
(REB = lOK; le= -.6 ma) Vnrn
2N322
48
16
2N323
80
16
2N324
95
16 volts
Collector Cutoff Current (Ven= -16v) Ico 10 10 10 µ,a
Max. Collector Cutoff Current (Ven= -16v)Ico 16 16 16 µa

• Small Signal Characteristics

Frequency Cutoff ( V CB = -5v; h; = 1 ma) fab
=
Collector Capacity ( V rn = -5v; IE 1 ma) Cob
2.5
25
3.1
25
3.4
25
me
µ,µ£
Noise Figure (Ven= -5v; IE= 1 ma) NF 6 6 6 db
Input Impedance (VcE = -5v; IE= 1 ma) hie 2200 2600 3300 ohms

• Current Gain (VcE = -5v; IE= 1 ma)

Thermal Characteristics
Thermal Resistance Junction to Air
hre 50

.27
70

.27
84

.27 °C/mw
Performance Data Common Emitter

• Power Gain Driver ( V cc = 9v)

Power Output
Ge
Po
39
l
41
1
43
l
db
mw

127
TRANSISTOR SPECIFICATIONS I
The General Electric Type 2N332 is a silicon NPN triode
2N332
Outline Drawing No. 4
transistor intended for amplifier applications in the audio
and radio frequency range and for general purpose switch-
ing. It is a grown junction device with a diffused base.
I
Electrical stability is insured by means of a minimum 150
hour 200°C cycled aging operation included in the manufacturing process. All units
are subjected to a rigorous mechanical drop test to control mechanical reliability. This
I
transistor is hermetically sealed in a welded case. The case dimensions and lead con-
figuration conform to the JETEC T0-5 package and are suitable for insertion in
printed boards by automatic assembly equipment. I
SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS: 125°C)
Voltages
Collector to Base (Emitter Open)
Emitter to Base (Collector Open)
Veno
VEBO
45 volts
I volt

25ma
I
Collector Current le

Power
Collector Dissipation ( 25°C)
Collector Dissipation ( I00°C)
Pc
Pc
I50mw
lOOmw
i
Collector Dissipation ( 150°C) Pc 50mw

Temperature Range
Storage
Operating
TsTG
TA
-65 to 200 °c
-55 to I75 °c
i
ELECTRICAL CHARACTERISTICS: (25°C)
(Unless otherwise specified; VcB = Sv;
IE= -1 ma; f = lkc)

Small Signal Characteristics MIN. HOM. MAX.

Current Transfer Ratio hte 9 15 20
Input Impedance h1b 30 53 80 ohms
Reverse Voltage Transfer Ratio hrb .25 1.0 5.0 x 10-~
Output Admittance hob 0.0 .25 1.2 µ,mhos
Power Gain .
(VcE = 20v; IE= -2ma; f =Ike;
RG = IK ohms; RL = 20K ohms)
Noise Figure
Ge
NF
,35
28
db
db
I
High Frequency Characteristics
Frequency Cutoff
(VcB = 5v; IE= -Ima) fab I5 me
Collector to Base Capacity
(VcB = 5v; IE= -Ima; f = Imc) Cob 7 µ,µ,£
Power Gain (Common Emitter)
( V CB = 20v; IE = -2ma; f= 5mc) Ge I7 db

D-C Characteristics
Collector Breakdown Voltage
(IcBo = 50µ,a; IE= O; TA= 25°C)
Collector Cutoff Current
(VcB = 30v; IE= O; TA= 25°C)
(VcB = 5v; IE= O; TA= I50°C)
Collector Saturation Resistance
BVcno
le BO
le BO
45
.02 2
50
volts
µ,a
µ,a
I
(IB =Ima; le= 5ma) Rsc 80 200 ohms

Switching Characteristics
( In 1 = 0.4 ma; IB2 = -0 4 ma;
I
le= 2.8 ma)
Delay Time
Rise Time
Storage Time
Fall Time
td
tr
ts
tt
.75
.5
.05
.I5
µ,sec
µ,sec
µ,sec
p,sec
I
128
I
• TRANSISTOR SPECIFICATIONS

The General Electric Type 2N333 is a silicon NPN triode

transistor intended for amplifier applications in the audio 2N333
• and radio frequency range and for general purpose switch-
ing. It is a grown junction device with a diffused base.
Outline.Drawing No. 4

Electrical stability is insured by means of a minimum 150

• hour 200°c cycled aging operation included in the manufacturing process. All units
are subjected to a rigorous mechanical drop test to control mechanical reliability. This
transistor is hermetically sealed in a welded case. The case dimensions and lead con-
figuration conform to the JETEC T0-5 package and are suitable for insertion in
• printed boards by automatic assembly equipment.

SPECIFICATIONS
• ABSOLUTE MAXIMUM RATINGS: 125°Cl
Voltages
Collector to Base ( Emitter Open) VcBo 45 volts
I volt
• Emitter to Base (Collector Open)

Collector Current
VEBO

le 25ma

Power
• Collector Dissipation ( 25°C)
Collector Dissipation ( 100°C )
Collector Dissipation ( I50°C)
Pc
Pc
Pc
I50mw
lOOmw
50mw

Temperature Range
• Storage
Operating
TsTG
TA
-65 to 200 °C
-55 to I75 °C

ELECTRICAL CHARACTERISTICS: 125°CI

• <Unless otherwise specified; Yes= 5v;

IE =-1 ma; f = lkcl

Small Signal Characteristics MIN. MOM. MAX.

18
• Current Transfer Ratio
Input Impedance
Reverse Voltage Transfer Ratio
Output Admittance
hte
htb
hrb
hob
30
.25
0.0
30
53
2.0
.2
4I
80
10.0
1.2
ohms
x 10-~
µ.mhos
Power Gain
(VcE = 20v; IE= -2ma; f =Ike;

• RG = IK ohms; RL = 20K ohms)

Noise Figure
Ge
NF
39
25
db
db

.. High Frequency Characteristics

Frequency Cutoff
(Vcs = 5v; IE= -Ima)
Collector to Base Capacity
(VCR= 5v; IE= -Ima; f = Imc)
fab
Cob
I7
7
me
µ.µ.£
Power Gain (Common Emitter)
(VcB = 20v; IE= -2ma; f= 5mc) Ge I6 db

• D-C Characteristics
Collector Breakdown Voltage
(leso = 50µ.a; IE= O; TA= 25°C) BVcso 45 volts
Collector Cutoff Current
• (Vcs = 30v; IE= O; TA= 25°C)
(VcB = 5v; IE= O; TA= I50°C)
Collector Saturation Resistance
le BO
Icso
Rsc
.02 2
50
200
µ.a
µ.a
ohms
(Is= Ima; le= 5ma) 80

• Switching Characteristics
( Is1 = 0.4 ma; lB 2 = -0 4 ma;
le= 2.8 ma)
Delay Time td .7 µ.sec
Rise Time tr .4 µ.sec

• Storage Time
Fall Time
ts
tr
.I5
.I8
µ.sec
p.sec

129
 TRANSISTOR SPEC! FICATIONS
I
The General Electric Type 2N334 is a silicon NPN triode
2N334 transistor intended for amplifier applications in the audio I
Outline Drawing No. 4
and radio frequency range and for general purpose switch- I
ing. It is a grown junction device with a diffused base.
Electrical stability is insured by means of a minimum 150
hour 200°C cycled aging operation included in the manufacturing process. All units
are subjected to a rigorous mechanical drop test to control mechanical reliability. This
transistor is hermetically sealed in a welded case. The case dimensions and lead con-
figuration conform to the JETEC T0-5 package and are suitable for insertion in
printed boards by automatic assembly equipment.

SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS: (25°C)
Voltages
Collector to Base (Emitter Open) VcBo 45 volts 1
Emitter to Base (Collector Open) VEBO I volt
I
Collector Current le 25ma

Power
Collector Dissipation ( 25°C) Pc I50mw
Collector Dissipation ( 100°C) Pc lOOmw
Collector Dissipation ( I50°C) Pc 50mw

Temperature Range
Storage TsTG -65 to 200 °C
Operating TA -55 to I75 °C

ELECTRICAL CHARACTERISTICS: (25°C)

(Unless otherwise specified; VcB
IE= -1 ma; f =Ike)
=
5v;

Small Signal Characteristics MIN. HOM. MAX.

Current Transfer Ratio hte I8 39 90
Input Impedance htb 30 53 80 ohms
Reverse Voltage Transfer Ratio hrb .5 3.5 10.0 X IO-'
Output Admittance hob 0.0 .I8 1.2 .umhos
Power Gain

'
(VcE = 20v; IE= -2ma; f =Ike;
Ra = IK ohms; RL = 20K ohms)
Noise Figure
Ge
NF
40
25
db
db
I
High Frequency Characteristics
Frequency Cutoff
(VcB = 5v; IE= -Ima)
Collector to Base Capacity
(VcB = 5v; IE= -Ima; f = Imc)
fab
Cob
8.0 20
7
me
µµ£
i
Power Gain (Common Emitter) I!
(VcB = 20v; IE= -2ma; f= 5mc) Ge

D-C Characteristics
I5 db
i
Collector Breakdown Voltage

I
(lcBo = 50.ua; IE= 0; TA= 25°C) BVcBo 45 volts
Collector Cutoff Current
(VcB = 30v; IE= O; TA= 25°C) foBO .02 2 µa
(VcB = 5v; IE= O; TA= I50°C) leBO 50 µa
Collector Saturation Resistance
(Is= Ima; le= 5ma) Rsc 80 200 ohms

Switching Characteristics
( IB 1 = 0.4 ma; IB 2 = -0 4 ma;
le= 2.8 ma)
Delay Time

I
td .65 µsec
Rise Time tr .4 .usec
Storage Time t. .2 .usec
Fall Time tr .18 .usec

130
 TRANSISTOR SPECIFICATIONS

The General Electric Type 2N335 is a silicon NPN triode

transistor intended for amplifier applications in the audio 2N335
• and radio frequency range and for general purpose switch-
ing. It is a grown junction device with a diffused base.
Outline Drawing No. 4

Electrical stability is insured by means of a minimum 150

hour 200°C cycled aging operation included in the manufacturing process. All units
• are subjected to a rigorous mechanical drop test to control mechanical reliability. This
transistor is hermetically sealed in a welded case. The case dimensions and lead con-
figuration conform to the JETEC T0-5 package and are suitable for insertion in
• printed boards by automatic assembly equipment.

SPECIFICATIONS
• ABSOLUTE MAXIMUM RATINGS: (25°C)
Voltages
Collector to Base (Emitter Open) VcBo 45 volts

• Emitter to Base (Collector Open)

Collector Current
VEBO

Jc
I volt

25ma

Power
• Collector Dissipation ( 25°C )
Collector Dissipation ( I00°C)
Collector Dissipation ( I50°C)
Pc
Pc
Pc
150mw
IOOmw
50mw

• Temperature Range
Storage
Operating
T:,;T«
TA
-65 to 200 °C
-55 to I75 °C

ELECTRICAL CHARACTERISTICS: 12s 0 c1

• (Unless otherwise specified; VcB = Sv;

IE= -1 ma; f = lkc)

Small Signal Characteristics MIN. HOM. MAX.

• Current Transfer Ratio

Input Impedance
Reverse Voltage Transfer Ratio
Output Admittance
hte
htb
hrb
37
30
.5
0.0
60
53
3.0
.I5
90
80
10.0
ohms
X IO-(
,umhos
hob 1.2
Power Gain
(VcE = 20v; IE= -2ma; f =Ike;
• RG = IK ohms; RL = 20K ohms)
Noise Figure
Ge
NF
42
20
db
db

High Frequency Characteristics

• Frequency Cutoff
(VcB = 5v; IE= -Ima)
Collector to Base Capacity
(VcB = 5v; IE= -Ima; f = Imc)
fab
Cob
22
7
me
.u.uf
Power Gain (Common Emitter)
(VcB = 20v; IE= -2ma; f= 5mc) Ge I4 db

• D-C Characteristics
Collector Breakdown Voltage
(IcBo = 50,ua; IE= O; TA= 25°C) BVcBo 45 volts

• Collector Cutoff Current

(VcB = 30v; IE= O; TA= 25°C)
(VcB = 5v; fa= O; TA= I50°C)
Collector Saturation Resistance
JcBO
le BO
.02 2
50
,ua
,ua
(IB =Ima; le= 5ma) Rsc 80 200 ohms

• Switching Characteristics
( IB1 = 0.4 ma; IB 2 = -0.4 ma;
le= 2.8 ma)
Delay Time td .65 ,usec
Rise Time tr .35 ,usec
• Storage Time
Fall Time
t.
tr
.25
.19
,usec
µ,sec

131
TRANSISTOR SPECIFICATIONS

The General Electric Type 2N336 is a silicon NPN triode

2N336
Outline Drawing No. 4
transistor intended for amplifier applications in the audio
and radio frequency range and for general purpose switch-
ing. It is a grown junction device with a diffused base.
I
Electrical stability is insured by means of a minimum 150
hour 200°C cycled aging operation included in the manufacturing process. All units
are subjected to a rigorous mechanical drop test to control mechanical reliability. This
transistor is hermetically sealed in a welded case. The case dimensions and lead con-
I
figuration conform to the JETEC T0-5 package and are suitable for insertion in
printed boards by automatic assembly equipment.

ABSOLUTE MAXIMUM RATINGS: (25°C)

Voltages
SPECIFICATIONS
I
Collector to Base ( Emitter Open ) Vcso 45 volts
Emitter to Base ( Collector Open ) VEBO I volt

Collector Current le 25ma

Power I
Collector Dissipation (-25°C)
Collector Dissipation ( 100°C)
Pc
Pc
I50mw
lOOmw
I
Collector Dissipation ( 150°C) Pc 50mw

Temperature Range
Storage TsTG -65to 200 °C
Operating TA -55 to J,75 °C

ELECTRICAL CHARACTERISTICS: (25°Cl

(Unless otherwise specified; Vee= Sv;
IE = -1 ma; f =1 kc)

Small Signal Characteristics MIN. HOM. MAX.

Current Transfer Ratio hte 76 I20 333
Input Impedance hib 30 53 80 ohms
Reverse Voltage Transfer Ratio hrb .5 4.0 10.0 x 10-4
Output Admittance
Power Gain
hob o.o .I3 1.2 µmhos
( V CE = 20v; IE = -2ma; f = Ike;
Ra = IK ohms; RL = 20K ohms)
Noise Figure
Ge
NF
43
I5
db
db •I
High Frequency Characteristics
Frequency Cutoff
(Vee= 5v; IE= -Ima)
Collector to Base Capacity
(Vee= 5v; IE= -Ima; f = Imc)
fab
Cob
23
7
me
JLJLf
i
Power Gain (Common Emitter)

I
( V CB = 20v; IE = -2ma; f= 5mc) Ge 13 db

D-C Characteristics
Collector Breakdown Voltage
(leeo = 50µa; IE= O; TA= 25°C) BVcso volts

I
45
Collector Cutoff Current
(Vee= 30v; IE= O; TA= 25°C) Icso .02 2 µa
(Vee= 5v; IE= O; TA= I50°C) le so 50 µa
Collector Saturation Resistance
(le= Ima; le= 5ma) Rsc 80 200 ohms

Switching Characteristics
( Ie1 = 0.4 ma; Ie2 = -0 4 ma;
le= 2.8 ma)
i
Delay Time td .65 µsec
Rise Time
Storage Time
Fall Time
tr
t.
tr
.2
.5
.2
µsec
µsec
JLSeC I
132
• TRANSISTOR SPECIFICATIONS

The General Electric types 2N394, 2N395 are

PNP alloy junction high frequency switching 2N394,2N395
• transistors intended for military, industrial, and
data processing applications where high reliability Outline Drawing No. 2
and extreme stability of characteristics are of
prime importance .
•
SPECIFICATIONS

• ABSOLUTE MAXIMUM RATINGS: (25°Cl

2N394 2N395
Voltages
Collector to Emitter VcE -10 -15 volts
Collector to Base Vcs -10 -15 volts
• Emitter to Base VEB -10 -10 volts

Collector Current le -200 -200 ma

• Power Dissipation PAV 150 150 mw

Peak Power Dissipation

( 50 JLSec. max. 20% duty cycle) PM 500 500 mw

• Storage Temperature TsTG -65to100 -65 to 100 ·c

ELECTRICAL CHARACTERISTICS: (25°Cl

• High Frequency Characteristics 2N394

DESIGN
2N395
DESIGN
(Common Base)
MIN. MAX. CENTER MIN. MAX. CENTER
<Yes= -5v; IE= 1 ma)
Alpha Cutoff Freq11ency fab 4 5.5 5 7 me
• Collector Capacity ( f = 1 me)
Voltage Feedback Ratio
(f = 1 me)
Cob
hrb
20 12
10
20 12 /L/Lf
9 x 10-3
Base Spreading Resistance r'b 150 130 ohms

• Cutoff Characteristics
Collector Cutoff Current
(Vcso = -lOv) leo -6 /Lamps
(Vcso = -15v) leo -6 /Lamps
• Emitter Cutoff Current
(VEBO = -5v) IEo -6 /Lamps
(VEBO = -lOv) IEo -6 /Lamps
Punch-through Voltage VPT -10 -15 volts

•
D-C Characteristics
D-C Base Current Gain
• (VcE = -lv; le= -10 ma)
(VcE = -0.5v;
le= -100 ma)
hFE
hFE
20 150 25
20
150

Saturation Voltage
(Is= -1 ma; le= -20 ma) VcE (SAT) -0.1 -0.1 volts
Pulse Response Time
• (le =-5 ma;
lB 1 =Is~= 0.5 ma)
Delay and Rise Time td+tr 0.9 0.9 JLSeC
Storage Time ts 0.35 0.28 JLSeC
Fall Time tr 0.35 0.28 JLSec

•
Thermal Characteristics
Derate 2.5 mw / •c increase in ambient temperature over 25°C .

•
133
 I
TRANSISTOR SPECIFICATIONS
i
The General Electric types 2N396, 2N397 are
2N396, 2N397 PNP alfoy junction high frequency switching
transistors intended for military, industrial, and
data processing applications where high reliability
,
Outline Drawing No. 2
and extreme stability of characteristics are of
prime importance.

ABSOLUTE MAXIMUM RATINGS: (25°Cl

Voltages
Collector to Emitter
Collector to Base
Emitter to Base
Collector Current
VeE
Ven
VEn
le
SPECIFICATIONS
2N396
-20
-20
-10
-200
2N397
-10
-10
-10
-250
volts
volts
volts
ma
'
Power Dissipation PAV 150 150 mw
Peak Power Dissipation
( 50 µ,sec. max. 20% duty cycle) PM 500 500 mw
Storage Temperature TsTG -65to100 -65to100 oc
ELECTRICAL CHARACTERISTICS: (25°Cl
High Frequency Characteristics 2N396 2N397
(Cammon Base> DESIGN DESIGN
MIN. MAX. CENTER MIN. MAX. CENTER
<Ven = -Sv; la = 1 ma)
Alpha Cutoff Freqnency fab 5.0 7 8 10 me
Collector Capacity· ( f = I me) Cob 20 12 20 12 µ.µ.f
Voltage Feedback Ratio
(f =I me) hrb 10 11 X 10-s
Base Spreading Resistance r'b 140 160 ohms

Cutoff Characteristics
Collector Cutoff Current
(Veno= -lOv) leo -6 µ.amps
(Veno= -20v) Ico -6 µ.amps
Emitter Cutoff Current
( VEno = -IOv) IEo -6 -6 µ.amps
Punch-through Voltage

D-C Characteristics
D-C Base Current Gain
VPT -20 -10 volts
i
(Vea :=-Iv; ~e = -10 ma) hFE 30 150 30 150
(VcE - -0.5v,
le= -100 ma)
( V CE = -0.35v;
le= -200 ma)
Saturation Voltage
hFE
hFE
20
20
i
(In= -1 ma; le= -20 ma) VeE (SAT) -0.2 -0.09 -0.085 volts
Pulse Response Time
(le =-5 ma;
IB1= In2= 0.5 ma)
0.9 0.66 µ.sec
Delay and Rise Time td+tr
Storage Time t. 0.35 0.35 µ.sec
Fall Time tr 0.25 0.25 µ.sec
Thermal Characteristics
Derate 2.5 mw /°C increase in ambient temperature over 25°C.

The General Electric Type 2N450 is a PNP alloy junction

2N450 high frequency switching transistor intended for military,
industrial and data processing applications where high
Outline Drawing No. 8 reliability at the maximum ratings is of prime importance.
I
ABSOLUTE MAXIMUM RATINGS: (25°C)
SPECIFICATIONS I
Voltages
Collector to Base Ven -20 volts
Collector to Emitter VcE -12 volts
Emitter to Base VEn -5volts
Collector Current le -125ma
Temperature

I
Storage TsTG -65to 85 °C
Junction TJ 85 °C
Power
Total Transistor Dissipation PAV 150mw

134
• ELECTRICAL CHARACTERISTICS: <25°CI
TRANSISTOR SPECIFICATIONS

High Frequency Characteristics (Common Base) DESIGN

MIN. MAX. CENTER

• (VcB = -5v; IE= 1 ma)

Alpha Cutoff Frequency
Collector CaJiacity ( f = I me)
Voltage Fee back Ratio (f =I me)
fab
Cob
hrb
5
16
13
12
10
me
/Lil,£
X 10-3
Cutoff Characteristics

• Breakdown Voltage Collector to Base to

Base Emitter Open
(le= -100 µ.amps)
Breakdown Voltage Collector to
BVcBo -20 volts
Emitter Base Open
(le = -600 µ.amps) BVcEo -12 volts

• Collector Cutoff Current

(VCBO = -6v)
Emitter Cutoff Current
(VEBO =-5v)
lcBO
IEBO
-6
-6
-2
-2
/Lamps
/Lamps
D-C Characteristics

• D-C Base Current Gain

(VcE =-Iv; .le= -10 ma)
Saturation Voltage
(IB = -5 ma; le= -10 ma)
hFE
VcE (SAT)
30
-0.2 volts

The General Electric Type 2N451 is an NPN silicon power 2 N4 5 1

• transistor intended for general application at low to
medium-high frequencies where large amounts of power

..
are required at high operating temperatures. The high col- Outline Drawing No. 6
lector current rating in combination with the lqw saturation
resistance and low thermal resistance of this device make it useful in a wide variety
of applications. A single Type 2N451 in a Class A circuit is capable of 25 watts output
at a mounting base temperature of +30°C. A pair of Type 2N451 units in Class B
will deliver 50 watts output at mounting base temperatures up to +l00°C. The high
cut-off frequency of the Type 2N451 makes it useful in common-emitter amplifier circuits
• at frequencies up to 500 kc or more. The Type 2N451 transistor is a diffused-junction
device manufactured by the General Electric vapor diffusion process. It is hermetically
sealed in a welded case which is designed for mounting on an external heat sink by
means of a simple threaded stud. The type 2N451 transistor is designed to meet the
• requirements of MIL-T-19500A .
SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS
Temperature Range
Storage + 150 •c
• Junction ( Operating )
Voltages
Collector-Base
TsTG
T.r

Vcs
-65 to
+ 150 °C
65 volts
Emitter-Base VEB 10 volts
Collector-Emitter ( RBE ~ 50 ohms) VcE 65 volts
• Currents
Base
Collector
0.5 amps
5 amps
Collector DC Power Dissipation
25°C Mounting Base Temp. 85 watts

• I00°C Mounting Base Temp.

ELECTRICAL CHARACTERISTICS
D-C Characteristics
35 watts

( 25°C Mtg. Base Temp. except where MIN. NOM. MAX.

otherwise indicated I
+
• Collector Reverse Current ( V cs =
(VcE = + 30v; RsE ~ 50 O;
TA.=+ 125°C)
Collector Saturation Resistance
65v) Icso
leEn
20
20
ma
ma
(le = I amp; IB = 0.3 amp. ) RsE 2 4 ohms
Forward Current Transfer Ratio

• (le= I amp; VcE = lOv)

Input Resistance
(le= I amp; VcE = lOv)
hFE
hIE
10
25 ohms
A-C Characteristics (Common Emitter l
(VcE = 30v; le= 1 amp)

• Forward Current Transfer Ratio

(le= 0.5 amp rms; f =I kc)
Input Resistance
(le= 0.5 amp rms; f =I kc)
14
20 ohms
Frequency Cutoff ( 3db) fac 400 kc
Thermal Characteristics

• Thermal resistance from collector junction

to mounting base 1.5 °C/watt

135
TRANSISTOR SPECIFICATIONS
I
The General Electric Type 2N452 features very low col-
2 N4 52
Outline Drawing No. 6
lector saturation resistance and high current capability.
These characteristics make this transistor particularly suit-
able for high power amplifier and switching applications.
The Type 2N452 transistor is a diffused-junction device
I
manufactured by the General Electric vapor diffusion process. It is hermetically sealed
in a welded case which is designed for mounting on an external heat sink by means
of a simple threaded stud. The Type 2N452 transistor is designed to meet the require-
ments of MIL-T-19500A.
SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS
Temperature Range
Storage TsTG -65to+150 °C
Junction (Operating) TJ + 150 °C
Voltages
Collector-Base
Emitter-Base
VcB
VEB
65 volts
10 volts
I
Collector-Emitter ( RBE ~ 50 ohms) VcE 65 volts I
Currents
Base 0.5 amps
Collector 5 amps
Collector DC Power Dissipation
25°C Mounting Base Temp. 85 watts
l00°C Mounting Base Temp. 35 watts
ELECTRICAL CHARACTERISTICS
D-C Characteristics
( 25°C Mtg. Base Temp. except where MIN. NOM. MAX.
otherwise indicated I
Collector Reverse Current ( V CB = + 65v) le Bo 50 ma
(VcE = + 65v; RBE ~ 50 fl;
TA=+ 125°C) lcEa 50 ma
Collector Saturation Resistance
(le = 2 amp; IB = 0.5 amp.) RsE 2.5 ohms
Forward Current Transfer Ratio
(le= 2 amp; VcE = 20v) hFE 8
Input Resistance
(le= 2 amp; VcE = 20v) hrn 15 ohms
Thermal Characteristics
Thermal resistance from collector junction
to mounting base 1.5 °C/watt

The General Electric Type 2N453 features a high forward

2 N4 5 3 current transfer ratio. This transistor is especially well
suited as a series regulator element in d-c regulated power
Outline Drawing No. 6 supplies and generally as a high gain, medium power
amplifier at frequencies up to several hundred kc. The
Type 2N453 transistor is a diffused-junction device manufactured by the General
Electric vapor diffusion process. It is hermetically sealed in a welded case which is

I
designed for mounting on an external heat sink by means of a simple threaded stud.
The Type 2N453 transistor is designed to meet the requirements of MIL-T-19500A.

SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS
Temperature Range
Storage TsTG -65 to+ 150 °C
Junction (Operating) TJ + 150 °C
Voltages
Collector-Base VcB 30 volts
Emitter-Base VEB 10 volts
Collector-Emitter ( RBE ~ 50 ohms) VcE 30,volts
Currents
Base 0.5 amps

I
136
i
• Collector (For good performance,
TRANSISTOR SPECIFICATIONS

maximum collector current should be

limited to 2 amps. ) 5 amps
• Collector DC Power Dissipation
25°C Mounting Base Temp. 85 watts
100°C Mounting Base Temp. 35 watts
ELECTRICAL CHARACTERISTICS

• D-C Characteristics
(25°C Mtg. Base Temp. except where
otherwise indicated)
MIN. MOM. MAX.

Collector Reverse Current ( V CB = +30v) leBO 20 ma

(VcE = + 30v; RBE ~ 50 O;

• TA=+ 125°C)
Collector Saturation Resistance
(le= 1 amp; Is= 0.3 amp.)
Forward Current Transfer Ratio
leER
RsE
20
6
ma
ohms
(le= 1 amp; VcE = 20v) hFE 20
Input Resistance
(le= 1 amp; VcE = 20v) hrn 50 ohms
Thermal Characteristics
Thermal resistance from collector junction
to mounting base 1.5 °C/watt

•
The General Electric Type 2N454 is an NPN silicon power
transistor intended for use as a general purpose, medium 2N4 5 4
• power amplifier at frequencies up to several hundred kc .
The Type 2N454 transistor is a diffused-junction device
manufactured by the General Electric vapor diffusion
Outline Drawing No. 6

process. It is hermetically sealed in a welded case which is designed for mounting

on an external heat sink by means of a simple threaded stud. The Type 2N454 tran-
• sistor is designed to meet the requirements of MIL-T-19500A .

SPECIFICATIONS

• ABSOLUTE MAXIMUM RATINGS

Temperature Range
Storage
Junction (Operating)
TsTG
TJ
-65 to+ 150 °C
+ 150 °C
Voltages
Collector-Base 65 volts
• Emitter-Base
Collector-Emitter ( RBE
Currents
~ 50 ohms)
10 volts
65 volts

Base 0.5 amps

Collector (For good performance,

• maximum collector current should be

limited to 2 amps. )
Collector DC Power Dissipation
5 amps

25°C Mounting Base Temp. 85 watts

l00°C Mounting Base Temp. 35 watts

• ELECTRICAL CHARACTERISTICS
D-C Characteristics
( 25°C Mtg. Base Temp. except where
otherwise indicated)
MIN. HOM. MAX.
Collector Reverse Current ( V CB = + 65v) le BO 20 ma
(VcE = + 30v; RBE ~ 50 n;
• TA=+ 125°C)
Collector Saturation Resistance
(le= 1 amp; Is= 0.3 amp.)
Forward Current Transfer Ratio
le ER
RsE
20
10
ma
ohms
(le= 1 amp, VcE = 20v) hFE 8
Input Resistance

• (le= 1 amp, VcE = 20v)

Thermal Characteristics
hrn 25 ohms

Thermal resistance from collector junction

to mounting base 1.5 °C/watt

•
137
TRANSISTOR SPECIFICATIONS
I
The General Electric Silicon Unijunction Tran- I
2N489-2N494 sistor is a hermetically sealed three terminal device

Outline Drawing No. 5

having a stable "N" type negative resistance
charactistic over a wide temperature range. A
i
high peak current rating makes this device useful
in medium power switching and oscillator applications, where it can serve the purpose
of two conventional silicon transistors. These transistors are hermetically sealed in a
welded case. The case dimensions and lead configuration are suitable for insertion in
printed boards by automatic assembly equi_pment. The Silicon Unijunction Transistor
consists of an "N" type silicon bar mounted between two ohmic base contacts with a
"P" type emitter near base-two. The device operates by conductivity modulation of
the silicon between the emitter and base-one when the emitter is forward biased. In
the cutoff, or standby condition, the emitter and interbase power supplies establish
potentials between the base contacts, and at the emitter, such that the emitter is back
biased. If the emitter potential is increased sufficiently to overcome this bias, holes
(minority carriers) are injected into the silicon bar. These holes are swept towards
base-one by the internal field in the bar. The increased charge concentration, due to
these holes, decreases the resistance and hence decreases the internal voltage drop
from the emitter to base-one. The emitter current then increases regeneratively until
it is limited by the emitter power supply. The effect of this conductivity modulation
is also noticed as an effective modulation of the interbase current. I
SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS: 125°Cl
RMS Power Dissipation 250mw*
RMS Power Dissipation - Stabilized** 350 mw*
RMS Emitter Current 50ma
Peak Emitter Current*** ( T1 = 150°C) 2 amps
=
Emitter Reverse Voltage (TJ 150°C)
Operating TemperaturP Range
60 volts
-65to150 °C
Storage Temperature Range -65 to 200 °C
Interbase Voltage (Vss) See Fig. A
*Derate 2 mw /°C increase in ambient temperature.
**Total power dissipation must be limited by external circuit.
***Capacitor discharge -10 µ.fd or less. i
r
Types 2N489-2N494 are specified primarily in three
ranges of stand-off and two ranges of interbase resistance. I
Each range of stand-off ratio has limits of ±10% from
the center value and each range of interbase resistance r
has limits of ±20% from the center value.
I

I 2N489, 2N490 I 2N489 2N490

MAJOR ELECTRICAL CHARACTERISTICS: MIN. NOM. MAX. MIN. NOM. MAX.
Interbase Resistance at 25°C Junction
Temperature
Intrinsic Stand-off Ratio
Modulated Interbase Current
Rss 0
71
4.7
.51
5.6
.56
6.8
.62
6.2
.51
7.5
.56
9.1 kilohms
.62 I
(IE = 50 ma; Vss = lOv;
TA= 25°C) Is 2 (MOD) 6.8 12 22 6.8 12 22 ma
Emitter Reverse Current
(VB2E = 60v; TJ = 25°C) lEo .07 1.0 .07 1.0 µ.a
(Vs~= 60v; T1=150°C) lEo 28 100 28 100 µ.a
MINOR ELECTRICAL CHARACTERISTICS: (Typical Values)
Emitter Saturation Voltage
(Ia = 50 ma; Vss = lOv;
TA= 25°C) VE(SAT) 1.5 2.2 3.5 1.5 2.4 3.6 volts
iI
Peak Point Emitter Current
(Vss = 25v; TA= 25°C) Ir 4 12 4 12 µ.a
Valley Voltage Vv 1.1 1.9 3.4 1.0 1.9 3.5 volts
Valley Current
Maximum Frequency of Oscillation
( lB 2 = 4.5 ma; Relaxation
Oscillator)
Iv

hux
12 19

0.9
35 11 19

0.7
31 ma

me
I
138
I
• TRANSISTOR SPECIFICATIONS

I 2N491, 2N492 I
• MAJOR ELECTRICAL CHARACTERISTICS:
Interbase Resistance at 25°C Junction
2N491

6.8 6.2
2N492
MIN. NOM. MAX. MIN. NOM. MAX.
7.5 9.1 kilohms
Temperature RBB 0 4.7 5.6
Intrinsic Stand-off Ratio 71 .56 .62 .68 .56 .62 .68

• Modulated Interbase Current

(IE = 50 ma; VBB = lOv;
TA= 25°C)
Emitter Reverse Current
IB 2 (MOD) 6.8 12 22 6.8 12 22 ma

( VB 2 E = 60v; TJ = 25°C) IEo .07 1.0 .07 1.0 µa

( VB 2 E = 60v; TJ = 150°C) IEO 28 100 28 100 µa

• MINOR ELECTRICAL CHARACTERISTICS: (Typical Values)

Emitter Saturation Voltage
(IE= 50 ma; VBB = lOv;
TA= 25°C) VE(SAT) 1.7 2.6 3.8 1.8 2.8 4.0 volts
Peak Point Emitter Current
12 µa
• (VBB = 25v; TA= 25°C)
Valley Voltage
Valley Current
Maximum Frequency of Oscillation
IP
Vv
Iv
1.2
13
4
2.2
20
12
3.9
37
1.2
12
2.2
20
4
3.9 volts
38 ma

( lB 2 = 4.5 ma; Relaxation

Oscillator) £1ux 0.8 0.7 me

•
I 2N493. 2N494 I 2N493 2N494
MAJOR ELECTRICAL CHARACTERISTICS:
• Interbase Resistance at 25°C Junction
Temperature
Intrinsic Stand-off Ratio
RBBo
71
MIN. NOM. MAX . MIN. NOM. MAX.
4.7
.62
5.6
.68
6.8
.75
6.2
.62
7.5
.68
9.1 kilohms
.75
Modulated Interbase Current
(IE= 50 ma; VBB = lOv;
22 ma
• TA= 25°C)
Emitter Reverse Current
(VB 2 E = 60v; T1 = 25°C)
IB 2 (MOD)

IEo
6.8 12
.07
22
1.0
6.8 12
.07 1.0 µa
(VB 2 E = 60v; TJ = 150°C) IEo 28 100 28 100 µa
MINOR ELECTRICAL CHARACTERISTICS: (Typical Values)

• Emitter Saturation Voltage

(IE = 50 ma; VBB = lOv;
TA= 25°C) VE(SAT) 2.0 3.0 4.5 2.1 3.2 4.6 volts
Peak Point Emitter Current
(VBB = 25v; TA= 25°C) IP 4 12 4 12 µa
Valley Voltage Vv 1.4 2.5 4.4 1.4 2.5 4.3 volts

• Valley Current
Maximum Frequency of Oscillation
( IB 2 = 4.5 ma; Relaxation
Iv 14 24 40 12 21 35 ma

Oscillator) £1ux 0.7 0.65 me

• 12
I
INTERBASE

10
I
RESISTANCE (25°C) - Reeo- KILOHMS

RMS EMITTER POWER DISSIPATION < 20MW

•
• O"

•
• 0 10 20 30 40 50 60 70
MAXIMIM ALLOWABLE INTER BASE VOLTAGE - !Vee~AX -VOLTS

• FIGURE A

139
TRANSISTOR SPECIFICATIONS I
I
The 2N508 is an alloy junction PNP transistor intended
2 N 508 for driver service in audio amplifiers. It is a miniaturized
version of the 2N265 G.E. transistor. By control of transistor
Outline Drawing No. 2 characteristics during manufacture, a specific power gain
is provided for each type. Special processing techniques f!
and the use of hermetic seals provides stability of these characteristics throughout Jife.
I
SPECIFICATIONS

ABSOLUTE MAXIMUM RATINGS: 125°Cl

Voltages
Collector to Emitter VcE -16 volts
Collector to Base VcB -16 volts

Collector Current le -lOOma

Power
Collector Dissipation PcM 140 mw

Temperature
Operating and Storage Range TA-TSTG -65 to+ 65 ·c

i
TYPICAL ELECTRICAL CHARACTERISTICS: (25°C) ,
D.C. Characteristics I
Base Current Gain ( le= -20 ma; VCE = -1 v) hFE 125
Collector to Emitter Voltage
(REB = lOK; le= -.6 ma) VcER -16 volts
Collector Cutoff Current ( V CB = - l 6v) Ico 10 µa
Max. Collector Cutoff Current (VcB = -16v)leo 16 µa

Small Signal Characteristics

Frequency Cutoff ( V CB = -5v; IE = 1 ma) fab 3.5 me
Collector Capacity ( V CB = -5v; IE = 1 ma) Cob 24 µµ£
Noise Figure (VcB = -5v; IE= 1 ma) NF 6 db

i
Input Impedance (VcE =-5v; IE= 1 ma) hie 3 Kohms
Current Gain (VcE = -5v; IE= 1 ma) hre 112

Thermal Characteristics
Thermal Resistance Junction to Air .25 °C/mw

Performance Data Common Emitter

Power Gain Driver ( V cc = 9v) Ge 45 db
Power Output Po 1 mw

140
• The General Electric Type 2N518 is a germanium PNP
TRANSISTOR SPECIFICATIONS

.. alloy junction high frequency switching transistor intended

for military, industrial and data processing applications
where high reliability at the maximum ratings is of prime
2N518
Outline Drawing No. 8

importance .

•
SPECIFICATIONS

• ABSOLUTE MAXIMUM RATINGS: (25°Cl

Voltages
Collector to Base Vcs -45 volts
Collector to Emitter VcE
• Emitter to Base VEB
-12 volts
-30 volts

Collector Current le -125 ma

• Temperature
Storage TsTG -65 to 85 °C
Junction T1 85 °C

• Power
Total Transistor Dissipation PAV 150mw

• ELECTRICAL CHARACTERISTICS: (25°C)

High Frequency Characteristics (Common Base) DESIGN
(Yes= -5v; IE= 1 ma) MIN. MAX. CENTER

• Alpha Cutoff Frequency

Collector Capacity ( f = 1 me)
Voltage Feedback Ratio (f = 1 me)
fab
Cob
hrb
10
16
13
12
10
me
µµ£
X 10-3

• Cutoff Characteristics
Breakdown Voltage Collector to Base
Emitter Open (le= -100 µamps) BVcso -45 volts
Breakdown Voltage Emitter to Base
Collector Open (IE = -100 µamps) BVEBO -30 volts
• Breakdown Voltage Collector to Emitter
Base Open ( le = -600 µamps)
Collector Cutoff Current (Vcso = -12v)
Emitter Cutoff Current (VEBO = -12v)
BVcEo
Icso
!EBO
-12
-6
-6
volts
µamps
µamps

• D-C Characteristics
D-C Base Current Gain
(VcE = -lv; le= -10 ma) hFE 60
Saturation Voltage

• (Is= -.25 ma; le= -10 ma)

Pulse Response Time
(le= - 10 ma; ls1 = Is 2 = - .5 ma)
Delay and Rise Time
VcE (SAT)

td +tr
-0.150

0.8
volts

µsec
Storage Time ts 0.9 µsec
Fall Time tr 0.5 µsec

• Thermal Characteristics
Derate 2.5 mw /°C increase in ambient temperature over 25°C .

•
• 141
TRANSISTOR SPECIFICATIO NS

The General Electric types 2N524 and 2N525

I
are germanium PNP alloy junction transistors par-
2N524, 2N525
Outline Drawing No. 2
ticularly recommended for low to medium power
amplifier and switching application in the fre-
quency range from audio to 100 KC. This series
I
of transistors is intended for military, industrial and data processing applications where
high reliability and extreme stability of characteristics are of prime importance. The
2N524 and 2N525 are equivalent to the 2N44 and 2N43 respectively and may be
directly substituted in most applications.

SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS: <25°C)
Voltages
Collector to Base VcBo -45 volts
Collector to Emitter VcER -30 volts
Emitter to Base VEBO -15 volts

Collector Current -500 ma

Temperatures
Storage TsTG -65to100 °C
Operating T1 85°C

Power
Total Transistor Dissipation PAV 225mw

ELECTRICAL CHARACTERIST ICS: (25°Cl

Small Signol Characteristics
(Unless otherwise specified Ve = -5V
common base; IE= -1 ma; f = 270 cps)
r
Output Admittance
2N524
MIN. NOM. MAX.
2N525
MIN. NOM. MAX. i
(Input AC Open Circuited) hob .10 .65 1.3 .1 .6 1.2 1tmhos
Input Impedance
(Output AC Short
Circuited) h1b 26 31 36 26 31 35 ohms
Reverse Voltage Transfer Ratio x 10-1.
( Input AC Open Circuited) hrb 1 4.0 10 1 5.0 11
Forward Current Transfer Ratio
(Common Emitter; Output !l''
AC Short Circuited) hre 16 30 41 30 44 64
Frequency Cutoff ·
Output Capacity ( f = 1 me;
Input AC open circuited)
fab
Cob
.8
18
2.0
25
5.0
40
I
18
2.5
25
5.5
40
me
ILµ,£
I
Noise Figure ( f = I kc;
BW = 1 cycle) NF I 6 15 6 15 db

D-C Characteristics
Forward Current Gain
(Common Emitter, lc/lB)
I
(VcE =-Iv; le =-20 ma) hFE 19 35 42 34 52 65
(VcE =-Iv; le =-lOOma) hFE 13 31 30 45
Base Input Voltage,
Common Emitter
(VcE =-lv; le =-20 ma) VBE -.220 -.255 -.320 -.200 -.243 -.300
Collector Cutoff Current
(VCBO = -30v) Ico -5 -10 -5 -10 1ta
Emitter Cutoff Current
(VEBO = -15v) IEo -4 -10 -4 -10 µ,a
Collector to Emitter Voltage
( RBE = lOK ohms;
le= -.6 ma) VcF:R -30 -30 volts
Punch-through Voltage Vl'T -30 -30 volts

Thermal Resistance ( k)
Junction Temperature Rise/
Total Transistor Dissipation:
.27 .27 °C/mw

I
Free Air
Infinite Heat Sink .11 .11 °C/mw
Clip-on Heat Sink in
Free Air .20 .20 °C/mw

142
• The General Electric types 2N526 and 2N527
TRANSISTOR SPECIFICATIONS

are germanium PNP alloy junction transistors

2N526, 2N527
• particularly recommended for low to medium
power amplifier and switching application in the
frequency range from audio to 100 KC. This series Outline Drawing No. 2
of transistors is intended for military, industrial and data processing applications where
• high reliability and extreme stability of characteristics are of prime importance .

SPECIFICATIONS
• ABSOLUTE MAXIMUM RATINGS: (25°Cl
Voltages
Collector to Base Vcso -45 volts
Collector to Emitter VcER -30 volts
• Emitter to Base

Collector Current
VEBO

JcM
-I5 volts

-500ma

Temperatures
• Storage
Operating
TsTG
TJ
-65 to 100 °C
85 ·c

Power
Total Transistor Dissipation PAV 225mw
• ELECTRICAL CHARACTERISTICS: (25°Cl
Small Signal _~haracteristics
(Unless otherwise specified Ve = -SV
= = 270 cps)
• common base; h: -1 ma; f

2N526 2N527
MIN. HOM. MAX. MIN. HOM. MAX.
Output Admittance
• (Input AC Open Circuited)
Input Impedance
(Output AC Short
hob .I .42 1.0 .I .37 .9 µmhos

Circuited) hib 26 30 33 26 29 3I ohms

Reverse Voltage Transfer Ratio
(Input AC Open Circuited) hrb 6.5 I2 8.0 I4 X I0- 4
• Forward Current Transfer Ratio
(Common Emitter; Output
AC Short Circuited) hre 44 64 88 60 8I I20
Frequency Cutoff fab 1.3 3.0 6.5 1.5 3.3 7 me
Output Capacity ( f = I me;

• Input AC open circuited)

Noise Figure ( f = I kc;
BW =I cycle)
Cob
NF
I8 25
6
40
I5
I8 25
6
40
I5
µµ£
db

D-C Characteristics

• Forward Current Gain

(Common Emitter, le/Ia)
(VcE =-Iv; le =-20ma) hF~: 53 73 90 72 9I I2I
(VcE =-Iv; le =-IOOma) hF~l 47 66 65 86
Base Input Voltage,

• Common Emitter
(VcE =-Iv; le =-20 ma)
Collector Cutoff Current
(Vcao = -30v)
VBE
fro
-.190 -.230 -.280 -.I80 -.2I6 -.260
-5 -10 -5 -10 µa
Emitter Cutoff Current
(VEBO = -I5v) IEO -4 -10 -4 -10 µa

• Collector to Emitter Voltage

( RBE = lOK ohms;
le= -.6 ma)
Punch-through Voltage
Vn:R
VPT
-30
-30
-30
-30
volts
volts

• Thermal Resistance ( k)
Junction Temperature Rise/
Total Transistor Dissipation:
Free Air .27 .27 °C/mw
Infinite Heat Sink .11 .11 °C/mw
Clip-on Heat Sink in
II Free Air .20 .20 °C/mw

143
TRANSISTOR SPECIFICATIONS
I
The General Electric type 2N634 js an NPN germanium
2N634
Outline Drawing No. 2
alloy triode transistor designed for high speed switching
applications. I
SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS: (25°Cl
Voltages
Collector to Base VcB 20 volts
Emitter to Base VEB 15 volts
Collector to Emitter VcE 20 volts

Currents
Collector le 300ma
Base IB 50ma
Emitter IE 300ma

Temperature
Storage TsTG -65 to 85 °C
Operating Junction TA 85 °C

-Power
Dissipation PM 150mw

ELECTRICAL CHARACTERISTICS: (25°Cl

Collector Voltage MIN. MOM. MAX.
(le= 15 µamp; IE= 0)

i
VcBo 20 volts
Emitter Voltage
(IE= IO µamp; le= 0) VEBO 15 volts
Collector to Emitter Voltage
(le= 600 µamp; R =IO K) VcER 20 volts
Collector Cutoff Current
(VcB = 5v; IE= 0) le BO 5 µamps
Punch Through Voltage VPT 20 volts
D-C Current Gain
(le= 200 ma; VcE = 0.75v) hFE 15
Alpha Cutoff Frequency
(VcB = 5v; IE= -1 ma) fab 5 8 me

Thermal Characteristic
Derate 2.5 mw /°C increase in ambient temperature over 25°C.
I
The General Electric type 2N635 is an NPN germanium
2N635 alloy triode transistor designed for high speed switching
applications.
Outline Drawing No. 2

SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS: (25°Cl
Voltages
Collector to Base
Emitter to Base
Collector to Emitter
VcB
VEB
VcE
20 volts
15 volts
20 volts I
Currents
Collector 300ma
Base 50ma
Emitter 300ma

r
Temperature
Storage
Operating Junction
TsTG
TA
-65 to 85 °C
85 °C
I
.

Power
Dissipation 150mw

144
• TRANSISTOR SPECIFICATIONS

ELECTRICAL CHARACTERISTICS: (25°CI

Collector Voltage MIN. NOM. MAX.

• (le= 15 µamp; IE= 0)

Emitter Voltage
(IE= 10 µamp; le= 0)
VcBo
VEBO
20
15
volts
volts
Collector to Emitter Voltage
(le= 600 µamp; R = 10 K) VcER 20 volts
Collector Cutoff Current
• (VcB = 5v; IE= 0)
Punch Through Voltage
D-G Current Gain
le BO
VPT 20
5 µamps
volts
(le= 200 ma; VcE = 0.75v) hFE 25
Alpha Cutoff Frequency
(VcB = 5v; IE= -1 ma) fab 10 12 me
•
Thermal Characteristic
Derate 2.5 mw/°C increase in ambient temperature over 25°C .

•
•
The General Electric type 2N636 is an NPN germanium
alloy triode transistor designed for high speed switching 2N636
• applications .
Outline Drawing No. 2

• ABSOLUTE MAXIMUM RATINGS: (25°CI

SPECIFICATIONS

Voltages

• Collector to Base
Emitter to Base
Collector to Emitter
VcB
VEB
VcE
20 volts
15 volts
20 volts

Currents
• Collector
Base
Emitter
le
Is
300ma
50ma
IE 300ma

• Temperature
Storage
Operating Junction
TsTG
TA
-65 to 85 °C
85 °C

• Power
Dissipation PM 150mw

• ELECTRICAL CHARACTERISTICS: <25°C1

Collector Voltage
(le= 15 µamp; IE= 0) VcBo
MIN.
20
MOM. MAX.
volts
Emitter Voltage
(IE= 10 µamp; le= 0) VEBO 15 volts
• Collector to Emitter Voltage
(le= 600 µamp; R = 10 K)
Collector Cutoff Current
(VcB = 5v; IE= 0)
VcER
le BO
15
5
volts
µamps
Punch Through Voltage VrT 15 volts
D-C Current Gain

• (le= 200 ma; VcE = 0.75v)

Alpha Cutoff Frequency
(VcB = 5v; IE= -1 ma)
hFE
fab
35
15 17 me

• Ther111al Characteristic
Derate 2.5 mw/°C increase in ambient temperature over 25°C.

.. 145
TRANSISTOR SPECIFICATIONS I
3 N3 6
The General Electric Type 3N36 is a germanium meltback
NPN transistor designed for high frequency use as an
I
:
amplifier, oscillator or mixer. It is recommended for use in
Outline Drawing No. 7 the frequency range from 30mc to lOOmc. The 3N36 is
excellent for wide band video amplifiers from low frequency
to !Orne. All units are subjected to a rigorous mechanical drop test to control mechani- I
cal reliability. These transistors are hermetically sealed in welded cases. The case I
dimensions conform to the JETEC T0-12 package and are suitable for insertion in
printed boards by automatic assembly equipment.

SPECIFICATIONS

ABSOLUTE MAXIMUM RATINGS: (25"Cl

Voltages
Collector to Base I or Base 2 Ven 7 volts
Emitter to Base 1 or Base 2 V1rn 2 volts
Collector to Emitter VcE 6 volts

Currents
Collector 20ma
Emitter -20ma
Base 2 2ma

Temperature
Storage TsTG -65 to +s5 •c
Operating Junction T1 +s5 ·c

Power
Total Transistor Dissipation 30mw

ELECTRICAL CHARACTERISTICS: <2s 0 c>

(Unless otherwise specified VcB1 + Sv;=
h: =-1.5 ma; Vn 2 B 1 =-2v; f =
60 me)
DESIGN
Small Signal High Frequency Parameters MIN. CENTER MAX.
Output Capacity Cob 2 3 µµt
Noise Figure (Common Base) NF 11 db
Base Spreading Resistance

Common Emitter "h" Parameters

r'b 50 ohms
I
Input Impedance h10 100-j27 ohms
Reverse Voltage Transfer Ratio hre .022 L 47°
Current Transfer Ratio hre 2.2 L -81°
Output Admittance hoe B+jB.8 X I0-4 mhos
Common Base Cutoff Frequency fab 50 me
Common Emitter Power Gain Ge 10 11.5 db

D-C Characteristics
Voltage Collector to Emitter
(RBE = lOK;
Vn 2E = -2v; le = 25 /Lamp) 5 volts
Collector Cutoff Current (Vcn 1 B 2 = 7v) 3 10 µamps
Cross Base Resistance 2.4K 4K lOK ohms

Thermal Characteristic
Derate .5mw /°C increase in ambient temperature over 25°C.

146
 TRANSISTOR SPECIFICATIONS
•
The General Electric Type 3N37 is a germanium meltback
NPN transistor designed for high frequency use as an
amplifier, oscillator or mixer. It is recommended for use in
3 N3 7
• the frequency range of lOOmc to 200mc. The 3N37 is excel-
lent for wide band video amplifiers from low frequency to
Outline Drawing No. 7

!Orne. All units are subjected to a rigorous mechanical drop test to control mechanical
reliability. These transistors are hermetically sealed in welded cases. The case dimen-
• sions conform to the JETEC T0-12 package and are suitable for insertion in printed
boards by automatic assembly equipment .

•
SPECIFICATIONS

• ABSOLUTE MAXIMUM RATINGS: (25°C)

Voltages
Collector to Base 1 or Base 2 Vcu 7 volts
Emitter to Base 1 or Base 2
• Collector to Emitter
VEB
VcE
2 volts
6 volts

Currents

• Collector
Emitter
Base 2
20ma
-20ma
2ma

• Temperature
Storage
Operating Junction
TsTG
T1
-65 to +85
+85
·c
·c

• Power
Total Transistor Dissipation 30mw

• ELECTRICAL CHARACTERISTICS: (25°CI

(Unless otherwise specified VcB1 = + 5v;
IE=-1.5ma;VB 2 B1 =-2v;f= 150 me)
DESIGN
• Small Signal High Frequency Parameters
Output Capacity Cob
MIN. CENTER MAX.
1.5 3 µµt
Noise Figure (Common Base) NF 11 db
Base Spreading Resistance r'b 50 ohms

• Common Emitter "h" Parameters

Input Impedance hto 80 - jlO ohms
Reverse Voltage Transfer Ratio hre .018 L 84°

• Current Transfer Ratio

Output Admittance
Common Base Cutoff Frequency
Common Emitter Power Gain
hre
hoe
fab
Ge
90
7
1.1 L -100°
5.5+ jl2.514
9
X 10-4 mhos
me
db

• D-C Characteristics
Voltage Collector to Emitter
(RBE = lOK;
Vu.,E = -2v; le = 25 µamp) 5 volts

• Collector Cutoff Current (Vcu 1 B2 = 7v)

Cross Base Resistance 2.5K
3
4K
10
lOK
µamps
ohms

•
Thermal Characteristic
Derate .5mw/°C increase in ambient temperature over 25°C.

147
TRANSISTOR SPECIFICATIONS
I
I
TYPICAL I!! I. F. AMPL.

I
AUTOMATIC 725
AUTOMATIC 725
(EX0-3926)
r-------,
I I
I
I
(EXO - 3926)
r------,
I
I
I I

MEASURMENTS
65-8 i'\I
I 500 .n
I
i
OR EQUIV.

+9V
" - - - • A.V.C.
6mfd/12V 2.7K

+
TYPICAL 2~ I. F. AMPL.
EXO 3015
OR
AUTOMATIC 726
AUTOMATIC 725 r----1
(EX0-3926) I I
Icq= Ima I I
i
MEASUREMENTS
I ~: 500
.n
65 - B
OR EQUIV.
-----. _ _J

.05

+9V

148
.. TRANSISTOR SPECIFICATIONS

• TYPICAL IF TEST CIRCUIT

• 24.4MV
(Cil 455KC/S
AUTOMATIC
725 HP 400D
OR EQUIV.

5on

•
u-~~~~~~~~-1-~~~-a~~~B+
Ic 5.5VOLTS

• NOTE #I MAKE ALLOWANCE OF 4db IN MEASUREMENT

FOR TRANSFORMER AND CIRCUIT LOSSES.
t
Ve

1000
:ti% 40Kil

• NOTE #2 WHEN APPLYING 244 MILLIVOLTS AT 455KC/S (NO

MODULATION) AT INPUT (JI) AND WHEN TRANSISTOR
GAIN IS 30db, OUTPUT VOLTAGE WILL BE .077 VOLTS
THIS COINCIDES WITH THE Odb POINT ON THE .IV
SCALE OF THE H. e VTVM GAIN CAN THUS BE
:ti%

..
MEASURED DIRECTLY IN db'S.
VOLTMET~R- ~~~Ci~J %• J8&~) FULL SCALE
AMMETER READING 2Ma FULL SCALE

..
TYPICAL AUTODYNE CONVERTER

•
.&C = 190.6

• L=435
mh +
30 TURNS

• • L = 250).lhen
: .&C=89.3

.o~
II
1.5~-~

.. 6 TURNS

ANTENNA - DELTA COIL #I - I05A OR EQUIVALENT

OSCILLATOR COIL - E. STANWYCK CO. #1129(MODIFIED) OR EQUIVALENT
CAPACITOR - RADIO CONDENSER # 242 OR EQUIVALENT
I. F. TRANSFORMER - AUTOMATIC 725(EX0-3926) OR EQUIVALENT

149
 REGISTERED JETEC TRANSISTOR TYPES

For explanation of symbols, ratings and mfg. symbols see page 160.
MAY 1
MA X. R GS TYPICAL VALUES 1 9158

JETEC Dwg. Pcmw Po mw-Class

hr.. Closest GE
No.
--- Type Mfr.
-- --- --
Use No. @ 2s c
0
I!
- -no --
T1°C
-- --fab me
--
A
--B

2N22 Pt WE Sw 120 - ?O 55 l.9a

2N23 Pt WE Sw 80 ~o 55 l.9a
2N24 Pt WE AF 120 is 50 2.2a
2N25 Pt WE AF 200 -50 -30 60 2.Sa
2N26 Pt WE Sw 90 -30 -40 55
2N27 NPN WE AF 50 35 100 85 100 1
2N28 NPN WE AF 50 30 100 85 100 .5
2N29 NPN WE AF 50 35 30 85 100 1
2N30 Pt GE Obsolete 100 30 7 40 2.2a 2 17 old Gll
2N31 Pt GE Obsolete 100 30 7 40 2.2a 2 old GllA
2N32 Pt RCA 50 -40 -8 40 2.2a 2.7 21
2N33 Pt RCA Obsolete 30 -8.5 -7 40 Osc.
2N34 PNP RCA AF 50 -25 -8 50 40 .6 40 2Nl90
...... .8 40 125 2Nl69A
en 2N35 NPN RCA IF 50 25 8 50 40
40 2Nl91
0 2N36 PNP CBS AF 50 -20 -8 50 45
2N37 PNP CBS AF 50 -20 -8 50 30 36 2Nl90
2N38 PNP CBS AF 50 -20 -8 50 15 32 2Nl89
2N38A PNP CBS AF 50 -20 -8 50 18 32 2Nl89
2N41 PNP RCA 50 -25 -15 50 40 40 2Nl90
2N43 PNP GE AF 1 240 -30 -300 100 53 1.3 40 40 2N43
2N43A PNP GE AF 1 155 -25 100 53 1.3 40 40 2N43A
2N44 PNP GE AF 1 240 -30 -300 100 31 1.0 39 40 2N44
2N45 PNP GE Obsolete 155 -25 100 31 1.0 38 40
2N46 PNP RCA see 2N41 2Nl90
2N47 PNP Phil AF 50 -35 -20 65 38 8 40 2Nl90 25V
2N48 PNP Phil AF 50 -35 -20 65 32 8 40 2Nl89 25V
2N49 PNP Phil AF 50 -35 -20 65 38 8 40 2Nl90 25V
2N50 Pt Cle 50 -15 -1 50 2a 3 20
2N51 Pt Cle Sw 100 -50 -8 50 20
2N52 Pt Cle RF 120 -50 -8 50 20
2N53 Pt Cle RF 100 -50 -8 50 2a 5 20
2N54 PNP w AF 200 -45 -10 60 32 .5 40 2Nl90 25V
2N55 PNP w AF 200 -45 -10 60 20 .5 39 2Nl90 25V
2N56 PNP w AF 200 -45 -10 60 12 .5 38 2Nl89 25V
2N57 PNP w Pwr 20W -60 -.8A 60 14 SW
2N59 PNP w AF Out 180 -20 -200 85 90 30 30 300 2N241A or 2N321
I.
• • • • • • • • • • • • • I I I

MAX. RATINGS TYPICAL VALUES

JETEC Dwg. Pcmw Po mw-Class
Type 2s·c
No.
---
2N60 PNP
--
Mfr.

w
Use
---
AF Out
--
No. @ BVcE
--
-20
-- -- -- ---
lcma T1°C hte fab me Gedb
--- -- A B
-- Closest GE

180 -200 SS 6S 28 30 300 2N188A or 2N320

2N61 PNP w AF Out 180 -20 -200 SS 4S 26 30 300 2N187 A or 2N319
2N62 PNP Phil Obsolete so -3S -20 40
2N63 PNP Ray AF 100 -22 -10 SS 22 6 39 40 2N107
2N64 PNP Ray AF 100 -lS -10 SS 4S 8 41 40 2Nl91
2N6S PNP Ray AF 100 -12 -10 SS 90 1.2 42 40 2Nl92
2N66 PNP WE Obsolete lW -40 .SA 80 .2
2N68 PNP Syl Pwr 2W/4W -2S -1.SA 70 40 .4 23 600 SW
2N71 PNP w Pwr lW -so -2SO 60 .2S 2S 400
2N72 Pt RCA Obsolete so -40 -20 SS 2.S
2N7:1 PNP w AF Sw 200 -so low level
2N74 PNP w AF Sw 200 -so high level
2N7S PNP w AF Sw 200 -SO very low level
2N76 PNP GE Obsolete 50 -20 -10 60 20 1 38 2Nl90
2N77 PNP RCA AF 3S -25 -lS so SS .7 44 so 2Nl91
2N78 NPN GE RF 3 65 lS 20 SS 70 9 28 2N78
2N79 PNP RCA AF 35 -30 -so 46 .7 44 so 2Nl91
2N80 PNP CBS AF so -2S -8 Hi 80 2Nl92
>--' 2N81 PNP GE Obsolete so -20 -lS 100 30 use 2Nl89
t11 2N82 PNP CBS AF 3S -20 -lS Hi 30
1--'
2N94 NPN Syl RF Sw 30 20 so 7S 30 3 38 { 2Nl69A (and
2N94A NPN Syl RF Sw 30 20 so 7S 40 6 38 2Nl23 PNP)
2N9S NPN Syl Pwr 2.SW/4W 2S I.SA 70 40 .4 23 600 SW
2N96 PNP RCA Obsolete 50 -30* -20 SS 3S .S 2Nl90 or 2N322
2N97 NPN GP IF so 30 10 7S 13 1 20 2Nl69 lSV
2N97A NPN GP IF so 40 10 SS 13 1 20 2Nl69A 2SV
2N98 NPN GP IF so 40 10 7S 38 2.S 22 2Nl69A 25V
2N98A NPN GP IF so 40 10 SS 38 2.5 22 2Nl69A 2SV
2N99 NPN GP IF so 40 10 7S 38 3.S 22 2Nl69A 2SV
2Nl00 NPN GP IF 2S 2S s so 100 s 23 2Nl70 6V
2Nl01 PNP Syl Pwr lW -2S -1.SA 70 23 600
2Nl02 NPN Syl Pwr lW 2S I.SA 70 23 600 SW
2Nl03 NPN GP Genl IF so 3S 10 7S s .7S lS 2Nl70 6V
2Nl04 PNP RCA AF 70 -30 -so 70 44 .7 41 2Nl90 2SV
2NlOS PNP RCA AF 3S -2S -lS so SS .7S 42 2Nl91
2Nl06 PNP Ray AF 100 -6 -10 SS 4S .8 36 40 2Nl89
2Nl07 PNP GE AF 1 so -6 -10 60 20 1 38 2Nl07
2Nl08 PNP CBS AF Out so -20 -lS 3S
2Nl09 PNP RCA AF Out so -12 -3S so 70 33 7S 150 2N188-2N192
2N110 Pt WE Sw 180 -SO* -SO SS 32 s.o
2Nlll PNP Ray IF lSO -lS -200 SS 40 3 30 2N13S
2NlllA PNP Ray IF lSO -lS -200 SS 40 3 33 2Nl:iS
2Nll2 PNP Ray RF 150 -15 -200 SS 40 s 32 2N136-2Nl3S
 MAX. RATINGS TYPICAL VALUES
Dwg. Pcmw Po mw-Class
JETEC
@ 2s·c me A B Closest GE
No.
--- Type Mfr.
--
Use
--- -- No. na
-
T1°C
-- -- - -hte fab
-- --
IF 150 10 85 40 5 2Nl36
2Nll2A PNP Ray 2Nl37
2Nll3 PNP Ray RF 100 5 85 45 10
RFSw 100 5 85 65 20 2Nl37 or 2Nl23
2N114 PNP Ray
TI Si (=903) 150 45* 25 175 12 4 2N332
2Nll7 NPN
2Nll8 NPN TI Si (=904) 150 45* 25 175 24 s 2N333
Tl SiAF 150 45* 25 175 .98a 6 2N335
2Nll9 NPN
GE RFSw 8 100 -20 -125 85 50 8 2Nl23
2Nl23 PNP 2Nl68
2Nl24 NPN TI RFSw 50 10 8 75 18 3
2Nl25 NPN Tl RFSw so 10 s 75 32 5 2Nl67
2Nl26 NPN TI RFSw 50 IO s 75 60 5 2Nl67
Tl RFSw 50 IO 8 75 130 5 2Nl67
2Nl27 NPN
2Nl28 PNP Phil SB Osc :rn -4.5 -5 85 35 60
2N129 PNP Phil SB Osc 30 -4.5 -5 SS 20 40
Ray AF S4 -22 -10 85 22 39 2N186 or 2N319
2Nl30 PNP 2N187 or 2N319
2Nl31 PNP Ray AF S4 -15 -10 8S . 45 41
Ray AF S4 -12 -10 SS 90 42 2N241 or 2N321
2Nl32 PNP 2Nl86
2Nl33 PNP Ray AF 84 -15 -10 85 25 36
PNP GE IF s 100 -12 -50 85 20 4.5 29 2Nl3S
2Nl35
...... GE RF 8 100 -12 -50 85 40 6.5 31 2Nl36
C1l 2Nl36 PNP 2Nl37
l::O 2Nl37 PNP GE RF s 100 -6 -50 SS 60 10 33
2Nl38 PNP Ray AF Out 50 -12 -20 40 140 30 50 2Nl92
PNP Ray AF Out 80 -45 -100 SS 10 29 25 100 2Nl87 25V
2Nl38A 2Nl36-2Nl35
2Nl39 PNP RCA IF 35 -16 -15 70 48 4.7 29
2Nl40 PNP RCA Osc 35 -16 -15 70 45 7 2S 2Nl36-2N 137
2Nl41 PNP Syl Pwr I.SW /4W -:rn -.SA 6S 40 .4 26 600 5W
2Nl42 NPN Syl Pwr 1.5W/4W 30 .SA 65 40 .4 26 600 SW
2Nl43 PNP Syl Pwr 1W/4W -30 -.SA 65 40 .4 26 600 SW
2Nl44 NPN Syl Pwr 1W/4W 30 .s 65 40 .4 26 600 5W
2Nl45 NPN TI IF 65 20 5 75 33 max 2Nl69 or 2N292
2Nl46 NPN TI IF 6S 20 5 75 36 max 2Nl69 or 2N292
2Nl47 NPN TI Osc 65 20 5 75 39 max 2Nl6SA or 2N293
2Nl4S NPN Tl lo IF 6S 16 5 75 35 max 2N169 or 2N292
2Nl48A NPN TI lo IF 6S 32 5 7S 35 max 2Nl69A
2Nl49 NPN Tl lo IF 65 16 5 75 38 max 2Nl69 or 2N292
2Nl49A NPN TI lo IF 6S 32 5 75 38 max 2NI69A
2Nl50 NPN TI lo IF 65 16 5 75 41 max 2Nl69 or 2N292
2Nl50A NPN TI lo IF 65 32 5 75 41 max 2Nl69A
2Nl5S PNP CBS Pwr S.5W -30 -3A SS 48 .18 33 2W 9W
2NlS6 PNP CBS Pwr 8.5W -30 -3A S5 40 .18 36 2W 9W
2NlS8 PNP CBS Pwr 8.5W -60 -3A 85 40 .18 40 2W 17W
2Nl58A PNP CBS Pwr 8.5W -60 -3A 85 41 .18
2Nl59 Pt Sprague Sw 80 -50 -10 2
I
• • • • • • • • • • • • • I I I

MAX. RATINGS TYPICAL VALUES

JETEC Dwg. Pcmw Po mw-Class
No. Type Mfr. Use No. 2s c0

--- -- --- -- @ ma
-
TJ°C
-- -- - -
hte fab me A
-- B
-- Closest GE

2Nl60 NPN GP Si IF 150 25 150 14 4 2N332

2Nl60A NPN GP Si IF 150 25 150 14 4 2N332
2Nl61 NPN GP Si RF 150 25 150 28 5 2N333
2Nl61A NPN GP Si RF 150 40 25 150 28 5 37 2N333
2Nl62 NPN GP Si RF 150 40 25 150 38 8 38 2N335
2Nl62A NPN GP Si RF 150 40 25 150 38 8 38 2N335
2Nl63 NPN GP Si RF 150 40 25 150 50 6 40 2N335
2Nl63A NPN GP Si RF 150 40 25 150 50 6 40 2N335
2Nl64A NPN GE Obsolete 65 15 20 85 40 8 39 max 2Nl68A
2Nl65 NPN GE Obsolete 65 15 20 85 72 5 36 max 2Nl69
2Nl66 NPN GE Obsolete 25 6 20 50 32 5 24 2Nl70
2Nl67 NPN GE Sw 3 75 30 75 85 30 9 2Nl67
2Nl68 NPN GE Obsolete 55 15 20 75 20 6 39 max use 2N293
2Nl68A NPN GE Ose 3 65 15 20 85 40 8 39 max 2Nl68A
2Nl69 NPN GE IF 3 65 15 20 85 72 9 35 max 2Nl69
2Nl69A NPN GE IF 3 65 25 20 85 72 9 35 max 2Nl69A
2Nl70 NPN GE RF 3 55 6 20 50 20 4 27 2Nl70
2Nl72 -NPN TI IF 65 16 5 75 28 2Nl68A
'"""' 2Nl73 PNP Die Pwr
ffi 2Nl74 PNP Die Pwr
40W
40W
-60
-80
-7A
-7A
90
90
100
45
.6
.2
8
20
20W
sow
2Nl75 PNP RCA AF 20 -10 -2 50 65 .8 43 2Nl92
2Nl76 PNP Motor Pwr -12 -600 80 25 3W
2Nl78 PNP Motor Pwr lOW -12 -600 80 30 29 3W
2Nl79 PNP Motor Pwr -20 -60 88 32 300
2Nl80 PNP CBS AF Out 150 -30 -25 75 60 .7 37 3W 300 2Nl88
2Nl8I PNP CBS AF Out 250 -30 -38 75 60 .7 34 110 600 2Nl88A 25V
2Nl82 NPN CBS IF 100 25 10 75 25 3.5 2Nl67
2Nl83 NPN CBS Sw 100 25 10 75 40 7.5 2Nl67
2Nl84 NPN CBS Sw 100 25 10 75 60 12 2Nl67
2Nl85 PNP TI AF 150 -20 -150 50 55 40.5 2 250 2Nl88A
2Nl86 PNP GE AF Out 1 100 -25 -200 85 24 .8 28 300 2Nl86
2Nl86A PNP GE AF Out 1 200 -25 -200 85 24 .8 30 750 2Nl86A
2Nl87 PNP GE AF Out 1 100 -25 -200 85 36 1 30 300 2N187
2Nl87A PNP GE AF Out 1 200 -25 -200 85 36 1 3() 750 2Nl87A
2Nl88 PNP GE AF Out 1 100 -25 -200 85 54 1.2 32 300 2Nl88
2Nl88A PNP GE AF Out 1 200 -25 -200 85 54 1.2 32 750 2Nl88A
2Nl89 PNP GE AF 1 75 -25 -50 85 24 .8 37 1 2Nl89
2Nl90 PNP GE AF 1 75 -25 -50 85 36 1 39 1 2Nl90
2Nl91 PNP GE AF 1 75 -25 -50 85 54 1.2 41 1 2Nl91
2Nl92 PNP GE AF 1 75 -25 -50 85 75 1.5 43 1
2Nl93 NPN Syl 2Nl92
Ose 50 15 75 6 3 2Nl67
2Nl94 NPN Syl Ose 50 15 50 75 7.5 3.5 15 2Nl69
 MAX. RATl NGS TYPICAL VALUES
JETEC Dwg. Pcmw Pomw-Closs
2s·c A B Closest GE
---
No. Type

PNP
Mfr.
--
RCA
--- --
Use

AF
No. @

75
-- -- -- -- ---
BVcm

-30
lcmo

-50
T1°C

85
hte

47
fab

.8
me
--- --
Ge db

46
-- 2Nl91
2N206
2N207 PNP Phil AF 50 -12 -20. 65 100 2
2N207A PNP Phil AF 50 -12 -20 65 100 2 2N241
2N207B PNP Phil AF 50 -12 -20 65 100 2 2N241
2N211 NPN Syl Osc 50 10 50 75 30 3.5 2N293
2N212 NPN Syl Osc 50 10 50 75 '1.5 6 22 2N293
2N213 NPN Syl AF 50 25 100 75 150 42 2Nl69A
2N214 NPN Syl AF Out 125 25 75 70 70 .8 29 200 2Nl88 (PNP)
2N!!l5 PNP RCA AF 50 -30 -50 70 44 .7 41 2Nl91
2N216 NPN Syl IF 50 15 50 75 15 3 26 2Nl69
2N217 PNP RCA AF 50 -25 -70 50 70 33 160 2Nl92
2N218 PNP RCA IF 35 -16 -15 70 48 4.7 30 2Nl35
2N219· PNP RCA Osc 80 -16 -15 71 75 10 27 2Nl36
2N220 PNP RCA AF 50 -10 -2 71 65 .8 43 2Nl92
2N22.3 PNP Phil AF 100 -18 -150 65 95 .6 37 1 2Nl92
2N224 PNP Phil AF Out 150 -25 -150 75 75 .5 36 300 2N241A
2N225 PNP Phil AF Out 150 -25 -150 75 75 .5 36 300 2N241A
2N226 PNP Phil AF Out 100 -25 -150 65 55 .4 30 300 2Nl88A
..... 2N227 PNP Phil AF Out 100 -25 -150 65 55 .4 30 300 2Nl88A
::f 2N228 NPN Syl AF Out 50 25 75
75
70
25
.8
1.6
26 100 2Nl69
2Nl69
2N229 NPN Syl AF 50 12 40
2N230 PNP Mall Pwr 15W -30 -2A 85 83 .014 (fj)
2N233 NPN Syl AF 50 10 50 75 4.5
2N234 PNP Bendix Pwr 25W -30 -3A 90 25 2
2N234A PNP Bendix Pwr 25W -30 -3A 90 25 2
2N235 PNP Bendix Pwr 25W -40 -3A 90 33 2W
2N235A PNP Bendix Pwr 25W -40 -3A 90 33 2W
2N236 PNP Bendix Pwr 25W -40 -3A 95 35 4
2N236A PNP Bendix Pwr 25W -40 -3A 95 35 4
2N237 PNP Mar AF 150 -45 -20 . 5S 70 1 44 2Nl92 25V
2N238 PNP TI AF so -20 60 42 2Nl91
2N240 PNP Phil SB Sw 10 -6 -lS 16
2N241 PNP GE AF Out 1 100 -:2S -200 8S 73 1.3 3S 300 2N241
2N241A PNP GE AF Out 1 200 -25 -200 8S 73 1.3 3S 7SO 2N241A
2N242 PNP Syl Pwr -45 -2A 100 40 5 Kc (fj) 30 2.5W
2N243 NPN TI SiAF 7SO 60* 60 lSO .9411 30
2N244 NPN TI SiAF 7SO 60* 60 lSO .9711 30
2N247 PNP RCA Drift RF 35 -35 -10 85 60 30 (37@ 1.5Mc)
2N248 PNP TI RF 30 -25 -5 85 20 so 12
2N249 PNP TI AF Out 350 -2S -200 60 4S 31 50 500 2Nl88A
2N250 PNP TI Pwr 12W -30 -2A 80 so 6 Kc 34 6W
2N251 PNP TI Pwr 12W -60 -2A 80 50 6 Kc 34 6W
I
• • • ll I I I
• I I I
• I I I I

MAX. RA Tl NCi5 TTPl~AL YALUf5

JETEC Dwg. Pcmw Po mw-Class
2s·c
---
No.

2N2S3
Type

NPN
-- --- --
Mfr.

TI
Use

IF
No. @

65
-- -- -- -- ---
BVcm

12
lcma

5
T1°C

7S
hte fab me
--- --
Ge db A
--
B Closest GE

2N2S4 NPN TI IF 30 2N293

2N2SS PNP CBS Pwr
6S 20 s 7S 34 2N293
l.SW/6.2SW -lS -3A 85 40 .2 23 lW SW
2N2S6 PNP CBS Pwr l.SW/6.2SW -30 -3A
2N2S7 PNP 8S 40 .2 26 2W lOW
Cle Pwr 2W/2SW -20 8S so 7 Kc (fJ)
2N260 PNP Cle Si 30 lW
200 -10 -so lSO 16 1.8 38
2N260A PNP Cle Si 200 -30 -so lSO
2N261 PNP Cle 16 1.8 38
Si 200 -7S -so lSO 10 1.8
2N262 PNP Cle Si RF 36
200 -10 -so lSO 20 6 40
2N262A PNP Cle Si RF 200 -30 -so lSO 20 6 40
2N26S PNP GE AF 1 7S -2S -so 8S no l.S 4S
2N267 PNP RCA RF Drift Same as 2N247 except for flex. leads 2N26S
2N268 PNP Cle Pwr 2W/2SW -30
2N268A PNP Cle 7 6 Kc (fJ) 28
Pwr 2W/10W -60 90 20
2N269 PNP RCA Sw 3S -20 -100 70 3S 4 2Nl23
2N270 PNP RCA AF Out
2N274 PNP RCA RF Drift
lSO -2S -lSO so 70 32 soo 2N320
3S -40* -10 8S 60 30 4S
2N277 PNP Dlco Pwr SSW
...... - -40 -12A 9S 60 .s 34 16W 30W
en 2N278 PNP Dlco Pwr SSW -SO -12A 9S .s
en 2N279 PNP Am AF 12S -20 -10
60 34 16W 30W
2N280 PNP 7S 30 .3 2Nl87
Am AF 12S -20 -10 7S S2 .3 2Nl88
2N281 PNP Am AF -16 -SO
2N282 PNP 7S 70 .3S 34 38 2N241
Am AF 167 -16 -so 7S 70 .3S
(matched pr) 23 390 2N241
2N283 PNP Am Sw 12S -20
2N284 PNP Am Sw 12S -32
-10 7S 40 .s 2Nl88
2N284A -12S 7S 45 .3S min 2Nl88
PNP Am Sw 12S -60 -12S 7S 4S .3S min
2N290 PNP Dlco Pwr
2N291 PNP TI AF
SSW -70 -12A 9S so .4 2S 20W SSW
180 -25 -200 SS 4S 33 so soo
2N292 NPN GE IF 3 6S lS 2Nl88A
20 SS 2S 6 3S max 2N292
2N293 NPN rm RF 3 6S lS 20 SS 2S 7 39 max
2N297 PNP Cle Pwr lSW -60 -SA 2N293
2N301 PNP SS 3S 6 Kc
RCA Pwr 12W -40 -2A 85 70 30 2.7W
2N301A PNP RCA Pwr 12W -60 -2A
2N302 PNP Ray SS 70 30 2.7W
Obsolete 150 -10 -200 SS 4S 7
2N303 PNP Ray Obsolete lSO -30 -200 2Nl86A
8S 7S 14 2Nl86A
2N306 NPN Syl AF so 12
2N307 PNP 7S 30 .7S 2N292
Syl AF Out -3S -lA 75 25 4
2N307A PNP Syl Pwr 17W -35 -2A 7S 20 3.5 Kc 27
2N308 PNP TI IF 30 -20 -5
2N309 PNP 55 41
TI IF 30 -20 -5 55
2N310 PNP TI IF AF 43
30 -30 -5 55 37
 MAX. RATING5 TTPl«;AL VALU t5
JETEC Dwg. Pcmw Po mw-Closs
A
Ge db B Closest GE
No.
--- Type Mfr.
-- Use
--- -- No. @ 25°C BVca
-- -- -- -- ---
lcmo T1°C

S5
hte fczb me
--- -- -- 2Nl23
2N311 PNP Motor Sw 75 -15 50
2N312 NPN Motor Sw 75 15 S5 50 2Nl67
2N313 NPN GE Obsolete 65 15 20 S5 25 5 36max 2N292
2N314 NPN GE Obsolete 65 15 20 S5 25 s 39 max 2N293
2N315 PNP GT Sw 100 -15 -200 S5 20 5
2N316 PNP GT Sw 100 -10 -200 S5 30 12
2N317 PNP GT Sw 100 -6 -200 S5 30 20
2N31S PNP GT Photo 50 -12 -20 100 .75
2N319 PNP GE AF Out 2 240 -20 -200 S5 33 2 30 750 2N187A
2N320 PNP GE AF Out 2 240 -20 -200 S5 4S 2.5 32 750 2N18SA
2N321 PNP GE AF Out 2 240 -20 -200 S5 4S 3 35 750 2N241A
2N322 PNP GE AF 2 140 -16 -100 S5 70 2 39 2Nl90
2N323 PNP GE AF 2 140 -16 -100 S5 90 2.5 41 2Nl91
2N324 PNP GE AF 2 140 -16 -100 S5 so 3 43 2Nl92
2N325 PNP Syl Pwr 12W -35 -2A SS 40 .2
2N326 NPN Syl Pwr 7W 35 2A SS 40 .2
2N327 PNP Ray SiAF 335 -50 -100 160 14 .2 32
2N32S PNP Ray AF 335 -35 -100 160 24 .35 34
~
Ray AF 335 -30 -100 160 50 .5 36
~ 2N329
2N330
PNP
PNP Ray AF 335 -45 -50 160 30 .25 34
2N331 PNP RCA AF 200 -30* -10 SS 4S .7 44.5 2NlSSA
2N332 NPN Tl-GE Si AF 4 150 45* 25 200 15 30 35 2N332
2N333 NPN TI-GE SiAF 4 150 45* 25 200 35 33 39 2N333
2N334 NPN TI-GE Si AF 4 150 45* 25 175 .975 a Smin 2N334
2N335 NPN Tl-GE SiAF 4 150 45* 25 200 50 3S 42 2N335
2N336 NPN TI-GE Si AF 4 150 45* 25 175 .99 a 7 2N336
2N344 PNP Phil RF (=SBlOl) 20 -5 -5 SS 22 50
2N345 PNP. Phil RF (=SB102) 20 -5 -5 85 60 50
2N346 PNP Phil RF (=SB103) 20 -5 -5 SS 15 75
2N350 PNP Motor Pwr lOW -40* -3A 90 30 5 Kc min 31 SW
2N351 PNP Motor Pwr lOW -40* -3A 90 45 5 Kc min 33 SW
2N352 PNP Phil Pwr 25W -40 -2A 100 65 16 Kc 36 2.5W lOW
2N353 PNP Phil Pwr 30W -40 -2A 100 90 16 Kc 36 SW lOW
2N354 PNP Phil Si Osc 150 -25 -50 140 18 15 fmax
2N355 PNP Phil SiSw 150 -10 -50 140 lS 25 fmax
2N356 NPN GT Sw 100 lS 500 SS 30 3
2N357 NPN GT Sw 100 15 500 SS 30 6 2N634
2N358 NPN GT Sw 100 12 500 S5 30 9 2N635
2N376 PNP Motor Pwr lOW -40* -3A 90 60 5 Kc min 35 SW
2N37S PNP TS Sw 15W -20 -3A SS 35 7 Kc (fl)
2N379 PNP TS Sw 15W -40 -3A S5 30 7 Kc (fl)
2N3SO PNP TS Sw 15W -30 -3A SS 60 7 Kc (fl)
I.
• • • I I
• I I
• • • • I I I I

--- MAX. RATINGS --- TYPIC::AL YALUH

JETEC Dwg. Pcmw Po mw-Class
---
No.

2N381
Type

PNP
Mfr.
--
TS
--- --
Use

AF Out
No. @ 25°C

200
-- -- -- -- --
BVcB

-25
le ma

-200
T1°C hte fab me
--- -
Ge db A B
- Closest GE

2N382 PNP 85 50 1.2 25 500 2N320

TS AF Out 200 -25 -200 85 75 1.5
2N383 PNP TS AF Out 33 500 2N321
200 -25 -200 85 100 1.8 31 500 2N321
2N384 PNP RCA RF Drift 120 -30 -10 85
2N386 PNP .984 a 100 34
Phil Pwr 12.5W -60 -3A 100 20 7 Kc
2N387 PNP Phil Pwr 12.5W -80 -3A 100 20 6 Kc
2N393 PNP Phil Sw 50 -6 -50 85 155
2N394 PNP GE 60 fmax
Sw 2 150 -10 -200 100 150 5.5
2N395 PNP GE Sw 2 150 -15 2N394
-200 100 150 7 2N395
2N396 PNP GE Sw 2 150 -10 -200 100 150
2N397 PNP GE 7 2N396
Sw 2 150 -10 -250 100 150 10
2N398 PNP RCA Sw 2 50 -105 -100 2N397
85 60
2N399 PNP Bendix Pwr 25W -40 -3A 90
2N401 PNP Bendix Pwr 33
25W -40 -3A 90 30
2N402 PNP w AF 180 -20 -150 85 .96 a 600 Kc 37 2N188A
2N403 PNP w AF Out 180 -20 -200 85 .97 a 850 Kc 32 30 2N187A
2N404 PNP RCA Sw 120 -24 -100 85
2N405 PNP RCA 12 2N396
..-
en 2N406
AF 150 -18 -35 85 35 650 Kc 43 2N188A
PNP RCA AF 150 -18 -35 85 35 650
~ 2N407 PNP RCA Kc 43 2Nl88A
AF Out 150 -18 -70 85 65 33
2N408 PNP RCA AF Out 150 160 2N241A
-18 -70 85 65 33 160 2N241A
2N409 PNP RCA IF 80 -13 -15 85
2N410 PNP 45 6.8 38.8 2N135
RCA IF 80 -13 -15 85 45 6.8
2N411 PNP RCA RF 38.8 2N135
80 -13 -15 85 75 10 2N137
2N412 PNP RCA RF 80 -13 -15 85
2N413 75 10 2Nl37
PNP Ray RF 150 -18 -200 85 30 2.5
2N413A PNP Ray IF 10 2N135
150 -15 -200 85 30 2.5 33 2Nl35
2N414 PNP Ray RF 150 -15 -200 85
2N414A PNP 60 7 16 2Nl36
Ray IF 150 -15 -200 85 60 7
2N415 PNP Ray RF 35 2Nl36
150 -10 -200 85 80 10 30 2N137
2N415A PNP Ray IF 150 -10 -200 85
2N416 80 10 30 2Nl37
PNP Ray RF 150 -12 -200 85 80 10
2N417 PNP Ray RF 20 2N137
150 -10 -200 85 140 20 27
2N422 PNP Ray AF 150 -20 -100 85
2N425 PNP 50 .8 38 2Nl88A(2N32 0)
Ray Sw 150 20 -400 85 15 4
2N426 PNP Ray Sw 150 -18 2N394
-400 85 18 6 2N395
2N427 PNP Ray Sw 150 -15 -400 85
2N428 PNP Ray 20 11 2N396
Sw 150 -12 -400 85 30 17
2N438 NPN CBS Sw 100 30* 2N397
85 25 2.5 min
2N439 NPN CBS Sw 100 30* 85
2N440 35 5 min 2N634
NPN CBS Sw 100 30* 85 65
2N444 NPN GT 10 min 2N635
Sw 100 15 85 15 .5 min
 --- MAX. RATINGS --- TYPICAL VALUES
JETEC Dwg. Pcmw Po mw-Class

---
No.

2N445
Type

NPN
--
Mfr.

GT
--- --
Use

Sw
No. @ 25°C

100
na
- --
T1°C

85
-- --
hte

35
fob me

2mi1
-
A
-B
Closest GE

2N446 NPN GT Sw 100 85 60 5mi1 2N634

2N447 NPN GT Sw 100 85 125 9mi 2N635
2N450 PNP GE Sw 8 150 -12 -125 85 60min
11 2N450
2N451 NPN GE SiPwr 6 85W 65 SA 150 400 Kc
16 4 2N451
2N452 NPN GE SiPwr 6 85W 65 5A 150 400 Kc
12 2.5 2N452
2N453 NPN GE SiPwr 6 85W 65 2A 150 400 Kc
30 6 2N453
2N454 NPN GE SiPwr 6 85W 65 2A 150 400 Kc
15 10 2N454
2N460 PNP TS AF 200 -45* -400 100 1.2
.96a 2N319
2N461 PNP TS AF 200 -45* -400 100 .98a 1.2 2N320
2N462 PNP Phil Sw 150 -40* -200 75 45 .5min 2Nl88A
2N464 PNP Ray AF 150 -40 -100 85 26 .7 40
2N465 PNP Ray AF 150 -30 -100 85 45 .8 42 2Nl88A(2N320)
2N466 PNP Ray AF 150 -20 -100 85 90 1 44 2N241A(2N321)
2N467 PNP Ray AF 150 -15 -100 85 180 1.2 45
2N489 GE SiUni 5 SEE G-E TRANSISTOR SPECIFICATIONS SECTION 2N489
2N490 GE SiUni 5 SEE G-E TRANSISTOR SPECIFICATIONS SECTION 2N490
..... 2N491 GE SiUni 5 SEE G-E TRANSISTOR SPECIFICATIONS SECTION 2N491
c.n.
00 2N492 GE SiUni 5 SEE G-E TRANSISTOR SPECIFICATIONS SECTION 2N492
2N493 GE SiUni 5 SEE G-E TRANSISTOR SPECIFICATIONS SECTION 2N493
2N494 GE SiUni 5 SEE G-E TRANSISTOR SPECIFICATIONS SECTION 2N494
2N495 PNP Phil SiOSC 150 -25 -50 140 18 15 fmax
2N496 PNP Phil SiOSC 150 -10 -50 140 18 25 fmax
2N508 PNP GE AF 2 140 -16 -100 85 125 3.5 45 2N508
2N518 PNP GE Sw 8 150 -12 -125 85 60min 11 2N518
2N519 PNP GT Sw 100 -15 85 25 .5 min 2Nl86
2N520 PNP GT Sw 100 -12 85 40 3 min
2N521 PNP GT Sw 100 -10 85 70 8min 2N397
2N522 PNP GT Sw 100 -8 85 120 15 min
2N523 PNP GT Sw 100 -6 85 200 21 min
2N524 PNP GE AF 2 225 -30 -500 100 30 2 2N524
2N525 PNP GE AF 2 225 -30 -500 100 44 2.5 2N525
2N526 PNP GE AF 2 225 -30 -500 100 64 3.0 2N526
2N527 PNP GE AF 2 225 -30 -500 100 81 3.3 2N527
2N529 NPN- GT AF 100 15 85 17 2.5
PNP
2N530 NPN- GT AF 100 15 85 22 3.0
PNP
2N531 NPN- GT AF 100 15 85 27 3.5
PNP

_,,,.
I
• • I
• • • I
MAX. KA Tl Nb:li
• • • I.
fTt'lc;;AL YALUU
I
s
I I I I

JETEC Dwg. Pcmw

Type Po mw-Class
No. Mfr. Use No. @ 2s 0
c
--- - - -- --- - - BVcE
-- le ma
-- T1°C
-- me
-- --- hte fab Ge db
--- -- A
--B Closest GE
2N532 NPN- GT AF 100 15 85 32
PNP 4.0
2N533 NPN- GT AF 100 15 85 37
PNP 4.5
2N538 PNP M-H Pwr lOW -80* -20 95
2N538A PNP M-H 8 Kc
Pwr lOW -80* -20 95 8 Kc
2N539 PNP M-H Pwr lOW -80* -20 95 7 Kc
2N539A PNP M-H Pwr lOW -80* -20 95
2N540 PNP M-H 7 Kc
Pwr lOW -80* -20 95 6 Kc
2N540A PNP M-H Pwr lOW -80* -20 95 6 Ke
2N544 PNP RCA RF 80 -18* -10 85
2N554 PNP 60 30 30.l
Motor Pwr lOW -40* -3A 90 30 8 Kc
2N555 PNP ·Motor Pwr 34
lOW -40* -3A 90 30 8 Kc 34
2N574 PNP M-H Pwr lOOW -60* -15A
2N574A 95 6 Kc
PNP M-H Pwr lOOW -80* -15A 95
2N575 PNP M-H 6 Kc
Pwr lOOW -60* -15A 95 5 Kc
2N575A PNP M-H Pwr lOOW -80* -15A 95
2N577 PNP Mu 5 Kc
Photo 25 -25 -10 55
2N578 PNP RCA Sw 120 -14 -400 85 15 5 2N395
2N579 PNP RCA Sw 120 -14 -400 85
2N580 PNP 30 8 2N396
RCA Sw 120 -14 -400
c:n
"'""" 2N581 PNP RCA Sw 80
85 45 15 2N397
-15 -100 85 30
'° 2N582
2N583
PNP
PNP
RCA
RCA
Sw
Sw
120
80
-14
-15
-100
-100
85 60
8
18
2N396

2N584 85 30 8
PNP RCA Sw 120 -14 -100 85 60 18
2N585 NPN RCA Sw 120 24 200 85 --
2N634 NPN 40 5
GE Sw 2 150 20 300 85 15 8
2N635 NPN GE Sw 2 2N634
150 20 300 85 25 12 2N635
2N636 NPN GE Sw 2 150 20 300
3N21 85 35 17 2N636
Pt Syl Sw 100 -60 50
3N22 NPN WE RF 15* 85 96a. 24
3N23 NPN GP 50 30 5
3N23A NPN GP 10 12
50 30 5 20 14
3N23B NPN GP 50 30 5 35 15
3N23C NPN GP 50 30 5
3N29 NPN 50 17
GE Obsolete 50 6 20 85 100 40
3N30 NPN GE Obsolete 10
50 6 20 85 100 80 10
3N31 NPN GE Obsolete 50 6 20
3N36 85 100 20 10
NPN GE RF 7 30 6 20 85 2.2L-81° 50 min
3N37 NPN GE RF 11.5 3N36
7 30 6 20 85 l.lL-100° 90 min 9 3N37
NOTE: Closest GE types are given only as a general guide and are based Since manufacturing techniques are not identical, the General
on available published electrical specifications. However, General Electric Company makes no claim, nor does it warrant, that its
Electric Company makes no representation as to the accuracy and transistors are exact equivalents or replacements for the types
completeness of such information. referred to.
 -4
EXPLANATION OF SYMBOLS :u
>
z
TYPES AND USES: Ge=Grounded-emitter Power Gain. II>
AF, AF Out, and Pwr Gain measured at 1 Kc. iii
-4
Si-Silicon High Temperature Transistors (all others germanium) RF, IF, and Osc Gains at 455 Kc. 0
Pt-Point contact types (Sw Gain is dependent on circuit and wave-shape.) :u
AF-Audio Frequency Amplifier-Driver (All measured at typical power output level for given tran· ,,
II>
AF Out-High current AF Output sistor type.) Ill
Pwr-Power output 1 watt or more Po=Maximum Power Output at 5% harmonic distortion, in mw
n
'Tl
RF-Radio Frequency Amplifier except where noted as watts. Class A single-ended, Class B r;
Osc-High gain High frequency RF oscillator Push Pull. >
-4
IF-Intermediate Frequency Amplifier
lo IF -Low IF ( 262 Kc) Amplifier 0z
Sw-High current High frequency switch MANUFACTURERS: II>
AF Sw-Low frequency switch Am-Amperex
Bendix-Bendix Aviation Corp.
RATINGS:
CBS-CBS-Hytron.
Pc=Maximum collector dissipation at 25°C (76°F) ambient room Cle-Clevite Transistor Products.
temperature. Secondary designations are ratings with connec-
d; tion to an appropriate heat sink. Dk-Delco Radio Div., General Motors Corp.
0
BV cE=Minimum collector-to-emitter breakdown voltage. GE tran- GE-General Electric Company.
sistors measured with Base-to-emitter resistance as follows: GP-Germanium Products Corp.
lOK for AF and AF Out PNP Mall-P. R. Mallory and Company, Inc.
1 Meg for RF, IF, and Osc PNP Mar-Marvelco, National Aircraft Corp.
Open circuit for NPN M-H-Minneapolis-Honeywell Regulator Co.
*Under BV cE=Minimum collector-to-base breakdown voltage (for Motor-Motorola, Inc.
grounded base applications).
lc=Maximum collector current. (Negative for PNP, Positive for Mu-Mullard Ltd.
NPN.) Phil-Philco.
T1=Maximum centigrade function temperature. Pc must be derated Ray-Raytheon Manufacturing Company.
linearily to 0 mw dissipation at this temperature. RCA-RCA.
hte=Small signal base to collector current-:gain, or Beta (except Sprague-Sprague Electronics Company.
where emitter to collector gain, alpha a, is given). Syl-Sylvania Electric Products Company.
fab=Alpha cut-off-frequency. Frequency at which the emitter to TI-Texas Instruments, Inc.
collector current gain, or alpha, is down to 1 vT or .707 of its TS-Tung-Sol.
low frequency audio value. For some power transistors, the
Beta or base-to-collector current-gain cutoff-frequency is W-Westinghouse Electric -Corp.
-·given as noted. WE-Western Electric Company.
• TRANSISTOR SPECIFICATIONS

OUTLINE DRAWINGS

• MAX
.240 ~1.50
MIN

·'~I ~·
• .151
.137 0
.. T
.345DIA
r
.460
MAX
.322 DIA

• l c:::J
EMITTER

I l
.. .020 MAX
(GLASS EXTENSION)
~
11
i.-

• DIMENSIONS WITHIN
JETEC OUTLINE JETEC BASE
T0-5 E3-44

•
•
•

•
•
•
•
•
•
161
TRANSISTOR SPECIFICATIONS
I
.370MAX
DIMENSIONS WITHIN
JETEC OUTLINE
T0-5
.360MIN
.335 MAX I
0
.325 MIN
JETEC BASE
E3-44
NOTE 1: This zone is controlled for auto-
matic handling. The variation in actual
I
diameter within this zone shall not exceed
.010.
NOTE 2: Measured from max. diameter of
the actual device.
I
0 0
I
NOTE 3: The specified lead diameter ap-
plies in the zone between .050 and .250
from the base seat. Between .250 and 1.5
maxim um of .021 diameter is held. Outside k-200!.010--l
of these zones the lead diameter is not I I
controlled.

PIN I ~EMITTER
I
PIN 2 BASE
PIN 3 COLLECTOR
I
I
DIMENSIONS WITHIN
.370MAX
.360MIN
I
JETEC OUTLINE ....T0-5

e
r--.335MAX
JETEC BASE ...... E3-53
NOTE 1: This zone is controlled for auto-
matic handling. The variation in actual
_.325MIN
1
I
I
diameter within this zone shall not exceed
.010.
NOTE 2: Measured from max. diameter of
the actua I device.
NOTE 3: The specified lead diameter ap-
plies in the zone between .050 and .250
from the base seat. Between .250 and 1.5
maximum of .021 diameter is held. Outside O_~!
l.5MIN
I
of these zones the lead diameter is not
controlled.
I
I
EMITTER ... E }
Bl
LEAD 2
I
BASE ONE .. Bl TINNED LEADS
ggf
BASE TWO .. B2 .017 :!:°:
(NOTE 3)
I
162
I
• TRANSISTOR SPECIFICATIONS

•
• .,.__ _ _ _ 995 M A X . - - - - - - -

• 0
• ...., .160MAX.

1r-
"10-32
.395 THO I I
: .380
_L
NOM CLASS 2 I

• 1 '%%~
FIT

~
I

:1
MAX. .030 MAX.

• .100
NOM

.. .960MAX
DIA .

.625
• NOM
DIA .

•
•
• .200 - - -
NOM

PIN I - EMITTER
PIN 2 BASE

• PIN 3 COLLECTOR (INTERNALLY

CONNECTED TO CASE)
WEIGHT:.40 OZ .

• MAX. ALLOWABLE TORQUE ON STUD- 15 IN. LBS

•
• 163
TRANSISTOR SPECIFICATIONS

_f_r_. .
~335MAX
1__:325MIN
DIMENSIONS WITHIN
JETEC OUTLINE
I
T0-12
.260MAX .150MIN
.250 MIN (NOTE I)
l J_
JETEC BASE
E4-54
0 I
NOTE I: This zone is controlled for auto-
matic handling. The variation in actual
diameter within this zone shall not exceed
.010.
NOTE 2: Measured from max. diameter of
the actual device.
NOTE 3: The specified lead diameter ap-
plies in the zone between .050 and .250
from the base seat. Between .250 and .5
I
maximum of .021 diameter is held. Outside
of these zones the lead diameter is not
controlled. I
I
I
-J.2oo±.010
I
~
I
I
I
.3451*1.50

~!~. rMA:~71
ORIENTATION
.::·

RANDOM

~- c~~• r
I
.460
:!:;DIA.

1 ~
MAX.
DIA.

T
I
EMITTER

I l
I
.055
J54I
.020 MAx.=-11+-
(GLASS EXTENSION) 11

*
I
CUT TO 0.200" FOR USE IN SOCKETS.
LEADS TINNED DIA. .018
MOUNTING POSITION - ANY
WEIGHT: .05 OZ.
BASE CONNECTED TO TRANSISTOR SHELL
DIMENSIONS IN INCHES.

I
I
164
I
•
CIRCUIT DIAGRAM INDEX
•
• AMPLIFIERS: Page
Audio, Five Transistor. . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Audio, Loudspeaker. . . . . . . . . . . ............... 27

• Audio, Simple . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Audio, Single Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
26
18
Direct Coupled "Battery Saver" . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Phono, Three Transistor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
• Phono, Four Transistor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power, Six-Watt.........................................
28
34
Power, Ten-Watt................. . . . . . . . . . . . . . . . . . . . . . . . 36

•
AUTODYNE CONVERTER........................... 38

• FLIP-FLOPS:
Five Hundred KC Counter Shift Register. . . . . . . . . . . . . . . . . . . . 81
• Non-Saturated . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
Saturated ............................................. 77, 78

• LOGIC CIRCUITS:
Basic Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ... . . 93, 94, 95
DCTL ................................................. 69
•
MULTIVIBRATORS:
• Hybrid
Unijunction Transistor .................................. .
62
61

• OSCILLATORS:
Basic Relaxation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59

• Code Practice . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

. PREAMPLIFIERS:
Hybrid Phono-Tape. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
NPN for Magnetic Pickups. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
32
36
Phono-Tape ........................................... · 30
• Preamplifier and Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

Continued - following page

• 165
POWER SUPPLIES:
I
Page
Class A Transistor Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106, 107
Dual Six-Watt Amplifier .................................. 108
Dual Ten-Watt Amplifier ................................. 109
I
I
Five-Watt Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108
General Purpose Transistor ................................ 105
Preamplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . l 05

RADIOS:
Direct Coupled Vest Pocket . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
I
Five Transistor Superheterodyne . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Four Transistor Superheterodyne .......................... 47, 48
Four Transistor, Nine Volt, Reflex. . . . . . . . . . . . . . . . . . . . . . . . . . 50
I
Four Transistor, Six Volt, Reflex. . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Simple Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Six Transistor, One-Watt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Six Transistor, Six Volt . . . . . ... ·. . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
I
Six Transistor, Superheterodyne. . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Six Transistor, Three Volt. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Three Transistor Reflex . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 45, 46 I
Two Transistor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

SAWTOOTH GENERATOR, LINEAR ............... 60

I
STE.REOPHONIC TAPE SYSTEM,
BLOCK DIAGRAM ............................... . 35
I
TEST CIRCUITS: I
Intrinsic Stand-off Ratio ( 71 ) ...••.•••.•.••• ·. . • • • • . • • • • • . • • 58
Peak Point Emitter Current (IP) . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Typical Autodyne Converter ...............................
Typical IF .............................................
58
149
149
I
Typical First IF Amplifier. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Typical Second IF Amplifier ...............................
148
148 I
TIME DELAY CIRCUIT WITH RELAY.............. 62
I
TRIGGERING CIRCUITS:
Base Triggering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Base Triggering with Hybrid Cate. . . . . . . . . . . . . . . . . . . . . . . . . .
Collector Triggering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
88
89
88
I
Collector Triggering with Diode . . . . . . . . . . . . . . . . . . . . . . . . . . .
Collector Triggering with Trigger Amplifier . . . . . . . . . . . . . . . . . .
Emitter Triggering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
89
89
88
I
Using Trigger Power to Increase Switching Speeds . . . . . . . . . . . . 90

I
166
I
•
•
NOTES ON THE CIRCUIT DIAGRAMS
•
• TRANSFORMERS

The audio transformers used in these diagrams were

wound on laminations of 1 5/s" by 1 % " and a 1h" stock
• size, and having an electrical efficiency of about 80%.
Smaller or less efficient transformers will degrade the
electrical fidelity of the circuits.

.. OSCILLATOR COIL

Ed Stanwyck Coil Company #1265

Onondaga Electronic Laboratories #A-10047 or equivalent

• VARIABLE CONDENSER

• Radio Condenser Company Model 242

Onondaga Electronic Laboratories #A-10053 or equivalent

• FERRITE ROD ANTENNA

Onondaga Electronic Laboratories #A-10067 or equivalent

•
If you are unable to obtain these components from either
• your local or a national electronic parts distributor, we
suggest you contact:

• Onondaga Electronic Laboratories

112 Dewitt Street
Syracuse 3, N. Y.

167
 t

I
READING LIST
J
The following list of semiconductor
references gives texts of both elemen-
tary (E) and advanced (A) character.
Obviously, the list is not inclusive, but
it will guide the reader to other
I
references.
Gamer, L., Transistor Circuit
Handbook (E)
(Coyne)
Hunter, L. P., Handbook of Semi-
conductor Electronics (A)
(McGraw-Hill)
Kiver, M. S., Transistors in Radio
I
and Television (E)
(McGraw-Hill)
Krugman, L., Fundamentals of
Transistors (E)
I
(Rider)
Lo, A. W., Endres, R.O., Zawels, J.,
Waldha.uer, F. D., Cheng, C. C.,
Transistor Electronics (A)
I
(Prentice-Hall)
Shockley, W., Electrons and Holes in
Semiconductors (A)
(Van Nostrand)
I
Shea, R. F., et al., Principles of
Transistor Circuits (A)
(Wiley)
I
Shea, R. F., 1Transistor Audio
Amplifiers (A)
(Wiley)
Shea, R. F., Transistor Circuit
I
Engineering (A)
(Wiley)
Spenke, E., et al., Electronic
Semiconductors (A)
I
(McGraw-Hill)
Turner, R. P., Transistors - Theory
and Practice (E)
(Gems back)
I
I
I
I
168
I