GATE SOLVED PAPER - EC

NETWORK ANALYSIS

2013 ONE MARK

Q. 1 Consider a delta connection of resistors and its equivalent star connection as

shown below. If all elements of the delta connection are scaled by a factor k , k > 0
, the elements of the corresponding star equivalent will be scaled by a factor of

(A) k2
(B) k
(C) 1/k
(D) k
V2 ^s h
Q. 2 The transfer function of the circuit shown below is
V1 ^s h

(A) 0.5s + 1 (B) 3s + 6

s+1 s+2
(C) s + 2 (D) s + 1
s+1 s+2
Q. 3 A source vs ^ t h = V cos 100pt has an internal impedance of ^4 + j3h W . If a purely
resistive load connected to this source has to extract the maximum power out of
the source, its value in W should be
(A) 3
(B) 4
(C) 5
(D) 7

2013 TWO MARKS

Q. 4 In the circuit shown below, if the source voltage VS = 100+53.13c V then the
Thevenin’s equivalent voltage in Volts as seen by the load resistance RL is

mywbut.com
GATE SOLVED PAPER - EC NETWORK ANALYSIS

(A) 100+90c (B) 800+0c

(C) 800+90c (D) 100+60c

Q. 5 The following arrangement consists of an ideal transformer and an attenuator

which attenuates by a factor of 0.8. An ac voltage VWX1 = 100 V is applied
across WX to get an open circuit voltage VYZ1 across YZ. Next, an ac voltage
VYZ2 = 100 V is applied across YZ to get an open circuit voltage VWX2 across WX.
Then, VYZ1 /VWX1 , VWX2 /VYZ2 are respectively,

(A) 125/100 and 80/100 (B) 100/100 and 80/100

(C) 100/100 and 100/100 (D) 80/100 and 80/100

Q. 6 Two magnetically uncoupled inductive coils have Q factors q1 and q2 at the chosen
operating frequency. Their respective resistances are R1 and R2 . When connected
in series, their effective Q factor at the same operating frequency is
(A) q1 + q2
(B) ^1/q1h + ^1/q2h
(C) ^q1 R1 + q 2 R2h / ^R1 + R2h
(D) ^q1 R2 + q 2 R1h / ^R1 + R2h

Q. 7 Three capacitors C1 , C2 and C 3 whose values are 10 mF , 5 mF , and 2 mF respectively,

have breakdown voltages of 10 V, 5 V and 2 V respectively. For the interconnection
shown below, the maximum safe voltage in Volts that can be applied across the
combination, and the corresponding total charge in mC stored in the effective
capacitance across the terminals are respectively,

(A) 2.8 and 36 (B) 7 and 119

(C) 2.8 and 32 (D) 7 and 80

mywbut.com
 GATE SOLVED PAPER - EC NETWORK ANALYSIS

Common Data For Q. 8 and 9:

Consider the following figure

Q. 8 The current IS in Amps in the voltage source, and voltage VS in Volts across the
current source respectively, are
(A) 13, - 20
(B) 8, - 10
(C) - 8, 20
(D) - 13, 20

Q. 9 The current in the 1W resistor in Amps is

(A) 2
(B) 3.33
(C) 10
(D) 12

2012 ONE MARK

Q. 10 In the following figure, C1 and C2 are ideal capacitors. C1 has been charged to
12 V before the ideal switch S is closed at t = 0. The current i (t) for all t is

(A) zero
(B) a step function
(C) an exponentially decaying function
(D) an impulse function

Q. 11 The average power delivered to an impedance (4 - j3) W by a current

5 cos (100pt + 100) A is
(A) 44.2 W
(B) 50 W
(C) 62.5 W
(D) 125 W

mywbut.com
GATE SOLVED PAPER - EC NETWORK ANALYSIS

Q. 12 In the circuit shown below, the current through the inductor is

(A) 2 A (B) - 1 A
1+j 1+j
(C) 1 A (D) 0 A
1+j

2012 TWO MARKS

Q. 13 Assuming both the voltage sources are in phase, the value of R for which maximum
power is transferred from circuit A to circuit B is

(A) 0.8 W (B) 1.4 W

(C) 2 W (D) 2.8 W

Q. 14 If VA - VB = 6 V then VC - VD is

(A) - 5 V (B) 2 V
(C) 3 V (D) 6 V
Common Data For Q. 15 and 16 :
With 10 V dc connected at port A in the linear nonreciprocal two-port network
shown below, the following were observed :
(i) 1 W connected at port B draws a current of 3 A
(ii) 2.5 W connected at port B draws a current of 2 A

mywbut.com
 GATE SOLVED PAPER - EC NETWORK ANALYSIS

Q. 15 With 10 V dc connected at port A, the current drawn by 7 W connected at port

B is
(A) 3/7 A (B) 5/7 A
(C) 1 A (D) 9/7 A

Q. 16 For the same network, with 6 V dc connected at port A, 1 W connected at port

B draws 7/3 A. If 8 V dc is connected to port A, the open circuit voltage at port
B is
(A) 6 V (B) 7 V
(C) 8 V (D) 9 V

2011 ONE MARK

Q. 17 In the circuit shown below, the Norton equivalent current in amperes with respect
to the terminals P and Q is

(A) 6.4 - j 4.8 (B) 6.56 - j 7.87

(C) 10 + j 0 (D) 16 + j 0

Q. 18 In the circuit shown below, the value of RL such that the power transferred to
RL is maximum is

(A) 5 W (B) 10 W
(C) 15 W (D) 20 W

Q. 19 The circuit shown below is driven by a sinusoidal input vi = Vp cos (t/RC ). The
steady state output vo is

mywbut.com
GATE SOLVED PAPER - EC NETWORK ANALYSIS

(A) (Vp /3) cos (t/RC ) (B) (Vp /3) sin (t/RC )
(C) (Vp /2) cos (t/RC ) (D) (Vp /2) sin (t/RC )

2011 TWO MARKS

Q. 20 In the circuit shown below, the current I is equal to

(A) 1.4+0c A (B) 2.0+0c A

(C) 2.8+0c A (D) 3.2+0c A

Q. 21 In the circuit shown below, the network N is described by the following Y matrix:
0.1 S - 0.01 S
Y=> . the voltage gain V2 is
0.01 S 0.1 SH V1

(A) 1/90 (B) –1/90

(C) –1/99 (D) –1/11

Q. 22 In the circuit shown below, the initial charge on the capacitor is 2.5 mC, with the
voltage polarity as indicated. The switch is closed at time t = 0 . The current i (t)
at a time t after the switch is closed is

(A) i (t) = 15 exp (- 2 # 103 t) A

(B) i (t) = 5 exp (- 2 # 103 t) A
(C) i (t) = 10 exp (- 2 # 103 t) A
(D) i (t) =- 5 exp (- 2 # 103 t) A

mywbut.com
 GATE SOLVED PAPER - EC NETWORK ANALYSIS

2010 ONE MARK

Q. 23 For the two-port network shown below, the short-circuit admittance parameter
matrix is

4 -2 1 - 0.5
(A) >
4H
(B) >
1H
S S
-2 - 0.5
1 0.5 4 2
(C) >
1H
(D) >
4H
S S
0.5 2
Q. 24 For parallel RLC circuit, which one of the following statements is NOT correct ?
(A) The bandwidth of the circuit decreases if R is increased
(B) The bandwidth of the circuit remains same if L is increased
(C) At resonance, input impedance is a real quantity
(D) At resonance, the magnitude of input impedance attains its minimum
value.

2010 TWO MARKS

Q. 25 In the circuit shown, the switch S is open for a long time and is closed at t = 0 .
The current i (t) for t $ 0+ is

(A) i (t) = 0.5 - 0.125e-1000t A

(B) i (t) = 1.5 - 0.125e-1000t A
(C) i (t) = 0.5 - 0.5e-1000t A
(D) i (t) = 0.375e-1000t A

Q. 26 The current I in the circuit shown is

(A) - j1 A (B) j1 A
(C) 0 A (D) 20 A

mywbut.com
GATE SOLVED PAPER - EC NETWORK ANALYSIS

Q. 27 In the circuit shown, the power supplied by the voltage source is

(A) 0 W (B) 5 W
(C) 10 W (D) 100 W

GATE 2009 ONE MARK

Q. 28 In the interconnection of ideal sources shown in the figure, it is known that the
60 V source is absorbing power.

Which of the following can be the value of the current source I ?

(A) 10 A (B) 13 A
(C) 15 A (D) 18 A

Q. 29 If the transfer function of the following network is

Vo (s) 1
=
Vi (s) 2 + sCR

The value of the load resistance RL is

(A) R (B) R
4 2
(C) R (D) 2R

Q. 30 A fully charged mobile phone with a 12 V battery is good for a 10 minute talk-
time. Assume that, during the talk-time the battery delivers a constant current of
2 A and its voltage drops linearly from 12 V to 10 V as shown in the figure. How
much energy does the battery deliver during this talk-time?

mywbut.com
 GATE SOLVED PAPER - EC NETWORK ANALYSIS

(A) 220 J (B) 12 kJ

(C) 13.2 kJ (D) 14.4 J

GATE 2009 TWO MARK

Q. 31 An AC source of RMS voltage 20 V with internal impedance Zs = (1 + 2j) W

feeds a load of impedance ZL = (7 + 4j) W in the figure below. The reactive power
consumed by the load is

(A) 8 VAR (B) 16 VAR

(C) 28 VAR (D) 32 VAR

Q. 32 The switch in the circuit shown was on position a for a long time, and is move to
position b at time t = 0 . The current i (t) for t > 0 is given by

(A) 0.2e-125t u (t) mA (B) 20e-1250t u (t) mA

(C) 0.2e-1250t u (t) mA (D) 20e-1000t u (t) mA

Q. 33 In the circuit shown, what value of RL maximizes the power delivered to RL ?

(A) 2.4 W (B) 8 W

3
(C) 4 W (D) 6 W

mywbut.com
GATE SOLVED PAPER - EC NETWORK ANALYSIS

Q. 34 The time domain behavior of an RL circuit is represented by

L di + Ri = V0 (1 + Be-Rt/L sin t) u (t).
dt
For an initial current of i (0) = V0 , the steady state value of the current is given
R
by
(A) i (t) " V0 (B) i (t) " 2V0
R R
(C) i (t) " V0 (1 + B) (D) i (t) " 2V0 (1 + B)
R R

GATE 2008 ONE MARK

Q. 35 In the following graph, the number of trees (P) and the number of cut-set (Q) are

(A) P = 2, Q = 2 (B) P = 2, Q = 6
(C) P = 4, Q = 6 (D) P = 4, Q = 10

Q. 36 In the following circuit, the switch S is closed at t = 0 . The rate of change of

current di (0+) is given by
dt

(A) 0 (B) Rs Is
L
(R + Rs) Is
(C) (D) 3
L

GATE 2008 TWO MARKS

Q. 37 The Thevenin equivalent impedance Zth between the nodes P and Q in the
following circuit is

(A) 1 (B) 1 + s + 1
s
2
(C) 2 + s + 1 (D) s2 + s + 1
s s + 2s + 1

mywbut.com
 GATE SOLVED PAPER - EC NETWORK ANALYSIS

Q. 38 The driving point impedance of the following network is given by

Z (s) = 2 0.2s
s + 0.1s + 2

The component values are

(A) L = 5 H, R = 0.5 W, C = 0.1 F
(B) L = 0.1 H, R = 0.5 W, C = 5 F
(C) L = 5 H, R = 2 W, C = 0.1 F
(D) L = 0.1 H, R = 2 W, C = 5 F

Q. 39 The circuit shown in the figure is used to charge the capacitor C alternately
from two current sources as indicated. The switches S1 and S2 are mechanically
coupled and connected as follows:
For 2nT # t # (2n + 1) T , (n = 0, 1, 2,..) S1 to P1 and S2 to P2
For (2n + 1) T # t # (2n + 2) T, (n = 0, 1, 2,...) S1 to Q1 and S2 to Q2

Assume that the capacitor has zero initial charge. Given that u (t) is a unit step
function , the voltage vc (t) across the capacitor is given by
3
(A) / (- 1) n tu (t - nT)
n=1
3
(B) u (t) + 2 / (- 1) n u (t - nT)
n=1
3
(C) tu (t) + 2 / (- 1) n u (t - nT) (t - nT)
n=1

(D) / 60.5 - e- (t - 2nT) + 0.5e- (t - 2nT) - T @

3

n=1

Common Data For Q.40 and 41 :

The following series RLC circuit with zero conditions is excited by a unit impulse
functions d (t).

mywbut.com
GATE SOLVED PAPER - EC NETWORK ANALYSIS

Q. 40 For t > 0 , the output voltage vC ^ t h is

(A) 2 ^e t - e t h (B) 2 te 2 t
-1 3 -1
2 2

3 3
(C) 2 e 2 t cos c 3 t m (D) 2 e 2 t sin c 3 t m
-1 -1

3 2 3 2
Q. 41 For t > 0 , the voltage across the resistor is

(A) 1 _e - e- 2 t i
3t 1
2
3
3 1 sin 3 t
=cos c 2 t m - c 2 mG
-1 t
(B) e 2
3
2 e -21 t sin 3 t
(C) c 2 m
3
(D) 2 e 2 t cos c 3 t m
-1

3 2

Statement for linked Answers Questions 42 and 43:

A two-port network shown below is excited by external DC source. The voltage
and the current are measured with voltmeters V1, V2 and ammeters. A1, A2 (all
assumed to be ideal), as indicated

Under following conditions, the readings obtained are:

(1) S1 -open, S2 - closed A1 = 0,V1 = 4.5 V,V2 = 1.5 V, A2 = 1 A
(2) S1 -open, S2 - closed A1 = 4 A,V1 = 6 V,V2 = 6 V, A2 = 0

Q. 42 The z -parameter matrix for this network is

1.5 1.5 1. 5 4.5
(A) =
1.5G
(B) =
4.5 1. 5 4.5G
1.5 4.5 4.5 1.5
(C) =
1.5 G
(D) =
1.5 1.5 4.5G
Q. 43 The h -parameter matrix for this network is
-3 3 -3 -1
(A) =
- 1 0.67 G
(B) =
3 0.67 G
3 3 3 1
(C) =
1 0.67 G
(D) =
- 3 - 0.67 G

GATE 2007 ONE MARK

Q. 44 An independent voltage source in series with an impedance Zs = Rs + jXs delivers

a maximum average power to a load impedance ZL when
(A) ZL = Rs + jXs (B) ZL = Rs
(C) ZL = jXs (D) ZL = Rs - jXs

mywbut.com
 GATE SOLVED PAPER - EC NETWORK ANALYSIS

Q. 45 The RC circuit shown in the figure is

(A) a low-pass filter (B) a high-pass filter

(C) a band-pass filter (D) a band-reject filter

GATE 2007 TWO MARKS

Q. 46 Two series resonant filters are as shown in the figure. Let the 3-dB bandwidth of
Filter 1 be B1 and that of Filter 2 be B2 . the value B1 is
B2

(A) 4 (B) 1
(C) 1/2 (D) 1/4

Q. 47 For the circuit shown in the figure, the Thevenin voltage and resistance looking
into X - Y are

(A) 4
3 V, 2 W (B) 4 V, 23 W
(C) 4
3 V, 23 W (D) 4 V, 2 W

Q. 48 In the circuit shown, vC is 0 volts at t = 0 sec. For t > 0 , the capacitor current
iC (t), where t is in seconds is given by

(A) 0.50 exp (- 25t) mA

(B) 0.25 exp (- 25t) mA
(C) 0.50 exp (- 12.5t) mA
(D) 0.25 exp (- 6.25t) mA

mywbut.com
GATE SOLVED PAPER - EC NETWORK ANALYSIS

Q. 49 In the ac network shown in the figure, the phasor voltage VAB (in Volts) is

(A) 0 (B) 5+30c

(C) 12.5+30c (D) 17+30c

GATE 2006 TWO MARKS

Q. 50 A two-port network is represented by ABCD parameters given by

V1 A B V2
=I G = =C D G=- I G
1 2

If port-2 is terminated by RL , the input impedance seen at port-1 is given by

(A) A + BRL (B) ARL + C
C + DRL BRL + D

(C) DRL + A (D) B + ARL

BRL + C D + CRL

Q. 51 In the two port network shown in the figure below, Z12 and Z21 and respectively

(A) re and br0 (B) 0 and - br0

(C) 0 and bro (D) re and - br0

Q. 52 The first and the last critical frequencies (singularities) of a driving point
impedance function of a passive network having two kinds of elements, are a pole
and a zero respectively. The above property will be satisfied by
(A) RL network only (B) RC network only
(C) LC network only (D) RC as well as RL networks

Q. 53 A 2 mH inductor with some initial current can be represented as shown below,

where s is the Laplace Transform variable. The value of initial current is

(A) 0.5 A (B) 2.0 A

(C) 1.0 A (D) 0.0 A

mywbut.com
 GATE SOLVED PAPER - EC NETWORK ANALYSIS

Q. 54 In the figure shown below, assume that all the capacitors are initially uncharged.
If vi (t) = 10u (t) Volts, vo (t) is given by

(A) 8e -t/0.004 Volts (B) 8 (1 - e -t/0.004) Volts

(C) 8u (t) Volts (D) 8 Volts

Q. 55 A negative resistance Rneg is connected to a passive network N having driving

point impedance as shown below. For Z2 (s) to be positive real,

(A) Rneg # Re Z1 (jw), 6w (B) Rneg # Z1 (jw) , 6w

(C) Rneg # Im Z1 (jw), 6w (D) Rneg # +Z1 (jw), 6w

GATE 2005 ONE MARK

Q. 56 The condition on R, L and C such that the step response y (t) in the figure has
no oscillations, is

(A) R $ 1 L (B) R $ L
2 C C
(C) R $ 2 L (D) R = 1
C LC
Q. 57 The ABCD parameters of an ideal n: 1 transformer shown in the figure are
n 0
>0 x H

The value of x will be

mywbut.com
GATE SOLVED PAPER - EC NETWORK ANALYSIS

(A) n (B) 1
n
(C) n2 (D) 12
n
Q. 58 In a series RLC circuit, R = 2 kW , L = 1 H, and C = 1 mF The resonant
400
frequency is
(A) 2 # 10 4 Hz (B) 1 # 10 4 Hz
p
(C) 10 4 Hz (D) 2p # 10 4 Hz

Q. 59 The maximum power that can be transferred to the load resistor RL from the
voltage source in the figure is

(A) 1 W (B) 10 W
(C) 0.25 W (D) 0.5 W

Q. 60 The first and the last critical frequency of an RC -driving point impedance
function must respectively be
(A) a zero and a pole (B) a zero and a zero
(C) a pole and a pole (D) a pole and a zero

GATE 2005 TWO MARKS

Q. 61 For the circuit shown in the figure, the instantaneous current i1 (t) is

(A) 10 3 90c A (B) 10 3 - 90c A

2 2
(C) 5 60c A (D) 5 - 60c A

Q. 62 Impedance Z as shown in the given figure is

(A) j29 W (B) j9 W

(C) j19 W (D) j39 W

mywbut.com
 GATE SOLVED PAPER - EC NETWORK ANALYSIS

Q. 63 For the circuit shown in the figure, Thevenin’s voltage and Thevenin’s equivalent
resistance at terminals a - b is

(A) 5 V and 2 W (B) 7.5 V and 2.5 W

(C) 4 V and 2 W (D) 3 V and 2.5 W

Q. 64 If R1 = R2 = R4 = R and R3 = 1.1R in the bridge circuit shown in the figure, then

the reading in the ideal voltmeter connected between a and b is

(A) 0.238 V (B) 0.138 V

(C) - 0.238 V (D) 1 V

Q. 65 The h parameters of the circuit shown in the figure are

0.1 0.1 10 - 1
(A) =
- 0.1 0.3G
(B) =
1 0.05G
30 20 10 1
(C) =
20 20G
(D) =
- 1 0.05G
Q. 66 A square pulse of 3 volts amplitude is applied to C - R circuit shown in the figure.
The capacitor is initially uncharged. The output voltage V2 at time t = 2 sec is

(A) 3 V (B) - 3 V
(C) 4 V (D) - 4 V

mywbut.com
GATE SOLVED PAPER - EC NETWORK ANALYSIS

GATE 2004 ONE MARK

Q. 67 Consider the network graph shown in the figure. Which one of the following is
NOT a ‘tree’ of this graph ?

(A) a
(B) b
(C) c
(D) d

Q. 68 The equivalent inductance measured between the terminals 1 and 2 for the circuit
shown in the figure is

(A) L1 + L2 + M
(B) L1 + L2 - M
(C) L1 + L2 + 2M
(D)L1 + L2 - 2M

Q. 69 The circuit shown in the figure, with R = 1 W, L = 1 H and C = 3 F

3 4
has input voltage v (t) = sin 2t . The resulting current i (t) is

(A) 5 sin (2t + 53.1c)

(B) 5 sin (2t - 53.1c)
(C) 25 sin (2t + 53.1c)
(D) 25 sin (2t - 53.1c)

mywbut.com
 GATE SOLVED PAPER - EC NETWORK ANALYSIS

Q. 70 For the circuit shown in the figure, the time constant RC = 1 ms. The input
voltage is vi (t) = 2 sin 103 t . The output voltage vo (t) is equal to

(A) sin (103 t - 45c) (B) sin (103 t + 45c)

(C) sin (103 t - 53c) (D) sin (103 t + 53c)

Q. 71 For the R - L circuit shown in the figure, the input voltage vi (t) = u (t). The
current i (t) is

GATE 2004 TWO MARKS

Q. 72 For the lattice shown in the figure, Za = j2 W and Zb = 2 W . The values of the open
z11 z12
circuit impedance parameters 6z @ = =
z21 z22 G
are

1-j 1+j 1-j 1+j

(A) =
1 + jG
(B) =
1+j -1 + j 1 - j G
1+j 1+j 1 + j -1 + j
(C) =
1 - jG
(D) =
1-j -1 + j 1 + j G

mywbut.com
GATE SOLVED PAPER - EC NETWORK ANALYSIS

Q. 73 The circuit shown in the figure has initial current iL (0-) = 1 A through the
inductor and an initial voltage vC (0-) =- 1 V across the capacitor. For input
v (t) = u (t), the Laplace transform of the current i (t) for t $ 0 is

(A) s (B) s+2

s2 + s + 1 s2 + s + 1
(C) 2 s - 2 (D) 2 1
s +s+1 s +s+1

Vo (s)
Q. 74 The transfer function H (s) = of an RLC circuit is given by
Vi (s)
H (s) = 106
s + 20s + 106
2

The Quality factor (Q-factor) of this circuit is

(A) 25 (B) 50
(C) 100 (D) 5000

Q. 75 For the circuit shown in the figure, the initial conditions are zero. Its transfer
V (s)
function H (s) = c is
Vi (s)

(A) 1 (B) 106

s2 + 106 s + 106 s2 + 103 s + 106

(C) 103 (D) 106

s + 103 s + 106
2
s + 106 s + 106
2

Q. 76 Consider the following statements S1 and S2

S1 : At the resonant frequency the impedance of a series RLC circuit is zero.
S2 : In a parallel GLC circuit, increasing the conductance G results in increase
in its Q factor.
Which one of the following is correct?
(A) S1 is FALSE and S2 is TRUE
(B) Both S1 and S2 are TRUE
(C) S1 is TRUE and S2 is FALSE
(D) Both S1 and S2 are FALSE

mywbut.com
 GATE SOLVED PAPER - EC NETWORK ANALYSIS

GATE 2003 ONE MARK

Q. 77 The minimum number of equations required to analyze the circuit shown in the
figure is

(A) 3 (B) 4
(C) 6 (D) 7

Q. 78 A source of angular frequency 1 rad/sec has a source impedance consisting of 1 W

resistance in series with 1 H inductance. The load that will obtain the maximum
power transfer is
(A) 1 W resistance
(B) 1 W resistance in parallel with 1 H inductance
(C) 1 W resistance in series with 1 F capacitor
(D) 1 W resistance in parallel with 1 F capacitor

Q. 79 A series RLC circuit has a resonance frequency of 1 kHz and a quality factor
Q = 100 . If each of R, L and C is doubled from its original value, the new Q of
the circuit is
(A) 25
(B) 50
(C) 100
(D) 200

Q. 80 The differential equation for the current i (t) in the circuit of the figure is

2 2
(A) 2 d 2i + 2 di + i (t) = sin t (B) d 2i + 2 di + 2i (t) = cos t
dt dt dt dt
2 2
(C) 2 d 2i + 2 di + i (t) = cos t (D) d 2i + 2 di + 2i (t) = sin t
dt dt dt dt

GATE 2003 TWO MARKS

Q. 81 Twelve 1 W resistance are used as edges to form a cube. The resistance between
two diagonally opposite corners of the cube is
(A) 5 W (B) 1 W
6
(C) 6 W (D) 3 W
5 2

mywbut.com
GATE SOLVED PAPER - EC NETWORK ANALYSIS

Q. 82 The current flowing through the resistance R in the circuit in the figure has the
form P cos 4t where P is

(A) (0.18 + j0.72) (B) (0.46 + j1.90)

(C) - (0.18 + j1.90) (D) - (0.192 + j0.144)

Common Data For Q. 83 and 84 :

Assume that the switch S is in position 1 for a long time and thrown to position
2 at t = 0 .

Q. 83 At t = 0+ , the current i1 is
(A) - V (B) - V
2R R
(C) - V (D) zero
4R
Q. 84 I1 (s) and I2 (s) are the Laplace transforms of i1 (t) and i2 (t) respectively. The
equations for the loop currents I1 (s) and I2 (s) for the circuit shown in the figure,
after the switch is brought from position 1 to position 2 at t = 0 , are
R + Ls + Cs1 - Ls I1 (s) V
(A) > 1 H= G == G
s
- Ls R + Cs I2 (s) 0
R + Ls + Cs1 - Ls I1 (s) - Vs
(B) > H= G = = G
- Ls R + Cs1 I2 (s) 0
R + Ls + Cs1 - Ls I1 (s) - Vs
(C) > 1 H= G == G
- Ls R + Ls + Cs I2 (s) 0
R + Ls + Cs1 - Cs I1 (s) V
(D) >
R + Ls + Cs1 H I2 (s)
= G = G
s
=
- Ls 0

Q. 85 The driving point impedance Z (s) of a network has the pole-zero locations as
shown in the figure. If Z (0) = 3 , then Z (s) is

mywbut.com
 GATE SOLVED PAPER - EC NETWORK ANALYSIS

3 (s + 3) 2 (s + 3)
(A) 2
(B) 2
s + 2s + 3 s + 2s + 2
3 (s + 3) 2 (s - 3)
(C) 2 (D) 2
s + 2s + 2 s - 2s - 3

Q. 86 An input voltage v (t) = 10 2 cos (t + 10c) + 10 5 cos (2t + 10c) V is applied

to a series combination of resistance R = 1 W and an inductance L = 1 H. The
resulting steady-state current i (t) in ampere is
(A) 10 cos (t + 55c) + 10 cos (2t + 10c + tan-1 2)
(B) 10 cos (t + 55c) + 10 23 cos (2t + 55c)
(C) 10 cos (t - 35c) + 10 cos (2t + 10c - tan-1 2)
(D) 10 cos (t - 35c) + 3
2 cos (2t - 35c)

Q. 87 The impedance parameters z11 and z12 of the two-port network in the figure are

(A) z11 = 2.75 W and z12 = 0.25 W (B) z11 = 3 W and z12 = 0.5 W
(C) z11 = 3 W and z12 = 0.25 W (D) z11 = 2.25 W and z12 = 0.5 W

GATE 2002 ONE MARK

Q. 88 The dependent current source shown in the figure

(A) delivers 80 W (B) absorbs 80 W

(C) delivers 40 W (D) absorbs 40 W

Q. 89 In the figure, the switch was closed for a long time before opening at t = 0 . The
voltage vx at t = 0+ is

(A) 25 V (B) 50 V
(C) - 50 V (D) 0 V

mywbut.com
GATE SOLVED PAPER - EC NETWORK ANALYSIS

GATE 2002 TWO MARKS

Q. 90 In the network of the fig, the maximum power is delivered to RL if its value is

(A) 16 W (B) 40 W
3
(C) 60 W (D) 20 W

Q. 91 If the 3-phase balanced source in the figure delivers 1500 W at a leading power
factor 0.844 then the value of ZL (in ohm) is approximately

(A) 90+32.44c (B) 80+32.44c

(C) 80+ - 32.44c (D) 90+ - 32.44c

GATE 2001 ONE MARK

Q. 92 The Voltage e0 in the figure is

(A) 2 V (B) 4/3 V

(C) 4 V (D) 8 V

Q. 93 If each branch of Delta circuit has impedance 3 Z , then each branch of the
equivalent Wye circuit has impedance
(A) Z (B) 3Z
3
(C) 3 3 Z (D) Z
3
Q. 94 The admittance parameter Y12 in the 2-port network in Figure is

(A) - 0.02 mho (B) 0.1 mho

(C) - 0.05 mho (D) 0.05 mho

mywbut.com
 GATE SOLVED PAPER - EC NETWORK ANALYSIS

GATE 2001 TWO MARKS

Q. 95 The voltage e0 in the figure is

(A) 48 V (B) 24 V
(C) 36 V (D) 28 V

Q. 96 When the angular frequency w in the figure is varied 0 to 3, the locus of the
current phasor I2 is given by

Q. 97 In the figure, the value of the load resistor RL which maximizes the power delivered
to it is

(A) 14.14 W (B) 10 W

(C) 200 W (D) 28.28 W

mywbut.com
GATE SOLVED PAPER - EC NETWORK ANALYSIS

Q. 98 The z parameters z11 and z21 for the 2-port network in the figure are

(A) z11 = 6 W; z21 = 16 W (B) z11 = 6 W; z21 = 4 W

11 11 11 11

(C) z11 = 6 W; z21 =- 16 W (D) z11 = 4 W; z21 = 4 W

11 11 11 11

GATE 2000 ONE MARK

Q. 99 The circuit of the figure represents a

(A) Low pass filter (B) High pass filter

(C) band pass filter (D) band reject filter

Q. 100 In the circuit of the figure, the voltage v (t) is

(A) eat - ebt (B) eat + ebt

(C) aeat - bebt (D) aeat + bebt

Q. 101 In the circuit of the figure, the value of the voltage source E is

(A) - 16 V (B) 4 V
(C) - 6 V (D) 16 V

mywbut.com
 GATE SOLVED PAPER - EC NETWORK ANALYSIS

GATE 2000 TWO MARKS

Q. 102 Use the data of the figure (a). The current i in the circuit of the figure (b)

(A) - 2 A (B) 2 A
(C) - 4 A (D) 4 A

GATE 1999 ONE MARK

Q. 103 Identify which of the following is NOT a tree of the graph shown in the given
figure is

(A) begh (B) defg

(C) abfg (D) aegh

Q. 104 A 2-port network is shown in the given figure. The parameter h21 for this network
can be given by

(A) - 1/2 (B) + 1/2

(C) - 3/2 (D) + 3/2

GATE 1999 TWO MARK

Q. 105 The Thevenin equivalent voltage VTH appearing between the terminals A and B
of the network shown in the given figure is given by

mywbut.com
GATE SOLVED PAPER - EC NETWORK ANALYSIS

(A) j16 (3 - j4) (B) j16 (3 + j4)

(C) 16 (3 + j4) (D) 16 (3 - j4)

Q. 106 The value of R (in ohms) required for maximum power transfer in the network
shown in the given figure is

(A) 2 (B) 4
(C) 8 (D) 16

Q. 107 A Delta-connected network with its Wye-equivalent is shown in the given figure.
The resistance R1, R2 and R3 (in ohms) are respectively

(A) 1.5, 3 and 9 (B) 3, 9 and 1.5

(C) 9, 3 and 1.5 (D) 3, 1.5 and 9

GATE 1998 ONE MARK

Q. 108 A network has 7 nodes and 5 independent loops. The number of branches in the
network is
(A) 13 (B) 12
(C) 11 (D) 10

Q. 109 The nodal method of circuit analysis is based on

(A) KVL and Ohm’s law (B) KCL and Ohm’s law
(C) KCL and KVL (D) KCL, KVL and Ohm’s law

Q. 110 Superposition theorem is NOT applicable to networks containing

(A) nonlinear elements (B) dependent voltage sources
(C) dependent current sources (D) transformers

Q. 111 The parallel RLC circuit shown in the figure is in resonance. In this circuit

(A) IR < 1 mA (B) IR + IL > 1 mA

(C) IR + IC < 1 mA (D) IR + IC > 1 mA

mywbut.com
 GATE SOLVED PAPER - EC NETWORK ANALYSIS

0 - 1/2
The short-circuit admittance matrix a two-port network is >
1/2 0 H
Q. 112

The two-port network is

(A) non-reciprocal and passive (B) non-reciprocal and active
(C) reciprocal and passive (D) reciprocal and active

Q. 113 The voltage across the terminals a and b in the figure is

(A) 0.5 V (B) 3.0 V

(C) 3.5 V (D) 4.0 V

Q. 114 A high-Q quartz crystal exhibits series resonance at the frequency ws and parallel
resonance at the frequency wp . Then
(A) ws is very close to, but less than wp
(B) ws << wp
(C) ws is very close to, but greater than wp
(D) ws >> wp

GATE 1997 ONE MARK

Q. 115 The current i4 in the circuit of the figure is equal to

(A) 12 A (B) - 12 A
(C) 4 A (D) None or these

Q. 116 The voltage V in the figure equal to

(A) 3 V (B) - 3 V
(C) 5 V (D) None of these

mywbut.com
GATE SOLVED PAPER - EC NETWORK ANALYSIS

Q. 117 The voltage V in the figure is always equal to

(A) 9 V (B) 5 V
(C) 1 V (D) None of the above

Q. 118 The voltage V in the figure is

(A) 10 V (B) 15 V
(C) 5 V (D) None of the above

Q. 119 In the circuit of the figure is the energy absorbed by the 4 W resistor in the time
interval (0, 3) is

(A) 36 Joules (B) 16 Joules

(C) 256 Joules (D) None of the above

Q. 120 In the circuit of the figure the equivalent impedance seen across terminals a, b, is

(A) b 16 l W (B) b 8 l W
3 3
(C) b 8 + 12j l W (D) None of the above
3

mywbut.com
 GATE SOLVED PAPER - EC NETWORK ANALYSIS

GATE 1996 ONE MARK

Q. 121 In the given figure, A1, A2 and A3 are ideal ammeters. If A2 and A3 read 3 A and
4 A respectively, then A1 should read

(A) 1 A (B) 5 A
(C) 7 A (D) None of these

Q. 122 The number of independent loops for a network with n nodes and b branches is
(A) n - 1
(B) b - n
(C) b - n + 1
(D) independent of the number of nodes

GATE 1996 TWO MARKS

Q. 123 The voltages VC1, VC2, and VC3 across the capacitors in the circuit in the given
figure, under steady state, are respectively.

(A) 80 V, 32 V, 48 V (B) 80 V, 48 V, 32 V
(C) 20 V, 8 V, 12 V (D) 20 V, 12 V, 8 V

***********

mywbut.com
GATE SOLVED PAPER - EC NETWORK ANALYSIS

SOLUTIONS

Sol. 1 Option (B) is correct.

In the equivalent star connection, the resistance can be given as
RC = Rb Ra
Ra + Rb + Rc
RB = Ra Rc
Ra + Rb + Rc
RA = Rb Rc
Ra + Rb + Rc
So, if the delta connection components Ra , Rb and Rc are scaled by a factor k
then
^k Rb h^k Rc h 2
Rb Rc
RAl = =k = k RA
kRa + kRb + kRc k Ra + Rb + Rc
Hence, it is also scaled by a factor k
Sol. 2 Option (D) is correct.
For the given capacitance, C = 100mF in the circuit, we have the reactance.
XC = 1 = 1 = 10 4
sc s # 100 # 10-6 s
So,
10 4 + 10 4
V2 ^s h
= 4 s = s+1
V1 ^s h 10 + 10 4 + 10 4 s+2
s s
Sol. 3 Option (C) is correct.
For the purely resistive load, maximum average power is transferred when
2 2
RL = RTh + XTh
where RTh + jXTh is the equivalent thevenin (input) impedance of the circuit.
Hence, we obtain
RL = 42 + 32 5 W
Sol. 4 Option (C) is correct.
For evaluating the equivalent thevenin voltage seen by the load RL , we open the
circuit across it (also if it consist dependent source).
The equivalent circuit is shown below

As the circuit open across RL so

I2 = 0
or, j40I2 = 0

mywbut.com
 GATE SOLVED PAPER - EC NETWORK ANALYSIS

i.e., the dependent source in loop 1 is short circuited. Therefore,

^ j4h Vs
VL1 =
j4 + 3
j40 40 90c
VTh = 10 VL1 = 100 53.13c = 100 53.13c
j4 + 3 5 53.13c
= 800 90c
Sol. 5 Option (C) is correct.
For the given transformer, we have
V = 1.25
VWX 1

Since, VYZ = 0.8 (attenuation factor)

V
So, ^ h^ h
VYZ = 0.8 1.25 = 1
VWX
or, VYZ = VWX
V
at VWX = 100 V ; YZ = 100
1
1
VWX 1
100
VWX
at VWZ = 100 V ; = 100
2
2
VYZ 2
100
Sol. 6 Option (C) is correct.
The quality factor of the inductances are given by
q1 = wL1
R1
and w
q2 = L2
R2
So, in series circuit, the effective quality factor is given by
XLeq
Q = = wL 1 + wL 2
Req R1 + R 2
w L 1 + wL 2 q1 q
+ 2 q R + q2 R2
= R 1 R2 R 1 R2
= R 2 R 2
= 1 1
1 + 1 1 + 1 R1 + R 2
R 2 R1 R 2 R1
Sol. 7 Option (C) is correct.

Consider that the voltage across the three capacitors C1 , C 2 and C 3 are V1 , V2 and
V3 respectively. So, we can write
V2 = C 3 ....(1)
V3 C 2
Since, Voltage is inversely proportional to capacitance

mywbut.com
GATE SOLVED PAPER - EC NETWORK ANALYSIS

Now, given that C1 = 10 mF ; ^V1hmax = 10V

C2 = 5 mF ; ^V2hmax = 5 V
C 3 = 2 mF ; ^V3hmax = 2V
So, from Eq (1) we have
V2 = 2
V3 5
for ^V3hmax = 2
We obtain, V2 = 2 # 2 = 0.8 volt < 5
5
i.e., V2 < ^V2hmax
Hence, this is the voltage at C 2 . Therefore,
V3 = 2 volt
V2 = 0.8 volt
and V1 = V2 + V3 = 2.8 volt
Now, equivalent capacitance across the terminal is
Ceq = C 2 C 3 + C1 = 5 # 2 + 10 = 80 mF
C2 + C3 5+2 7
Equivalent voltage is (max. value)
Vmax = V1 = 2.8
So, charge stored in the effective capacitance is
Q = Ceq Vmax = b 80 l # ^2.8h = 32 mC
7
Sol. 8 Option (D) is correct.

At the node 1, voltage is given as

V1 = 10 volt
Applying KCL at node 1
IS + V1 + V1 - 2 = 0
2 1
10 10
IS + + - 2 = 0
2 1
IS =- 13 A
Also, from the circuit,
VS - 5 # 2 = V1 & VS = 10 + V1 = 20 volt
Sol. 9 Option (C) is correct.
Again from the shown circuit, the current in 1 W resistor is
I = V1 = 10 = 10 A
1 1
Sol. 10 Option (D) is correct.
The s -domain equivalent circuit is shown as below.

mywbut.com
 GATE SOLVED PAPER - EC NETWORK ANALYSIS

vc (0) /s v (0)
I (s) = = c
1 + 1 1 + 1
C1 s C 2 s C1 C 2

I (s) = b C1 C2 l (12 V) = 12Ceq vC (0) = 12 V

C1 + C 2
Taking inverse Laplace transform for the current in time domain,
i (t) = 12Ceq d (t) (Impulse)

Sol. 11 Option (B) is correct.

In phasor form, Z = 4 - j 3 = 5 - 36.86cW
I = 5 100c A
Average power delivered.
Pavg. = 1 I 2 Z cos q = 1 # 25 # 5 cos 36.86c = 50 W
2 2
Alternate Method:
Z = (4 - j3) W , I = 5 cos (100pt + 100) A
= 1 Re $ I Z . = 1 # Re "(5) 2 # (4 - j3), = 1 # 100 = 50 W
2
Pavg
2 2 2
Sol. 12 Option (C) is correct

Applying nodal analysis at top node.

V1 + 1 0c V1 + 1 0c
+ = 1 0c
1 j1
V1 (j 1 + 1) + j 1 + 1 0c = j1
V1 = - 1
1 + j1
1
V1 + 1 0c - 1 + j + 1 j
Current I1 = = = = 1 A
j1 j1 (1 + j) j 1 + j

mywbut.com
GATE SOLVED PAPER - EC NETWORK ANALYSIS

Sol. 13 Option (A) is correct.

We obtain Thevenin equivalent of circuit B .

Thevenin Impedance :

ZTh = R

Thevenin Voltage :
VTh = 3 0c V
Now, circuit becomes as

Current in the circuit, I1 = 10 - 3

2+R
Power transfer from circuit A to B
P = (I 12) 2 R + 3I1
= :10 - 3D R + 3 :10 - 3D
2

2+R 2+R
or P = 42 + 70R2
(2 + R)
2
dP = 2 + R) 70 - (42 + 70R) 2 (2 + R) = 0
(
dR (2 + R) 4
(2 + R) [(2 + R) 70 - (42 + 70R) 2] = 0 & R = 0.8 W

Sol. 14 Option (A) is correct.

In the given circuit
VA - VB = 6 V
So current in the branch will be
IAB = 6 = 3 A
2
We can see, that the circuit is a one port circuit looking from terminal BD as
shown below

mywbut.com
 GATE SOLVED PAPER - EC NETWORK ANALYSIS

For a one port network current entering one terminal, equals the current leaving
the second terminal. Thus the outgoing current from A to B will be equal to the
incoming current from D to C as shown
i.e. IDC = IAB = 3 A

The total current in the resistor 1 W will be

I1 = 2 + IDC (By writing KCL at node D )
= 2+3 = 5A
So, VCD = 1 # (- I1) =- 5 V
Sol. 15 Option (C) is correct.
When 10 V is connected at port A the network is

Now, we obtain Thevenin equivalent for the circuit seen at load terminal, let
Thevenin voltage is VTh, 10 V with 10 V applied at port A and Thevenin resistance
is RTh .

VTh,10 V
IL =
RTh + RL
For RL = 1 W , IL = 3 A
VTh,10 V
3= ...(i)
RTh + 1

mywbut.com
GATE SOLVED PAPER - EC NETWORK ANALYSIS

For RL = 2.5 W , IL = 2 A
VTh,10 V
2= ...(ii)
RTh + 2.5
Dividing above two
3 = RTh + 2.5
2 RTh + 1
3RTh + 3 = 2RTh + 5
RTh = 2 W
Substituting RTh into equation (i)
VTh,10 V = 3 (2 + 1) = 9 V
Note that it is a non reciprocal two port network. Thevenin voltage seen at port
B depends on the voltage connected at port A. Therefore we took subscript
VTh,10 V . This is Thevenin voltage only when 10 V source is connected at input port
A. If the voltage connected to port A is different, then Thevenin voltage will be
different. However, Thevenin’s resistance remains same.
Now, the circuit is as shown below :

VTh,10 V
For RL = 7 W , IL = = 9 = 1A
2 + RL 2 + 7
Sol. 16 Option (B) is correct.
Now, when 6 V connected at port A let Thevenin voltage seen at port B is VTh,6 V
. Here RL = 1 W and IL = 7 A
3

VTh, 6 V = RTh # 7 + 1 # 7 = 2 # 7 + 7 = 7 V
3 3 3 3
This is a linear network, so VTh at port B can be written as
VTh = V1 a + b
where V1 is the input applied at port A.
We have V1 = 10 V , VTh,10 V = 9 V
` 9 = 10a + b ...(i)
When V1 = 6 V , VTh, 6 V = 9 V
` 7 = 6a + b ...(ii)
Solving (i) and (ii)
a = 0.5 , b = 4
Thus, with any voltage V1 applied at port A, Thevenin voltage or open circuit
voltage at port B will be

mywbut.com
 GATE SOLVED PAPER - EC NETWORK ANALYSIS

So, VTh, V = 0.5V1 + 4

1

For V1 = 8 V
VTh,8 V = 0.5 # 8 + 4 = 8 = Voc (open circuit voltage)
Sol. 17 Option (A) is correct.
Replacing P - Q by short circuit as shown below we have

Using current divider rule the current Isc is

ISC = 25 (16 0 ) = (6.4 - j4.8) A
25 + 15 + j30
Sol. 18 Option (C) is correct.
Power transferred to RL will be maximum when RL is equal to the Thevenin
resistance. We determine Thevenin resistance by killing all source as follows :

RTH = 10 # 10 + 10 = 15 W
10 + 10
Sol. 19 Option (A) is correct.
The given circuit is shown below

For parallel combination of R and C equivalent impedance is

R$ 1
jwC R
Zp = =
R+ 1 1 + j wRC
jwC
Transfer function can be written as
R
Vout = Z p 1 + jwRC
=
Vin Zs + Zp R+ 1 + R
jwC 1 + jwRC
jwRC
=
jwRC + (1 + jwRC) 2
j
= Here w = 1
j + (1 + j) 2 RC

mywbut.com
GATE SOLVED PAPER - EC NETWORK ANALYSIS

Vout = j
=1
Vin (1 + j) 2 + j 3
Vp
Thus v out = b l cos (t/RC)
3
Sol. 20 Option (B) is correct.
From star delta conversion we have

Thus R1 = Ra Rb = 6.6 = 2W
Ra + Rb + Rc 6 + 6 + 6
Here R1 = R 2 = R 3 = 2 W
Replacing in circuit we have the circuit shown below :

Now the total impedance of circuit is

(2 + j4) (2 - j4)
Z = +2 = 7W
(2 + j4) (2 - j4)
Current I = 14+0c = 2+0c
7
Sol. 21 Option (D) is correct.
From given admittance matrix we get
I1 = 0.1V1 - 0.01V2 and ...(1)
I2 = 0.01V1 + 0.1V2 ...(2)
Now, applying KVL in outer loop;
V2 =- 100I2
or I2 =- 0.01V2 ...(3)
From eq (2) and eq (3) we have
- 0.01V2 = 0.01V1 + 0.1V2
- 0.11V2 = 0.01V1
V2 = - 1
V1 11
Sol. 22 Option (A) is correct.
Here we take the current flow direction as positive.
At t = 0- voltage across capacitor is

mywbut.com
 GATE SOLVED PAPER - EC NETWORK ANALYSIS

-3
Q
VC (0-) =- =- 2.5 # 10-6 =- 50 V
C 50 # 10
+
Thus VC (0 ) =- 50 V
In steady state capacitor behave as open circuit thus
V (3) = 100 V
Now, VC (t) = VC (3) + (VC (0+) - VC (3)) e-t/RC
-t
= 100 + (- 50 - 100) e 10 # 50 # 10
-6

3
= 100 - 150e- (2 # 10 t)
Now ic (t) = C dV
dt
3
= 50 # 10-6 # 150 # 2 # 103 e-2 # 10 t A
3
= 15e-2 # 10 t
ic (t) = 15 exp (- 2 # 103 t) A
Sol. 23 Option (A) is correct.
Given circuit is as shown below

Writing node equation at input port

I1 = V1 + V1 - V2 = 4V1 - 2V2 ...(1)
0 .5 0 .5
Writing node equation at output port
I2 = V2 + V2 - V1 =- 2V1 + 4V2 ...(2)
0.5 0.5
From (1) and (2), we have admittance matrix
4 -2
Y =>
- 2 4H
Sol. 24 Option (D) is correct.
A parallel RLC circuit is shown below :

Input impedance Z in = 1
1 + 1 + jwC
R jwL
At resonance 1 = wC
wL
So, Z in = 1 = R (maximum at resonance)
1/R
Thus (D) is not true.

mywbut.com
GATE SOLVED PAPER - EC NETWORK ANALYSIS

Furthermore bandwidth is wB i.e wB \ 1 and is independent of L,

R
Hence statements A, B, C, are true.
Sol. 25 Option (A) is correct.
Let the current i (t) = A + Be-t/t t " Time constant
When the switch S is open for a long time before t < 0 , the circuit is

At t = 0 , inductor current does not change simultaneously, So the circuit is

Current is resistor (AB)

i (0) = 0.75 = 0.375 A
2
Similarly for steady state the circuit is as shown below

i (3) = 15 = 0.5 A
3
-3
t = L = 15 # 10 = 10-3 sec
Req 10 + (10 || 10)
t
i (t) = A + Be- 1 # 10 = A + Be-100t
-3

Now i (0) = A + B = 0.375

and i (3) = A = 0.5
So, B = 0.375 - 0.5 =- 0.125
Hence i (t) = 0.5 - 0.125e-1000 t A
Sol. 26 Option (A) is correct.
Circuit is redrawn as shown below

Where, Z1 = jwL = j # 103 # 20 # 10-3 = 20j

Z2 = R || XC
XC = 1 = 1 =- 20j
j wC j # 103 # 50 # 10-6

mywbut.com
 GATE SOLVED PAPER - EC NETWORK ANALYSIS

1 (- 20j)
Z2 = R = 1W
1 - 20j
Voltage across Z2
- 20j
c 1 - 20j m
VZ = Z2 : 20 0 = : 20
Z1 + Z 2 20j
c 20j - 1 - 20j m
2

(- 20j)
=c
20j + 400 - 20j m
: 20 =- j

Current in resistor R is
V j
I = Z =- =- j A
2

R 1
Sol. 27 Option (A) is correct.
The circuit can be redrawn as

Applying nodal analysis

VA - 10 + 1 + VA - 0 = 0
2 2
2VA - 10 + 2 = 0 = V4 = 4 V
Current, I1 = 10 - 4 = 3 A
2
Current from voltage source is
I 2 = I1 - 3 = 0
Since current through voltage source is zero, therefore power delivered is zero.
Sol. 28 Option (A) is correct.
Circuit is as shown below

Since 60 V source is absorbing power. So, in 60 V source current flows from +

to - ve direction
So, I + I1 = 12
I = 12 - I1

mywbut.com
GATE SOLVED PAPER - EC NETWORK ANALYSIS

I is always less then 12 A So, only option (A) satisfies this conditions.
Sol. 29 Option (C) is correct.
For given network we have
(RL XC ) Vi
V0 =
R + (RL XC )
RL
V0 (s) 1 + sRL C RL
= =
Vi (s) R+ R L R + RRL sC + RL
1 + sRL C
= RL = 1
R + RRL sC + RL 1+ R + RsC
RL
But we have been given
V (s) 1
T . F. = 0 =
Vi (s) 2 + sCR
Comparing, we get
1 + R = 2 & RL = R
RL
Sol. 30 Option (C) is correct.
The energy delivered in 10 minutes is
t t
E = #0 VIdt = I #0Vdt = I # Area

= 2 # 1 (10 + 12) # 600 = 13.2 kJ

2
Sol. 31 Option (B) is correct.
From given circuit the load current is
IL = V = 20+0c = 20+0c
Zs + ZL (1 + 2j) + (7 + 4j) 8 + 6j
= 1 (8 - 6j) = 20+0c = 2+ - f where f = tan - 1 3
5 10+f 4
The voltage across load is
VL = IL ZL
The reactive power consumed by load is
Pr = VL IL* = IL ZL # IL* = ZL IL 2
2
= (7 # 4j) 20+0c = (7 + 4j) = 28 + 16j
8 + 6j
Thus average power is 28 and reactive power is 16.
Sol. 32 Option (B) is correct.
At t = 0- , the circuit is as shown in fig below :

V (0-) = 100 V
Thus V (0+) = 100 V
At t = 0+ , the circuit is as shown below

mywbut.com
 GATE SOLVED PAPER - EC NETWORK ANALYSIS

I (0+) = 100 = 20 mA
5k
At steady state i.e. at t = 3 is I (3)= 0
i (t) = I (0+) e-
t
Now RCeq
u (t)
(0.5m + 0.3m) 0.2m
Ceq = = 0.16 m F
0.5m + 0.3m + 0.2m
1 = 1 = 1250
RCeq 5 # 103 # 0.16 # 10-6
i (t) = 20e-1250t u (t) mA
Sol. 33 Option (C) is correct.
For Pmax the load resistance RL must be equal to thevenin resistance Req i.e. RL
= Req . The open circuit and short circuit is as shown below

The open circuit voltage is

Voc = 100 V
From fig I1 = 100 = 12.5 A
8
Vx =- 4 # 12.5 =- 50 V
I2 = 100 + Vx = 100 - 50 = 12.5 A
4 4
Isc = I1 + I2 = 25 A
Rth = Voc = 100 = 4 W
Isc 25
Thus for maximum power transfer RL = Req = 4 W
Sol. 34 Option (A) is correct.
Steady state all transient effect die out and inductor act as short circuits and
forced response acts only. It doesn’t depend on initial current state. From the
given time domain behavior we get that circuit has only R and L in series with
V0 . Thus at steady state
i (t) " i (3) = V0
R
Sol. 35 Option (C) is correct.
The given graph is

mywbut.com
GATE SOLVED PAPER - EC NETWORK ANALYSIS

There can be four possible tree of this graph which are as follows:

There can be 6 different possible cut-set.

Sol. 36 Option (B) is correct.

Initially i (0-) = 0 therefore due to inductor i (0+) = 0 . Thus all current Is will
flow in resistor R and voltage across resistor will be Is Rs . The voltage across
inductor will be equal to voltage across Rs as no current flow through R.

Thus vL (0+) = Is Rs
di (0+)
but vL (0+) = L
dt
di (0+) v (0+) Is Rs
Thus = L =
dt L L
Sol. 37 Option (A) is correct.
Killing all current source and voltage sources we have,

Zth = (1 + s) ( s1 + 1)
(1 + s)( s1 + 1) [ s1 + 1 + 1 + s]
= =
(1 + s) + ( s1 + 1) s + s1 + 1 + 1
or Zth = 1
Alternative :
Here at DC source capacitor act as open circuit and inductor act as short
circuit. Thus we can directly calculate thevenin Impedance as 1 W

mywbut.com
 GATE SOLVED PAPER - EC NETWORK ANALYSIS

Sol. 38 Option (D) is correct.

s
Z (s) = R 1 sL = 2 C
sC s + s
RC + 1
LC
We have been given
Z (s) = 2 0.2s
s + 0.1s + 2
Comparing with given we get
1 = 0.2 or C = 5 F
C
1 = 0.1 or R = 2 W
RC
1 = 2 or L = 0.1 H
LC
Sol. 39 Option (C) is correct.
Voltage across capacitor is
t
Vc = 1 # idt
C 0
Here C = 1 F and i = 1 A. Therefore
t
Vc = #0 dt
For 0 < t < T , capacitor will be charged from 0 V
t
Vc = #0 dt = t
At t = T, Vc = T Volts
For T < t < 2T , capacitor will be discharged from T volts as
t
Vc = T - #T dt = 2T - t
At t = 2T, Vc = 0 volts
For 2T < t < 3T , capacitor will be charged from 0 V
t
Vc = #2Tdt = t - 2T
At t = 3T, Vc = T Volts
For 3T < t < 4T , capacitor will be discharged from T Volts
t
Vc = T - #3Tdt = 4T - t
At t = 4T, Vc = 0 Volts
For 4T < t < 5T , capacitor will be charged from 0 V
t
Vc = #4Tdt = t - 4T
At t = 5T, Vc = T Volts
Thus the output waveform is

mywbut.com
GATE SOLVED PAPER - EC NETWORK ANALYSIS

Only option C satisfy this waveform.

Sol. 40 Option (D) is correct.
Writing in transform domain we have
Vc (s) 1
= 1 s = 2 1
Vs (s) ^ s + s + 1h (s + s + 1)
Since Vs (t) = d (t) " Vs (s) = 1 and
Vc (s) = 2 1
(s + s + 1)
3
or Vc (s) = 2 = 2
G
3 (s + 12 ) 2 + 43
Taking inverse Laplace transform we have
Vt = 2 e- sin c 3 t m
t
2

3 2
Sol. 41 Option (B) is correct.
Let voltage across resistor be vR
VR (s) s
= 1 1 =
VS (s) ( s + s + 1) (s2 + s + 1)
Since vs = d (t) " Vs (s) = 1 we get
VR (s) = 2 s = s
(s + s + 1) (s + 12 ) 2 + 43
(s + 12 ) 1
= - 2
(s + 12 ) 2 + 3
4 (s + 1 2
2) + 4
3

or vR (t) = e- cos
1
2
3 t-1 2 e- sin 3 t 1
2

2 2# 3 2

t
= e- 2 =cos 3 t - 1 sin 3 t
2 3 2 G
Sol. 42 Option (C) is correct.
From the problem statement we have
z11 = v1 = 6 = 1.5W
i1 i = 0 4
2

z12 = v1 = 4.5 = 4.5W

i2 i = 0 1
1
v
z21 = 2 6
= = 1.5W
i1 i = 0 4
2

z22 = v2 = 1.5 = 1.5W

i2 i = 0 2
1
Thus z -parameter matrix is
z11 z12 1.5 4.5
=z z G = =1.5 1.5 G
21 22

Sol. 43 Option (A) is correct.

From the problem statement we have
h12 = v1 = 4.5 = 3
v2 i = 0 1
1.5
h22 = i2 = 1 = 0.67
v2 i = 0 1
1.5
From z matrix, we have

mywbut.com
 GATE SOLVED PAPER - EC NETWORK ANALYSIS

v1 = z11 i1 + z12 i2
v2 = z21 i1 + z22 i2
If v2 = 0 then i2 = - z21 = - 1.5 =- 1 = h
21
i1 z22 1. 5
or i2 =- i1
Putting in equation for v1, we get
v1 = (z11 - z12) i1
v1 = h11 = z11 - z12 = 1.5 - 4.5 =- 3
i1 v2 = 0

Hence h -parameter will be

h11 h12 -3 3
=h h G = =- 1 0.67 G
21 22

Sol. 44 Option (D) is correct.

According to maximum Power Transform Theorem
ZL = Zs* = (Rs - jXs)
Sol. 45 Option (C) is correct.
At w " 3 , capacitor acts as short circuited and circuit acts as shown in fig below

Here we get V0 = 0
Vi

At w " 0 , capacitor acts as open circuited and circuit look like as shown in fig
below

Here we get also V0 = 0

Vi
So frequency response of the circuit is as shown in fig and circuit is a Band pass
filter.

Sol. 46 Option (D) is correct.

We know that bandwidth of series RLC circuit is R . Therefore
L
Bandwidth of filter 1 is B1 = R
L1
Bandwidth of filter 2 is B2 = R = R = 4R
L2 L1 /4 L1
B
Dividing above equation 1 = 1
B2 4

mywbut.com
GATE SOLVED PAPER - EC NETWORK ANALYSIS

Sol. 47 Option (D) is correct.

Here Vth is voltage across node also. Applying nodal analysis we get

Vth + Vth + Vth - 2i = 2

2 1 1
But from circuit i = Vth = Vth
1
Therefore
Vth + Vth + Vth - 2Vth = 2
2 1 1
or Vth = 4 volt
From the figure shown below it may be easily seen that the short circuit current
at terminal XY is isc = 2 A because i = 0 due to short circuit of 1 W resistor
and all current will pass through short circuit.

Therefore Rth = Vth = 4 = 2 W

isc 2
Sol. 48 Option (A) is correct.
The voltage across capacitor is
At t = 0+ , Vc (0+) = 0
At t = 3 , VC (3) = 5 V

The equivalent resistance seen by capacitor as shown in fig is

Req = 20 20 = 10kW

Time constant of the circuit is

t = Req C = 10k # 4m = 0.04 s
Using direct formula
Vc (t) = VC (3) - [Vc (3) - Vc (0)] e-t/t
= VC (3) (1 - e-t/t) + VC (0) e-t/t = 5 (1 - e-t/0.04)
or Vc (t) = 5 (1 - e-25t)

mywbut.com
 GATE SOLVED PAPER - EC NETWORK ANALYSIS

dVC (t)
Now IC (t) = C
dt
= 4 # 10-6 # (- 5 # 25e-25t) = 0.5e-25t mA

Sol. 49 Option (D) is correct.

(5 - 3j) # (5 + 3j)
Impedance = (5 - 3j) (5 + 3j) =
5 - 3j + 5 + 3 j
(5) 2 - (3j) 2
= = 25 + 9 = 3.4
10 10
VAB = Current # Impedance = 5+30c # 34 = 17+30c

Sol. 50 Option (D) is correct.

The network is shown in figure below.

Now V1 = AV2 - BI2 ...(1)

and I1 = CV2 - DI2 ...(2)
also V2 =- I2 RL ...(3)
From (1) and (2) we get
Thus V1 = AV2 - BI2
I1 CV2 - DI2
Substituting value of V2 from (3) we get
Input Impedance Zin = - A # I2 RL - BI2
- C # I2 RL - DI2
or Zin = ARL + B
CRL + D
Sol. 51 Option (B) is correct.
The circuit is as shown below.

At input port V1 = re I1
At output port V2 = r0 (I2 - bI1) =- r0 bI1 + r0 I2
Comparing standard equation
V1 = z11 I1 + z12 I2
V2 = z21 I1 + z22 I2
z12 = 0 and z21 =- r0 b
Sol. 52 Option (B) is correct.
For series RC network input impedance is
Zins = 1 + R = 1 + sRC
sC sC

mywbut.com
GATE SOLVED PAPER - EC NETWORK ANALYSIS

Thus pole is at origin and zero is at - 1

RC
For parallel RC network input impedance is
1 R
Zin = sC = sC
1 +R 1 + sRC
sC
Thus pole is at - 1 and zero is at infinity.
RC
Sol. 53 Option (A) is correct.
We know v = Ldi
dt
Taking Laplace transform we get
V (s) = sLI (s) - Li (0+)
As per given in question
- Li (0+) =- 1 mV
Thus i (0+) = 1 mV = 0.5 A
2 mH
Sol. 54 Option (B) is correct.
At initial all voltage are zero. So output is also zero.
Thus v0 (0+) = 0
At steady state capacitor act as open circuit.

Thus, v0 (3) = 4 # vi = 4 # 10 = 8
5 5
The equivalent resistance and capacitance can be calculate after killing all
source

Req = 1 4 = 0.8 kW
Ceq = 4 1 = 5 mF
t = Req Ceq = 0.8kW # 5mF = 4 ms
v0 (t) = v 0 (3) - [v 0 (3) - v 0 (0+)] e-t/t
= 8 - (8 - 0) e-t/0.004

mywbut.com
 GATE SOLVED PAPER - EC NETWORK ANALYSIS

v0 (t) = 8 (1 - e-t/0.004) Volts

Sol. 55 Option (A) is correct.
Here Z2 (s) = Rneg + Z1 (s)
or Z2 (s) = Rneg + Re Z1 (s) + j Im Z1 (s)
For Z2 (s) to be positive real, Re Z2 (s) $ 0
Thus Rneg + Re Z1 (s) $ 0
or Re Z1 (s) $- Rneg
But Rneg is negative quantity and - Rneg is positive quantity. Therefore
Re Z1 (s) $ Rneg
or Rneg # Re Z1 (jw) For all w.
Sol. 56 Option (C) is correct.
Transfer function is
1 1
Y (s) sC 1 LC
= = 2 =
U (s) R + sL + 1 s LC + scR + 1 s2 + R s + 1
sC L LC
Comparing with s2 + 2xwn s + wn2 = 0 we have
Here 2xwn = R ,
L
and wn = 1
LC
Thus x = R LC = R C
2L 2 L
For no oscillations, x $ 1
Thus R C $1
2 L
or R $2 L
C
Sol. 57 Option (B) is correct.
For given transformer
I2 = V1 = n
I1 V2 1
or I1 = I2 and V1 = nV2
n
Comparing with standard equation
V1 = AV2 + BI2
I1 = CV2 + DI2
A B n 0
=C D G = =0 1 G
n

Thus x = 1
n
Sol. 58 Option (B) is correct.
We have L = 1H and C = 1 # 10-6
400
Resonant frequency
f0 = 1 == 1
2p LC 2p 1 # 1 # 10 - 6
400

mywbut.com
GATE SOLVED PAPER - EC NETWORK ANALYSIS

3 4
= 10 # 20 = 10 Hz
2p p
Sol. 59 Option (C) is correct.
Maximum power will be transferred when RL = Rs = 100W
In this case voltage across RL is 5 V, therefore
2
Pmax = V = 5 # 5 = 0.25 W
R 100
Sol. 60 Option (C) is correct.
For stability poles and zero interlace on real axis. In RC series network the
driving point impedance is
Zins = R + 1 = 1 + sRC
Cs sC
Here pole is at origin and zero is at s =- 1/RC , therefore first critical
frequency is a pole and last critical frequency is a zero.
For RC parallel network the driving point impedance is
R 1
Zinp = Cs = R
R+ 1 1 + sRC
Cs
Here pole is s =- 1/RC and zero is at 3, therefore first critical frequency is a
pole and last critical frequency is a zero.
Sol. 61 Option (A) is correct.
Applying KCL we get
i1 (t) + 5+0c = 10+60c
or i1 (t) = 10+60c - 5+0c = 5 + 5 3j - 5
or i1 (t) = 5 3 +90c = 10 3 +90c
2
Sol. 62 Option (B) is correct.
If L1 = j5W and L3 = j2W the mutual induction is subtractive because current
enters from dotted terminal of j2W coil and exit from dotted terminal of j5W. If
L2 = j2W and L3 = j2W the mutual induction is additive because current enters
from dotted terminal of both coil.
Thus Z = L1 - M13 + L2 + M23 + L3 - M31 + M32
= j5 + j10 + j2 + j10 + j2 - j10 + j10 = j9
Sol. 63 Option (B) is correct.
Open circuit at terminal ab is shown below

Applying KCL at node we get

Vab + Vab - 10 = 1
5 5
or Vab = 7.5 = Vth

mywbut.com
 GATE SOLVED PAPER - EC NETWORK ANALYSIS

Short circuit at terminal ab is shown below

Short circuit current from terminal ab is

Isc = 1 + 10 = 3 A
5
Thus Rth = Vth = 7.5 = 2.5 W
Isc 3
Here current source being in series with dependent voltage source make it
ineffective.
Sol. 64 Option (C) is correct.
Here Va = 5 V because R1 = R2 and total voltage drop is 10 V.
Now Vb = R3 # 10 = 1.1 # 10 = 5.238 V
R3 + R4 2.1
V = Va - Vb = 5 - 5.238 =- 0.238 V
Sol. 65 Option (D) is correct.
For h parameters we have to write V1 and I2 in terms of I1 and V2 .
V1 = h11 I1 + h12 V2
I2 = h21 I1 + h22 V2
Applying KVL at input port
V1 = 10I1 + V2
Applying KCL at output port
V2 = I + I
1 2
20
or I2 =- I1 + V2
20
Thus from above equation we get
h11 h12 10 1
=h h G = =- 1 0.05G
12 22

Sol. 66 Option (B) is correct.

Time constant RC = 0.1 # 10 - 6 # 103 = 10 - 4 sec
Since time constant RC is very small, so steady state will be reached in 2 sec.
At t = 2 sec the circuit is as shown in fig.

Vc = 3 V
V2 =- Vc =- 3 V

mywbut.com
GATE SOLVED PAPER - EC NETWORK ANALYSIS

Sol. 67 Option (B) is correct.

For a tree there must not be any loop. So a, c, and d don’t have any loop. Only
b has loop.
Sol. 68 Option (D) is correct.
The sign of M is as per sign of L If current enters or exit the dotted terminals of
both coil. The sign of M is opposite of L If current enters in dotted terminal of
a coil and exit from the dotted terminal of other coil.
Thus Leq = L1 + L2 - 2M
Sol. 69 Option (A) is correct.
Here w = 2 and V = 1+0c
Y = 1 + jwC + 1
R jwL
= 3 + j2 # 3 + 1 1 = 3 + j 4
j2 # 4
= 5+ tan - 1 4 = 5+53.11c
3
I = V * Y = (1+0c)( 5+53.1c) = 5+53.1c
Thus i (t) = 5 sin (2t + 53.1c)
Sol. 70 Option (A) is correct.
vi (t) = 2 sin 103 t
Here w = 103 rad and Vi = 2 +0c
1
jwC 1
Now V0 = .Vt = V
R+ 1 1 + jwCR i
jwC
= 1 2 +0c
1 + j # 103 # 10 - 3
= 1 - 45c
v0 (t) = sin (103 t - 45c)
Sol. 71 Option (C) is correct.
Input voltage vi (t) = u (t)
Taking Laplace transform Vi (s) = 1
s
Impedance Z (s) = s + 2
V (s) 1
I (s) = i =
s + 2 s (s + 2)
or I (s) = 1 ; 1 - 1 E
2 s s+2
Taking inverse Laplace transform
i (t) = 1 (1 - e-2t) u (t)
2
At t = 0 , i (t) = 0
At t = 2 ,
1
i (t) = 0.31
At t = 3 , i (t) = 0.5
Graph (C) satisfies all these conditions.

mywbut.com
 GATE SOLVED PAPER - EC NETWORK ANALYSIS

Sol. 72 Option (D) is correct.

We know that
V1 = z11 I1 + z12 I2
V2 = z11 I1 + z22 I2
where z11 = V1
I1 I = 0
2

z21 = V2
I1 I = 0
1

Consider the given lattice network, when I2 = 0 . There is two similar path in
the circuit for the current I1. So I = 1 I1
2

For z11 applying KVL at input port we get

V1 = I (Za + Zb)
Thus V1 = 1 I1 (Za + Zb)
2
z11 = 1 (Za + Zb)
2
For Z21 applying KVL at output port we get
V2 = Za I1 - Zb I1
2 2
Thus V2 = 1 I1 (Za - Zb)
2
1
z21 = (Za - Zb)
2
For this circuit z11 = z22 and z12 = z21 . Thus
R V
SZa + Zb Za - Zb
z11 z12 2 2
=z z G = SSZa - Zb Za + Zb
21 22
S 2 2
T X
Here Za = 2j and Zb = 2W
z11 z12 1+j j-1
Thus =z z G = =j - 1 1 + j G
21 22

Sol. 73 Option (B) is correct.

Applying KVL,
Ldi (t) 1
#0
3
v (t) = Ri (t) + + i (t) dt
dt C
Taking L.T. on both sides,
I (s) vc (0+)
V (s) = RI (s) + LsI (s) - Li (0+) + +
sC sC
v (t) = u (t) thus V (s) = 1
s

mywbut.com
GATE SOLVED PAPER - EC NETWORK ANALYSIS

Hence 1 = I (s) + sI (s) - 1 + I (s) - 1

s s s
2 + 1 = I (s) 6s2 + s + 1@
s s
or I (s) = 2 s + 2
s +s+1
Sol. 74 Option (B) is correct.
Characteristics equation is
s2 + 20s + 106 = 0
Comparing with s2 + 2xwn s + wn2 = 0 we have
wn = 106 = 103
2xw = 20
Thus 2x = 203 = 0.02
10
Now Q = 1 = 1 = 50
2x 0.02
Sol. 75 Option (D) is correct.
1
V0 (s) sC 1
H (s) = = = 2
Vi (s) R + sL + 1 s LC + sCR + 1
sC
= 2 -2 1
s (10 # 10-4) + s (10-4 # 10 4) + 1
= -6 2 1 = 2 106
10 s + s + 1 s + 106 s + 106
Sol. 76 Option (D) is correct.
Impedance of series RLC circuit at resonant frequency is minimum, not zero.
Actually imaginary part is zero.
Z = R + j` wL - 1 j
wC
At resonance wL - 1 = 0 and Z = R that is purely resistive. Thus S1 is false
wC
Now quality factor Q =R C
L
Since G = 1 , Q = 1 C
R G L
If G - then Q . provided C and L are constant. Thus S2 is also false.
Sol. 77 Option (B) is correct.
Number of loops = b - n + 1
= minimum number of equation
Number of branches = b = 8
Number of nodes = n = 5
Minimum number of equation = 8 - 5 + 1 = 4
Sol. 78 Option (C) is correct.
For maximum power transfer
ZL = ZS* = Rs - jXs
Thus ZL = 1 - 1j

mywbut.com
 GATE SOLVED PAPER - EC NETWORK ANALYSIS

Sol. 79 Option (B) is correct.

Q = 1 L
R C
When R, L and C are doubled,
Q' = 1 2L = 1 L =Q
2R 2C 2R C 2
Thus Q' = 100 = 50
2
Sol. 80 Option (C) is correct.
Applying KVL we get,
di (t) 1
sin t = Ri (t) + L + # i (t) dt
dt C
di (t)
or sin t = 2i (t) + 2 + # i (t) dt
dt
Differentiating with respect to t , we get
2di (t) 2d2 i (t)
cos t = + + i (t)
dt dt2
Sol. 81 Option (A) is correct.
For current i there is 3 similar path. So current will be divide in three path

so, we get
Vab - b i # 1l - b i # 1l - b 1 # 1l = 0
3 6 3
Vab = R = 1 + 1 + 1 = 5 W
eq
i 3 6 3 6
Sol. 82 Option ( ) is correct.
Data are missing in question as L1 &L2 are not given.
Sol. 83 Option (A) is correct.
At t = 0 - circuit is in steady state. So inductor act as short circuit and capacitor
act as open circuit.

mywbut.com
GATE SOLVED PAPER - EC NETWORK ANALYSIS

At t = 0 - , i1 (0 -) = i2 (0 -) = 0
vc (0 -) = V
At t = 0+ the circuit is as shown in fig. The voltage across capacitor and
current in inductor can’t be changed instantaneously. Thus

At t = 0+ , i1 = i2 =- V
2R
Sol. 84 Option (C) is correct.
When switch is in position 2, as shown in fig in question, applying KVL in loop
(1),
RI1 (s) + V + 1 I1 (s) + sL [I1 (s) - I2 (s)] = 0
s sC
or I1 (s) 8R + 1 + sL B - I2 (s) sL = - V
sc s
z11 I1 + z12 I2 = V1
Applying KVL in loop 2,
sL [I2 (s) - I1 (s)] + RI2 (s) + 1 I2 (s) = 0
sC
Z12 I1 + Z22 I2 = V2
or - sLI1 (s) + 8R + sL + 1 BI2 (s) = 0
sc
Now comparing with
Z11 Z12 I1 V1
=Z Z G=I G = =V G
21 22 2 2
we get
R V
SR + sL + 1 - sL W I1 (s) -V
> sH
sC
S W= G =
SS - sL R + sL + 1 WW I2 (s) 0
sC
T X
Sol. 85 Option (B) is correct.
Zeros =- 3
Pole1 =- 1 + j
Pole 2 =- 1 - j
K (s + 3) K (s + 3) K (s + 3)
Z (s) = = =
(s + 1 + j)( s + 1 - j) 2
(s + 1) - j 2
(s + 1) 2 + 1
From problem statement Z (0) w = 0 = 3
Thus 3K = 3 and we get K = 2
2
2 (s + 3)
Z (s) = 2
s + 2s + 2

mywbut.com
 GATE SOLVED PAPER - EC NETWORK ANALYSIS

Sol. 86 Option (C) is correct.

v (t) = 10 2 cos (t + 10c) + 10 5 cos (2t + 10c)
1 4 4 44 2 4 4 44 3 1 4 4 4 4 2 4 4 4 4 3
v1 v2
Thus we get w1 = 1 and w2 = 2
Now Z1 = R + jw1 L = 1 + j1
Z2 = R + jw2 L = 1 + j2
v1 (t) v2 (t) 10 2 cos (t + 10c) 10 5 cos (2t + 10c)
i (t) = + = +
Z1 Z2 1+j 1 + j2
10 2 cos (t + 10c) 10 5 cos (2t + 10c)
= +
12 + 22 + tan-1 1 12 + 22 tan-1 2
10 2 cos (t + 10c) 10 5 cos (2t + 10c)
= +
2 + tan-1 45c 5 tan-1 2
i (t) = 10 cos (t - 35c) + 10 cos (2t + 10c - tan-1 2)
Sol. 87 Option (A) is correct.
Using 3- Y conversion

R1 = 2 # 1 = 2 = 0.5
2+1+1 4
R2 = 1 # 1 = 1 = 0.25
2+1+1 4
R3 = 2 # 1 = 0.5
2+1+1
Now the circuit is as shown in figure below.

Now z11 = V1 = 2 + 0.5 + 0.25 = 2.75

I1 I2 = 0

z12 = R3 = 0.25
Sol. 88 Option (A) is correct.
Applying KCL at for node 2,

V2 + V2 - V1 = V1
5 5 5

mywbut.com
GATE SOLVED PAPER - EC NETWORK ANALYSIS

or V2 = V1 = 20 V
Voltage across dependent current source is 20 thus power delivered by it is
PV2 # V1 = 20 # 20 = 80 W
5 5
It deliver power because current flows from its +ive terminals.
Sol. 89 Option (C) is correct.
When switch was closed, in steady state, iL (0 -) = 2.5 A

At t = 0+ , iL (0+) = iL (0 -) = 2.5 A and all this current of will pass through 2 W

resistor. Thus
Vx =- 2.5 # 20 =- 50 V
Sol. 90 Option (A) is correct.
For maximum power delivered, RL must be equal to Rth across same terminal.

Applying KCL at Node, we get

0.5I1 = Vth + I1
20
or Vth + 10I1 = 0
but I1 = Vth - 50
40
Thus V
Vth + th - 50 =0
4
or Vth = 10 V
For Isc the circuit is shown in figure below.

Isc = 0.5I1 - I1 =- 0.5I1

but I1 =- 50 =- 1.25 A
40
Isc =- 0.5 # - 12.5 = 0.625 A

mywbut.com
 GATE SOLVED PAPER - EC NETWORK ANALYSIS

Rth = Vth = 10 = 16 W
Isc 0.625
Sol. 91 Option (D) is correct.
IP , VP " Phase current and Phase voltage
IL, VL " Line current and line voltage
Now VP = c VL m and IP = IL
3
So, Power = 3VP IL cos q
1500 = 3 c VL m (IL) cos q
3
IL = c V
3 ZL m
also L

1500 = 3 c VL mc VL m cos q
3 3 ZL
(400) 2 (.844)
ZL = = 90 W
1500
As power factor is leading
So, cos q = 0.844 " q = 32.44
As phase current leads phase voltage
ZL = 90+ - q = 90+ - 32.44c
Sol. 92 Option (C) is correct.
Applying KCL, we get
e0 - 12 + e0 + e0 = 0
4 4 2+2
or e0 = 4 V
Sol. 93 Option (A) is correct.
The star delta circuit is shown as below

Here ZAB = ZBC = ZCA = 3 Z

and ZA = ZAB ZCA
ZAB + ZBC + ZCA
ZB = ZAB ZBC
ZAB + ZBC + ZCA
ZC = ZBC ZCA
ZAB + ZBC + ZCA
Now ZA = ZB = ZC = 3Z 3Z = Z
3Z+ 3Z+ 3Z 3
Sol. 94 Option (C) is correct.

mywbut.com
GATE SOLVED PAPER - EC NETWORK ANALYSIS

y11 y12 y1 + y3 - y3
=y y G = = - y y + y G
21 22 3 2 3

y12 =- y3
y12 =- 1 =- 0.05 mho
20
Sol. 95 Option (D) is correct.
We apply source conversion the circuit as shown in fig below.

Now applying nodal analysis we have

e0 - 80 + e0 + e0 - 16 = 0
10 + 2 12 6
or 4e0 = 112
e0 = 112 = 28 V
4
Sol. 96 Option (A) is correct.
jwC
I2 = Em +01c = Em +0c
R2 + jwC 1 + jwCR2

+I2 = +90c
+ tan-1 wCR2
I2 = E m wC + (90c - tan-1 wCR2)
1 + w2 C2 R 22
At w = 0 I2 = 0
and at w = 3, I2 = Em
R2
Only figure given in option (A) satisfies both conditions.
Sol. 97 Option (A) is correct.
Xs = wL = 10 W
For maximum power transfer
RL = Rs2 + Xs2 = 102 + 102 = 14.14 W
Sol. 98 Option (C) is correct.
Applying KVL in LHS loop
E1 = 2I1 + 4 (I1 + I2) - 10E1
or E1 = 6I1 + 4I2
11 11
Thus z11 = 6
11
Applying KVL in RHS loop
E2 = 4 (I1 + I2) - 10E1
= 4 (I1 + I2) - 10 c 6I1 + 4I2 m =- 16I1 + 4I2
11 11 11 11
Thus z21 =- 16
11

mywbut.com
 GATE SOLVED PAPER - EC NETWORK ANALYSIS

Sol. 99 Option (D) is correct.

At w = 0 , circuit act as shown in figure below.

V0 = RL (finite value)
Vs RL + Rs
At w = 3 , circuit act as shown in figure below:

V0 = RL (finite value)
Vs RL + Rs
At resonant frequency w = 1 circuit acts as shown in fig and V = 0 .
0
LC

Thus it is a band reject filter.

Sol. 100 Option (D) is correct.
Applying KCL we get
iL = eat + ebt
Now V (t) = vL = L diL = L d [eat + ebt] = aeat + bebt
dt dt
Sol. 101 Option (A) is correct.
Going from 10 V to 0 V

10 + 5 + E + 1 = 0
or E =- 16 V

mywbut.com
GATE SOLVED PAPER - EC NETWORK ANALYSIS

Sol. 102 Option (C) is correct.

This is a reciprocal and linear network. So we can apply reciprocity theorem
which states “Two loops A & B of a network N and if an ideal voltage source
E in loop A produces a current I in loop B , then interchanging positions an
identical source in loop B produces the same current in loop A. Since network is
linear, principle of homogeneity may be applied and when volt source is doubled,
current also doubles.
Now applying reciprocity theorem
i = 2 A for 10 V
V = 10 V, i = 2 A
V =- 20 V, i =- 4 A
Sol. 103 Option (C) is correct.
Tree is the set of those branch which does not make any loop and connects all
the nodes.
abfg is not a tree because it contains a loop l node (4) is not connected

Sol. 104 Option (A) is correct.

For a 2-port network the parameter h21 is defined as
h21 = I2
I1 V = 0 (short circuit)
2

Applying node equation at node a we get

Va - V1 + Va - 0 + Va - 0 = 0
R R R
3Va = V1 & Va = V1
3
V1 - V1
Now I1 = V1 - Va = 3 = 2V1
R R 3R
0 - V1 - V
and I2 = 0 - Va = 3 = 1
R R 3R
I2 - V1 /3R - 1
Thus = h21 = =
I1 V = 0
2
2V1 /3R 2
Sol. 105 Option (A) is correct.
Applying node equation at node A
Vth - 100 (1 + j0) Vth - 0
+ =0
3 4j

mywbut.com
 GATE SOLVED PAPER - EC NETWORK ANALYSIS

or 4jVth - 4j100 + 3Vth = 0

or Vth (3 + 4j) = 4j100
4j100
Vth =
3 + 4j
By simplifying
4j100 3 - 4j
Vth =
3 + 4j # 3 - 4j
Vth = 16j (3 - j4)
Sol. 106 Option (C) is correct.
For maximum power transfer RL should be equal to RTh at same terminal.
so, equivalent Resistor of the circuit is

Req = 5W 20W + 4W

Req = 5.20 + 4 = 4 + 4 = 8 W
5 + 20
Sol. 107 Option (D) is correct.
Delta to star conversion
R1 = Rab Rac = 5 # 30 = 150 = 3 W
Rab + Rac + Rbc 5 + 30 + 15 50
R2 = Rab Rbc = 5 # 15 = 1.5 W
Rab + Rac + Rbc 5 + 30 + 15
R3 = Rac Rbc = 15 # 30 = 9 W
Rab + Rac + Rbc 5 + 30 + 15
Sol. 108 Option (C) is correct.
No. of branches = n + l - 1 = 7 + 5 - 1 = 11
Sol. 109 Option (B) is correct.
In nodal method we sum up all the currents coming & going at the node So it is
based on KCL. Furthermore we use ohms law to determine current in individual
branch. Thus it is also based on ohms law.
Sol. 110 Option (A) is correct.
Superposition theorem is applicable to only linear circuits.
Sol. 111 Option (B) is correct.
Sol. 112 Option (B) is correct.
For reciprocal network y12 = y21 but here y12 =- 12 ! y21 = 12 . Thus circuit is non
reciprocal. Furthermore only reciprocal circuit are passive circuit.
Sol. 113 Option (C) is correct.
Taking b as reference node and applying KCL at a we get
Vab - 1 + Vab = 3
2 2
or Vab - 1 + Vab = 6

mywbut.com
GATE SOLVED PAPER - EC NETWORK ANALYSIS

or Vab = 6 + 1 = 3.5 V
2
Sol. 114 Option (A) is correct.
Sol. 115 Option (B) is correct.
The given figure is shown below.

Applying KCL at node a we have

I = i 0 + i1 = 7 + 5 = 12 A
Applying KCL at node f
I =- i 4
so i 4 =- 12 amp
Sol. 116 Option (A) is correct.

so V = 3 - 0 = 3 volt
Sol. 117 Option (D) is correct.
Can not determined V without knowing the elements in box.
Sol. 118 Option (A) is correct.
The voltage V is the voltage across voltage source and that is 10 V.
Sol. 119 Option (B) is correct.
Voltage across capacitor
-t
VC (t) = VC (3) + (VC (0) - VC (3)) e RC
Here VC (3) = 10 V and (VC (0) = 6 V. Thus
-t -t -t
VC (t) = 10 + (6 - 10) e RC = 10 - 4e RC = 10 - 4e 8
Now VR (t) = 10 - VC (t)
-t -t
= 10 - 10 + 4e RC = 4e RC
Energy absorbed by resistor
2 -t

#0 3V RR(t) = #0 3 164e 4
-t
E = #0 3 4e 4 = 16 J

Sol. 120 Option (B) is correct.

It is a balanced whetstone bridge
R1 R 3
b R2 = R 4 l

mywbut.com
 GATE SOLVED PAPER - EC NETWORK ANALYSIS

so equivalent circuit is

Zeq = (4W 8W) = 4 # 8 = 8

4+8 3
Sol. 121 Option (B) is correct.
Current in A2 , I2 = 3 amp
Inductor current can be defined as I2 =- 3j
Current in A 3 , I3 = 4
Total current I1 = I2 + I 3 = 4 - 3j
I = (4) 2 + (3) 2 = 5 amp

Sol. 122 Option (C) is correct.

For a tree we have (n - 1) branches. Links are the branches which from a loop,
when connect two nodes of tree.
so if total no. of branches = b
No. of links = b - (n - 1) = b - n + 1
Total no. of links in equal to total no. of independent loops.
Sol. 123 Option (B) is correct.
In the steady state condition all capacitors behaves as open circuit & Inductors
behaves as short circuits as shown below :

Thus voltage across capacitor C1 is

VC = 100 # 40 = 80 V
1
10 + 40
Now the circuit faced by capacitor C2 and C 3 can be drawn as below :

Voltage across capacitor C2 and C 3 are

VC = 80 C 3 = 80 # 3 = 48 volt
2
C2 + C3 5

mywbut.com
GATE SOLVED PAPER - EC NETWORK ANALYSIS

VC = 80 C2 = 80 2 = 32 volt
3
C2 + C3 #5

***********

mywbut.com