Multifunction Telecom Switch: Description
Multifunction Telecom Switch: Description
Form-B
IF
ILOAD
90%
10%
toff ton
Pb e3
DS-TS118-R05
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INTEGRATED CIRCUITS DIVISION TS118
R05
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INTEGRATED CIRCUITS DIVISION TS118
Typical LED Forward Voltage Drop Typical Turn-On Time Typical Turn-Off Time
(N=50, IF=5mA) (N=50, IF=5mA, IL=120mADC) (N=50, IF=5mA, IL=120mADC)
35 25 25
30
20 20
20 15 15
15 10 10
10
5 5
5
0 0 0
1.17 1.19 1.21 1.23 1.25 0.09 0.27 0.45 0.63 0.81 0.99 1.17 0.27 0.45 0.63 0.81 0.99 1.17 1.35
LED Forward Voltage Drop (V) Turn-On Time (ms) Turn-Off Time (ms)
Typical IF for Switch Operation Typical IF for Switch Dropout Typical On-Resistance Distribution
(N=50, IL=120mADC) (N=50, IL=120mADC) (N=50, IF=5mA, IL=120mADC)
25 25 35
30
20 20
25
15 15 20
10 10 15
10
5 5
5
0 0 0
0.33 0.55 0.77 0.99 1.21 1.43 1.65 0.11 0.33 0.55 0.77 0.99 1.21 1.43 25.5 26.5 27.5 28.5 29.5 30.5 31.5
LED Current (mA) LED Current (mA) On-Resistance (:)
30
Device Count (N)
25
20
15
10
0
357.5 372.5 387.5 402.5 417.5 432.5 447.5
Blocking Voltage (VP)
0.25 0.6
1.6
Turn-On Time (ms)
0.5
0.20
1.4 0.4
0.15
IF=50mA
1.2 IF=30mA 0.3
IF=20mA 0.10
IF=10mA 0.2
1.0 IF=5mA 0.05 0.1
0.8 0 0
-40 -20 0 20 40 60 80 100 120 0 5 10 15 20 25 30 35 40 45 50 0 5 10 15 20 25 30 35 40 45 50
Temperature (ºC) LED Forward Current (mA) LED Forward Current
* The Performance data shown in the graphs above is typical of device performance. For guaranteed parameters not indicated in the written specifications, please contact our application
department.
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INTEGRATED CIRCUITS DIVISION TS118
On-Resistance (:)
Turn-On Time (ms)
0.7 40
0.4
0.6
IF=10mA
0.3 0.5 30
0.4
0.2 IF=20mA 20
0.3
0.2 10
0.1
0.1
0 0 0
-40 -20 0 20 40 60 80 100 -40 -20 0 20 40 60 80 100 -40 -20 0 20 40 60 80 100
Temperature (ºC) Temperature (ºC) Temperature (ºC)
Typical IF for Switch Operation Typical IF for Switch Dropout Maximum Load Current
vs. Temperature vs. Temperature vs. Temperature
(IL=120mADC) (IL=120mADC) (IF=5mA)
3.0 3.0 180
160
2.5 2.5
140
405 0.040
100
Blocking Voltage (VP)
Load Current (mA)
400 0.035
Leakage (PA)
50
0.030
395
0 0.025
390
0.020
-50
385
0.015
-100 380 0.010
-150 375 0.005
-4 -3 -2 -1 0 1 2 3 4 -40 -20 0 20 40 60 80 100 -40 -20 0 20 40 60 80 100
Load Voltage (V) Temperature (ºC) Temperature (ºC)
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
10Ps 100Ps 1ms 10ms 100ms 1s 10s 100s
Time
* The Performance data shown in the graphs above is typical of device performance. For guaranteed parameters not indicated in the written specifications, please contact our application
department.
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INTEGRATED CIRCUITS DIVISION TS118
* The Performance data shown in the graphs above is typical of device performance. For guaranteed parameters not indicated in the written specifications, please contact our application
department.
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INTEGRATED CIRCUITS DIVISION TS118
Manufacturing Information
Moisture Sensitivity
All plastic encapsulated semiconductor packages are susceptible to moisture ingression. IXYS Integrated
Circuits Division classified all of its plastic encapsulated devices for moisture sensitivity according to the
latest version of the joint industry standard, IPC/JEDEC J-STD-020, in force at the time of product
evaluation. We test all of our products to the maximum conditions set forth in the standard, and guarantee proper
operation of our devices when handled according to the limitations and information in that standard as well as to any
limitations set forth in the information or standards referenced below.
Failure to adhere to the warnings or limitations as established by the listed specifications could result in reduced
product performance, reduction of operable life, and/or reduction of overall reliability.
This product carries a Moisture Sensitivity Level (MSL) rating as shown below, and should be handled according
to the requirements of the latest version of the joint industry standard IPC/JEDEC J-STD-033.
ESD Sensitivity
This product is ESD Sensitive, and should be handled according to the industry standard JESD-625.
Reflow Profile
This product has a maximum body temperature and time rating as shown below. All other guidelines of J-STD-020
must be observed.
Board Wash
IXYS Integrated Circuits Division recommends the use of no-clean flux formulations. However, board washing to
remove flux residue is acceptable. Since IXYS Integrated Circuits Division employs the use of silicone coating as an
optical waveguide in many of its optically isolated products, the use of a short drying bake could be necessary if a
wash is used after solder reflow processes. Chlorine- or Fluorine-based solvents or fluxes should not be used.
Cleaning methods that employ ultrasonic energy should not be used.
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INTEGRATED CIRCUITS DIVISION TS118
Mechanical Dimensions
TS118
9.652 ± 0.381 7.620 ± 0.254 PCB Hole Pattern
2.540 ± 0.127 (0.380 ± 0.015) (0.300 ± 0.010)
(0.100 ± 0.005) 8-0.800 DIA. 2.540 ± 0.127
(8-0.031 DIA.) (0.100 ± 0.005)
9.144 ± 0.508
6.350 ± 0.127 (0.360 ± 0.020)
(0.250 ± 0.005)
6.350 ± 0.127
(0.250 ± 0.005)
Pin 1 3.302 ± 0.051
0.457 ± 0.076 (0.130 ± 0.002)
(0.018 ± 0.003) 7.239 TYP. 7.620 ± 0.127
(0.285) (0.300 ± 0.005)
7.620 ± 0.127
4.064 TYP (0.300 ± 0.005)
(0.160) 0.254 ± 0.0127
(0.010 ± 0.0005)
Dimensions
0.813 ± 0.102 mm
(0.032 ± 0.004) (inches)
TS118P
2.286 MAX. PCB Land Pattern
(0.090 MAX.)
2.540 ± 0.127 0 MIN / 0.102 MAX
(0.100 ± 0.005) (0 MIN / 0.004 MAX) 2.54
(0.10)
7.620 ± 0.254 0.635 ± 0.127
6.350 ± 0.127 9.398 ± 0.127 (0.025 ± 0.005)
(0.250 ± 0.005) (0.370 ± 0.005) (0.300 ± 0.010)
8.70
1.55 (0.3425)
Pin 1 (0.0610)
0.203 ± 0.013
9.652 ± 0.381 (0.008 ± 0.0005)
(0.380 ± 0.015)
0.65
2.159 ± 0.025 (0.0255)
(0.085 ± 0.001)
0.457 ± 0.076
(0.018 ± 0.003) Dimensions
0.864 ± 0.120 mm
(0.034 ± 0.004) (inches)
TS118S
9.652 ± 0.381 PCB Land Pattern
(0.380 ± 0.015) 0.635 ± 0.127
2.540 ± 0.127 3.302 ± 0.051 (0.025 ± 0.005) 2.54
(0.100 ± 0.005) (0.10)
(0.130 ± 0.002)
Dimensions
0.813 ± 0.102 mm
(0.032 ± 0.004) (inches)
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INTEGRATED CIRCUITS DIVISION TS118
330.2 DIA.
(13.00 DIA.)
Ao=10.30 P=12.00
K0 =4.90 (0.406) (0.472)
(0.193)
K1 =4.20
User Direction of Feed
(0.165)
Embossed Carrier Dimensions
mm
(inches)
NOTES:
1. Dimensions carry tolerances of EIA Standard 481-2
Embossment 2. Tape complies with all “Notes” for constant dimensions listed on page 5 of EIA-481-2
2.00 4.00
330.2 DIA. (0.079) (0.157)
(13.00 DIA.)
7.50 W = 16.00
(0.295) (0.63)
Top Cover
Tape Thickness
0.102 MAX. Bo = 10.30
(0.004 MAX.) (0.406)
P = 12.00 Ao = 10.30
K0 = 2.70 (0.472) (0.406)
(0.106)
Dimensions
K1 = 2.00
User Direction of Feed mm
Embossed Carrier (0.079)
(inches)
NOTES:
1. All dimensions carry tolerances of EIA Standard 481-2
Embossment 2. The tape complies with all “Notes” for constant dimensions listed on page 5 of EIA-481-2
The products described in this document are not designed, intended, authorized or warranted for use as components in systems intended for surgical implant into the body, or in other
applications intended to support or sustain life, or where malfunction of IXYS Integrated Circuits Division’s product may result in direct physical harm, injury, or death to a person or severe
property or environmental damage. IXYS Integrated Circuits Division reserves the right to discontinue or make changes to its products at any time without notice.
Specification: DS-TS118-R05
©Copyright 2012, IXYS Integrated Circuits Division