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Experiment No. 4 Design of Square Wave Generator Using Op-Amp IC 741

This document describes an experiment to design a square wave generator using an op-amp IC 741. The aim is to generate a 1 kHz square wave. The circuit diagram and theory of operation are provided. The procedure involves designing the circuit based on specifications, building it, measuring the output voltage and frequency, and concluding by comparing theoretical and experimental values. Equations for calculating frequency based on component values are also defined.

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50% found this document useful (2 votes)
2K views22 pages

Experiment No. 4 Design of Square Wave Generator Using Op-Amp IC 741

This document describes an experiment to design a square wave generator using an op-amp IC 741. The aim is to generate a 1 kHz square wave. The circuit diagram and theory of operation are provided. The procedure involves designing the circuit based on specifications, building it, measuring the output voltage and frequency, and concluding by comparing theoretical and experimental values. Equations for calculating frequency based on component values are also defined.

Uploaded by

aditi rajan
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOC, PDF, TXT or read online on Scribd
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ECL 402: Linear Integrated Circuits Laboratory

EXPERIMENT NO. 4

Design of square wave generator using op-amp IC 741

Department of Electronics & Telecommunication Engineering, SIES Graduate School of Technology 18


ECL 402: Linear Integrated Circuits Laboratory

EXPERIMENT NO. 4

Design of square wave generator using op-amp IC 741

AIM: Design of square wave generator (Astable Multivibrator) using operational amplifier
IC 741.

SPECIFICATIONS:

Design square wave generator (Astable Multivibrator) using op-amp 741 for a frequency of 1
KHz.
Assume C = 0.1 µF.

EQUIPMENTS AND COMPONENTS:



Breadboard with dual power supply.

Operational amplifier IC 741

Resistors & capacitor as per design

Connecting wires

Digital Multimeter

CRO & CRO probes

CIRCUIT DIAGRAM:

THEORY:
Astable multivibrator is a non linear application of opamp and generates continuous square
waveform without the need of external trigger. Resistors R1 and R2 provides two references
+ BVo and – BVo with which the voltage across capacitance C is compared. Whenever the
voltage across capacitance crosses any one of the reference, change of the state is triggered

Department of Electronics & Telecommunication Engineering, SIES Graduate School of Technology 19


ECL 402: Linear Integrated Circuits Laboratory

and comparator changes the state. When the output of comparator is +Vo, capacitance
charges through resistance R and when the output of comparator is –Vo, capacitance
discharges through resistance R.
ANALYSIS:
Expression for Frequency of Oscillations

PROCEDURE:
11. Design the circuit for given specifications. Prepare component list.
12. Draw the circuit diagram & write component values.
13. Connect the circuit as per the circuit diagram.
14. Connect supply voltage.
15. Measure and note the output voltage and compare it with theoretical value.
16. Draw waveform on graph paper and show readings.

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ECL 402: Linear Integrated Circuits Laboratory

DESIGN OF SQUARE WAVE GENERATOR FOR GIVEN SPECIFICATIONS:

OBSERVATION TABLE:

Freq (Theoretically) Freq (Practically)

CONCLUSION:

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ECL 402: Linear Integrated Circuits Laboratory

Exercise questions:

1. How frequency of square wave can be changed?


2. Suggest the modification in the existing circuit so that duty cycle of output can be
varied. Suggest the circuit for asymmetrical square wave generator.
3. How square waveform can be converted to triangular waveform.
4. Suggest circuits for triangular waveform generator.

Department of Electronics & Telecommunication Engineering, SIES Graduate School of Technology 22


ECL 402: Linear Integrated Circuits Laboratory

EXPERIMENT NO. 5

DESIGN OF ASTABLE MULTIVIBRATOR USING IC 555

Department of Electronics & Telecommunication Engineering, SIES Graduate School of Technology 23


ECL 402: Linear Integrated Circuits Laboratory

EXPERIMENT NO. 05:

DESIGN OF ASTABLE MULTIVIBRATOR USING IC 555


OBJECTIVES:
Design of astable multivibrator using IC 555.

EQUIPMENT:

Breadboard with dual power supply

Connecting wires

Multi-meter

IC 555 (1)

Capacitors: 0.1μF, 0.01 μF

Resistors: as per design

Function generator

Oscilloscope & BNC-Crocodile probe

THEORY:
The device 555 is a monolithic timing circuit that can produce accurate and highly stable
time delays or oscillations. The timer basically operates in one of two modes

Monostable multivibrator (One shot)

Astable multivibrator (free running)
Important features of 555 timer are:

Supply voltage: +5 to +18 in both modes.

It has adjustable duty cycle.

Timing is from microseconds through hours.

High current output.

It can source or sink 200 mA.

Reliable, easy to use and low cost.

Astable multivibrator is a rectangular wave generating circuit. It is often called a


free running multivibrator because unlike the monostable multivibrator circuit does not
require an external trigger to change the state of the output.

Two resistors and a capacitor, which are externally connected to the 555 timer,
determine the time during which the output is either high or low.

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ECL 402: Linear Integrated Circuits Laboratory

Operation: (Refer block diagram & circuit diagram)

Initially when output is high, capacitor starts charging towards Vcc through RA and RB.
As soon as voltage across capacitor equals 2/3 V cc, comparator C1 triggers the flip-flop, and
the output switches low. Now capacitor starts discharging through RB and transistor Q1. When
the voltage across C equals 1/3 V cc, comparator C2’s output triggers the flip-flop, and output
goes high. Then the cycle repeats.

Capacitor is periodically charged and discharged between 2/3 Vcc & 1/3Vcc,
respectively. The time during which the capacitor charges from 1/3 Vcc to 2/3 Vcc is equal to
the time the output is high

tC = 0.693 (RA+RB) C --------------------------------------------- (1)

Similarly the time during which the capacitor discharges from 2/3 Vcc to 1/3 Vcc is equal to
the time the output is low and is given by

td = 0.693 (RB) C--------------------------------------------- (2)

Where RA and RB are in ohms and C is in farads.

Thus the total period of output waveform is

T = tC + td = 0.693 (RA + 2RB) C ------------------------------ (3)

So the frequency of oscillation is

fo = 1/T = 1.44 / [ (RA + 2RB) C ] -------------------------------- (4)

Equation (4) indicates that the frequency fo is independent of supply voltage VCC.

The duty cycle (expressed in %) of the output pulse waveform is given by,

d% = (tC / T) 100 = [ (RA + RB) / (RA + 2RB) ] (100)

Duty cycle will always be less than 50% for this circuit. To achieve 50% duty cycle, we
should make RA = 0 . However, there is a danger of making that because with RA = 0 , pin
7 is connected directly to +VCC. When the capacitor discharges through RB and Q1, an extra
current is supplied to Q1 by VCC through a short terminal between pin 7 and VCC, which may
damage Q1 and hence the timer chip.

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ECL 402: Linear Integrated Circuits Laboratory

However an alternative is available, the circuit can produce 50% duty cycle by simply
connecting diode D across resistor RB as shown in circuit diagram with dotted lines. Astable
multivibrator with 50% duty cycle is also known as square wave oscillator. In this case
capacitor C charges, through RA & diode D, to approximately 2/3VCC & discharges, through
RB & Q1, until the capacitor voltage equals approximately 1/3 VCC; then the cycle repeats.

DESIGN PROBLEM:
Design Astable multivibrator for frequency 1 KHz and duty cycle 75%.
- Assume capacitor C = 0.1 μF
- Take VCC = 6V.

PROCEDURE:
1. Design the circuit for given specifications and draw circuit diagram
2. Connect the circuit on the breadboard.
3. Observe waveforms on oscilloscope.
4. Plot the output and capacitor voltage waveforms on graph paper.

CONCLUSION / RESULT:

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ECL 402: Linear Integrated Circuits Laboratory

Exercise questions:

5. How frequency of output can be changed?


6. How Amplitude of output can be changed?
7. Suggest the modification in the existing circuit so that–
a) Draw circuit to provide output with duty cycle 50%
b) Draw circuit to provide output with duty cycle less than 50%
8. Draw other multivibrator circuits using IC 555
9. List important applications of IC 555.

Department of Electronics & Telecommunication Engineering, SIES Graduate School of Technology 27


ECL 402: Linear Integrated Circuits Laboratory

EXPERIMENT NO. 6

DIGITAL TO ANALOG CONVERTER (DAC)

Department of Electronics & Telecommunication Engineering, SIES Graduate School of Technology 28


ECL 402: Linear Integrated Circuits Laboratory

EXPERIMENT NO. 6

DIGITAL TO ANALOG CONVERTER (R-2R LADDER)

OBJECTIVE: To Study & implement R-2R Ladder Digital to Analog Converter

EQUIPMENTS:

Breadboard with dual power supply

Connecting wires

Digital Multi-meter

OP-AMP IC 741 (1)

Resistors

CIRCUIT DIAGRAM:

THEORY:
The electronic circuit that translates a digital signal to analog signal is called a digital
to analog converter (DAC). Three resistive techniques for digital to analog conversion are
weighted resistor DAC, R-2R ladder type DAC and inverted R-2R ladder DAC. DAC’s in
which the analog signal is allowed to vary is called multiplying DAC.
The R–2R ladder is inexpensive and relatively easy to manufacture, since only two
resistor values are required (or even one, if R is made by placing a pair of 2R in parallel, or if
2R is made by placing a pair of R in series). It is fast and has fixed output impedance R. The
R–2R ladder operates as a string of current dividers, whose output accuracy is solely
dependent on how well each resistor is matched to the others.

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ECL 402: Linear Integrated Circuits Laboratory

For 4 bit R-2R DAC the output voltage is given by


Vout = -RF [(b3/2R) + (b2/4R) + (b1/8R) + (b0/16R)]
As number of binary inputs is increased beyond four, both D/A converter circuit s get
complex and their accuracy degenerates.

PROCEDURE:
1. Connect the circuit as per circuit diagram.
2. Connect dual power supply +12 V & -12 V. Switch on power supply.
3. Connect binary inputs to b3, b2, b1 & b0 as per truth table and note the analog output.
4. Tabulate the results.

OBSERVATION TABLE/RESULTS

Digital Input Analog Output


b3 b2 b1 b0 V0 (Theoretical) V0 (Practical)
0 0 0 0
0 0 0 1
0 0 1 0
0 0 1 1
0 1 0 0
0 1 0 1
0 1 1 0
0 1 1 1
1 0 0 0
1 0 0 1
1 0 1 0
1 0 1 1
1 1 0 0
1 1 0 1
1 1 1 0
1 1 1 1

CONCLUSION:

Department of Electronics & Telecommunication Engineering, SIES Graduate School of Technology 30


ECL 402: Linear Integrated Circuits Laboratory

Exercise questions:

1. Draw block diagram of data acquisition system.

2. List types of DAC & ADC.

3. List requirements of ADC/DAC

4. Name the Integrated circuit(IC) for ADC/DAC

Department of Electronics & Telecommunication Engineering, SIES Graduate School of Technology 31


ECL 402: Linear Integrated Circuits Laboratory

EXPERIMENT NO. 7

Simulation of Active filter

Department of Electronics & Telecommunication Engineering, SIES Graduate School of Technology 32


ECL 402: Linear Integrated Circuits Laboratory

EXPERIMENT NO. 7
ND
STUDY OF 2 ORDER LOW PASS FILTER
OBJECTIVE: To Design & simulate 2’nd order Low Pass Active filter using op-amp in
multisim 11.0.

APPARATUS:
multisim 11.0
THEORY:
When a filter contains a device like an Op Amp they are called active filters. These active
filters differ from passive filters (simple RC circuits) by the fact that there is the ability for
gain depending on the configuration of the elements in the circuit. Op-amp filters can be
designed without using inductors. This is a significant advantage since inductors are bulky
and expensive. Inductors also exhibit nonlinear behaviour (arising from the core properties)
which is undesirable in a circuit. The low pass filter is one that allows low frequencies to pass
through the circuit and stops (attenuates) higher frequencies, hence the name. The design of a
low pass filter needs to take into consideration the maximum frequency that would need to be
allowed through. This is called the cut off frequency (or the 3 dB down frequency). Based on
the type of filter that is used (e.g. Butterworth, Chebyshev) the attenuation of the higher
frequencies can be greater. This attenuation is also based on the order (e.g. 1st, 2nd, 3rd…) of
the filter that is used. Based on the order of the filter the roll-off of the filter can be calculated
using the formula –n*20 dB/decade. This means that a first order low pass filter has an
attenuation of -20 dB/decade, while a second order filter should have -40 dB/decade roll-off
and on down the list for higher orders. A first-order low-pass active filter can be converted
into a second-order low pass filter simply by using an additional RC network in the input
path. The frequency response of the second-order low pass filter is identical to that of the
first-order type except that the stop band roll-off rate will be twice the first-order filters at -
40dB/decade.
CIRCUIT DIAGRAM:

Department of Electronics & Telecommunication Engineering, SIES Graduate School of Technology 33


ECL 402: Linear Integrated Circuits Laboratory

DESIGN:
Design Specifications:
Design 2’nd order KRC low pass filter with Cut off frequency 1 kHz. Assume capacitor value
0.0047µF.
Assume RF = 0.586 R1, R1 = 27 kΩ.
For equal component design:
R2 = R3 = R & C2 = C3 = C = 0.0047µF & given, f0 = 1 kHz; we have,

Find R:

Assume RF = 0.586 R1,


Let R1 = 27 kΩ.

RF =

PROCEDURE:
5. Draw & Simulate the circuit as per circuit diagram in multisim 11.0
6. Observe frequency response of the circuit.

CONCLUSION:

Department of Electronics & Telecommunication Engineering, SIES Graduate School of Technology 34


ECL 402: Linear Integrated Circuits Laboratory

Exercise question:
1. Draw frequency response of above filter on semilog paper.
nd
2. Design 2 order Butterworth non-inverting high pass filter to provide cut-off
frequency of 5 kHz and pass band gain of AF = 2. Draw circuit diagram with
component values.

Department of Electronics & Telecommunication Engineering, SIES Graduate School of Technology 35


ECL 402: Linear Integrated Circuits Laboratory

EXPERIMENT NO. 8

Simulation of Precision Rectifiers

Department of Electronics & Telecommunication Engineering, SIES Graduate School of Technology 36


ECL 402: Linear Integrated Circuits Laboratory

EXPERIMENT NO. 8

SIMULATION OF PRECISION RECTIFIERS

OBJECTIVE: To Study & simulate Precision Rectifier using op-amp.

APPARATUS:
Multisim 11.0.1

THEORY:
Rectifier circuits are used in the design of power supply circuits. In such applications,
the voltage being rectified is usually much greater than the diode voltage drop, so the exact
value of the diode drop unimportant to the proper operation of the rectifier. However in some
applications like in instrumentation applications, the signal to be rectified can be of very
small amplitude, say 0.1 V, making it impossible to employ the conventional rectifier circuits.
Also the need arises for very precise transfer characteristics. An Operational Amplifier can be
used for half wave or full wave rectification by incorporating a device such as a diode or a
transistor in feedback path. For precision rectification we need a circuit that keeps V 0 equal to
Vin for Vin  0 Rather than Vin  VD
Half wave rectifier:
There are many applications for precision rectifiers, and most are suitable for use in
audio circuits. A half wave precision rectifier is implemented using an op amp, and includes
the diode in the feedback loop. This effectively cancels the forward voltage drop of the diode,
so very low level signals (well below the diode's forward voltage) can still be rectified with
minimal error.

Department of Electronics & Telecommunication Engineering, SIES Graduate School of Technology 37


ECL 402: Linear Integrated Circuits Laboratory

Full wave rectifier:(Absolute value circuit)


A full wave rectifier accepts an ac signal at the input inverts either negative or positive
half and passes both inverted & non-inverted halves at the output. The OPAMP is used as a
st
full wave rectifier by connecting the circuit as shown in fig. The I/p stage of 1 OPAMP is
connected in inverting mode whose o/p is given to 2nd OPAMP at which we get the rectified
o/p. When positive half cycle appears at the I/p, diode D1 is forward biased and the inverted
st nd
o/p of 1 OPAMP is fed to 2 OPAMP where it is again inverted. Thus we get a positive half
cycle at the o/p when negative half cycle appears at the I/p diode D2 is forward biased and the
inverted o/p of 1st OPAMP is fed to 2nd OPAMP where it remains non-inverted. Thus we get
positive half cycle at the o/p. Thus the circuit works a full wave rectifier.
Limitations
• The circuit has some serious limitations. The main one is speed. It will not work well with
high frequency signals.
• For a low frequency positive input signal, 100% negative feedback is applied when the
diode conducts. The forward voltage is effectively removed by the feedback, and the
inverting input follows the positive half of the input signal almost perfectly.
• When the input signal becomes negative, the op amp has no feedback at all, so the output
pin of the op amp swings negative as far as it can.
• When the input signal becomes positive again, the op amp's output voltage will take a finite
time to swing back to zero, then to forward bias the diode and produce an output. This time is
determined by the op amp's slew rate, and even a very fast op amp will be limited to low
frequencies.
CIRCUIT DIAGRAM:
Full wave Rectifier (Absolute value circuit)

Department of Electronics & Telecommunication Engineering, SIES Graduate School of Technology 38


ECL 402: Linear Integrated Circuits Laboratory

PROCEDURE:
1. Draw & Simulate the circuit as per circuit diagram in multisim.
2. Observe input output waveforms

CONCLUSION:

Department of Electronics & Telecommunication Engineering, SIES Graduate School of Technology 39

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