EEE 105: Instruction Set Examples: Snap Densing
EEE 105: Instruction Set Examples: Snap Densing
EEE 105: Instruction Set Examples: Snap Densing
Snap Densing
1 Introduction
This document will give examples of different instruction sets and how to implement a program using these
instruction sets. These instruction sets are not necessarily ”real” instruction sets. However, real-world
instruction sets usually have a comparable structure.
For all three examples, the program that will be implemented is the following (written in C):
y = 0;
f o r ( x=1; x <=N; x++)
y = y + x;
Assume that constant N is stored in memory location N mem, while variable y will be stored in memory
location y mem.
For simplicity and uniformity, we will also assume that all example instruction sets will have a register
file that has 4 registers, addressed as R0 to R4. All examples support two addressing modes:
• Register - denoted by Rx, where x is the register number (ex. R1). This refers to the contents of a
register in the register file.
• Memory - denoted by MemAddr or Target, where MemAddr/Target is a memory address (which can
be a label). This refers to the contents of an element in memory addressed by MemAddr/Target. The
difference between the two notations is that MemAddress refers to a data element, while Target refers
to the address of an instruction.
2 Three-address instruction
This instruction set contains instructions that can have up to three operand addresses. The following table
lists all instructions in the instruction set and their function.
Instruction Function
Load Rx,MemAddr Copies the contents of memory address MemAddr to register Rx
Store Memaddr,Rx Copies the contents of register Rx to memory address MemAddr
Add Rx,Ry,Rz Adds the contents of registers Ry and Rz, then stores the result to register Rx
Beq Rx,Ry,Target Compares the contents of registers Rx and Ry. If they are equal, the instruction
addressed by Target is executed after this one (instead of the next instruction in
program order)
Bne Rx,Ry,Target Compares the contents of registers Rx and Ry. If they are not equal, the
instruction addressed by Target is executed after this one (instead of the next
instruction in program order)
Clr Rx Sets the contents of Rx to 0
Inc Rx Increments the contents of Rx by 1 (Rx = Rx + 1)
Dec Rx Decrements the contents of Rx by 1 (Rx = Rx − 1)
The following code shows the equivalent assembly program for the example C-code shown earlier.
1
00 Load R0 , N mem
01 Clr R1
02 Inc R1
03 Clr R2
04 Clr R3
05 l o o p : Add R2 , R2 , R1
06 Inc R1
07 Dec R0
08 Bne R0 , R3 , l o o p
09 Store y mem , R2
3 Two-address instruction
This instruction set contains instructions that can have up to two operand addresses. It also makes use
of status registers (or flags) which track the result of instruction execution. The following table lists all
instructions in the instruction set and their function. Unless otherwise specified, the Z flag is untouched
after instruction execution.
Instruction Function
Load Rx,MemAddr Copies the contents of memory address MemAddr to register Rx
Store Memaddr,Rx Copies the contents of register Rx to memory address MemAddr
Add Rx,Ry Adds the contents of registers Rx and Ry, then stores the result to register Rx.
Sets the Z flag to 1 if the sum is equal to 0, otherwise the Z flag is set to 0
Bz Target Checks if the Z flag is EQUAL to zero. If true, the instruction addressed by Target
is executed after this one (instead of the next instruction in program order)
Bnz Target Checks if the Z flag is NOT EQUAL to zero. If true, the instruction addressed by
Target is executed after this one (instead of the next instruction in program order)
Clr Rx Sets the contents of Rx to 0. Sets the Z flag to 1
Inc Rx Increments the contents of Rx by 1 (Rx = Rx + 1). Sets the Z flag to 1 if the
result is equal to 0, otherwise the Z flag is set to 0
Dec Rx Decrements the contents of Rx by 1 (Rx = Rx − 1). Sets the Z flag to 1 if the
result is equal to 0, otherwise the Z flag is set to 0
The following code shows the equivalent assembly program for the example C-code shown earlier.
00 Load R0 , N mem
01 Clr R1
02 Inc R1
03 Clr R2
04 l o o p : Add R2 , R1
05 Inc R1
06 Dec R0
07 Bnz loop
08 Store y mem , R2
4 One-address instruction
This instruction set contains instructions that only have at most one operand address. It also makes use
of status registers (or flags) which track the result of instruction execution. The instruction set makes use
of a central Accumulator which is used in every instruction. The following table lists all instructions in
the instruction set and their function. Unless otherwise specified, the Z flag is untouched after instruction
execution.
2
Instruction Function
Load MemAddr Copies the contents of memory address MemAddr to the Accumulator
Store Memaddr Copies the contents of the Accumulator to memory address MemAddr
Add Rx Adds the contents of register Rx and the Accumulator, then stores the result to the
Accumulator. Sets the Z flag to 1 if the sum is equal to 0, otherwise the Z flag is set to 0
Bz Target Checks if the Z flag is EQUAL to zero. If true, the instruction addressed by Target
is executed after this one (instead of the next instruction in program order)
Bnz Target Checks if the Z flag is NOT EQUAL to zero. If true, the instruction addressed by
Target is executed after this one (instead of the next instruction in program order)
Clr Sets the contents of the Accumulator to 0. Sets the Z flag to 1
Inc Increments the contents of the Accumulator by 1. Sets the Z flag to 1 if the result is
equal to 0, otherwise the Z flag is set to 0
Dec Decrements the contents of the Accumulator by 1. Sets the Z flag to 1 if the result is
equal to 0, otherwise the Z flag is set to 0
MovR Rx Copies the contents of the Accumulator to register Rx
MovA Rx Copies the contents of register Rx to the Accumulator
The following code shows the equivalent assembly program for the example C-code shown earlier.
00 Load N mem
01 MovR R0
02 Clr
03 Inc
04 MovR R1
05 Clr
06 MovR R2
07 l o o p : MovA R2
08 Add R1
09 MovR R2
10 MovA R1
11 Inc
12 MovR R1
13 MovA R0
14 Dec
15 MovR R0
16 Bnz loop
17 MovA R2
18 Store y mem