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Understand Boolean Logic of NOR Gate and NAND Gate: Syed Mohsin Ali Shah Digital Logic Design LAB Spring 2019

The document discusses a lecture on Boolean logic of NOR and NAND gates. It provides the truth tables and implementation procedures for NOR and NAND gates using integrated circuits 74LS02N and 74LS00N respectively. The procedures include connecting switches as inputs and an LED as the output to verify the truth tables.

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Muhammad Sufyan
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43 views10 pages

Understand Boolean Logic of NOR Gate and NAND Gate: Syed Mohsin Ali Shah Digital Logic Design LAB Spring 2019

The document discusses a lecture on Boolean logic of NOR and NAND gates. It provides the truth tables and implementation procedures for NOR and NAND gates using integrated circuits 74LS02N and 74LS00N respectively. The procedures include connecting switches as inputs and an LED as the output to verify the truth tables.

Uploaded by

Muhammad Sufyan
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Lecture 2

Understand Boolean Logic of NOR Gate


And NAND Gate
Syed Mohsin Ali Shah
Digital Logic Design LAB
Spring 2019

1 Lecture 2
Outline
 Boolean Logic Of NOR Gate
 Boolean Logic Of NAND Gate
 Implementation On Multisim
 Implementation On Hardware

2 Lecture 2
NOR Gate
 A NOR gate is a type of logic gate that works on the principle of
“neither this nor that.” This type of digital logic gate produces a high
output only if two binary results are satisfied by a zero or low
input.

A B Y

0 0 1

0 1 0

1 0 0

1 1 0

3 Lecture 2
Cont….
 Pin Configuration

• IC Number: 74LS02N

• No Of Pins: 14

• Ground : Pin # 7

• VCC : Pin # 14

4 Lecture 2
Cont…
 Equipment Required:

• 74LS02N x 1.

• LED x 1.

• SPST x 2.

5 Lecture 2
Implementation
Procedure:
• .Take an IC 74LS02N place in trainer

• Take 2 switches connected with the VCC or 5V and


connect them to pin # 2 and pin # 3.

• Take output from the 1st pin and connect it to the LED.

• Connect the other end of LED with ground

6 • Verify the truth table by different inputs.


Lecture 2
NAND GATE
 The NAND (Not – AND) gate has an output that is normally
at logic level “1” and only goes “LOW” to logic level “0”
when ALL of its inputs are at logic level “1”. The Logic
NAND Gate is the reverse or “Complementary” form of the
AND gate we have seen previously.

7 Lecture 2
Cont….
 Pin Configuration

• IC Number: 74LS00N

• No Of Pins: 14

• Ground : Pin # 7

• VCC : Pin # 14

8 Lecture 2
Cont…
 Equipment Required:

• 74LS00N x 1.

• LED x 1.

• SPST x 2.

9 Lecture 2
Implementation
Procedure:
• .Take an IC 74LS00N place in trainer

• Take 2 switches connected with the VCC or 5V and connect


them to pin # 1 and pin # 2.

• Take output from the 3rd pin and connect it to the LED.

• Connect the other end of LED with ground

10 • Verify the truth table by different inputs.


Lecture 2

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