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DLD Assignment - 1

This document contains instructions for a digital logic design assignment with multiple modules. Module 1 involves number base conversions between binary, decimal, hexadecimal, and octal. It also includes binary arithmetic operations. Module 2 covers Boolean algebra topics like reducing expressions and applying DeMorgan's theorems. Module 3 asks the student to analyze a bank vault security system with 4 locks and keys and represent the logic using truth tables, K-maps, CMOS logic, basic gates, and NAND gates.

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0% found this document useful (0 votes)
362 views2 pages

DLD Assignment - 1

This document contains instructions for a digital logic design assignment with multiple modules. Module 1 involves number base conversions between binary, decimal, hexadecimal, and octal. It also includes binary arithmetic operations. Module 2 covers Boolean algebra topics like reducing expressions and applying DeMorgan's theorems. Module 3 asks the student to analyze a bank vault security system with 4 locks and keys and represent the logic using truth tables, K-maps, CMOS logic, basic gates, and NAND gates.

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gokul
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Digital Assignment-1

ECE2003 - Digital Logic Design

MODULE-1

NUMBER BASE CONVERSIONS:


1. Convert each binary number to decimal: (a) 1100111101 (b). 101101101.11

2. Convert each decimal number to binary: (a). (last 4 digit of Reg.no) (b). 9876.543

3. Convert each hexadecimal number to binary: (a). (Reg.no) (b). F9E8D7.C6B5

4. Convert each binary number to hexadecimal: (a). 1100111111001 (b). 1101010110.10011

5. Convert following binary number to octal: (a). 1100111111001 (b). 1101010110.10011

6. Convert following octal number to binary: (a). 1726354 (b). 4556.872

BINARY ARITHMETIC:
1. Binary Addition: (last 4 digit of Reg.no in binary) + 1110010101001101
2. Binary Subtraction: (last 4 digit of Reg.no in binary) - 1110010101001101
3. Binary Multiplication: (last 4 digit of Reg.no in binary) *1010
4. Binary Division: (last 4 digit of Reg.no in binary)/1010
5. 1’s Complement: (last 4 digit of Reg.no in binary)
6. 2’s Complement: (last 4 digit of Reg.no in binary)

CMOS LOGIC:
Realize logical expressions using CMOS logic: (a). Y =(AC’+B(C+B))+C’D
(b).Y= (AB’C+(D’+E).F)’

Important Note: For example if your (Reg.no) is 18BEC1008 then (last 4 digit of
Reg.no) is 1008, (last 4 digit of reg. no in binary) is binary equivalent of 1008 which is
1111110000.
MODULE-2
BOOLEAN ALGEBRA:
1. Reduce the Boolean expressions:
(a). [ XY+ XZ]’+ X’Y’Z (b). W’Y (W’XZ)’ + W’XY’Z’ + WX’Y (c). AB + (AC)' + AB’C (AB + C)

2. Apply DeMorgan’s theorem:


(a). (AB′+ C + D′)′ (b) [AB (CD + EF)]′ (c). [(A′+ B + C + D′)′+ (AB′C′D)]′

CANONICAL AND STANDARD FORMS:


1. Obtain the canonical SOP form of the function:

(a). Y (A, B, C) = BC+AD+ABC (b). Y (A, B, C, D) = AB+BCD+ACD+BD

2. Obtain the canonical POS expression of the functions:


(a). F(A,B,C)=A. (B+ C+ D) (b). F(X,Y,Z)=XY+ X’Z+Y

MODULE-3

1. A bank vault has four locks with a key for each lock. The bank manager owns Key A. Key B
owned by the senior bank teller. The trainee back teller owns Key C and Key D owned by
security guard. In order to open the vault door at least two people must insert their keys into
the assigned locks at the same time.
i) Construct the truth table.
ii) Find the simplified expression using K-Map
iii) Draw using CMOS logic for the simplified expression
iv) Draw logic circuit using basic logic gates for the simplified expression
v) Convert the obtained circuit to NAND only equivalent gates.

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