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Assignment - 2: Inputs Outputs

The document contains 6 assignments related to digital logic design and implementation including: designing an excess-3 to 8421 code converter; constructing a 5-to-32 line decoder; and designing a binary-to-die decoder, 9's complement circuit for a BCD digit, and a mod-7 circuit. Students are asked to provide block diagrams, minimize logic expressions, write Verilog code, and create test benches for the various digital logic circuits.

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Hari karthick
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18 views

Assignment - 2: Inputs Outputs

The document contains 6 assignments related to digital logic design and implementation including: designing an excess-3 to 8421 code converter; constructing a 5-to-32 line decoder; and designing a binary-to-die decoder, 9's complement circuit for a BCD digit, and a mod-7 circuit. Students are asked to provide block diagrams, minimize logic expressions, write Verilog code, and create test benches for the various digital logic circuits.

Uploaded by

Hari karthick
Copyright
© © All Rights Reserved
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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Assignment -2

1. Using a 4-to-16 line decoder, design an Excess-3 to 8421 code converter. Select gates so as to minimize the
total number of output terminals.
2.

Deduce the expression for X.


3. (i) Design a combinational circuit that computes the residue mod-7 of an integer in the range 0-15.
(ii) Minimize the expression.
(iii) Write High level description and an appropriate test bench for the same.
4. Construct a 5-to-32 line decoder with four 3-to-8 line decoders with enable and a 2-to-4 line decoder. Use
block diagrams for the components.
5. An electronic die is constructed from seven LEDs laid out in the pattern below. The LEDs are driven by signals
a,b,c,d to indicate the values 1- 6 of the die.
a c
b d b
c a

This binary-to-die decoder is also described by the table given below. X represents don't care.

Inputs Outputs
N2 N1 N0 a b c d
0 0 0 x x x x
0 0 1 0 0 0 1
0 1 0 1 0 0 0
0 1 1 1 0 0 1
1 0 0 1 0 1 0
1 0 1 1 0 1 1
1 1 0 1 1 1 0
1 1 1 x x x x
Design this decoder and model using Verilog HDL .
6. Design a combinational logic circuit to generate the 9’s complement of a BCD digit.
Write a Verilog code for the above function in Behavioural model.

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