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Digital Design: Tutorial - 4

This document contains questions about implementing logic functions using multiplexers. It includes 6 questions: 1) Implementing a function using an 8:1 and 4:1 multiplexer, 2) Implementing a Boolean expression using an 8:1 multiplexer, NOT and AND gates, 3) Designing a circuit to output 0 when the product of 2 binary inputs is negative using a 4:1 multiplexer and gates, 4) Constructing a 16:1 multiplexer using 8:1 and 2:1 multiplexers, 5) Implementing a full adder using two 4:1 multiplexers, and 6) Determining the Boolean function of an 8:1 multiplexer given the selection inputs and data inputs.

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Yash Sawant
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0% found this document useful (0 votes)
28 views17 pages

Digital Design: Tutorial - 4

This document contains questions about implementing logic functions using multiplexers. It includes 6 questions: 1) Implementing a function using an 8:1 and 4:1 multiplexer, 2) Implementing a Boolean expression using an 8:1 multiplexer, NOT and AND gates, 3) Designing a circuit to output 0 when the product of 2 binary inputs is negative using a 4:1 multiplexer and gates, 4) Constructing a 16:1 multiplexer using 8:1 and 2:1 multiplexers, 5) Implementing a full adder using two 4:1 multiplexers, and 6) Determining the Boolean function of an 8:1 multiplexer given the selection inputs and data inputs.

Uploaded by

Yash Sawant
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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DIGITAL DESIGN

TUTORIAL -4
QUESTION-1

• Implement the following using multiplexers


f(A,B,C,D) =  (1,3,4,11,12,13,14,15)
a) Use 8:1 mux
b) Use 4:1 mux and NAND gates only
QUESTION-2

• Implement the following Boolean expression using


8:1 mux, NOT gates and AND gates.

• F(A,B, C, D, E) =  (3,4,5,7,10,11,14,15,19,20,21,23)
+ d (8,9,12,13,24,28)
QUESTION 3

• Circuit has 2 signed inputs A and B of 2 bits each.


(i.e. one input is A1A0 and other input is B1B0).
Output F of this circuit is 0 whenever the product of
2 numbers is Negative. Design the circuit
(implement of function F(A1A0B1B0)) using 4:1 mux
and gates.
QUESTION 4

• Construct a 16:1 multiplexer with two 8:1 and one


2:1 multiplexers. Use block diagrams.
QUESTION 5

• Implement a full adder with two 4×1 multiplexers.


QUESTION 6

• An 8×1 multiplexer has inputs A , B , and C


connected to the selection inputs S2 , S1, and S0,
respectively.

• The data inputs I0 through I7 are as follows:


I1=I2= I7=0; I3=I5=1; I0= I4= D ; and I6=D’.
• Determine the Boolean function that the multiplexer
implements.
Tut Quiz (Open Book)
Instructions to students:
1. Clearly write your name and ID on the top of the page.
2. Please write in pen only.
3. Draw the gates clearly and label the interconnections
properly
4. Work in the space provided. Use your notebook for any
rough work that is needed.
5. No partial marking, however all steps to get the answer
need to be shown to get credit.
6. No copying of any sort. Only individual work will be
evaluated
7. Time = 15min
8. Total marks =4
QUES

• Implement the following using 4:1 mux.


• Gates available are Ex-OR and NOT gate.

• Use A and B as select inputs.

• F(A,B,C,D) = A’C’D + ABC + C(B⊕D) + AB’C’D’


SOLUTIONS

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