Problem – Write an assembly language program to add two 8 bit numbers stored at address 2050 and address 2051

in 8085
microprocessor. The starting address of the program is taken as 2000.

Algorithm –
1. Load the first number from memory location 2050 to accumualtor.
2. Move the content of accumulator to register H.
3. Load the second number from memory location 2051 to accumaltor.
4. Then add the content of register H and accumulator using “ADD” instruction and storing result at 3050
5. The carry generated is recovered using “ADC” command and is stored at memory location 3051
Program –

MEMORY ADDRESS MNEMONICS COMMENT

2000 LDA 2050 A<-[2050]

2003 MOV H, A H<-A

2004 LDA 2051 A<-[2051]

2007 ADD H A<-A+H

2006 MOV L, A L←A

2007 MVI A 00 A←00

2009 ADC A A←A+A+carry

200A MOV H, A H←A

200B SHLD 3050 H→3051, L→3050

200E HLT

1. LDA 2050 moves the contents of 2050 memory location to the accumulator.
2. MOV H, A copies contents of Accumulator to register H to A
3. LDA 2051 moves the contents of 2051 memory location to the accumulator.
4. ADD H adds contents of A (Accumulator) and H register (F9). The result is stored in A itself. For all arithmetic
instructions A is by default an operand and A stores the result as well
5. MOV L, A copies contents of A (34) to L
6. MVI A 00 moves immediate data (i.e., 00) to A
7. ADC A adds contents of A(00), contents of register specified (i.e A) and carry (1). As ADC is also an arithmetic
operation, A is by default an operand and A stores the result as well
8. MOV H, A copies contents of A (01) to H
9. SHLD 3050 moves the contents of L register (34) in 3050 memory location and contents of H register (01) in 3051
memory location
10. HLT stops executing the program and halts any further execution
Problem – Write an assembly language program to add two 16 bit numbers by using:
 (a) 8 bit operation
 (b) 16 bit operation
Example –

(a) Addition of 16 bit numbers using 8 bit operation – It is a lengthy method and requires more memory as compared to 16
bit operation.
Algorithm –
1. Load the lower part of first number in B register
2. Load the lower part of second number in A (accumulator)
3. Add both the numbers and store
4. Load the higher part of first number in B register
5. Load the higher part of second number in A (accumulator)
6. Add both the numbers with carry from the lower bytes (if any) and store at the next location

MEMORY ADDRESS MNEMONICS COMMENTS

2000 LDA 2050 A ← 2050

2003 MOV B, A B←A

2004 LDA 2052 A ← 2052

2007 ADD B A ← A+B

2008 STA 3050 A → 3050

200B LDA 2051 A ← 2051

200E MOV B, A B←A

200F LDA 2053 A ← 2053

2012 ADC B A ← A+B+CY

2013 STA 3051 A → 3051

2016 HLT Stops execution

Explanation –
1. LDA 2050 stores the value at 2050 in A (accumulator)
2. MOV B, A stores the value of A into B register
3. LDA 2052 stores the value at 2052 in A
4. ADD B add the contents of B and A and store in A
5. STA 3050 stores the result in memory location 3050
6. LDA 2051 stores the value at 2051 in A
7. MOV B, A stores the value of A into B register
8. LDA 2053 stores the value at 2053 in A
9. ADC B add the contents of B, A and carry from the lower bit addition and store in A
10. STA 3051 stores the result in memory location 3051
11. HLT stops execution
(b) Addition of 16 bit numbers using 16 bit operation – It is a very short method and less memory is also required as
compared to 8 bit operation.
Algorithm –
1. Load both the lower and the higher bits of first number at once
2. Copy the first number to another register pair
3. Load both the lower and the higher bits of second number at once
4. Add both the register pairs and store the result in a memory location

Program –
MEMORY ADDRESS MNEMONICS COMMENTS

2000 LHLD 2050 A ← 2050

2003 XCHG D←H&E←L

2004 LHLD 2052 A ← 2052

2007 DAD D H ← H+D & L ← L+E

2008 SHLD 3050 A → 3050

200B HLT Stops execution

Explanation –
1. LHLD 2050 loads the value at 2050 in L register and that in 2051 in H register (first number)
2. XCHG copies the content of H to D register and L to S register
3. LHLD 2052 loads the value at 2052 in L register and that in 2053 in H register (second number)
4. DAD D adds the value of H with D and L with E and stores the result in H and L
5. SHLD 3050 stores the result at memory location 3050
6. HLT stops execution
Problem – Write a program to subtract two 8-bit numbers with or without borrow where first number is at 2500 memory
address and second number is at 2501 memory address and store the result into 2502 and borrow into 2503 memory address.
Example –

Algorithm –
1. Load 00 in a register C (for borrow)
2. Load two 8-bit number from memory into registers
3. Move one number to accumulator
4. Subtract the second number with accumulator
5. If borrow is not equal to 1, go to step 7
6. Increment register for borrow by 1
7. Store accumulator content in memory
8. Move content of register into accumulator
9. Store content of accumulator in other memory location
10. Stop
Program –
MEMORY MNEMONICS OPERANDS COMMENT

2000 MVI C, 00 [C] <- 00

2002 LHLD 2500 [H-L] <- [2500]

2005 MOV A, H [A] <- [H]

2006 SUB L [A] <- [A] – [L]

2007 JNC 200B Jump If no borrow

200A INR C [C] <- [C] + 1

200B STA 2502 [A] -> [2502], Result

200E MOV A, C [A] <- [C]

2010 STA 2503 [A] -> [2503], Borrow

2013 HLT Stop

Explanation – Registers A, H, L, C are used for general purpose:
1. MOV is used to transfer the data from memory to accumulator (1 Byte)
2. LHLD is used to load register pair directly using 16-bit address (3 Byte instruction)
3. MVI is used to move data immediately into any of registers (2 Byte)
4. STA is used to store the content of accumulator into memory(3 Byte instruction)
5. INR is used to increase register by 1 (1 Byte instruction)
6. JNC is used to jump if no borrow (3 Byte instruction)
7. SUB is used to subtract two numbers where one number is in accumulator(1 Byte)
8. HLT is used to halt the program
Problem – Write a program to subtract two 16-bit numbers where starting address is 2000 and the numbers are
at 3000 and 3002 memory address and store result into 3004 and 3006memory address.
Example –

Algorithm –
1. Load 0000H into CX register (for borrow)
2. Load the data into AX(accumulator) from memory 3000
3. Load the data into BX register from memory 3002
4. Subtract BX with Accumulator AX
5. Jump if no borrow
6. Increment CX by 1
7. Move data from AX(accumulator) to memory 3004
8. Move data from CX register to memory 3006
9. Stop
Program –
MEMORY MNEMONICS OPERANDS COMMENT

2000 MOV CX, 0000 [CX] <- 0000

2003 MOV AX, [3000] [AX] <- [3000]

2007 MOV BX, [3002] [BX] <- [3002]

200B SUB AX, BX [AX] <- [AX] – [BX]

200D JNC 2010 Jump if no borrow

200F INC CX [CX] <- [CX] + 1

2010 MOV [3004], AX [3004] <- [AX]

2014 MOV [3006], CX [3006] <- [CX]

2018 HLT Stop

Explanation –
1. MOV is used to load and store data.
2. SUB is used to subtract two numbers where their one number is in accumulator or not.
3. JNC is a 2-bit command which is used to check whether the borrow is generated from accumulator or not.
4. INC is used to increment an register by 1.
5. HLT is used to stop the program.
6. AX is an accumulator which is used to load and store the data.
7. BX, CX are general purpose registers where BX is used for storing second number and CX is used to store borrow.
Data transfer instructions in 8085 microprocessor

Data tranfer instructions are the instructions which transfers data in the microprocessor. They are also called copy instructions.

Following is the table showing the list of logical instructions:

OPCODE OPERAND EXPLANATION EXAMPLE

MOV Rd, Rs Rd = Rs MOV A, B

MOV Rd, M Rd = Mc MOV A, 2050

MOV M, Rs M = Rs MOV 2050, A

MVI Rd, 8-bit data Rd = 8-bit data MVI A, 50

MVI M, 8-bit data M = 8-bit data MVI 2050, 50

LDA 16-bit address A = contents at address LDA 2050

STA 16-bit address contents at address = A STA 2050

LHLD 16-bit address directly loads at H & L registers LHLD 2050

SHLD 16-bit address directly stores from H & L registers SHLD 2050

LXI r.p., 16-bit data loads the specified register pair with data LXI H, 3050

LDAX r.p. indirectly loads at the accumulator A LDAX H

STAX 16-bit address indirectly stores from the accumulator A STAX 2050

XCHG none exchanges H with D, and L with E XCHG

PUSH r.p. pushes r.p. to the stack PUSH H

POP r.p. pops the stack to r.p. POP H

IN 8-bit port address inputs contents of the specified port to A IN 15

OUT 8-bit port address outputs contents of A to the specified port OUT 15

In the table,
R stands for register
M stands for memory
r.p. stands for register pair
Arithmetic instructions in 8085 microprocessor

Following is the table showing the list of arithmetic instructions:

OPCODE OPERAND EXPLANATION EXAMPLE

ADD R A=A+R ADD B

ADD M A = A + Mc ADD 2050

ADI 8-bit data A = A + 8-bit data ADD 50

ADC R A = A + R + prev. carry ADC B

ADC M A = A + Mc + prev. carry ADC 2050

ACI 8-bit data A = A + 8-bit data + prev. carry ACI 50

SUB R A=A–R SUB B

SUB M A = A – Mc SUB 2050

SUI 8-bit data A = A – 8-bit data SUI 50

SBB R A = A – R – prev. carry SBB B

SBB M A = A – Mc -prev. carry SBB 2050

SBI 8-bit data A = A – 8-bit data – prev. carry SBI 50

INR R R=R+1 INR B

INR M M = Mc + 1 INR 2050

INX r.p. r.p. = r.p. + 1 INX H

DCR R R=R–1 DCR B

DCR M M = Mc – 1 DCR 2050

DCX r.p. r.p. = r.p. – 1 DCX H

DAD r.p. HL = HL + r.p. DAD H

In the table,
R stands for register
M stands for memory
Mc stands for memory contents
r.p. stands for register pair
Logical instructions in 8085 microprocessor

Following is the table showing the list of logical instructions:

OPCODE OPERAND DESTINATION EXAMPLE

ANA R A = A AND R ANA B

ANA M A = A AND Mc ANA 2050

ANI 8-bit data A = A AND 8-bit data ANI 50

ORA R A = A OR R ORA B

ORA M A = A OR Mc ORA 2050

ORI 8-bit data A = A OR 8-bit data ORI 50

XRA R A = A XOR R XRA B

XRA M A = A XOR Mc XRA 2050

XRI 8-bit data A = A XOR 8-bit data XRI 50

CMA none A = 1’s compliment of A CMA

CMP R Compares R with A and triggers the flag register CMP B

CMP M Compares Mc with A and triggers the flag register CMP 2050

CPI 8-bit data Compares 8-bit data with A and triggers the flag register CPI 50

RRC none Rotate accumulator right without carry RRC

RLC none Rotate accumulator left without carry RLC

RAR none Rotate accumulator right with carry RAR

RAL none Rotate accumulator left with carry RAR

CMC none Compliments the carry flag CMC

STC none Sets the carry flag STC

In the table,
R stands for register
M stands for memory
Mc stands for memory contents
Problem – Write a program to move blocks of bits from source location starting at 2500 to destination location starting
from 2600 where size of blocks is 05 bytes.Example –

Algorithm –

1. Load register pair H-L with the address 2500H

2. Load register pair D-E with the address 2600H

3. Move the content at memory location into accumulator

4. Store the content of accumulator into memory pointed by D-E

5. Increment value of register pair H-L and D-E by 1

6. Decrements value of register C by 1

7. If zero flag not equal to 1, go to step 3

8. Stop

Program –

MEMORY MNEMONICS OPERANDS COMMENT

2000 MVI C, 05 [C] <- 05

2002 LXI H, 2500 [H-L] <- 2500

2005 LXI D, 2600 [D-E] <- 2600

2008 MOV A, M [A] <- [[H-L]]

2009 STAX D [A] -> [[D-E]]

200A INX H [H-L] <- [H-L] + 1

200B INX D [D-E] <- [D-E] + 1

200C DCR C [C] <- [C] – 1

200D JNZ 2008 Jump if not zero to 2008

2010 HLT Stop

Explanation – Registers A, D, E, H, L, C are used for general purpose:

1. MOV is used to transfer the data from memory to accumulator (1 Byte)

2. LXI is used to load register pair immediately using 16-bit address (3 Byte instruction)

3. MVI is used to move data immediately into any of registers (2 Byte)

4. STAX is used to store accumulator into register pair indirectly (3 Byte instruction)

5. DCR is used to decrease register by 1 (1 Byte instruction)

6. INX is used to increase register pair by 1 (1 Byte instruction)

7. JNZ is used to jump if not zero to given memory location (3 Byte instruction)

8. HLT is used to halt the program.

Problem – Determine largest number in an array of n elements. Value of n is stored at address 2050 and array starts
from address 2051. Result is stored at address 3050. Starting address of program is taken as 2000.
We are taking first element of array in A
Comparing A with other elements of array, if A is smaller then store that element in A otherwise compare with next
element
The value of A is the answer
Program –
MEMORY ADDRESS MNEMONICS COMMENT

2000 LXI H 2050 H←20, L←50

2003 MOV C, M C←M

2004 DCR C C←C-01

2005 INX H HL←HL+0001

2006 MOV A, M A←M

2007 INX H HL←HL+0001

2008 CMP M A-M

2009 JNC 200D If Carry Flag=0, goto 200D

200C MOV A, M A←M

200D DCR C C←C-1

200E JNZ 2007 If Zero Flag=0, goto 2007

2011 STA 3050 A→3050

2014 HLT

1. Explanation – Registers used: A, H, L, C

2. LXI 2050 assigns 20 to H and 50 to L
3. MOV C, M copies content of memory (specified by HL register pair) to C (this is used as a counter)
4. DCR C decrements value of C by 1
5. INX H increases value of HL by 1. This is done to visit next memory location
6. MOV A, M copies content of memory (specified by HL register pair) to A
7. INX H increases value of HL by 1. This is done to visit next memory location
8. CMP M compares A and M by subtracting M from A. Carry flag and sign flag becomes set if A-M is negative
9. JNC 200D jumps program counter to 200D if carry flag = 0
10. MOV A, M copies content of memory (specified by HL register pair) to A
11. DCR C decrements value of C by 1
12. JNZ 2007 jumps program counter to 2007 if zero flag = 0
13. STA 3050 stores value of A at 3050 memory location
14. HLT stops executing the program and halts any further execution
8085 program to multiply two 8 bit numbers

Problem – Multiply two 8 bit numbers stored at address 2050 and 2051. Result is stored at address 3050 and 3051. Starting
address of program is taken as 2000.

Example –

Algorithm –

1. We are taking adding the number 43 seven(7) times in this example.

2. As the multiplication of two 8 bit numbers can be maximum of 16 bits so we need register pair to store the result.

Program –

MEMORY ADDRESS MNEMONICS COMMENT

2000 LHLD 2050 H←2051, L←2050

2003 XCHG H↔D, L↔E

2004 MOV C, D C←D

2005 MVI D 00 D←00

2007 LXI H 0000 H←00, L←00

200A DAD D HL←HL+DE

200B DCR C C←C-1

200C JNZ 200A If Zero Flag=0, goto 200A

200F SHLD 3050 H→3051, L→3050

2012 HLT

1. Explanation – Registers used: A, H, L, C, D, E

2. LHLD 2050 loads content of 2051 in H and content of 2050 in L
3. XCHG exchanges contents of H with D and contents of L with E
4. MOV C, D copies content of D in C
5. MVI D 00 assigns 00 to D
6. LXI H 0000 assigns 00 to H and 00 to L
7. DAD D adds HL and DE and assigns the result to HL
8. DCR C decreaments C by 1
9. JNZ 200A jumps program counter to 200A if zero flag = 0
10. SHLD stores value of H at memory location 3051 and L at 3050
11. HLT stops executing the program and halts any further execution
Types of addressing modes –
In 8085 microprocessor there are 5 types of addressing modes:
1. Immediate Addressing Mode –
In immediate addressing mode the source operand is always data. If the data is 8-bit, then the
instruction will be of 2 bytes, if the data is of 16-bit then the instruction will be of 3 bytes.
Examples:
MVI B 45 (move the data 45H immediately to register B)
LXI H 3050 (load the H-L pair with the operand 3050H immediately)
JMP address (jump to the operand address immediately)
2. Register Addressing Mode –
In register addressing mode, the data to be operated is available inside the register(s) and
register(s) is(are) operands. Therefore the operation is performed within various registers of the
microprocessor.
Examples:
MOV A, B (move the contents of register B to register A)
ADD B (add contents of registers A and B and store the result in register A)
INR A (increment the contents of register A by one)
3. Direct Addressing Mode –
In direct addressing mode, the data to be operated is available inside a memory location and that
memory location is directly specified as an operand. The operand is directly available in the
instruction itself.
Examples:
LDA 2050 (load the contents of memory location into accumulator A)
LHLD address (load contents of 16-bit memory location into H-L register pair)
IN 35 (read the data from port whose address is 01)
4. Register Indirect Addressing Mode –
IN register indirect addressing mode, the data to be operated is available inside a memory location
and that memory location is indirectly specified b a register pair.
Examples:
MOV A, M (move the contents of the memory location pointed by the H-L pair to the accumulator)
LDAX B (move contains of B-C register to the accumulator)
LXIH 9570 (load immediate the H-L pair with the address of the location 9570)
5. Implied/Implicit Addressing Mode –
In implied/implicit addressing mode the operand is hidden and the data to be operated is available
in the instruction itself.
Examples:
CMA (finds and stores the 1’s complement of the contains of accumultor A in A)
RRC (rotate accumulator A right by one bit)
RLC (rotate accumulator A left by one bit)
Flag register in 8085 microprocessor
Prerequisite – Registers of 8085 microprocessor
The Flag register is a Special Purpose Register. Depending upon the value of result after any arithmetic and logical operation the
flag bits become set (1) or reset (0). In 8085 microprocessor, flag register consists of 8 bits and only 5 of them are useful.
The 5 flags are:

Sign Flag (S) – After any operation if the MSB (B(7)) of the result is 1, it indicates the number is negative and the sign flag
becomes set, i.e. 1. If the MSB is 0, it indicates the number is positive and the sign flag becomes reset i.e. 0.
from 00H to 7F, sign flag is 0
from 80H to FF, sign flag is 1
1- MSB is 1 (negative)
0- MSB is 0 (positive)
Example:
MVI A 30 (load 30H in register A)
MVI B 40 (load 40H in register B)
SUB B (A = A – B)
These set of instructions will set the sign flag to 1 as 30 – 40 is a negative number.
MVI A 40 (load 40H in register A)
MVI B 30 (load 30H in register B)
SUB B (A = A – B)
These set of instructions will reset the sign flag to 0 as 40 – 30 is a positive number.
Zero Flag (Z) – After any arithmetical or logical operation if the result is 0 (00)H, the zero flag becomes set i.e. 1, otherwise it
becomes reset i.e. 0.
00H zero flag is 1.
from 01H to FFH zero flag is 0
1- zero result
0- non-zero result
Example:
MVI A 10 (load 10H in register A)
SUB A (A = A – A)
These set of instructions will set the zero flag to 1 as 10H – 10H is 00H
Auxiliary Carry Flag (AC) – This flag is used in BCD number system(0-9). If after any arithmetic or logical operation D(3)
generates any carry and passes on to B(4) this flag becomes set i.e. 1, otherwise it becomes reset i.e. 0. This is the only flag
register which is not accessible by the programmer
1-carry out from bit 3 on addition or borrow into bit 3 on subtraction
0-otherwise
Example:
MOV A 2B (load 2BH in register A)
MOV B 39 (load 39H in register B)
ADD B (A = A + B)
These set of instructions will set the auxiliary carry flag to 1, as on adding 2B and 39, addition of lower order nibbles B and 9 will
generate a carry.
Parity Flag (P) – If after any arithmetic or logical operation the result has even parity, an even number of 1 bits, the parity
register becomes set i.e. 1, otherwise it becomes reset i.e. 0.
1-accumulator has even number of 1 bits
0-accumulator has odd parity
Example:
MVI A 05 (load 05H in register A)
This instruction will set the parity flag to 1 as the BCD code of 05H is 00000101, which contains even number of ones i.e. 2.
Carry Flag (CY) – Carry is generated when performing n bit operations and the result is more than n bits, then this flag becomes
set i.e. 1, otherwise it becomes reset i.e. 0.
During subtraction (A-B), if A>B it becomes reset and if (A<B) it becomes set.
Carry flag is also called borrow flag.
1-carry out from MSB bit on addition or borrow into MSB bit on subtraction
0-no carry out or borrow into MSB bit
Example:
MVI A 30 (load 30H in register A)
MVI B 40 (load 40H in register B)
SUB B (A = A – B)
These set of instructions will set the carry flag to 1 as 30 – 40 generates a carry/borrow.
MVI A 40 (load 40H in register A)
MVI B 30 (load 30H in register B)
SUB B (A = A – B)
These set of instructions will reset the sign flag to 0 as 40 – 30 does not generate any carry/borrow.
Which of the following in 8085 microprocessor performs HL = HL + HL?
(A) DAD D
(B) DAD H
(C) DAD B
(D) DAD SP

Answer: (B)

Explanation: DAD will perform Double addition (16 bit) between HL pair and any other pair of register. Among HL, BC, DE and
SP; B, H and D register will be used first.
So, DAD H will do HL = HL + HL;
DAD B will do HL = HL + BC;
DAD D will do HL = HL + DE;
SP is stack pointer and it is not a pair register, DAD SP will do HL = HL + SP;
So, option (B) is correct.

******************
Match the following:
List - I List - II
(a)XCHG (i)only carry flag is affected.
(b)SUB (ii) no flags are affected.
(c)STC (iii) all flags other than carry flag are affected.
(d)DCR (iv)all flags are affected.
codes:
(D) (ii) (iv) (i) (iii)

***

Specify the contents of the accumulator and the status of the S, Z and CY flags when 8085 microprocessor performs
addition of 87 H and 79 H.
(A) 11, 1, 1, 1
(B) 10, 0, 1, 0
(C) 1, 1, 0, 0
(D) 00, 0, 1, 1

Answer: (D)

***

Two control signals in microprocessor which are related to Direct Memory Access (DMA) are
(A) INTR & INTA
(B) RD & WR
(C) S0 & S1
(D) HOLD & HLDA

Answer: (D)

Explanation: HOLD signal is used to request the access to the Bus and for other DMA events. The request is made to
the Processor. HLDA is the acknowledge signal for HOLD. It indicates whether the HOLD signal is received or not.
HOLD and HLDA are used as the control signal for DMA operations.

******

How many number of times the instruction sequence below will loop before coming out of the loop?

A1: MOV AL, 00H

INC AL
 JNZ A1

(A) 1
(B) 255
(C) 256
(D) Will not come out of the loop

Answer: (C)

Explanation:

A1: MOV AL, 00H // value of AL =0000 0000

INC AL // INCREMENT AL

JNZ A1 // jump to A1 when AL=0

AL = 0000 0000
Next step is for increment the value of AL. So, AL will keep on incrementing and after 255th iteration the value will
become 1111 1111, again the condition is checked and incremented, now in 256th iteration AL = 1 0000 0000.
As AL is an 8-bit register, 1 is discarded and the value becomes 0000 0000 and conditional jump to A1 occurs.
So, total 256 iterations.

Option (C) is correct.

********

In 8085 microprocessor the address bus is of __________ bits.

(A) 4
(B) 8
(C) 16
(D) 32

Answer: (C)

Explanation: In 8085 microprocessor 16 bits are used for address bus and 65,536(216 = 65,536) different memory
location are possible.
So, option (C) is correct.

******

The contents of Register (BL) and Register (AL) of 8085 microprocessor are 49H and 3AH respectively. The contents
of AL, the status of carry flag (CF) and sign flag (SF) after executing ‘SUB AL, BL’ assembly language instruction, are
(A) AL = 0FH; CF = 1; SF = 1
(B) AL = F0H; CF = 0; SF = 0
(C) AL = F1H; CF = 1; SF = 1
(D) AL = 1FH; CF = 1; SF = 1

Answer: (C)

****