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Ju Summer Training On Vlsi Design

The document announces a 6-week summer training course on microelectronics technology and VLSI design to be held from June 2017 at the IC Design & Fabrication Centre of Jadavpur University in Kolkata. The course will cover VLSI design using EDA tools, design verification using VHDL and FPGA implementation, and fabrication and characterization of semiconductor devices. It is open to students in their 3rd year or higher of electronics, instrumentation, electrical, computer science or IT programs. The fee for the course is Rs. 8,000 and applications will be accepted on a first come first serve basis, with a maximum of 90 students accepted over 3 batches.

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264 views1 page

Ju Summer Training On Vlsi Design

The document announces a 6-week summer training course on microelectronics technology and VLSI design to be held from June 2017 at the IC Design & Fabrication Centre of Jadavpur University in Kolkata. The course will cover VLSI design using EDA tools, design verification using VHDL and FPGA implementation, and fabrication and characterization of semiconductor devices. It is open to students in their 3rd year or higher of electronics, instrumentation, electrical, computer science or IT programs. The fee for the course is Rs. 8,000 and applications will be accepted on a first come first serve basis, with a maximum of 90 students accepted over 3 batches.

Uploaded by

paku dey
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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SUMMER TRAINING ON

MICROELECTRONICS TECHNOLOGY AND VLSI DESIGN

IC DESIGN & FABRICATION CENTRE


Department of Electronics & Telecommunication Engineering
Jadavpur University, Kolkata – 700032
Website: www.juiccentre.in
E-mail: [email protected] Phone: (033) 2457-2406 / 2414-6217
M: 9830157714

[1] VLSI Design using EDA Tools

a) Introduction to EDA Tools


b) Basic gates design using Schematic Capture
c) Netlisting Using T-Spice
d) Verification of design using waveform editor
e) Layout design using L-edit
f) Parasitic extraction

[2] Design Verification Using VHDL and FPGA Implementation of Digital


Systems.

a) Introduction to Digital Systems Modeling using VHDL


b) Verification of Digital Systems Design using Modelsim
c) Synthesis of Digital system using Xilinx ISE tool
d) Realization of digital systems on a Xilinx Spartan 3 board
e) Notion of RTL and Technology Schematic and Power Simulation

[3] Fabrication and Characterization of semiconductor devices

a) Mask Fabrication
b) Theoretical Simulation
c) Hardware fabrication for all process of Microelectronics: cleaning,
etching, oxidation, diffusion, photolithography and Metallization.
d) Characterization of fabricated device.

Duration: 6 weeks, Course starts from 1st week of June 2017 tentatively (after WBUT semester
examination). Final date will be announced later on.
Time: 10.00 AM to 6.00 PM, Monday to Saturday.
Eligibility: The Candidate should be at least B.E./B.Tech 3rd year and above in Electronics and
Communication / Instrumentation / Electrical / Computer Science / Information Technology.
Admission: Application form will be issued from the IC Centre, Department of Electronics &
Telecommunication Engineering, Jadavpur University or download from our website
[www.juiccentre.in]. Filled in application form shall be received at IC Centre during working hours
(Monday to Friday, 11 AM to 5 PM). Total seat 90, @ 30 per batch, Admission shall be first come
first serve basis.
Fees: @ Rupees 8,000/- in demand draft should be drawn in favour of “REGISTRAR, JADAVPUR
UNIVERSITY”, in any branches of “State Bank of India” payable at Kolkata. Once deposited the
course fee cannot be refunded. Hostel accommodation cannot be provided.
Enclosure: One copy of PP Size Photograph, Xerox copy of Madhyamik Admit Card, HS Mark
sheet, all Semesters Mark sheet & other certificates. [Attested / Self Attested copies of Mark sheets /
Certificates to be enclosed]

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