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Selected Answers and Hints For Problem Set 1

This document provides the questions and selected answers for Problem Set 1 of the Digital Logic course. It includes the answers to 12 questions on topics like binary conversion, logic circuit design using gates like AND, OR, NAND, NOR, and XOR. The answers are given in logic expressions, truth tables or circuit diagrams with the aim of testing students' understanding of digital logic concepts.

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vigneshwar R
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52 views2 pages

Selected Answers and Hints For Problem Set 1

This document provides the questions and selected answers for Problem Set 1 of the Digital Logic course. It includes the answers to 12 questions on topics like binary conversion, logic circuit design using gates like AND, OR, NAND, NOR, and XOR. The answers are given in logic expressions, truth tables or circuit diagrams with the aim of testing students' understanding of digital logic concepts.

Uploaded by

vigneshwar R
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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ENGI 3861 – Digital Logic

Fall 2019
Selected Answers and Hints for Problem Set 1

Question 1:
(a) 18610 (b) 23.4062510 (c) 233.6445312510

Question 2:
(a) (i) 11101011111110012, EBF916 (ii) 1011101110111100002, 2EEF016
(b) (i) 111111100110102, 376328, (ii) 11111101110010112, 1767138
(iii) 1001000111011.101000012, 11073.5028
(c) (i) 185410, (ii) 4349010
(d) (i) 168916 (ii) D5F8416

Question 3:
1010.111 with error = .015 since binary number represents 10.875

Question 4:
(a) F = X + Y'Z, (b) F = Z, (c) F = X', (d) F = Y + Z

Question 5:
(a) self-verifying, (b) self-verifying

Question 6:
(a) (i) 11010001, (ii) F = A'B'C' + A'B'C + A'BC + ABC, (iii) F = A'B' + BC
(b) (ii) 3 input NAND (You can see this from the truth table, as well as using
Boolean algebra.)

Question 7:
(a) Straightforward: 2 OR gate outputs feeding inputs to XOR gate
(b) Using just NANDs: You can straightforwardly replace each OR with 3
NANDs (to get 1 NAND with 2 NOTs at its inputs) and the XOR with 5
NANDs. To see how to get the XOR circuit, consider the AND-OR circuit
to compute XOR and then replace the AND-OR with 2 levels of NANDS
to get 3 NANDs, in addition to which 2 NANDs are needed to provide 2
NOTs. The XOR gate can be further simplified to 4 NANDs using the fact
that ABʹ′ = A(AB)ʹ′ and BAʹ′ = B(AB)ʹ′.
(c) Using NAND, NOR, NOT: Try putting NORs in place the ORs. The resulting
circuit requires 2 NORs and 4 NANDs (for the XOR function).

Question 8:
(a) F = [XY' + (YZ)']', (b) 00010001, (c) F = YZ, (d) F' = Y' + Z'

Question 9:
(b) F = X'Y + XY', (c) F' = XY + X'Y', (d) a 2-input XNOR gate
Question 10:
(a) 1111000110111011,
(c) F = (A+B'+C+D)(A+B'+C+D')(A+B'+C'+D)(A'+B'+C+D')(A'+B+C+D')
(d) F = A'B' + CD + AD'

Question 11:
(a) F = W'X' + W'Y + YZ'
(b) G = (X' + Z')(W' + Z')
(c) G = Z' + W'X' which only requires two 2-input gates (excluding the inverters)
compared to three 2-input gates needed in (b)

Question 12:
(a) F = WX + Y'Z + YZ'
(b) F = [(WX)'(Y⊕Z)']', that is 2 NANDs and 1 XNOR

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