Scribd
Upload
41 views6 pages

Lab Assignments Lab Assignment 1:: Name: Kamran Suleman Roll no:2017-CE-008

The document describes two lab assignments for a student named KAMRAN SULEMAN. The first assignment involves designing a half adder using a schematic, Verilog module, and verifying the results with a truth table. The second assignment involves designing a full adder using the same steps. Both adders are explained in theory sections that provide truth tables and circuit diagrams.

Uploaded by

Kamran Khan
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
41 views6 pages

Lab Assignments Lab Assignment 1:: Name: Kamran Suleman Roll no:2017-CE-008

The document describes two lab assignments for a student named KAMRAN SULEMAN. The first assignment involves designing a half adder using a schematic, Verilog module, and verifying the results with a truth table. The second assignment involves designing a full adder using the same steps. Both adders are explained in theory sections that provide truth tables and circuit diagrams.

Uploaded by

Kamran Khan
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
You are on page 1/ 6

Name: KAMRAN SULEMAN Roll no:2017-CE-008

LAB ASSIGNMENTS

Lab Assignment 1:
Design a Half Adder through schematic and verilog module. Also verify the results from truth table
given below.

THEORY

HALF ADDER
In electronics, an adder is a digital circuit that performs addition of numbers. In many computers and other
kind of processors, adders are used not only in the arithmetic logic units, but also in other parts of the
processor where they are used to calculate addresses, table indices and etc.

A B sum Carry

0 0 0 0

0 1 1 0

1 0 1 0

1 1 0 1

Truth Table Circuit Diagram

Schematic Diagram:
Name: KAMRAN SULEMAN Roll no:2017-CE-008

Verilog Module Code:

Verilog Test Fixture


Name: KAMRAN SULEMAN Roll no:2017-CE-008

Waveform:

Lab Assignment 2:
Design a Full Adder through schematic and verilog module. Also verify the results from truth table
given below.

THEORY

FULL ADDER
Name: KAMRAN SULEMAN Roll no:2017-CE-008

A full adder adds binary numbers and accounts for values carried in as well as out. A one-bit full adder
adds three one-bit numbers, often written as A, B and Cin. A and B are the operands and Cin is a bit carried
in. The circuit produces a two bit output, S and Cout. The final sum is 2XCout+S.

A B Cin sum Carry

0 0 0 0 0

0 0 1 1 0

0 1 0 1 0

0 1 1 0 1

1 0 0 1 0

1 0 1 0 1

1 1 0 0 1

1 1 1 1 1
Truth Table Circuit Diagram

Schematic Diagram:
Name: KAMRAN SULEMAN Roll no:2017-CE-008

Verilog Module Code:

Verilog Test Fixture


Name: KAMRAN SULEMAN Roll no:2017-CE-008

Waveform:

You might also like