UNIT-1.

Basic Structure of Computer

Hardware and Software

EduTechLearners
(http://www.edutechlearners.com)
COMPUTER ORGANISATION
AND ARCHITECTURE
 The components from which computers are built,
built
i.e., computer organization.
 In contrast,
contrast computer architecture is the science
of integrating those components to achieve a
level of functionalityy and p
performance.
 It is as if computer organization examines the
lumber, bricks, nails, and other building
g material
 While computer architecture looks at the design
of the house.
http://www.edutechlearners.com 2
UNIT-1
UNIT 1 CONTENTS
• Evolution of Computer Systems (Historical
Prospective)
p )
• Computer Types
• Functional units
• Bus structures
• Register Transfer and Micro-operations
• Information Representation
• Instruction Format and Types
• Addressing modes
• Machine and Assembly Language Programming
• Macros and Subroutines
http://www.edutechlearners.com 3
HISTORICAL PROSPECTIVE
Brief History of Computer Evolution
Two phases:
1. b f
before VLSI 1945
194 – 1978
19 8
 ENIAC
 IAS
 IBM
 PDP-8
2. VLSI 1978  present day
 microprocessors AND microcontrollers…

http://www.edutechlearners.com 4
Evolution of Computers
p
FIRST GENERATION (1945 – 1955)
 Program and data reside in the same memory
(stored program concepts – John von Neumann)
 ALP was made used to write programs
 Vacuum tubes were used to implement the
functions (ALU & CU design)
 Magnetic core and magnetic tape storage
devices are used
 Using electronic vacuum tubes, as the switching
components
p
http://www.edutechlearners.com 5
SECOND GENERATION (1955 –
1965)
 Transistor were used to design ALU & CU
 HLL is used (FORTRAN)
 To convert HLL to MLL compiler were used
 Separate I/O processor were developed to
operate in parallel with CPU, thus improving the
performance
 Invention of the transistor which was faster,
smaller and required considerably less power to
operate
http://www.edutechlearners.com 6
THIRD GENERATION (1965
(1965-1975)
1975)
 IC technology improved
 Improved IC technology helped in designing low
cost, high speed processor and memory
modules
d l
 Multiprogramming, pipelining concepts were
incorporated
p
 DOS allowed efficient and coordinate operation
of computer system with multiple users
 C h and
Cache d virtual
i t l memory concepts t were
developed
 More than one circuit on a single
g silicon chip
p
became available
http://www.edutechlearners.com 7
FOURTH GENERATION (1975-
1985)
 CPU – Termed as microprocessor
 INTEL, MOTOROLA, TEXAS,NATIONAL
semiconductors started developing
microprocessor
i
 Workstations, microprocessor (PC) & Notebook
computers
p were developed
p
 Interconnection of different computer for better
communication LAN,MAN,WAN
 C
Computational
t ti l speed
d increased
i d by
b 1000 times
ti
 Specialized processors like Digital Signal
Processor were also developedp
http://www.edutechlearners.com 8
BEYOND THE FOURTH GENERATION
(1985 – TILL DATE)

 E-Commerce,
E Commerce E- E banking,
banking home office
 ARM, AMD, INTEL, MOTOROLA
 Hi h speed
High d processor - GHz
GH speed
d
 Because of submicron IC technology lot of
added features in small size

http://www.edutechlearners.com 9
COMPUTER TYPES

Computers are classified based on the

parameters like
 Speed
S d off operation
ti
 Cost

 Computational power

 Type of application

http://www.edutechlearners.com 10
DESK TOP COMPUTER

 Processing & storage units, visual display &audio units,

keyboards
 Storage media-Hard disks, CD-ROMs
 Eg:
g Personal computers
p which is used in homes and
offices
 Advantage: Cost effective, easy to operate, suitable for
general purpose educational or business application
NOTEBOOK COMPUTER

 Compact form of personal computer (laptop)

 Advantage is portability

http://www.edutechlearners.com 11
WORK STATIONS
• More computational power than PC
•Costlier
•Used to solve complex problems which arises in
engineering application (graphics, CAD/CAM etc)

ENTERPRISE SYSTEM (MAINFRAME)

•More
M computational
t ti l power
•Larger storage capacity
•Used for business data pprocessing
g in large
g organization
g
•Commonly referred as servers or super computers

http://www.edutechlearners.com 12
SERVER SYSTEM

• Supports large volumes of data which frequently need to

be accessed or to be modified
•Supports request response operation

SUPER COMPUTERS

•Faster than mainframes

•Helps
H l iin calculating
l l i llarge scale l numerical
i l and d algorithm
l ih
calculation in short span of time
•Used for aircraft design
g and testing,
g, military
y application
pp
and weather forecasting
http://www.edutechlearners.com 13
HANDHELD
 Also called a PDA (Personal
Digital Assistant)
Assistant).
 A computer that fits into a
pocket, runs on batteries,
and is used while holding
the unit in your hand.
 Typically used as an
appointment book, address
book, calculator, and
notepad.
t d
 Can be synchronized with a
personal microcomputer as
a backup.
http://www.edutechlearners.com 14
B i T
Basic Terminology
i l
 Computer  Software
 A device that accepts input,  A computer program that tells
processes data, stores data, the computer how to perform
and produces output, all particular tasks.
according g to a series of stored
instructions.
 Network
 Two or more computers and
 Hardware other devices that are
 Includes the electronic and connected, for the purpose of
mechanical devices that sharing data and programs.
process the data; refers to the
computer
p as well as p
peripheral
p
devices.  P i h
Peripheral
l devices
d i
 Used to expand the
computer’s input, output and
storage
g capabilities.
p

http://www.edutechlearners.com 15
B i T
Basic Terminology
i l
 Input
 Whatever is put into a computer system
system.
 Data
 Refers to the symbols that represent facts, objects, or ideas.
 Information
 The results of the computer storing data as bits and bytes; the words,
numbers, sounds, and graphics.
 Output
 Consists of the processing results produced by a computer
computer.
 Processing
 Manipulation of the data in many ways.
 Memory
y
 Area of the computer that temporarily holds data waiting to be
processed, stored, or output.
 Storage
 Area of the computer that holds data on a permanent basis when it is not
immediately needed for processing.
http://www.edutechlearners.com 16
 Basic Terminology

•Assembly y language
g g program
p g ) – Programs
(ALP)
( g are
written using mnemonics

•Mnemonic – Instruction will be in the form of English like

form

•Assembler
A bl – is
i a software
ft which
hi h converts
t ALP tto MLL
(Machine Level Language)

•HLL (High Level Language) – Programs are written using

English like statements

•Compiler - Convert HLL to MLL, does this job by reading17

source program at once
 B i T
Basic Terminology
i l
•Interpreter
te p ete – Co
Converts
e ts HLL to MLL,, does this
t s job
statement by statement

•System software – Program routines which aid the

user in the execution of programs eg: Assemblers,
Compilers

•Operating system – Collection of routines

responsible
p for controlling
g and coordinating
g all the
activities in a computer system

http://www.edutechlearners.com 18
Functional Units
 IMPORTANT
SLIDE !
F
Function
ti
 ALL computer functions are:
 Data PROCESSING
 Data STORAGE Data = Information
 Data MOVEMENT
 CONTROL Coordinates How
Information is Used

 NOTHING ELSE!

http://www.edutechlearners.com 20
F
Functional
ti l Units
U it
Arithmetic
Input and
logic

Memory

Output Control

I/O Processor

System Interconnections

Figure 1.1. Basic functional units of a computer.

http://www.edutechlearners.com 21
 INPUT UNIT
• Computer accepts the coded information through input
unit.
• It has the capability
p y of reading
g the instruction & data to
be processed.
• Converts the external world data to a binary format,
which can be understood by CPU CPU.

• Eg: Keyboard
Keyboard, Mouse
Mouse, Joystick etc

http://www.edutechlearners.com 22
F
Functional
ti l Unit(I/O)
U it(I/O)
 A computer handles two types of information :
 Instruction :
 An instruction controls the transfer of information between a
computer and its I/O devices and also within the computer.
 A list of instructions that performs a task is called a
program, which is stored in the memory.
 To execute a program, computer fetches the instructions
one by one and specifies the arithmetic and logical
operations to be performed which are needed for the
desired program.
 A computer is completely controlled by the stored programs
except any external interrupts comes from any I/O device.

http://www.edutechlearners.com 23
F
Functional
ti l Unit(I/O)
U it(I/O)
 Data :
 Data is a kind of information which is used as an operand
for a program.
 S data
So, d t can be b any numberb or character.
h t
 Even, a list of instructions, means an entire program can be
data if it is processed by another high-level program.
 In such case, that data is called source program.
 The most well-known input device is the keyboard,
beside
bes de this,
s, there
eea are
e many
a yo other
e kinds
ds o
of input
pu
devices are available, i.e., mouses, joysticks etc.

http://www.edutechlearners.com 24
OUTPUT UNIT
• Converts the binary format data to a
format that a common man can
understand
• Displays the processed results.
• Eg: Monitor, Printer, LCD, LED etc

http://www.edutechlearners.com 25
MEMORY UNIT
 Composed of large array of bytes
bytes.
 Store programs and data .
 Parts of the memory subsystem
 Fetch/store controller
 Fetch: Retrieve a value from memory
 Store: Store a value into memory
 Memory address register (MAR)
 Memory data register (MDR)
 Memory cells withhttp://www.edutechlearners.com
decoder(s) to select individual 26
cells
T
Types off Memory
M Unit
U it
 Primary storage
 Fast and Direct Access
 Programs must be stored in memory while they
are being executed.
 Large number of semiconductor storage cells.
 RAM and d ROM
 Secondary storage
 used for bulk storage or mass storage
storage.
 Indirect Access and slow.
 Magnetic Harddisks
Harddisks,CDs.
CDs Etc
Etc.
http://www.edutechlearners.com 27
CACHE MEMORY
 Memory access is much slower than processing
time.
 Faster
F t memory isi too
t expensive
i tot use for
f allll
memory cells.
 Small size, fast memory just for values currently
in use speeds computing time.
 System Performance improved using this buffer
memory.

http://www.edutechlearners.com 28
Arithmetic and Logic Unit
(ALU)
 Most computer operations are executed in
ALU of the processor.
 L d th
Load the operands
d iinto
t memory – bring
b i ththem
to the processor – perform operation in ALU
– store the result back to memory or retain in
the processor.
 Registers
 Fast control of ALU

http://www.edutechlearners.com 29
Arithmetic and Logic Unit
(ALU)
 Actual computations are performed
 Primitive operation circuits
 Arithmetic (ADD)
 Comparison (CE)
 Logic (AND)
 Data inputs and results stored in registers
 Multiplexor
p selects desired output
p
http://www.edutechlearners.com 30
Arithmetic and Logic Unit
(
(continued)
ti d)

 ALU process
 Values for operations copied into ALU’s
ALU s input
register locations
 All circuits compute results for those inputs
 Multiplexor selects the one desired result from all
values
 Result value copied to desired result register

http://www.edutechlearners.com 31
Using a Multiplexor Circuit to Select the Proper ALU Result
http://www.edutechlearners.com 32
Th Control
The C t l Unit
U it
 Manages stored program execution.

 The timing signals that govern the I/O transfers are also
generated by
g y the control unit.

 Task

 Fetch from memory the next instruction to be

executed

 Decode it: Determine what is to be done

 Execute it: Issue appropriate command to ALU,

memory, and I/O controllers 33
http://www.edutechlearners.com
Overall operation of a
computer
t
 The total operation of the computer is
executed as
1
1. Computer accepts programs and data through
input unit.
2
2. Information is also fetched in the processor from
memory.
3. Then information is processed and the
operation is executed.

http://www.edutechlearners.com 34
Overall operation of a
computer
t
4
4. Processed information is passed from output
unit .
5. All these activities described above are
sequentially done under the control signal from
the control unit.

http://www.edutechlearners.com 35
COMPUTER ARCHITECTURE:Bus
Structures

 There are many ways to connect different

parts inside a computer together.
 A group off lines
li or wires
i th
thatt serves as a
connecting path for several devices is called
a bus.
bus
 Address/data/control

http://www.edutechlearners.com 36
 BUS STRUCTURE
g CPU and memory
Connecting y
The CPU and memory are normally connected by three
groups of connections, each called a bus: data bus, address
bus and control bus

Connecting CPU and memory using three buses

http://www.edutechlearners.com 37
INTERRUPT
 An interrupt is a request from I/O device for
service by processor
 Processor provides requested service by
executing interrupt service routine (ISR)
 Contents of PC, general registers, and some
control information are stored in memory .
 When ISR completed,
p p
processor restored, so
that interrupted program may continue

http://www.edutechlearners.com 38
REGISTER TRANSFER AND
MICROOPERATIONS
• Register Transfer Language

• Register Transfer

• Bus and Memory Transfers

• Arithmetic Micro-operations

• Logic Micro-operations

• Shift Micro-operations
Mi ti

• Arithmetic Logic Shift Unit

http://www.edutechlearners.com 39
SIMPLE DIGITAL SYSTEMS

 Combinational and sequential circuits can be

usedd tto create
t simple
i l didigital
it l systems.
t
 These are the low-level building blocks of a
di it l computer.
digital t
 Simple digital systems are frequently
characterized in terms of
 the registers they contain, and
 th operations
the ti that
th t they
th perform.
f

http://www.edutechlearners.com 40
MICROOPERATIONS (1)
 The operations on the data in registers are called micro-
operations.
 The functions built into registers are examples of micro-
operations
 Shift
 Load
 Clear
 Increment

http://www.edutechlearners.com 41
MICRO-OPERATION (2)
An elementary operation performed (during
one clock pulse), on the information stored
in one or more registers

Registers ALU
1 clock cycle
(R) (f)

R  f(R, R)

f: shift, load, clear, increment, add, subtract, complement,

and, or, xor, …
http://www.edutechlearners.com 42
ORGANIZATION OF A DIGITAL
SYSTEM
• Definition of the (internal) organization of a computer

- Set of registers and their functions

- Microoperations set

Set of allowable microoperations provided

by the organization of the computer

- Control signals that initiate the sequence of

microoperations (to perform the functions)

http://www.edutechlearners.com 43
REGISTER TRANSFER LEVEL

 Viewing a computer, or any digital system,

i thi
in this way iis called
ll d th
the register
i t ttransfer
f
level

 This is because we’re focusing on

 The
Th system’s
t ’ registers
i t
 The data transformations in them, and

 The data transfers between them.

http://www.edutechlearners.com 44
REGISTER TRANSFER LANGUAGE

 Rather than specifying a digital system in words, a specific notation

is used
used, register transfer language

 For any function of the computer, the register transfer language

can be used to describe the (sequence of) microoperations

 Register transfer language

 A symbolic
b li llanguage
 A convenient tool for describing the internal organization of digital computers
 Can also be used to facilitate the design process of digital systems.

http://www.edutechlearners.com 45
DESIGNATION OF REGISTERS

 Registers are designated by capital letters, sometimes followed by

numbers (e
(e.g.,
g A A, R13
R13, IR)
 Often the names indicate function:
 MAR - memory address register
 PC - program counter
 IR- instruction register

 Registers
g and their contents can be viewed and represented
p in
various ways
 A register can be viewed as a single entity:
MAR

 Registers may also be represented showing the bits of data they contain

http://www.edutechlearners.com 46
DESIGNATION OF REGISTERS
• Designation of a register
- a register
- portion of a register
- a bit of a register

• Common ways of drawing the block diagram of a register

Register Showing individual bits

R1 7 6 5 4 3 2 1 0
15 0 15 8 7 0
R2 PC(H) PC(L)
Numbering of bits Subfields

http://www.edutechlearners.com 47
REGISTER TRANSFER
 Copying the contents of one register to another is a register
transfer
 A register transfer is indicated as
R2  R1
 In this case the contents of register R1 are
copied (loaded) into register R2
 A simultaneous transfer of all bits from the
source R1 to the destination register
R2,, during
g one clock pulse
p
 Note that this is a non-destructive; i.e. the
contents of R1 are not altered by copying
(loading) them to R2
48
REGISTER TRANSFER
 A register transfer such as

R3  R5

Implies that the digital system has

 the data lines from the source register (R5) to the

destination register
g ((R3))
 Parallel load in the destination register (R3)
 Control lines to perform the action
http://www.edutechlearners.com 49
CONTROL FUNCTIONS
 Often actions need to only occur if a certain condition is true
 This is similar to an “if” statement in a programming language
 In digital ssystems,
stems this is often done via
ia a control signal
signal, called a
control function
 If the signal is 1, the action takes place
 This is represented as:

P: R2  R1

Which means “ifif P = 1,

1 then load the contents of
register R1 into register R2”, i.e., if (P = 1) then
(R2  R1)
http://www.edutechlearners.com 50
HARDWARE IMPLEMENTATION
OF CONTROLLED TRANSFERS
Implementation of controlled transfer
P: R2 R1

Block diagram Control P Load

R2 Clock
Circuit
n
R1

Timing diagram t t+1

Clock

Load
T
Transfer
f occurs here
h

• The same clock controls the circuits that generate the control function
and the destination register
• Registers are assumed to use positive-edge-triggered flip-flops
http://www.edutechlearners.com 51
SIMULTANEOUS OPERATIONS
 If two or more operations are to occur simultaneously,
they are separated with commas

P: R3  R5, MAR  IR

 Here, if the control function P = 1, load the contents of

R5 into R3, and at the same time (clock), load the
contents off register IR into register MAR

http://www.edutechlearners.com 52
BASIC SYMBOLS FOR REGISTER
TRANSFERS

Symbols Description Examples

Capital letters Denotes a register MAR, R2
& numerals
Parentheses () Denotes a part of a register R2(0-7), R2(L)
A
Arrow  D
Denotes
t transfer
t f off information
i f ti R2  R1
Colon : Denotes termination of control function P:
Comma , Separates two micro-operations A  B, B  A

http://www.edutechlearners.com 53
CONNECTING REGISTERS
 In a digital system with many registers, it is impractical to have
data and control lines to directly allow each register to be
loaded with the contents of every possible other registers

 To completely connect n registers  n(n-1) lines

 O(n2) cost
 This is not a realistic approach to use in a large digital system

 Instead, take a different approach

Instead
 Have one centralized set of circuits for data transfer – the bus
 Have control circuits to select which register is the source, and
which
hi h is
i the
th d
destination
ti ti

http://www.edutechlearners.com 54
BUS AND BUS TRANSFER
Bus is a path(of a group of wires) over which information is
transferred, from any of several sources to any of several destinations.
From a register to bus: BUS  R
Register A Register B Register C Register D

Bus lines

Register
g A Register
g B Register
g C Register
g D
1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4

B1 C1 D 1 B2 C2 D 2 B3 C3 D 3 B4 C4 D 4

0 0 0 0
4 x1 4 x1 4 x1 4 x1
MUX MUX MUX MUX

x
select
y

4-line bus 55
TRANSFER FROM BUS TO A DESTINATION
Bus lines
REGISTER
Load
Reg. R0 Reg. R1 Reg. R2 Reg. R3

D 0 D1 D2 D 3
z E (enable)
Select 2x4
w
Decoder

Three-State Bus Buffers

Normal input A Output Y=A if C=1
High-impedence if C=0
Control input C

Bus line with three-state buffers

Bus line for bit 0
A0
B0
C0
D0

S0 0
Select 1
S1 2
Enable 3 56
BUS TRANSFER IN RTL

 Depending on whether the bus is to be mentioned explicitly or

not,, register
g transfer can be indicated as either

R2 R1
or

BUS R1, R2  BUS

 In the former case the bus is implicit, but in the latter, it is
explicitly
li itl iindicated
di t d

http://www.edutechlearners.com 57
MEMORY (RAM)
 Memory (RAM) can be thought as a sequential circuits
containing some number of registers
 These registers
g hold the words of memory y
 Each of the r registers is indicated by an address
 These addresses range from 0 to r-1
 Each register (word) can hold n bits of data
 Assume the RAM contains r = 2k words. It needs the following
 n data input lines
 n data output lines data input lines
 k address lines
n
 A Read control line
 A Write control line address lines
k
RAM
Read
unit
Write
n

http://www.edutechlearners.com data output lines

58
MEMORY TRANSFER
 Collectively, the memory is viewed at the register level as a
device, M.
 Since it contains multiple
p locations,, we must specify
p y which
address in memory we will be using
 This is done by indexing memory references

 Memory is usually accessed in computer systems by putting

the desired address in a special register, the Memory Address
Register (MAR,
(MAR or AR)
 When memory is accessed, the contents of the MAR get sent
to the memory unit’s address lines
M
Memory Read
AR
unit Write

Data out Data in

http://www.edutechlearners.com 59
MEMORY READ
 To read a value from a location in memory and load it into a
register, the register transfer language notation looks like this:

R1  M[MAR]
 This causes the following to occur
 The contents
Th t t off the
th MAR gett sentt to
t the
th memory address
dd lines
li
 A Read (= 1) gets sent to the memory unit
 The contents of the specified address are put on the memory’s output data
lines
 These get sent over the bus to be loaded into register R1

http://www.edutechlearners.com 60
 MEMORY WRITE
 To write a value from a register to a location in memory looks
like this in register transfer language:

M[MAR]  R1

 This causes the following to occur

 The contents
Th t t off the
th MAR gett sentt to
t the
th memory address
dd lines
li
 A Write (= 1) gets sent to the memory unit
 The values in register R1 get sent over the bus to the data input lines of
the memoryy
 The values get loaded into the specified address in the memory

http://www.edutechlearners.com 61
SUMMARY OF R. TRANSFER MICROOPERATIONS

A B Transfer content of reg. B into reg. A

AR DR(AD)
( ) Transfer content of AD p
portion of reg.
g DR into reg.
g AR
A  constantTransfer a binary constant into reg. A
ABUS  R1, Transfer content of R1 into bus A and, at the same time,
R2 ABUS ttransfer
f content
t t off bus
b A into
i t R2
AR Address register
DR Data register
M[R] Memory word specified by reg
reg. R
M Equivalent to M[AR]
DR  M Memory read operation: transfers content of
memory word specified by AR into DR
M  DR Memory write operation: transfers content of
DR into memory word specified by AR

http://www.edutechlearners.com 62
MICROOPERATIONS

• Computer
p system
y microoperations
p are of four types:
yp

- Register transfer microoperations

- Arithmetic microoperations
- Logic microoperations
- Shift microoperations

http://www.edutechlearners.com 63
ARITHMETIC MICROOPERATIONS
 The basic arithmetic micro-operations are
 Addition
 Subtraction
 Increment
 Decrement

 The additional arithmetic micro-operations are

 Add with carry
 S bt t with
Subtract ith borrow
b
 Transfer/Load
 etc. …

Summary of Typical Arithmetic Micro-Operations

R3  R1 + R2 Contents of R1 plus R2 transferred to R3
R3  R1 - R2 Contents of R1 minus R2 transferred to R3
R2  R2’ Complement the contents of R2
R2  R2’+ 1 2's complement the contents of R2 (negate)
R3  R1 + R2’+ 1 subtraction
R1  R1 + 1 Increment
R1  R1 - 1 Decrement 64
BINARY ADDER / SUBTRACTOR / INCREMENTER
B3 A3 B2 A2 B1 A1 B0 A0

Binary Adder
FA C3 FA C2 FA C1 FA C0

C4 S3 S2 S1 S0

Binary Adder-Subtractor
B3 A3 B2 A2 B1 A1 B0 A0

FA C3 FA C2 FA C1 FA C0

C4 S3 S2 S1 S0

Binary
y Incrementer A3 A2 A1 A0 1

x y x y x y x y
HA HA HA HA
C S C S C S C S

C4 S3 S2 S1 S0 65
ARITHMETIC CIRCUIT
Cin
S1
S0
A0 X0 C0
S1 D0
B0
S0
0 Y0 FAC1
1
2
4x1
MUX
3
A1 X1 C1
S1 D1
B1
S0
Y1 FAC2
0
1
2
4x1
MUX
3
A2 X2 C2
S1 D2
Y2 FA
S0
B2 0 C3
1
2
4x1
MUX
3
A3 X3 C3
S1 D3
Y3 FA
S0
B3 0 C4
1
2 4 1
4x1
MUX
3 Cout
0 1

S1 S0 Cin Y Output Microoperation

0 0 0 B D=A+B Add
0 0 1 B D=A+B+1 Add with carry
0 1 0 B’ D = A + B’ Subtract with borrow
0 1 1 B’ D = A + B’+ 1 Subtract
1 0 0 0 D=A Transfer A
1 0 1 0 D=A+1 Increment A
1 1 0 1 D=A-1 Decrement A
66
1 1 1 1 D=A Transfer A
LOGIC MICROOPERATIONS
 Specify binary operations on the strings of bits in registers
 Logic microoperations are bit-wise operations, i.e., they work on the individual
bits of data
 useful for bit manipulations on binary data
 useful for making logical decisions based on the bit value
 There are, in principle, 16 different logic functions that can be
d fi d over ttwo bi
defined binary iinputt variables
i bl
A B F0 F1 F2 … F13 F14 F15
0 0 0 0 0 … 1 1 1
0 1 0 0 0 … 1 1 1
1 0 0 0 1 … 0 1 1
1 1 0 1 0 … 1 0 1

 However, most systems only implement four of these

 AND (), OR (), XOR (), Complement/NOT
 The others can be created from combination of these
http://www.edutechlearners.com 67
LIST OF LOGIC MICROOPERATIONS
• List of Logic Microoperations
- 16 different logic operations with 2 binary vars.
n
- n binary vars → 2 2 functions

• Truth tables for 16 functions of 2 variables and the

corresponding 16 logic micro-operations
x 0011 Boolean Micro-
Name
y 0101 F
Function
ti Operations
0000 F0 = 0 F0 Clear
0001 F1 = xy FAB AND
0010 F2 = xy' F  A  B’
0011 F3 = x FA Transfer A
0100 F4 = x'y F  A’ B
0101 F5 = y FB Transfer B
0110 F6 = x  y FAB Exclusive-OR
0111 F7 = x + y FAB OR
1000 F8 = (x + y)
y)' F  A  B)
B)’ NOR
1001 F9 = (x  y)' F  (A  B)’ Exclusive-NOR
1010 F10 = y' F  B’ Complement B
1011 F11 = x + y' FAB
1100 F12 = x' F  A’ Complement A
1101 F13 = x' + y F  A’ B
1110 F14 = (xy)' F  (A  B)’ NAND
1111 F15 = 1 F  all 1's Set to all 1's 68
HARDWARE IMPLEMENTATION OF LOGIC
MICRO-OPERATIONS
C OO O S
Ai
0
Bi

1
4X1 Fi
MUX
2

3 Select

S1
S0

Function table
S1 S0 Output -operation
0 0 F=AB AND
0 1 F = AB OR
1 0 F=AB XOR
1 1 F = A’ Complement

http://www.edutechlearners.com 69
APPLICATIONS OF LOGIC
MICROOPERATIONS
 Logic micro-operations can be used to manipulate individual
bits or a portions of a word in a register
 Consider the data in a register A. In another register, B, is bit
data that will be used to modify the contents of A
 Selective set
Selective-set AA+B
 Selective-complement AAB
 Selective-clear
Selective clear AA•B B’
 Mask (Delete) AA•B
 Clear AAB
 Insert A  (A • B) + C
 Compare
p AAB
 …. http://www.edutechlearners.com 70
SELECTIVE SET

 IIn a selective
l ti sett operation,
ti th
the bit pattern
tt in
i B is
i used
d tto sett
certain bits in A

1 1 0 0 At
1010 B
1 1 1 0 At+1 (A  A + B)

 If a bit in B is set to 1, that same position in A gets set to 1,

otherwise that bit in A keeps its previous value

http://www.edutechlearners.com 71
SELECTIVE COMPLEMENT

 IIn a selective
l ti complement
l t operation,
ti th
the bit pattern
tt in
i B is
i used
d
to complement certain bits in A

1 1 0 0 At
1010 B

0 1 1 0 At+1 (A  A  B)

 If a bit in B is set to 1, that same position in A gets complemented

from its original value
value, otherwise it is unchanged

http://www.edutechlearners.com 72
SELECTIVE CLEAR

 IIn a selective
l ti clearl operation,
ti th
the bit pattern
tt iin B iis used
d tto clear
l
certain bits in A

1 1 0 0 At
1010 B

0 1 0 0 At+1 (A  A  B
B’))

 If a bit in B is set to 1, that same position in A gets set to 0,

otherwise it is unchanged

http://www.edutechlearners.com 73
MASK OPERATION

 IIn a maskk operation,

ti th
the bit pattern
tt in
i B is
i used
d to
t clear
l certain
t i
bits in A

1 1 0 0 At
1010 B

1 0 0 0 At+1 (A  A  B)

 If a bit in B is set to 0, that same position in A gets set to 0,

otherwise it is unchanged

http://www.edutechlearners.com 74
CLEAR OPERATION

 IIn a clear
l operation,
ti if the
th bit
bits in
i the
th same position
iti ini A and
d B are
the same, they are cleared in A, otherwise they are set in A

1 1 0 0 At
1010 B

0 1 1 0 At+1 (A  A  B)

http://www.edutechlearners.com 75
INSERT OPERATION
 An insert operation is used to introduce a specific bit pattern
into A register, leaving the other bit positions unchanged
 This is done as
 A mask operation to clear the desired bit positions, followed by
 An OR operation to introduce the new bits into the desired positions
 Example
p
 Suppose you wanted to introduce 1010 into the low order four bits
of A: 1101 1000 1011 0001 A (Original)
1101 1000 1011 1010 A (Desired)

 1101 1000 1011 0001 A (Original)

1111 1111 1111 0000 Mask
1101 1000 1011 0000 A (Intermediate)
0000 0000 0000 1010 Added bits
1101 1000 1011 1010 A (Desired)

76
LOGICAL SHIFT
 In a logical shift the serial input to the shift is a 0.

 A right
g logical
g shift operation:
p
0

 A left logical shift operation:

0

 In a Register
g Transfer Language,
g g , the following
g notation is used
 shl for a logical shift left
 shr for a logical shift right
 Examples:
 R2  shr R2

 R3  shl R3
http://www.edutechlearners.com 77
CIRCULAR SHIFT
 IIn a circular
i l shift
hift th
the serial
i l iinputt iis th
the bit th
thatt is
i shifted
hift d outt off
the other end of the register.

 A right circular shift operation:

 A left circular shift operation:

 In a RTL, the following notation is used

 cil for a circular shift left
 cirfor a circular shift right
 Examples:
 R2  cir R2
 R3  cil R3

http://www.edutechlearners.com 78
Logical versus Arithmetic Shift

 A logical shift fills the newly created bit

position with zero:
0
CF

• An arithmetic shift fills the newly created bit

position with a copy of the number’s sign bit:

CF

http://www.edutechlearners.com 79
ARITHMETIC SHIFT
• In a RTL, the following notation is used
– ashl for an arithmetic shift left
– ashr for an arithmetic shift right
– Examples:
» R2  ashr R2
» R3  ashl R3

http://www.edutechlearners.com 80
HARDWARE IMPLEMENTATION
OF SHIFT MICROOPERATIONS
Serial Select
input (IR) 0 for shift right (down)
1 for shift left (up)

S
MUX H0
0
1
A0

A1 S
MUX H1
0
A2 1

A3
S
MUX H2
0
1

S
MUX H3
0
1

Serial
input (IL)

http://www.edutechlearners.com 81
ARITHMETIC LOGIC SHIFT UNIT
S3
S2 Ci
S1
S0

Arithmetic Di
Circuit
Select

Ci+1
0 4x1 Fi
1 MUX
2
3
Ei
Logic
Bi
Ai
Circuit
Ai-1 shr
A i+1 shl

S3 S2 S1 S0 Cin Operation Function

0 0 0 0 0 F=A Transfer A
0 0 0 0 1 F=A+1 Increment A
0 0 0 1 0 F=A+B Addition
0 0 0 1 1 F=A+B+1 Add with carry
0 0 1 0 0 F=A+B B’ Subtract with borrow
0 0 1 0 1 F = A + B’+ 1 Subtraction
0 0 1 1 0 F=A-1 Decrement A
0 0 1 1 1 F=A TransferA
0 1 0 0 X F=AB AND
0 1 0 1 X F = A B OR
0 1 1 0 X F=AB XOR
0 1 1 1 X F = A’ Complement A
1 0 X X X F = shr A Shift right A into F
1 1 X X X F = shl A Shift left A into F 82
I f
Information
ti Representation
R t ti
 How is “information”
information represented in a computer
system ?
 What are the different types of information
 Text
 Numbers
 Images
 Video
 Photographic
 Audio

http://www.edutechlearners.com 83
Everything is in Binary !
(1’s and 0’s)
 Computers
p are digital
g devices - theyy can onlyy
manipulate information in digital (binary) form.
 Easy to represent 1 and 0 in electronic, magnetic and
optical devices
 Only need two states
 High/low
 On/off
 Up/down
 etc
 All information in a computer system is
 Processed in binary form
 Stored in binary form
 Transmitted in binary form

http://www.edutechlearners.com 84
How is information converted
t Binary
to Bi form
f
 I/O and Storage Devices are digital
 I/O devices convert information to/from binary
 A keyboard converts the character “A”A you type
into a binary code to represent “A”
 E.g. “A” is represented by the binary code
01000001
 Monitor converts 01000001 to the “A” that you
read

http://www.edutechlearners.com 85
Bits and Bytes
 One binary digit i.e. 1 or 0 is called a bit
 A group of 8 bits is one byte
 Byte is the unit of storage measurement

Number of Bytes Unit

1024 bytes (210 bytes) 1 Kilobyte (Kb)
1024 Kb (220 bytes) 1 Megabyte (Mb)
1024 Mb ((230 bytes)
y ) 1 Gigabyte
g y ((Gb))
1024 Gb (240 bytes) 1 Terabyte (Tb)
1024 Tb (250 bytes) 1 Petabyte (Pb)
http://www.edutechlearners.com 86
Representing Text-
Te t ASCII Code
 Textual information is made up of individual
characters e.g.
 Letters:
 Lowercase: a,b,c,..z
 Uppercase: A,B,C..Z
 Digits: 0,1,2,..9
 Punctuation characters: .,, :,, ; ,, “,, ’
 Other symbols: -, +, &, %, #, /,\,£, etc.).

http://www.edutechlearners.com 87
R
Representing
ti T Text-
t ASCII Code
C d
 Each character is represented by a unique binary code.
 ASCII iis one iinternational
t ti l standard
t d d th thatt specifies
ifi the
th
binary code for each character.
 American Standard Code for Information Interchange g
 It is a 7-bit code - every character is represented by 7 bits
 There are other standards such as EBCDIC but these are
not widely used.
 ASCII is being superceded by Unicode of which ASCII is
a subset.
subset Unicode is a 16 16-bit
bit code.
code

http://www.edutechlearners.com 88
Sample
p ASCII Codes
Char ASCII Decimal Char ASCII Decimal

NUL 000 0000 00 BEL 000 0111 07

LF 000 1010 10 CR 000 1011 13
0 011 0000 48 SP 010 0000 20
1 011 0001 49 ! 010 0001 21
2 011 0010 50 “ 010 0010 22

9 011 1001 57
A 100 0001 65 a 110 0001 97
B 100 0010 66 b 110 0010 98
C 100 0011 67 c 110 0011 99
Y 101 1001 89 y 111 1001 121

Z 101 1010 90 z 111 1010 122

http://www.edutechlearners.com 89
 Comments on ASCII Codes
 Codes for A to Z and a to z form collating sequences
 A is 65, B is 66, C is 67 and so on
 A is 97,
97 b is 98,
98 c is 99 and so on
 Lowercase code is 32 greater than Uppercase equivalent
 Note that digit ‘0’
0 is not the same as number 0
 ASCII is used for characters
 Not used to represent numbers (See later)
 C d 0 to
Codes t 30 are typically
t i ll ffor Control
C t l Characters
Ch t
 Bel - causes speaker to beep !
 Carriage
g Return ((CR);
) LineFeed ((LF))
 Others used to control communication between devices
 SYN, ACK, NAK, DLE etc

http://www.edutechlearners.com 90
Review
 All information stored/transmitted in binary
 Devices convert to/from binary to other forms
that humans understand
 Bits and Bytes
 KB, Mb, GB, TB and PB are storage metrics
 ASCII code is a 7-bit code to represent text
characters
h t
 Text “numbers” not the same as “math's”
numbers
 Do not add phone numbers or get average of PPS numbers

http://www.edutechlearners.com 91
Representing Numbers: Integers

 Humans use Decimal Number System

 Computers use Binary Number System
 Important to understand Decimal system before looking at binary
system
 Decimal Numbers - Base 10
 10 digits: 0, 1, 2, 3, 4, 5, 6, 7, 8, 9
 Positional number system: the position of a digit in a number
determines its value
 Take the number 1649
 The 1 is worth 1000
 The 9 is worth 9 units

 Formally, the digits in a decimal number are weighted by increasing

powers of 10 i.e. they use the base 10. We can write 1649 in the
following form:
 1 103 + 6
1*10 102 + 4
6*10 101 + 9
4*10 100
9*10
http://www.edutechlearners.com 92
Representing Numbers: Integers

 weighting: 103 102 101 100

 Digits 1 6 4 9
 1649 = 1*103 + 6*102 + 4*101 + 9*100

 Least Significant Digit: rightmost one - 9 above

 Lowest power of 10 weighting
 Digits on the right hand side are called the low-order digits (lower
powers of 10).

 Most Significant Digit: leftmost one - 1 above

 Highest power of 10 weighting
 The digits on the left hand side are called the high order digits (higher
high-order
powers of 10)

http://www.edutechlearners.com 93
Representing Numbers: Decimal Numbers

 Largest n-digit number ?

 Made up of n consecutive 9’s (= 10n -1 )
 Largest 4-digit number if 9999
 9999 is 104 -1

 Distinguishing Decimal from other number systems such as Binary,

Hexadecimal (base 16) and Octal (base 8)

 How do we know whether the number 111 is decimal or binary

 One convention is to use subscripts

 Decimal: 11110 Binary:1112 Hex: 11116 Octal: 1118
 Difficult to write use keyboard

 Another convention is to append a letter (D, B, H, O)

 Decimal: 111D Binary:111B Hex: 111H Octal: 111O

http://www.edutechlearners.com 94
 Representing Numbers: Binary Numbers
 Binary numbers are Base 2 numbers
 Only 2 digits: 0 and 1
 Formally, the digits in a binary number are weighted by increasing powers
Formally
of 2

 They operate as decimal numbers do in all other respects

 Consider the binary number 0101 1100

 Weight
W i h 27 26 25 24 23 22 21 20
 bits 0 1 0 1 1 1 0 0

 01011100 = 0*27 + 1*26 + 0*25 + 1*24 + 1*23 + 1*22 + 0*21 + 0*20

= 0 + 6410 + 0 + 1610 + 810 + 410 + 0 + 0
= 9210

http://www.edutechlearners.com 95
Representing Numbers: Binary Numbers

 Leftmost bit is the most significant

g bit ((MSB).
)
 The leftmost bits in a binary number are referred to as the
high-order bits.

 Rightmost bit is the least significant bit (LSB).

 The rightmost
g bits in a binaryy number are referred to as the
low-order bits.
 Largest n-bit binary number ?
 ( 2n -1)
Made up of n consecutive 11’ss (= 1)
 e.g. largest 4-bit number: 1111 = 24 -1 = 15

http://www.edutechlearners.com 96
 Representing Numbers: Binary Numbers

 Exercises

 Convert the following binary numbers to decimal:

 ( ) 1000 1000
(i) ( ) 1000 1001
(ii) ( ) 1000 0111
(iii)
 (iv) 0100 0001 (v) 0111 1111 (vi) 0110 0001

 Joe Carty Formatting Convention

 In these notes we insert a space after every 4 bits to make the numbers
easier to read

http://www.edutechlearners.com 97
 Representing Numbers: Converting Decimal to
Binary
 To convert from one number base to another:
 you repeatedly divide the number to be converted by the new base
 the remainder of the division at each stage
g becomes a digit
g in the new base
 until the result of the division is 0.

 Example:
p To convert decimal 35 to binaryy we do the following:
g

 Remainder
 35 / 2 1
 17 / 2 1
 8/2 0
 4/2 0
 2/2 0
 1/2 1
 0
 The result is read upwards giving 3510 = 1000112.

http://www.edutechlearners.com 98
 Representing Numbers: Converting Decimal to
Binary
 Exercise: Convert the following decimal numbers to binary

 (1) 64(2) 65 (3) 32 (4) 16 (5) 48

 Shortcuts
 To convert anyy decimal number which is a ppower of 2,, to binary, y,
simply write 1 followed by the number of zeros given by the power of 2.
 For example,
5
32 is 2 , so we write it as 1 followed by 5 zeros, i.e. 10000;
128 is 27 so we write it as 1 followed by 7 zeros, zeros i.e.
i e 100 0000.
0000

 Remember that the largest binary number that can be stored in a given number of bits
is
made up of n 11’ss.
 An easy way to convert this to decimal, is to note that this is 2n - 1.
 For example, if we are using 4-bit numbers, the largest value we can represent
is 1111 which is 24-1, i.e. 15

http://www.edutechlearners.com 99
 Representing Numbers: Converting Decimal to
Binary
 Binary Numbers that you should remember because they
occur so frequently

Binary Decimal

111 7

1111 15

0111 1111 127

1111 1111 255

http://www.edutechlearners.com 100
INSTRUCTION FORMAT
&
INSRUCTION TYPES

1
 Instruction Formats
• Bits of the instruction are divided in to fields..
• Most common fields are:
OOPERATION ON CODE
CO FIELD tthatat specifies
spec es the t e
operation to be performed.
 ADDRESS FIELD that designates g a memoryy
address or a processor register.
 MODE FIELD that specifies the way the
operand or effective address is determined. Or we
can say it tells about addressing mode to be
adopted.
d d
http://www.edutechlearners.com 2
 REGISTER ADDRESS
• Operands are generally stored in Memory or Processor
registers.
• Operands residing in memory are specified by their
memory address.
address
• Operands residing in processor registers are specified by
their register address.
• A register address is a binary number of k bits which
defines one of the 2^k registers in the CPU.
• For
F eg. CPU having
h i 16 processor registers
i R0 to R15 will
ill
have a address field of 4 bits.
• As binary no. 0101 will designate R5.
http://www.edutechlearners.com 3
 Instruction Formats
• Most systems today are GPR systems.
• There are three types:
– Memory-memory where two or three operands may be in
memory.
memory
– Register-memory where at least one operand must be in a
register.
– Load-store where no operands may be in memory.
• The number of operands and the number of
available registers has a direct affect on instruction
length.

http://www.edutechlearners.com 4
 Instruction Formats
• The next consideration for architecture design
concerns how
h th
the CPU will
ill store
t d
data
t .
• As the no. of address fields in the instruction format
depends on internal organization or architecture of its
registers.
• We have three choices of CPU organizations
1. A stack architecture
2. An accumulator architecture
3. A general purpose register architecture.
• In choosing one over the other, the tradeoffs are
simplicity (and cost) of hardware design with execution
speed and ease of use.http://www.edutechlearners.com 5
 Instruction Formats
• In a stack architecture, instructions and operands
are implicitly taken from the stack.
– A stack cannot be accessed randomly.
• In an accumulator architecture,
architecture one operand of a
binary operation is implicitly in the accumulator.
– Both operand is in memory, creating lots of bus traffic.
• In a general purpose register (GPR)
architecture, registers can be used instead of
memory.
memory
– Faster than accumulator architecture.
– Efficient implementation for compilers.
– Results in longer instructions.
http://www.edutechlearners.com 6
 STACK ARCHITECTURE
• Stack machines use one - and zero-operand
instructions.
• LOAD and STORE instructions require a single
memory address operand
operand.
• Other instructions use operands from the stack
implicitly.
• PUSH and POP operations involve only the stack’s
top element.
• Binary instructions (e
(e.g.,
g ADD,
ADD MULT) use the top
two items on the stack.

http://www.edutechlearners.com 7
 STACK ARCHITECTURE
• Stack architectures require us to think about
arithmetic expressions a little differently.
• We are accustomed to writing expressions using
i fi notation,
infix t ti such
h as: Z = X + Y.
Y
• Stack arithmetic requires that we use postfix
notation:
t ti Z = XY+.
XY
• Eg. PUSH X
PUSH Y
ADD

http://www.edutechlearners.com 8
ACCUMULATOR ARCHITECTURE

• All operations will be performed using an

accumulator register.
g
• It only requires one address field.
• Eg.
Eg ADD X
where X is the address of operand and adding
will
ill be
b held
h ld like
lik AC+M[X]
AC M[X] goes to AC
where AC is accumulator register.

http://www.edutechlearners.com 9
 GENERAL REGISTER
ARCHITECTURE
• General processor registers and memory
word will be used here for storage of
operands.
operands
• It needs two to three address fields
• Eg:
E ADD R1, R1 R2,
R2 R3
ADD R1, R2
MOV R1, R2
ADD R1,
R1 X
http://www.edutechlearners.com 10
 TYPES OF ADDRESS
INSTRUCTIONS

• THREE ADDRESS INSTRUCTIONS

• TWO ADDRESS INSTRUCTIONS
• ONE ADDRESS INSTRUCTIONS
• ZERO ADDRESS INSTRUCTIONS
• RISC INSTRUCTIONS

http://www.edutechlearners.com 11
 Example to explain different address
instructions

• For example,
p , the infix expression,
p ,
Z = (X  Y) + (W  U)
Where X,Y,W and U are the
memory addresses where
the operands are stored.

http://www.edutechlearners.com 12
THREE ADDRESS INSTRUCTION
• With a three-address ISA, (e.g.,mainframes),
the infix expression,
Z = X  Y + W  U
might
i ht llook
k lik
like thi
this:
MUL R1,X,Y
MUL R2,W,U
ADD Z,R1,R2

http://www.edutechlearners.com 13
TWO ADDRESS INSTRUCTION
• In a two-address ISA, (e.g.,Intel, Motorola), the
infix expression,
Z = X  Y + W  U
might
i ht llook
k lik
like thi
this:
MOV R1,X
MUL R1,Y
MOV R2,W
MUL R2,U
ADD R1,R2
MOV Z,R1

http://www.edutechlearners.com 14
ONE ADDRESS INSTRUCTION
• In a one-address ISA, the infix expression,
Z = X  Y + W  U
looks like this:
LOAD X
MUL Y
STORE TEMP
LOAD W
MUL U
ADD TEMP
STORE Z
Accumulator will be used here.

http://www.edutechlearners.com 15
ZERO ADDRESS INSTRUCTION
• In a stack ISA, the postfix expression,
Z = X Y  W U  +
might look like this:
PUSH X
PUSH Y
U
MUL
PUSH W
Note: The result of
PUSH U
MUL a binary operation
ADD is implicitly stored
PUSH Z on the top of the
stack!

http://www.edutechlearners.com 16
 RISC INSTRUCTION
• With a RISC (Reduced Instruction set computer)
the infix expression,
Z = X  Y + W  U
might
i ht llook
k lik
like thi
this:
LOAD R1,X
LOAD R2,Y
,
LOAD R3,W
LOAD R4,U
MUL R1
R1,R1,R2
R1 R2 Contains less no
no. of
MUL R3,R3,R4 instructions.
ADD R1,R1,R3
STORE ZZ,R1
R1
http://www.edutechlearners.com 17
 Instruction Formats
• We have seen how instruction length is affected
by the number of operands supported by the ISA.
• In any instruction set, not all instructions require
th same number
the b off operands.d
• Operations that require no operands, such as
HALT, necessarily waste some space when fixed-
length instructions are used.

• This is all about INSTRUCTION FORMAT.

http://www.edutechlearners.com 18
 Instruction types
yp
Instructions fall into several broad categories
that you should be familiar with:
• Data Transfer Instructions
• Data
D t MManipulation
i l ti IInstructions
t ti
 Arithmetic
 Logical
g
 Shift
• Program Control Instructions

http://www.edutechlearners.com 19
 Data Transfer Instructions

Name Mnemonic
Load LD
Store ST
Move MOV
Exchange XCH
Input IN
Output OUT
Push PUSH
Pop POP

http://www.edutechlearners.com 20
Data Manipulation Instructions
Arithmetic Instructions:
Name Mnemonics
Increment INC
Decrement DEC
Add ADD
Subtract SUB
Multiply MUL
Divide DIV
Add with Carry ADDC
Subtract with borrow SUBB
Negate(2’ss compliment)
Negate(2 NEG

http://www.edutechlearners.com 21
Data Manipulation Instructions
Logical and Bit manipulation Instructions:
Name Mnemonics
Clear CLR
Compliment COM
AND AND
OR OR
EXOR XOR
Clear carryy CLRC
Set carry SETC
Compliment carry COMPC
Enable and Disable Interrupt EI & DI

http://www.edutechlearners.com 22
Data Manipulation Instructions
Shift Instructions:
Name Mnemonics
Logical shift Right SHR
Logical shift Left SHL
Arithmetic Shift Right SHRA
Arithmetic Shift Left SHLA
Rotate Right ROR
Rotate Left ROL
Rotate Right with carry RORC
Rotate Left with carry ROLC

http://www.edutechlearners.com 23
Program Control Instructions

Name Mnemonics
Branch BR
Jump JMP
Skip SKP
Call CALL
Return RET
Compare(by subtraction) CMP
Test(by
( y ANDing)
g) TST

http://www.edutechlearners.com 24
Program Control Instructions (Conditional
B
Branchh IInstructions)
t ti )

Name Mnemonics Tested Conditions

Branch if zero BZ Z=1
Branch if not zero BNZ Z=00
Z
Branch if carry BC C=1
Branch if not carry BNC C=0
Branch if overflow OR BV or BNV V=1 OR 0
not overflow
Branch if greater than BGT A>B
Branch if less than BLT A<B
Branch if equal BE A=B
Branch if not equal
q BNE A not equal
q to B
Branch if higher BHI A>B
25
Branch if lower BLO A<B
 Addressing
g Modes
• An architecture addressing mode is the set of
syntaxes
y and methods that instructions use to specify
p y
a memory address
– For operands or results
– As a target address for a branch instruction
• When a microprocessor accesses memory, to either
read or write data, it must specify the memory
address it needs to access
• Several addressing modes to generate this address
are known, a microprocessor instruction set
architecture mayy contain some or all of those modes,,
depending on its design
• In the following examples we will use the LDAC
instruction (loads data from a memory location into
the AC - accumulator - microprocessor register)
http://www.edutechlearners.com 26
 Types
yp of Addressing
g Modes
• Direct Mode
• Indirect Mode
• Register Direct Mode
• R i t Indirect
Register I di t Mode
M d
• Immediate Mode
• Implicit Addressing Mode
• Displacement Addressing Mode
• Relative Addressing Mode
• Indexed Addressing Mode
• Base Addressing Mode
27
• Auto Increment and Auto Decrement Mode
 Direct mode
Memory

Instruction

Op-code Address A

Operand

• IInstruction
t ti includes
i l d the th A memory address
dd
• LDAC 5 – accesses memory location 5, reads the data (10)
aandd stores
sto es tthee data in tthee microprocessor’s
c op ocesso s accu
accumulator
u ato
• This mode is usually used to load variables and operands 28
into the CPU
 Indirect mode
Op-code Address A

Instruction

Pointer to operand

• Starts like the direct mode, but it makes an

extra memory access. The address specified
in the instruction is not the address of the
operand, it is the address of a memory operand
location that contains the address of the
operand.
Memory
• LDAC @5 or LDAC (5), (5) first retrieves the
content of memory location 5, say 10, and
then CPU goes to location 10, reads the
content (20) of that location and loads the
data into the CPU

http://www.edutechlearners.com 29
 Register direct mode
Opcode Register Address R

Instruction Registers

Operand

• It specifies a register instead a memory address

• LDAC R – if register R contains an value 55, then the value 5
is copied into the CPU’s accumulator
• No memory access
• Very fast execution
30
• Very limited address space
 Register indirect mode
Instruction

Opcode Register Address R

Pointer to
operand

Operand

R i
Registers Memory
• LDAC @R or LDAC (R) – the register contains the address
of the operand in the memory
• Register R (selected by the operand), contains value 5
which represents the address of the operand in the memory
(10)
31
• One fewer memory access than indirect addressing
 Immediate mode

• The operand is not specifying an address, it is the

actual data to be used
• LDAC #5 lloads
d actually
t ll value
l 5 iinto
t th
the CPU’
CPU’s
accumulator
• No memory reference to fetch data
• Fast, no memory access to bring the operand

http://www.edutechlearners.com 32
 Implicit
p addressing
g mode
• Doesn’t explicitly specify an operand
• The
Th instruction
i t ti implicitly
i li itl specifies
ifi th
the operand
dbbecause
always applies to a specific register
• This is not used for load instructions
• As an example, consider an instruction CLAC, that is
clearing the content of the accumulator in a processor and
it is always referring to the accumulator
• This mode is used also in CPUs that do use a stack to
store data;; theyy don’t specify
p y an operand
p because it is
implicit that the operand must come from the stack

http://www.edutechlearners.com 33
 Displacement
p addressing
g mode
Opcode Register R Address A

Instruction

Pointer to
Operand
+ Operand

Registers

Memory
• Effective Address = A + (content of R)
• Address field hold two values
– A = bbase value
l
– R = register that holds displacement 34
– or vice versa
 Relative addressing mode
• It is a particular case of the displacement addressing, where the
register
g is the pprogram
g counter;; the supplied
pp operand
p is an
offset; Effective Address = A + (PC)
• The offset is added to the content of the CPU’s program
counter register
g to g
generate the required
q address
• The program counter contains the address of next instruction to
be executed, so the same relative instruction will produce
different addresses at different locations in the program
• Consider that the relative instruction LDAC $5 is located at
memory address 10 and it takes two memory locations; the
next instruction is at location 12, so the operand is actually
l
located
t d att (12 +5)
5) 17
17; th
the iinstruction
t ti lloads
d ththe operand
d att
address 17 and stores it in the CPU’s accumulator
• This mode is useful for short jumps and reloadable code

http://www.edutechlearners.com 35
 Indexed addressing
g mode
• Works like relative addressing g mode; instead
adding the A to the content of program counter
(PC), the A is added to the content of an index
register
• If the index register contains value 10, then the
instruction LDAC 5(X) reads data from memory
at location (5+10) 15 and stores it in the
accumulator
• Good for accessing arrays
– Effective Address = A + IndexReg
– R++
http://www.edutechlearners.com 36
 Based addressing
g mode

• Works the same with indexed

addressing g mode,, except
p that the index
register is replaced by a base address
register
g
• A holds displacement
• R holds pointer to base address
• R may be explicit or implicit
• e.g. segment registers in 80x86
http://www.edutechlearners.com 37
 Auto increment & Decrement
addressing mode

• Similar to the register indirect mode except that

the register is incremented or decremented after
its value is used to access memory.
• Increment
I t andd Decrement
D t Instructions
I t ti are usedd
here.

http://www.edutechlearners.com 38
 MACHINE AND
ASSEMBLY LANGAUGE
PROGRAMMING

http://www.edutechlearners.com 39
 Computer Operations
• A computer
comp ter is a programmable electronic
device that can store, retrieve, and process
data
• Data and instructions to manipulate the data
are logically the same and can be stored in
the same place
• Store,, retrieve,, and p
process are actions that
the computer can perform on data

http://www.edutechlearners.com 40
 Machine Language

• Machine language The instructions built into

the hardware of a particular computer
• Initially, humans had no choice but to write
programs in machine language because
other
th programming i llanguages hhad
d nott yett
been invented

http://www.edutechlearners.com 41
 Machine Language

• Every processor type has its own set

of specific machine instructions
• The relationship between the processor and
the instructions it can carry out is completely
i t
integrated
t d
• Each machine-language instruction does only
one very low-level
l l l ttask
k

http://www.edutechlearners.com 42
 Assembly Language

• Assembly languages A language that uses

mnemonic codes to represent machine-
language instructions
– The programmer uses these alphanumeric
codes
d iin place
l off bi
binary di
digits
it
– A program called an assembler reads each
of the instructions in mnemonic form and
translates it into the machine-language
equivalent
i l t
http://www.edutechlearners.com 43
Assembly Language Format

44
Assembly Process

http://www.edutechlearners.com 45