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BSC CS - IOT

An SoC (system on a chip) integrates all components of a computer or electronic system onto a single substrate. It contains a CPU, memory, peripherals, and interfaces. SoCs are commonly used in mobile devices due to their low power consumption. An SoC consists of processor cores, memory blocks, analog and digital components, and interfaces. It provides benefits like lower power usage, smaller size, and lower costs compared to discrete components, though initial design costs are higher.

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0% found this document useful (0 votes)
151 views16 pages

BSC CS - IOT

An SoC (system on a chip) integrates all components of a computer or electronic system onto a single substrate. It contains a CPU, memory, peripherals, and interfaces. SoCs are commonly used in mobile devices due to their low power consumption. An SoC consists of processor cores, memory blocks, analog and digital components, and interfaces. It provides benefits like lower power usage, smaller size, and lower costs compared to discrete components, though initial design costs are higher.

Uploaded by

Jash Gudhka
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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SYBSC-CS SEM-3 (USCS306)

UNIT 1
System on a chip

• A system on a chip or system on chip (SoC or SOC) is an integrated circuit (also known as
an "IC" or "chip") that integrates all components of a computer or other
electronic systems.
• It may contain digital, analog, mixed-signal, and often radio-frequency functions ȯ all on a
single substrate.
• SoCs are very common in the mobile computing market because of their low power-
consumption.
• typical application is in the area of embedded systems.
• The contrast with a microcontroller, SoC integrates microcontroller (or microprocessor)
with advanced peripherals like graphics processing unit (GPU), Wi-Fi module, or
coprocessor.
• In general, we can distinguish three types of SoC
• SoC built around a microcontroller
• SoC built around a microprocessor (this type can be found in mobile phones)
• specialized SoC designed for specific applications that do not fit into the above two
categories.

Structure/Architecture of SOC

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A typical SoC consists of:

 A 32-bit CPU cores with a separate core for USB.


• a microcontroller, microprocessor or digital signal processor (DSP) core Ȯ multiprocessor SoCs
(MPSoC) having more than one processor core
• memory blocks including a selection of ROM, RAM, EEPROM and flash memory
• timing sources including oscillators and phase-locked loops
• peripherals including counter-timers, real-time timers and power-on reset generators
• External interfaces, including industry standards such as USB, FireWire, Ethernet, USART,
SPI
• analog interfaces including ADCs and DACs
• voltage regulators and power management circuits

Advantages and Disadvantages:

• Advantages of an SoC
– An SoC consumes less power. Usually 90% of power consumption is in data and bus
address cabling. Since all the components are on the same chip and internally
connected, and their size is also very small, the power consumption is hugely decreased.
– A smaller size means it is lightweight and of small size.
– Overall, the cost of an SoC is small due to advancements in VLSI technology. As
mentioned in the first point, cabling is not much required and so the cost of cabling is
conserved.
– An SoC provides greater design security at hardware and firmware levels.
– An SoC provides faster execution due to high speed processor and memory.

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• Disadvantages of an SoC
– Initial cost of design and development is very high. If the number of SoCs is small, the
cost per SoC will be very high.
– Even a single transistor or system damage may prove to be very costly as the complete
board has to be replaced, and its servicing is very expensive.
– Integrating all systems on single chip increases complexity.
– It is not suitable for power-intensive applications.

FPGA

Processors and FPGAs (field-programmable gate arrays) are the hardworking cores of most
embedded systems. Integrating the high-level management functionality of processors and the
stringent, real-time operations, extreme data processing, or interface functions of an FPGA
(Field Programmable Gate Array) into a single device forms an even more powerful embedded
computing platform.

SoC FPGA devices integrate both processor and FPGA architectures into a single device.
Consequently, they provide higher integration, lower power, smaller board size, and higher
bandwidth communication between the processor and FPGA. They also include a rich set of
peripherals, on-chip memory, an FPGA-style logic array, and high speed transceivers.

A field-programmable gate array (FPGA) is an integrated circuit designed to be configured by a


customer or a designer after manufacturing Ȯ hence "field-programmable".

FPGAs contain an array of programmable logic blocks, and a hierarchy of reconfigurable


interconnects that allow the blocks to be "wired together", like many logic gates that can be
inter-wired in different configurations. Logic blocks can be configured to perform complex
combinational functions, or merely simple logic gates like AND and XOR.

In most FPGAs, logic blocks also include memory elements, which may be simple flip-flops or more
complete blocks of memory

An FPGA can be used to solve any problem which is computable. This is trivially proven by the fact
FPGA can be used to implement a soft microprocessor, such as the Xilinx MicroBlaze or Altera
Nios II. Their advantage lies in that they are sometimes significantly faster for some
applications because of their parallel nature and optimality in terms of the number of gates used for
a certain process.

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FPGA Advantages

• Long time availability FPGAs (Field Programmable Gate Arrays) enable you to make
yourself independent from component manufacturers and distributors since the
functionality is not given by the device itself but in its configuration.
• Can be updated and upgraded at your customer's site FPGAs in contrast to traditional
computer chips are completely configurable.
• Fast and efficient systems Available standard components address a broad user group and
consequently often constitute a compromise between performance and compatibility.
• Performance gain for software applications Complex tasks are often handled through
software implementations in combination with high-performance processors.
• Real time applications FPGAs are perfectly suitable for applications in time-critical
systems. In contrast to software based solutions with real time operating systems, FPGAs
provide real deterministic behavior.

FPGA Disadvantages
• Speed is comparatively less as compared to ASCI .

• The circuit delay depends on the performance of the design implementation tools.
• The mapping of the logic design into FPGA architecture requires sophisticated design
implementation (CAD) tools than PLDs.

Graphics processing unit

• A graphics processing unit (GPU), occasionally called visual processing unit (VPU), is a
specialized electronic circuit designed to rapidly manipulate and alter memory to accelerate
the creation of images in a frame buffer intended for output to a display device.
• GPUs are used in embedded systems, mobile phones, personal computers, workstations, and
game consoles.
• Modern GPUs are very efficient at manipulating computer graphics and image processing,
and their highly parallel structure makes them more efficient than general- purpose CPUs
for algorithms where the processing of large blocks of data is done in parallel.

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In personal computers, there are two main forms of GPUs.


• Dedicated graphics card - also called discrete.
Its dedicated GPU is an independent source of video memory apart from RAM in system.
This card is used purely in gaming world or totally graphics world
• Integrated graphics - also called: shared graphics solutions, integrated
graphics processors (IGP), or unified memory architecture (UMA).
Integrated Graphics Processing Unit uses its system memory instead of system memory.
If system has 4 GB of RAM the video card may use between 1 and 5 % of available memory
for graphics processing

APU

• An Acceleration Processing Unit (APU) is a coprocessor that may be integrated with CPU
on a common chip or within the same package, interconnected via a standard
processor bus. This approach offers low latency interactive access operations without a
modification to the processor design layout.
• An APU may also be used to accelerate the processing of a specialized intense
computation engine of a stable purpose that justifies the cost of integration and does not
require reconfiguration.
• A system on a chip or system on chip (SoC) integrates a complex system components on a
single chip. It typically includes one or more processors (or DSP cores), memory, and I/O
interfaces; and is employed in data processing, communications, and control
environments. A SoC may be implemented using different technologies, including FPGAs.
• The AMD Accelerated Processing Unit (APU), formerly known as Fusion, is the marketing
term for a series of 64-bit microprocessors from AMD designed to act as a CPU and
graphics accelerator (GPU) on a single chip.
• The goal is to create a "fully integrated" APU,which, according to AMD will eventually feature
"heterogenous cores" capable of processing both CPU and GPU work
automatically,depending on workload environment.
• The following hardware and software implementations are available in AMD's APU-branded
products:
1. Optimized Platform
2. Architectural Integration
3. System Integration

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COMPUTE UNITS OF GPU

The meaning of a compute unit depends on who manufactured a particular GPU


• A compute unit is a stream multiprocessor in a NVidia GPU
• SIMD engine in an AMD GPU
Each compute unit has several processing elements (ALU/stream processor)
A compute unit is the smallest organization of registers and instructions capable of
working at once.
Compute unit has several processing elements.Many compute units are stored in one
compute device.And all these compute devices are stored in one Host.
AMD's latest revolutionary processing architecture,Heterogenous System Architecture (HSA)
bridges gap between CPU and GPU cores and delivers a new innovation called compute cores.

One compute unit combines 64 shader (In the field of computer graphics, a shader is a
computer program that is used to do shading: the production of appropriate levels of
light, darkness, and color within an image, or, in the modern era, also to produce special effects or
do video post- processing.) processors with 4 TMUs(A texture mapping unit (TMU) is a
component in modern graphics processing units (GPUs), historically it was a separate physical
processor. A TMU is able to rotate, resize, and distort a bitmap image (performing texture
sampling), to be placed onto an arbitrary plane of a given 3D model as a texture.).

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CENTRAL PROCESSING UNIT ( CPU )

• A CPU is a general purpose processor. General Purpose in the sense that it is designed to
perform a number of operations but the way these operations are performed may not be best
for all applications.
• Although CPU can perform these tasks (which involve repeated additions/multiplications which
may be performed in parallel),the performance achieved is not good enough for modern
applications.

ARM 8 ARCHITECTURE

Introduction

• ARM, originally Acorn RISC Machine, later Advanced RISC Machine, is a family of
reduced instruction set computing (RISC) architectures for computer processors, configured
for various environments.
• British company ARM Holdings develops the architecture and licenses it to other
companies, who design their own products that implement one of those
architectures—including systems-on-chips (SoC) and systems-on-modules (SoM) that
incorporate memory, interfaces, radios, etc.
• It also designs cores that implement this instruction set and licenses these designs to a
number of companies that incorporate those core designs into their own products.
• Processors that have a RISC architecture typically require fewer transistors than those
with a complex instruction set computing (CISC) architecture (such as the x86 processors
found in most personal computers), which improves cost, power consumption, and heat
dissipation.
• These characteristics are desirable for light, portable, battery-powered devicesȯ
including smartphones, laptops and tablet computers, and other embedded systems.

ARMv8-A Architecture

The ARMv8 architecture introduces 64-bit support to the ARM architecture with a focus on
power-efficient implementation while maintaining compatibility with existing 32-bit software.

By adopting a clean approach ARMv8-A processors extend the performance range available
while maintaining the low power consumption characteristics of the ARM processors that will
power tomorrow's most innovative and efficient devices.

ARM has 3 different product tiers supporting the ARMv8-A architecture:

• High Performance,
• High Efficiency, and
• Ultra-High Efficiency

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Increased availability of larger registers for general purpose and media instructions, a greater
addressing range and cryptography instructions enable new categories of applications for super
phone and tablet computing, while bringing the ARM benefits of efficient design and low power
consumption to applications where 64-bit computing is already established, such as servers and
network infrastructure, promising to revolutionize the data center.

The ARMv8 architecture maintains compatibility with the comprehensive software ecosystem for
32-bit components. This enables a wealth of software optimized for existing ARM processors to
benefit from the enhanced performance of processors based on the ARMv8 architecture, while
the addition of 32-bit cryptographic instructions further enables optimization for emerging
requirements.

Developing the software to make best use of the new 64-bit capabilities requires the availability of
excellent tools, test platforms and key open source components. While developing the
architecture and the processors based on ARMv8-A, ARM has also ensured that the
essential tools for development are available to software developers today, enabling the ARM
software ecosystem to continue to innovate around the Architecture for the Digital World.

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AArch64 features

New instruction set, A64


• Has 31 general-purpose 64 bit registers.
• Has dedicated zero or stack pointer (SP) register
• The program counter (PC) is no longer directly accessible as register.
Instruction is still 32 bits long and mostly the same as A32 (with LDM/STM instructions
And, most conditional execution dropped)
• Has paired loads/stores
• No predications for most instruction
• Most instruction can take 32 bit or 64 bit arguments.
• Address assumed to be 64 bit.
Memory translation from 48 bit virtual address based on existing Large Physical Address
Extension (LPAE) which was designed to be easily extended to 64 bit.

Execution States:

Two main execution states:


1. AArch64: The 64 bit execution state including exception modes memory model, programmer’s
model and instruction set support for that state.
2. AArch32: The 32 bit execution state including exception model memory model, programmer’s
model and instruction set support for that state.

The execution states support following three key instruction sets:


1. A32 (or ARM): A 32 bit fixed length instruction set, enhanced through the different architecture
variants.
2. This part of the 32 bit architecture execution environment is now referred to as AArch32.
3. T32(Thumb) introduced as a 16 bit fixed length instruction set which subsequently enhanced to a
mixed length 16 and 32 bit instruction set on the introduction of Thumb-2 technology.
4. This part of the 32 bit architecture execution environment is now referred to as AArch32.
5. A64 is a 64 bit fixed length instruction set that offers similar functionality to the ARM and Thumb
instruction sets.

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Some Terms:
UART : Universal asynchronous receiver/transmitter is a piece of computer hardware that translates
data between parallel and serial forms.
SPI: Serial Peripheral Interface bus is a synchronous serial communication interface specification used
for short distance communication primarily in embedded system.
GPIO : General Purpose Input Output is a generic pin or an integrated circuit whose behavior including
whether it is an input or output pin can be controlled by user at run time.

Raspberry PI board has 40 GPIO (General Purpose Input Output)pins.

Introduction to Raspberry pi

• The Raspberry Pi is a series of small single-board computers developed in the United


Kingdom by the Raspberry Pi Foundation to promote the teaching of basic computer
science in schools and in developing countries.
• The original model became far more popular than anticipated selling outside of its target
market for uses such as robotics.
• The first generation (Raspberry Pi 1 Model B) was released in February 2012. It was
followed by a simpler and inexpensive model Model A
• the foundation released a board with an improved design in Raspberry Pi 1 Model B+.
These boards are approximately credit-card sized and represent the standard
mainline form-factor.
• Improved A+ and B+ models were released a year later. A "compute module" was released
in April 2014 for embedded applications, and a Raspberry Pi Zero with smaller size and

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reduced input/output (I/O) and general-purpose input/output (GPIO) capabilities was
released in November 2015
• The Raspberry Pi 2 which added more RAM was released in February 2015. Raspberry Pi
3 Model B released in February 2016, is bundled with on-board WiFi, Bluetooth and USB
boot capabilities
• All models feature a Broadcom system on a chip (SoC), which includes an
ARM compatible central processing unit (CPU) and an on-chip graphics processing unit
(GPU, a VideoCore IV).
• CPU speed ranges from 700 MHz to 1.2 GHz for the Pi 3 and on board memory range
from 256 MB to 1 GB RAM. Secure Digital(SD) cards are used to store the operating
system and program memory in either the SDHC or MicroSDHC sizes.
• Most boards have between one and four USB slots, HDMI and composite video output,
and a 3.5 mm phone jack for audio.
• The Pi 3 and Pi Zero W have on board Wi-Fi 802.11n and Bluetooth.

Raspberry Pi Hardware
Hardware Features Comments
System on a chip Broadcom BCM2835 CPU, GPU, DSP, SDRAM, and USB port
CPU model ARM1176JZF-S core With floating point
Clock rate 700 MHz Overclockable to 800 MHz
GPU Broadcom VideoCore IV
OpenGL ES 2.0 3D
OpenVG 3D
MPEG-2
VC-1 Microsoft, licensed

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1080p30 H.264 Blu-ray Disc capable, 40 Mbit/s
MPEG-4 AVC high-profile decoder and encoder
1 Gpixel/s, 1.5 Gtexels/s 24 GFLOPS with DMA
Video output Composite RCA PAL and NTSC
HDMI Rev 1.3 and 1.4
Raw LCD panels Via DSI
Audio output 3.5 mm jack
HDMI
Storage SD/MMC/SDIO Card slot
Peripherals 8 × GPIO
UART
I2C bus 100 kHz
SPI bus Two chip selects, +3.3 V, +5 V, ground
Power source 5 V via micro-USB

Preparing Your raspberry Pi

Installing raspberry pi

Before you start, you (obviously) should have a microSD card and a computer with an SD card
reader. Besides that, download the Raspbian image file directly from raspberry.com (don’t
forget to unzip the image file!). Done? Good, let’s get started.

Image : https://www.raspberrypi.org/downloads/raspbian/
select : RASPBIAN JESSIE WITH PIXEL

• Insert your microSD card into your card reader and find out its drive letter in Windows
Explorer (for example G:).
• Download Win32DiskImager, unzip the downloaded file and run the utility file.
• Select the Raspbian image file you downloaded.
• Select the drive of your SD card in the device dropdown. Make sure you chose the
Correct one. Otherwise, you risk damaging the data on your hard drive.
• Select write and wait for the process to finish. That’s it!
• Now you can plug the SD card into your Raspberry Pies slot.

How to connect to Raspbian Os

Head mode:

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• led tv or monitor with hdmi cable
• keyboard
• mouse
• lan cable
• 5volt 5Amp power connector

Headless mode:
• laptop or pc connected to lan or wifi (with telnet client program)
• raspberrypi connected to same network (telnet server enabled) default
• if DHCP is configured raspberrypi will get ipaddress to come in network
• from laptop connect that ip address using putty
• username : pi & password : raspberry

How this small Soc boots without BIOS

• The firmware is closed-source proprietary code programmed into the SoC (System on a
Chip) processor, which cannot be modified.
• Upon power-up the firmware will initiate a bootloader on the SD card
• After this point everything else comes from the SD card.

• First stage bootloader - This is used to mount the FAT32 boot partition on the SD card so that
the second stage bootloader can be accessed. It is programmed into the SoC itself during
manufacture of the RPi and cannot be reprogrammed by a user.
• Second stage bootloader (bootcode.bin) - This is used to retrieve the GPU firmware from the
SD card, program the firmware, then start the GPU.
• GPU firmware (start.elf) - Once loaded, this allows the GPU to start up the CPU. An
additional file, fixup.dat, is used to configure the SDRAM partition between the GPU and
the CPU. At this point, the CPU is release from reset and execution is transferred over.
• User code - This can be one of any number of binaries. By default, it is the Linux kernel
(usually named kernel.img), but it can also be another bootloader (e.g. U-Boot), or a
bare-bones application.

Configuring booting sequence and hardware

raspi-config is the Raspberry Pi configuration tool written and maintained by Alex Bradbury. It
targets Raspbian.

sudo raspi-config

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The sudo is required because you will be changing files that you do not own as the pi user. You

should see a blue screen with options in a grey box in the centre, like so:

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