Test Pattern Generators For Pseudoexhaustive Testing
Uploaded by
Yatheesh KaggereTest Pattern Generators For Pseudoexhaustive Testing
Uploaded by
Yatheesh KaggereSpecific TPGs such as LFSR/SRs and LFSR/XORs can be
TEST PATTERN designed for (n, m, k) circuit by using the knowledge of the
circuit output cones [5, 7, 8]. An LFSR/SR consists of an LFSR
GENERATORS FOR and a shift register (SR) and can be realized with low hardware
PSEUDOEXHAUSTIVE overhead. However, the pseudoexhaustive test set generated
by LFSR/SR is often significantly greater than the bound (2k).
TESTING An LFSR/XOR is composed of an LFSR and an XOR gates
and requires high hardware overhead. The TPG design
DERBUNOVICH L., SUZDAL V., SOBOLEV A., procedures based on convolved LFSR/SR are presented in
TATARENKO D. [7]. In this approach two concepts LFSR/SR and LFSR/XOR
are merged. The single LFSR/SR ensures linear independence
Kharkov Natonal Polytechnic University, Ukraine for all outputs. Circuit inputs assigned residues generated by
Abstract. Nanometer technologies present new challenges successive cause linear dependencies for some output are
for test and test equipment. Designers can now place millions avoided by using XOR gates.
of transistors on a single chip and propagate a signal through In this report we present our TPG designs that generate
them at speeds more than one gigahertz. More complex pseudoexhaustive test by utilizing nonlinear feedback shift
designs also pose problems for manufacturing and especially register (NLFSR) for the generation of full-length shift-register
acute in test. Given the difficulties the test industry has cycles, also referred to as de Bruijn sequences [9]. We
gravitated toward using structured design for test, a propose algorithmic method of constructing full-cycles by
methodology that falls into two broad categories: scan design using one-dimensional cellular arrays as the nonlinear feedback
and built-in techniques. In this report we assume that the of the shift register [10, 11]. We have designed various
sequential circuit has been designed according to the Level pseudoexhaustive TPGs for examples of the combinational
Sensitive Scan Design rules [1]. From a testing grand point circuits from papers [5, 6, 7, 8]. For these circuits TPGs utilizing
it means that the testing problem has been reduced to testing NLFSR require less test size and hardware overhead.
the combinational section of the sequential circuit.
References: 1. Bennets R.G. Design of Testable Logic Circuits.
In recent years considerable attention has been given to Addison Wesley Publishing Company, 1984. 2. Bardell P.H.,
pseudoexhaustive testing of a combination circuit. This McAnney W.H., Savir J. Built-in Test for VLSI: Pseudorandom
approach involves applying all possible input patterns to all Technincs. New York John Wiley & Sons, 1987. 3. Tang D.T., Woo
individual output cones. An output cone consists of all gates L.S. Exhaustive Test Pattern Generation with Constant Weight
that feed the output. Vectors // IEEE Trans. Computers, vol. 32, no 12, pp. 1145-1150,
Dec. 1983. 4. Tang D.T., Chen C.L. Logic Test Pattern Generation
Consider a combinational circuit with n inputs and m outputs. Using Linear Codes // IEEE Trans. Computers, vol. 33, no. 9, pp.
Let k be the number of inputs on which the any of “m” outputs 845-850, Sept. 1984. 5. Wang L.T., MacCluskey E.J. Condensed
depend. These three parameters: the number of inputs (n), Linear Feedback Shift Register Testing – A Pseudoexhaustive Test
outputs (m) and maximum dependency (k) among output Technique // IEEE Trans. Computers, vol. 35, no. 4, pp. 367-370,
cones, determine the size of pseudoexhaustive test set. April 1986. 6. Barzilai Z., Savir J., Marnovsky G., Smith M.G. The
Weighted Syndrome Sums Approach to VLSI Testing // IEEE Trans.
Pseudoexhaustive testing of the circuit requires 2k patterns
Computers, vol. 30, no. 12, pp. 996-1000, Dec 1981. 7. Srinivasan
and provides applying exhaustive tests to the (m) output R., Gupta S.K., Breuer M.A. Novel Test Pattern Generators for
cones. Pseudoexhaustive Testing // IEEE Trans. Computers, vol. 49, no.
Several approaches to the pseudoexhaustive testing have 11, pp. 1228-1240, Nov 2000. 8. Barzilai Z., Coppersmith D.,
been proposed. Pseudoexhaustive test pattern generators Rosenberg A.L. Exhaustive Generation of Bit Patterns with
Application to VLSI Self-Testting // IEEE Trans. Computers, vol.
(TPG) are usually based on maximal length linear feedback
32, no. 2, pp. 190-194, Feb 1983. 9. Fredricken H. A Survey of Full
shift registers (LFSR) [2]. An n-stage maximal length LFSR Length Nonlinear Shift Register Cycle Algorithms // SIAM Review,
has a period of 2n-1 states and utilizes a primitive polynomial vol. 24, no. 2, pp. 195-221, April 1982. 10. Derbunovich L., Bohan
for its feedback connections. Universal pseudoexhaustive V., Liberg I. Generator pseudosluchainyh chisel. Patent SU,
TPG generates test containing n-tuples that cover any “k” No1377167, kl. HO3K/84, 1986. 11. Derbunovich L., Koss M.,
columns of the exhaustive test sets of all 2k possible patterns. Temnikov I. Sintez legkotestiruemyh discretnyh ustroistv. Vestnik,
This test sets can be generated by LFSR based on linear Kharkov Polytechnical Institute, Avtomatika i priborostroenie,
codes [4, 5] or constant weight codes [3]. vol. 102, pp.46-51, 2000.
