Chapter 1

Back ground Motivation and Scope of

work

1.1 Introduction
Nowadays, modern industrial devices are mostly based on electronic devices such as

programmable logic controllers and electronic drives. The electronic devices are very

sensitive to disturbances and become less tolerant to power quality problems such as

voltage sags, swells and harmonics. Voltage dips are considered to be one of the most

severe disturbances to the industrial equipment’s.

Voltage support at a load can be achieved by reactive power injection at the load point

of common coupling. The common method for this is to install mechanically switched

shunt capacitors in the primary terminal of the distribution transformer. The mechanical

switching may be on a schedule, via signals from a supervisory control and data

acquisition (SCADA) system, with some timing schedule, or with no switching at all.

The disadvantage is that, high speed transients cannot be compensated. Some sags are

not corrected within the limited time frame of mechanical switching devices.

Transformer taps may be used, but tap changing under load is costly.

Another power electronic solution to the voltage regulation is the use of a dynamic
voltage restorer (DVR). DVRs are a class of custom power devices for providing
reliable distribution power quality. They employ a series of voltage boost technology
using solid state switches for compensating voltage sags/swells. The DVR applications

2
are mainly for sensitive loads that may be drastically affected by fluctuations in system
voltage.

1.2 Motivation of the Present Work

In the above context, the author feels that the power electronic solution to the voltage
regulation is the use of dynamic voltage restorer (DVR). DVRs are a class of custom
power devices for providing reliable distribution power quality. They employ a series of
voltage boost technology using solid state switches for compensating voltage sag/swells
[1]. Out of the many custom devices like Active Power Filters (APF), Battery Energy
Storage System (BESS),

Distribution Series Capacitors (DSC), Surge Arrestor (SA), Superconducting Magnetic

Energy System (SMES), Static VAR Compensator (SVC), Uninterruptible Power
Supplies (UPS), Dynamic Voltage Restorers (DVR) is the most effective one. There are
numerous reasons why DVR is preferred over others. A few of the reasons are.

1. Although, SVR predominates the DVR, but the DVR is still preferred because
SVC has no ability to control Active Power Flow.

2. DVR cost less as compared to the UPS. It also have requires high level of
maintenance because battery leak and have to be replaced as often as five years.

3. Other reasons include that the DVR has a high energy capacity and lower costs
compared to SMES device.

4. DVR is smaller in size and costs less compared to DSTATCOM.

DVR is widely considered as an effective custom power device in mitigating voltage

sags. In addition to voltage sags and swell compensation, DVR has an added feature of
harmonics and power factor correction.

3
1.3 Scope of the Present Work
Possible extensions to our work include:

1 Realization of intelligent DSTATCOM and DVR in hardware.

2 Study and control of power quality issues for deregulated power system.
3 Comparative analysis of DSTATCOM and DVR.
4 Modelling of newly developed FACTS controller like unified power
flow convertors in combination with various soft computing techniques
can be done.
5 As FACTSs devices fail to take care of voltage surges, study can be
extended in this area also.
6 Soft computing techniques developed can be further used in various
fields of power system like – power system dynamics & stability, smart
grid, power system state estimation, economic dispatch and optimal
power flow.

4
 Chapter 2

Power Quality Problems

2.1 Sources and effect of power quality problems

Figure. 2.1 Single line diagram of power supply system

5
Power distribution systems, ideally, should provide their customers with an

uninterrupted flow of energy at smooth sinusoidal voltage at the contracted magnitude

level and frequency. However, in practice, power systems, especially the distribution

systems, have numerous nonlinear loads, which significantly affect the quality of power

supplies. As a result of the nonlinear loads, the purity of the waveform of supplies is

lost. This ends up producing many power quality problems.

While power disturbances occur on all electrical systems, the sensitivity of today’s

sophisticated electronic devices makes them more susceptible to the quality of power

supply. For some sensitive devices, a momentary disturbance can cause scrambled data,

interrupted communications, a frozen mouse, system crashes and equipment failure etc.

A power voltage spike can damage valuable components. Power Quality problems

encompass a wide range of disturbances such as voltage sags/swells, flicker, harmonics

distortion, impulse transient, and interruptions.

• Voltage dip: A voltage dip is used to refer to short-term reduction in voltage of

less than half a second.

• Voltage sag: Voltage sags can occur at any instant of time, with amplitudes
ranging from 10 – 90% and a duration lasting for half a cycle to one minute.

• Voltage swell: Voltage swell is defined as an increase in rms voltage or current at

the power frequency for durations from 0.5 cycles to 1 min.

• Voltage 'spikes', 'impulses' or 'surges': These are terms used to describe abrupt,

very brief increases in voltage value.

6
 • Voltage transients: They are temporary, undesirable voltages that appear on the

power supply line. Transients are high over-voltage disturbances (up to 20KV)

that last for a very short time.

• Harmonics: The fundamental frequency of the AC electric power distribution

system is 50 Hz. A harmonic frequency is any sinusoidal frequency, which is a

multiple of the fundamental frequency. Harmonic frequencies can be even or odd

multiples of the sinusoidal fundamental frequency.

Flickers: Visual irritation and introduction of many harmonic components in the supply
power and their associated ill effects.

2.1.1 Causes of dips, sags and surges

1. Rural location remote from power source

2. Unbalanced load on a three phase system

3. Switching of heavy loads

4. Long distance from a distribution transformer with interposed loads

5. Unreliable grid systems

6. Equipment’s not suitable for local supply

2.1.2 Causes of transients and spikes

1. Lightening

2. Arc welding

3. Switching on heavy or reactive equipment’s such as motors, transformers, motor

drives

4. Electric grade switching

7
2.2 Standards Associated with Voltage Sags
Standards associated with voltage sags are intended to be used as reference

documents describing single components and systems in a power system. Both the

manufacturers and the buyers use these standards to meet better power quality

requirements. Manufactures develop products meeting the requirements of a

standard, and buyers demand from the manufactures that the product comply with

the standard. The most common standards dealing with power quality are the ones

issued by IEEE, IEC, CBEMA, and SEMI.

2.2.1 IEEE Standard

The Technical Committees of the IEEE societies and the Standards Coordinating

Committees of IEEE Standards Board develop IEEE standards. The IEEE standards

associated with voltage sags are given below.

 IEEE 446-1995, “IEEE recommended practice for emergency and standby

power systems for industrial and commercial applications range of sensibility

loads.

 IEEE 493-1990, “Recommended practice for the design of reliable industrial and
commercial power sys.

The standard proposes different techniques to predict voltage sag characteristics,

magnitude, duration and frequency. There are mainly three areas of interest for voltage

sags. The different areas can be summarized as follows:

8
 • Calculating voltage sag magnitude by calculating voltage drop at critical load

with knowledge of the network impedance, fault impedance and location of

fault.

• By studying protection equipment and fault clearing time it is possible to

estimate the duration of the voltage sag.

• Based on reliable data for the neighborhood and knowledge of the system

Parameters an estimation of frequency of occurrence can be made.

IEEE 1100-1999, “IEEE recommended practice for powering and grounding Electronic

equipment” This standard presents different monitoring criteria for voltage sags and has

a chapter explaining the basics of voltage sags. It also explains the background and

application of the CBEMA (ITI) curves. It is in some parts very similar to Std. 1159 but

not as specific in defining different types of disturbances. IEEE 1159-1995, “IEEE

recommended practice for monitoring electric power quality” The purpose of this

standard is to describe how to interpret and monitor electromagnetic phenomena

properly. It provides unique definitions for each type of disturbance. IEEE 1250-1995,

“IEEE guide for service to equipment sensitive to momentary voltage disturbances”.

This standard describes the effect of voltage sags on computers and sensitive equipment

using solid-state power conversion. The primary purpose is to help identify potential

problems. It also aims to suggest methods for voltage sag sensitive devices to operate

safely during disturbances. It tries to categorize the voltage-related problems that can be

fixed by the utility and those which have to be addressed by the user or equipment

designer. The second goal is to help designers of equipment to better understand the

9
environment in which their devices will operate. The standard explains different causes

of sags, lists of examples of sensitive loads, and offers solutions to the problems.

2.2.2 SEMI International Standard

The SEMI International Standards Program is a service offered by Semiconductor

Equipment and Materials International (SEMI). Its purpose is to provide the

semiconductor and flat panel display industries with standards and recommendations to

improve productivity and business. SEMI standards are written documents in the form

of specifications, guides, test methods, terminology, and practices. The standards are

voluntary technical agreements between equipment manufacturer and end-user.

The standards ensure compatibility and interoperability of goods and services.

Considering voltage sags, two standards address the problem for the equipment. SEMI

F47-0200, “Specification for semiconductor processing equipment voltage sag

immunity”. The standard addresses specifications for semiconductor processing

equipment voltage sag immunity. It only specifies voltage sags with duration from 50ms

up to 1s. It is also limited to phase-to-phase and phase-to-neutral voltage incidents, and

presents a voltage-duration graph, shown in Figure 2.2. SEMI F42-0999, “Test method

for semiconductor processing equipment voltage sag immunity”.

This standard defines a test methodology used to determine the susceptibility of

semiconductor processing equipment and how to qualify it against the specifications. It
further describes test apparatus, test set-up, test procedure to determine the
susceptibility of semiconductor processing equipment, and finally how to report and
interpret the results.

10
2.3 Solution to power system problems
There are two approaches to the mitigation of power quality problems. The solution to

the power quality can be done from customer side or from utility side First approach is

called load conditioning, which ensures that the equipment is less sensitive to power

disturbances, allowing the operation even under significant voltage distortion. The other

solution is to install line conditioning systems that suppress or counteracts the power

system disturbances. Currently they are based on PWM converters and connect to low

and medium voltage distribution system in shunt or in series. Series active power filters

must operate in conjunction with shunt passive filters in order to compensate load

current harmonics. Shunt active power filters operate as a controllable current source

and series active power filters operates as a controllable voltage source. Both schemes

are implemented preferable with voltage source PWM inverters, with a dc bus having a

reactive element such as a capacitor. However, with the restructuring of power sector

and with shifting trend towards distributed and dispersed generation, the line

conditioning systems or utility side solutions will play a major role in improving the

inherent supply quality; some of the effective and economic measures can be identified

as following:

Lightening and Surge Arresters:

Arresters are designed for lightening protection of transformers, but are not sufficiently

voltage limiting for protecting sensitive electronic control circuits from voltage surges.

Thyristor Based Static Switches:

The static switch is a versatile device for switching a new element into the circuit when

the voltage support is needed. It has a dynamic response time of about one cycle. To

correct quickly for voltage spikes, sags or interruptions, the static switch can used to

switch one or more of devices such as capacitor, filter, alternate power line, energy

11
storage systems etc. The static switch can be used in the alternate power line

applications.

Energy Storage Systems:

Storage systems can be used to protect sensitive production equipment’s from

shutdowns caused by voltage sags or momentary interruptions. These are usually DC

storage systems such as UPS, batteries, superconducting magnet energy storage

(SMES), storage capacitors or even fly wheels driving DC generators.

The output of these devices can be supplied to the system through an inverter on a

momentary basis by a fast acting electronic switch. Enough energy is fed to the system

to compensate for the energy that would be lost by the voltage sag or interruption.

Though there are many different methods to mitigate voltage sags and swells, but the

use of a custom Power device is considered to be the most efficient method.

For example, Flexible AC Transmission Systems (FACTS) for transmission systems,

the term custom power pertains to the use of power electronics controllers in a

distribution system, specially, to deal with various power quality problems. Just as

FACTS improves the power transfer capabilities and stability margins, custom power

makes sure customers get pre-specified quality and reliability of supply.

This pre-specified quality may contain a combination of specifications of the following:

low phase unbalance, no power interruptions, low flicker at the load voltage, low

harmonic distortion in load voltage, magnitude and duration of overvoltage and under

voltages within specified limits, acceptance of fluctuations, and poor factor loads

without significant effect on the terminal voltage.

12
There are many types of Custom Power devices. Some of these devices include: Active
Power Filters (APF), Battery Energy Storage Systems (BESS), Distribution STATIC
synchronous Compensator (DSTATCOM), Distribution Series Capacitors (DSC),
Dynamic Voltage Restorer (DVR), Surge Arresters (SA), Super conducting Magnetic
Energy Systems (SMES), Static Electronic Tap Changers (SETC), Solid-State Transfer
Switches (SSTS), Solid State Fault Current Limiter (SSFCL), Static Var Compensator
(SVC), Thyristor Switched Capacitors (TSC), and Uninterruptible Power Supplies
(UPS).

13
 Chapter 3

Dynamic Voltage Restorer (DVR)

3.1 Introduction
Among the power quality problems (sags, swells, harmonics…) voltage sags are the

most severe disturbances. In order to overcome these problems the concept of custom

power devices is introduced recently. One of those devices is the Dynamic Voltage

Restorer (DVR), which is the most efficient and effective modern custom power device

used in power distribution networks. DVR is a recently proposed series connected solid

state device that injects voltage into the system in order to regulate the load side

voltage. It is normally installed in a distribution system between the supply and the

critical load feeder at the point of common coupling (PCC). Other than voltage sags and

swells compensation, DVR can also added other features like: line voltage harmonics

compensation, reduction of transients in voltage and fault current limitations.

The amplitude and phase angle of the injected voltages are variable, thereby allowing

control of the real and reactive power exchange between the dynamic voltage restorer

and the distribution system. The DC input terminal of a DVR is connected to an energy

storage device of appropriate capacity. As mentioned, the reactive power exchange

between the DVR and the distribution system is internally generated by the DVR

without AC passive reactive components. The real power exchanged at the DVR output

14
AC terminals is provided by the DVR input DC terminal by an external energy source

or energy storage system.

Figure. 3.1: Location of DVR

3.2 Basic Configuration of DVR

 The general configuration of the DVR consists of:

 An Injection/ Booster transformer

 A Harmonic filterStorage Devices

 A Voltage Source Converter (VSC)

 DC charging circuit

 A Control and Protection system

15
 Figure. 3.2: Schematic diagram of DVR

3.2.1 Injection/Booster transformer

The Injection / Booster transformer is a specially designed transformer that attempts to

limit the coupling of noise and transient energy from the primary side to the secondary

side. Its main tasks are:

16
  It connects the DVR to the distribution network via the HV-windings and

transforms and couples the injected compensating voltages generated by the

voltage source converters to the incoming supply voltage.

 In addition, the Injection / Booster transformer serves the purpose of

isolating the load from the system (VSC and control mechanism).

3.2.2 Harmonics Filters

The main task of harmonic filter is to keep the harmonic voltage content generated by
the VSC to the permissible level.

3.2.3 Voltage Source Converter

A VSC is a power electronic system consists of a storage device and switching devices,

which can generate a sinusoidal voltage at any required frequency, magnitude, and

phase angle. In the DVR application, the VSC is used to temporarily replace the supply

voltage or to generate the part of the supply voltage which is missing.

There are four main types of switching devices:

Metal Oxide Semiconductor Field Effect Transistors (MOSFET), Gate Turn-Off

thyristors (GTO), Insulated Gate Bipolar Transistors (IGBT), and Integrated Gate

Commutated Thyristors (IGCT). Each type has its own benefits and drawbacks. The

IGCT is a recent compact device with enhanced performance and reliability that allows

building VSC with very large power ratings. Because of the highly sophisticated

converter design with IGCTs, the DVR can compensate dips which are beyond the

capability of the past DVRs using conventional devices.

The purpose of storage devices is to supply the necessary energy to the VSC via a dc
link for the generation of injected voltages. The different kinds of energy storage

17
devices are Superconductive magnetic energy storage (SMES), batteries and
capacitance.

3.2.4 DC Charging Circuit

The dc charging circuit has two main tasks.

 The first task is to charge the energy source after a sag compensation event.

 The second task is to maintain dc link voltage at the nominal dc link voltage.

3.2.5 Control and Protection

The control mechanism of the general configuration typically consists of hardware with

programmable logic. All protective functions of the DVR should be implemented in the

software. Differential current protection of the transformer, or short circuit current on

the customer load side are only two examples of many protection functions possibility.

In many cases, the main protection of the power system against voltage collapse is the

natural response of load to decrease demand when system voltage drops. The

application of DVRs would tend to maintain demand even when incipient voltage

conditions are present. As a result, this reduces the innate ability to prevent a collapse

and increases the chance of cascading interruptions.

Therefore, when applying DVRs, it is vital to consider the nature of the load whose

voltage supply is being secured, as well as the transmission system which must tolerate

the change in voltage-response of the load. It may be necessary to provide local fast

reactive supply sources in order to protect the system, with the DVR added, from

18
voltage collapse and cascading interruptions. A comprehensive simulation study, which

includes the transmission system, is highly recommended.

3.3 Equation related to DVR

Figure. 3.3 Equivalent circuit diagram of DVR

The system impedance Zth depends on the fault level of the load bus. When the system

voltage (Vth) drops, the DVR injects a series voltage VDVR through the injection

transformer so that the desired load voltage magnitude VL can be maintained. The series

injected voltage of the DVR can be written as

VDVR = VLOAD + ZTH ILOAD - VTH ………………………. (1)

where ,

VTH : The system voltage during fault condition

19
VLOAD : The desired load voltage magnitude
ZTH : The load impedance
ILOAD : The load current

The load current IL is given by,

ILOAD = (PLOAD + jQLOAD) / V………………………… (2)

When VL is considered as a reference equation can be rewritten as,

VDVR ∠𝛼 = VLOAD∠0 + ZTH I LOAD∠(𝛽 − 𝜃) − VTH ∠𝛿 ………………. (3)

Where α, β, and δ are angles of VDVR , ZTH and VTH respectively and θ is Load power
angle

𝜃 = 𝑇𝑎𝑛-1 (𝜃L / 𝑃L) …………………….………(4)

The complex power injection of the DVR can be written as

SDVR = VDVR IL*……………………….…….. (5)

It requires the injection of only reactive power and the DVR itself is capable of

generating the reactive power.

3.4 Operating mode of DVR

The basic function of the DVR is to inject a dynamically controlled voltage V DVR

generated by a forced commutated converter in series to the bus voltage by means of a

booster transformer. The momentary amplitudes of the three injected phase voltages are

controlled such as to eliminate any detrimental effects of a bus fault to the load voltage

20
VL. This means that any differential voltages caused by transient disturbances in the ac

feeder will be compensated by an equivalent voltage generated by the converter and

injected on the medium voltage level through the booster transformer.

The DVR has three modes of operation which are: protection mode, standby mode,
Injection/boost mode.

3.4.1 Protection mode

If the over current on the load side exceeds a permissible limit due to short circuit

on the load or large inrush current, the DVR will be isolated from the systems by

using the bypass switches (S2 and S3 will open) and supplying another path for

current (S1 will be closed).

Figure. 3.4: Protection Mode (creating another path for current)

21
3.4.2 Standby Mode: (VDVR= 0)
In the standby mode the booster transformer’s low voltage winding is shorted through

the converter. No switching of semiconductors occurs in this mode of operation and the

full load current will pass through the primary.

Figure. 3.5: Standby Mode

3.4.3 Injection/Boost Mode: (VDVR>0)

In the Injection/Boost mode the DVR is injecting a compensating voltage through the

booster transformer due to the detection of a disturbance in the supply voltage.

22
3.5 Voltage injection methods of DVR

Voltage injection or compensation methods by means of a DVR depend upon the

limiting factors such as; DVR power ratings, various conditions of load, and different

types of voltage sags. Some loads are sensitive towards phase angel jump and some are

sensitive towards change in magnitude and others are tolerant to these. Therefore the

control strategies depend upon the type of load characteristics.

There are four different methods of DVR voltage injection which are

 Pre-sag compensation method

 In-phase compensation method

 In-phase advanced compensation method

 Voltage tolerance method with minimum energy injection

3.5.1 Pre-sag/dip compensation method

The pre-sag method tracks the supply voltage continuously and if it detects any

disturbances in supply voltage it will inject the difference voltage between the sag or

voltage at PCC and pre-fault condition, so that the load voltage can be restored back to

the pre-fault condition. Compensation of voltage sags in the both phase angle and

amplitude sensitive loads would be achieved by pre-sag compensation method. In this

method the injected active power cannot be controlled and it is determined by external

conditions such as the type of faults and load conditions

23
 VDVR = Vprefault - Vsag

Figure. 3.6: Pre-sag compensation method

3.5.2 In-phase compensation method

This is the most straight forward method. In this method the injected voltage is in phase

with the supply side voltage irrespective of the load current and pre-fault voltage. The

phase angles of the pre-sag and load voltage are different but the most important criteria

for power quality that is the constant magnitude of load voltage are satisfied.

24
 Figure. 3.7: In-phase compensation method

|VL|=|Vprefault|

One of the advantages of this method is that the amplitude of DVR injection voltage is
minimum for a certain voltage sag in comparison with other strategies. Practical
application of this method is in non-sensitive loads to phase angle jump.

3.5.3 In-phase advanced compensation method

In this method the real power spent by the DVR is decreased by minimizing the power

angle between the sag voltage and load current. In case of pre-sag and in-phase

compensation method the active power is injected into the system during disturbances.

The active power supply is limited stored energy in the DC links and this part is one of

the most expensive parts of DVR. The minimization of injected energy is achieved by

25
making the active power component zero by having the injection voltage phasor

perpendicular to the load current phasor.

In this method the values of load current and voltage are fixed in the system so we can

change only the phase of the sag voltage. IPAC method uses only reactive power and

unfortunately, not al1 the sags can be mitigated without real power, as a consequence,

this method is only suitable for a limited range of sags.

3.5.4 In-phase advanced compensation method

A small drop in voltage and small jump in phase angle can be tolerated by the load

itself. If the voltage magnitude lies between 90%-110% of nominal voltage and 5%-

10% of nominal state that will not disturb the operation characteristics of loads. Both

magnitude and phase are the control parameter for this method which can be achieved

by small energy injection.

Figure. 3.8: Voltage tolerance method with minimum energy injection

26
 Chapter 4

Realization of Compensation
Technique

4.1 Discrete PWM-Based Control Scheme

In order to mitigate the simulated voltage sags in the test system of each compensation

technique, also to compensate voltage sags in practical application, a discrete PWM-

based control scheme is implemented, with reference to DVR. The aim of the control

scheme is to maintain a constant voltage magnitude at the sensitive load point, under the

system disturbance. The control system only measures the rms voltage at load point, for

example, no reactive power measurement is required.

Figure 4.1 shows the DVR controller scheme implemented in MATLAB/SIMULINK.

The DVR control system exerts a voltage angle control as follows: an error signal is

obtained by comparing the reference voltage with the rms voltage measured at the load

point. The PI controller processes the error signal and generates the required angle δ to

drive the error to zero, for example; the load rms voltage is brought back to the

reference voltage.

It should be noted that, an assumption of balanced network and operating conditions

are made. The modulating angle δ or delta is applied to the PWM generators in phase A,

whereas the angles for phase B and C are shifted by 240° or -120° and 120°

respectively.

27
 VA = Sin (ωt +δ)

VB=Sin (ωt+δ-2π/3)

VC = Sin (ωt +δ+2π/3)

The dqo transformation or Park’s transformation is used to control of DVR. The dq0
method gives the sag depth and phase shift information with start and end times.
The quantities are expressed as the instantaneous space vectors. Firstly convert the
voltage from abc reference frame to d-q-0 reference. For simplicity zero phase sequence
components is ignored.

Figure 4 illustrates a flow chart of the feed forward dq0 transformation for voltage
sags/swells detection.

The detection is carried out in each of the three phases.

The control scheme for the proposed system is based on the comparison of a voltage
reference and the measured terminal voltage ( VA , VB , VC ) The voltage sags is detected
when the supply drops below 90% of the reference value whereas voltage swells is
detected when supply voltage increases up to 25% of the reference value.

The error signal is used as a modulation signal that allows generating a commutation
pattern for the power switches (IGBT’s) constituting the voltage source converter. The
commutation pattern is generated by means of the sinusoidal pulse width modulation
technique (SPWM); voltages are controlled through the modulation. The PLL circuit is
used to generate a unit sinusoidal wave in phase with mains voltage.

28
It defines the transformation from three phase system a, b, c to dqo stationary frame. In
this the transformation, phase A is aligned to the d axis that is in quadrature with the q-
axis. The (θ) is defined by the angle between phase A to the d-axis.

Figure. 4.1: Flow Chart of Feed Forward Control Technique for DVR Based on dqo

29
Transformation.

Figure. 4.2: SIMULINK model of DVR controller

30
4.2 Test system for DVR

Figure. 4.3 Single line diagram of test system

Single line diagram of the test system for DVR is composed by a 13 kV, 50 Hz

generation system, feeding two transmission lines through a 3- winding transformer

connected in Y/∆/∆, 13/115/115 kV. Such transmission lines feed two distribution

networks through two transformers connected in ∆/Y, 115/11 kV. To verify the working

of DVR for voltage compensation a fault is applied at point X at resistance 0.66 Ω for

time duration of 200 ms. The DVR is simulated to be in operation only for the duration

of the fault.

31
Figure. 4.4 SIMULINK block diagram of DVR

32
 Chapter 5

Simulation and Results

5.1 abc to dq0, dq0 to abc

Perform transformation from three-phase (abc) signal to dq0 rotating reference frame or
the inverse

Library

Control and Measurements/Transformations

Description

The abc to dq0 block performs a Park transformation in a rotating reference frame.

The dq0 to abc block performs an inverse Park transformation.

The block supports the two conventions used in the literature for Park transformation:

Rotating frame aligned with A axis at t = 0, that is, at t = 0, the d-axis is aligned with the
a-axis. This type of Park transformation is also known as the cosine-based Park
transformation.

Rotating frame aligned 90 degrees behind A axis, that is, at t = 0, the q-axis is aligned
with the a-axis. This type of Park transformation is also known as the sine-based Park
transformation. Use it in Simscape Power Systems™ models of three-phase
synchronous and asynchronous machines.

33
 Figure. 5.1 abc to dq0, dq0 to abc

Deduce the dq0 components from abc signals by performing an abc to αβ0 Clarke
transformation in a fixed reference frame.

Then perform an αβ0 to dq0 transformation in a rotating reference frame, that is, −(ω.t)
rotation on the space vector Us = uα + j· uβ.

The abc-to-dq0 transformation depends on the dq frame alignment at t = 0. The position

of the rotating frame is given by ω.t (where ω represents the dq frame rotation speed).

34
When the rotating frame is aligned with A axis, the following relations are obtained:

Inverse transformation is given by:

35
When the rotating frame is aligned 90 degrees behind A axis, the following relations are
obtained:

Inverse transformation is given by

36
Parameters

Rotating frame alignment (at wt=0)

Select the alignment of rotating frame a t = 0 of the d-q-0 components of a three-phase

balanced signal:

(positive-sequence magnitude = 1.0 pu; phase angle = 0 degree)

When you select Aligned with phase A axis, the d-q-0 components are d = 0, q = −1,
and zero = 0.

When you select 90 degrees behind phase A axis, the default option, the d-q-0
components are d = 1, q = 0, and zero = 0.

Inputs and Outputs

abc -The vectorized abc signal.

dq0 - The vectorized dq0 signal.

wt - The angular position of the dq rotating frame, in radians.

5.2 Phase Locked Loop

Determine frequency and fundamental component of signal phase angle

37
Library

Control and Measurements/PLL

Description

The PLL block models a Phase Lock Loop (PLL) closed-loop control system, which
tracks the frequency and phase of a sinusoidal signal by using an internal frequency
oscillator. The control system adjusts the internal oscillator frequency to keep the
phases difference to 0.

The figure shows the internal diagram of the PLL.

Figure. 5.2 Phase-Locked-Loop

The input signal is mixed with an internal oscillator signal. The DC component of the
mixed signal (proportional to the phase difference between these two signals) is
extracted with a variable frequency mean value. A Proportional-Integral-Derivative

38
 (PID) controller with an optional automatic gain control (AGC) keeps the phase
difference to 0 by acting on a controlled oscillator. The PID output, corresponding to
the angular velocity, is filtered and converted to the frequency, in hertz, which is used
by the mean value.

Parameters

Minimum frequency (Hz)

Specify the minimum expected frequency of the input signal. This parameter sets the
buffer size of the Mean (Variable Frequency) block used inside the block to compute
the mean value. Default is 45.

Initial inputs [ Phase (degrees), Frequency (Hz) ]

Specify the initial phase and frequency of the input signal. Default is [0, 60].

Regulator gains [ Kp, Ki, Kd ]

Specify the proportional, integral, and derivative gains of the internal PID controller.
Use the gains to tune the PLL response time, overshoot, and steady-state error
performances. Default is [180, 3200, 1].

Time constant for derivative action (s)

Specify the time constant for the first-order filter of the PID derivative block. Default
is 1e-4.

Maximum rate of change of frequency (Hz/s)

Specify the maximum positive and negative slope of the signal frequency. Default is 12.

39
Filter cut-off frequency for frequency measurement (Hz)

Specify the second-order lowpass filter cut-off frequency. Default is 25.

Sample time

Specify the sample time of the block, in seconds. Set to 0 to implement a continuous
block. Default is 0.

Enable automatic gain control

When this check box is selected, the PLL block optimizes its performances by scaling the
PID regulator signal according to the input signal magnitude. Select this option when the
input signal is not normalized. Default is selected.

Inputs and Outputs

In - The normalized input signal, in pu.

Freq - The measured frequency, in hertz.

Wt - Angle (rad) varying between 0 and 2*pi, synchronized on the zero-crossing

(rising) of the fundamental of the input signal.

Characteristics

Sample Time Specified in the Sample Time parameter.

Continuous when Sample Time = 0.

Scalar Expansion No

Dimensionalized No

Zero-Crossing Detection Yes

40
5.3 Pulse Width Modulation

Pulse width modulation of digital output pin

Library

Description

Use pulse-width modulation (PWM) to vary the power output of a digital output pin.

The block input value sets the percentage of time that the digital square-wave is on within
a specific period. This time percentage is called duty cycle.

The block input, In, accepts a range of values from 0 to 1 (from 0% to 100% of the duty
cycle). The data type of the input value is a double.

For example:

 The maximum input value, 1, sets the duty cycle to 100%, or full power.
 The minimum input value, 0, sets the duty cycle to 0%, or no power.
 An intermediate input value, such as 0.333, sets the duty cycle to 33.3%, or 1/3
power.
 Out of range input values, such as -0.2 or 1.2, output minimum or maximum
power.

The frequency of the PWM signal establishes the period of each PWM signal. For
example, if the frequency is 3000 Hz, the period of each signal is approximately 333.33

41
microseconds. At 3000 Hz, setting the input value to 33.3% turns the digital pulse on for
111.11 microseconds, and then off for 222.22 microseconds.

Changing the polarity of the PWM signal inverts the digital signal. With an input value of
33.3%, setting the polarity to Negative turns the digital pulse off for 111.11
microseconds, and then on for the remaining 222.22 microseconds.

The block input inherits the data type of the upstream block, and internally converts it to
double.

During simulations without the hardware, this block does nothing.

Parameters

Pin

Select the digital output pin.

Click View pin map to locate the pin.

Do not specify the same pin more than once within a given model.

Frequency

Set the frequency of the PWM signal.

By default, this value is 3000 Hz.

Polarity

Set the polarity of the PWM signal.

By default, this value is Positive, which sets the digital pulse high (on) for the duty-cycle,
and off for the remainder of the period.

42
Setting polarity to Negative sets the digital pulse low (off) for the duty-cycle, and on for
the remainder of the period.

5.4 Transport Delay

Delay input by given amount of time

Library

Continuous

Description

The Transport Delay block delays the input by a specified amount of time. You can use
this block to simulate a time delay. The input to this block should be a continuous signal.

At the start of simulation, the block outputs the Initial output parameter until the
simulation time exceeds the Time delay parameter. Then, the block begins generating the
delayed input. During simulation, the block stores input points and simulation times in a
buffer. You specify this size with the Initial buffer size parameter.

When you want output at a time that does not correspond to times of the stored input
values, the block interpolates linearly between points. When the delay is smaller than the
step size, the block extrapolates from the last output point, which can produce inaccurate
results. Because the block does not have direct feedthrough, it cannot use the current
input to calculate an output value. For example, consider a fixed-step simulation with a
step size of 1 and the current time at t = 5. If the delay is 0.5, the block must generate a

43
point at t = 4.5. Because the most recent stored time value is at t = 4, the block performs
forward extrapolation.

The Transport Delay block does not interpolate discrete signals. Instead, the block returns
the discrete value at the required time.

This block differs from the Unit Delay block, which delays and holds the output on
sample hits only.

Data Type Support

The Transport Delay block accepts and outputs real signals of type double..

Parameters

Time delay

Specify the amount of simulation time to delay the input signal before propagation to the
output.

Settings

Default: 1

This value must be nonnegative.

Command-Line Information

Parameter: DelayTime

Type: scalar or vector

Value: '1'

Default: '1'

44
Initial output

Specify the output that the block generates until the simulation time first exceeds the time
delay input.

Settings

Default: Run-to-run tunable parameter

A Run-to-run tunable parameter cannot be changed during a simulation's run time.

However, changing it before a simulation begins will not cause Accelerator or Rapid
Accelerator to regenerate code.

Also, the initial output of this block cannot be inf or NaN.

Command-Line Information

Parameter: InitialOutput

Type: scalar or vector

Value: '0'

Default: '0'

Initial buffer size

Define the initial memory allocation for the number of input points to store.

Settings

Default: 1024

If the number of input points exceeds the initial buffer size, the block allocates additional
memory.

After simulation ends, a message shows the total buffer size needed.

45
Because allocating memory slows down simulation, choose this value carefully if
simulation speed is an issue.

For long time delays, this block can use a large amount of memory, particularly for
dimensionalized input.

Command-Line Information

Parameter: BufferSize

Type: scalar

Value: '1024'

Default: '1024'

Use fixed buffer size

Specify use of a fixed-size buffer to save input data from previous time steps.

Settings

Default: Off

On

The block uses a fixed-size buffer.

Off

The block does not use a fixed-size buffer.

The Initial buffer size parameter specifies the size of the buffer. If the buffer is full, new
data replaces data already in the buffer. Simulink software uses linear extrapolation to
estimate output values that are not in the buffer.

If the input data is linear, selecting this check box can save memory.

46
If the input data is nonlinear, do not select this check box. Doing so can yield inaccurate
results.

Command-Line Information

Parameter: FixedBuffer

Type: character vector

Value: 'off' | 'on'

Default: 'off'

Direct feedthrough of input during linearization

Cause the block to output its input during linearization and trim, which sets the block
mode to direct feedthrough.

Settings

Default: Off

On

Enables direct feedthrough of input.

Off

Disables direct feedthrough of input.

Tips

Selecting this check box can cause a change in the ordering of states in the model when
you use the functions linmod, dlinmod, or trim. To extract this new state ordering:

Compile the model using the following command, where model is the name of the
Simulink model.

47
The output argument x_str, which is a cell array of the states in the Simulink model,
contains the new state ordering. When you pass a vector of states as input to
the linmod,dlinmod, or trim functions, the state vector must use this new state ordering.

Command-Line Information

Parameter: Trans Delay Feedthrough

Type: character vector

Value: 'off' | 'on'

Default: 'off'

Pade order (for linearization)

Set the order of the Pade approximation for linearization routines.

Settings Default: 0

The default value is 0, which results in a unity gain with no dynamic states.

Setting the order to a positive integer n adds n states to your model, but results in a more
accurate linear model of the transport delay.

Command-Line Information

Parameter: PadeOrder

Type: character vector

Value: '0'

Default: '0'

48
Characteristics

Data Types Double

Sample Time Continuous

Direct Feedthrough No

Multidimensional Signals No

Variable-Size Signals No

Zero-Crossing Detection No

Code Generation Yes

5.5 Universal Bridge

Implement universal power converter with selectable topologies and power electronic
devices

Library

Fundamental Blocks/Power Electronics

49
Description

The Universal Bridge block implements a universal three-phase power converter that
consists of up to six power switches connected in a bridge configuration. The type of
power switch and converter configuration are selectable from the dialog box.

The Universal Bridge block allows simulation of converters using both naturally
commutated (and line-commutated) power electronic devices (diodes or thyristors) and
forced-commutated devices (GTO, IGBT, MOSFET).

The Universal Bridge block is the basic block for building two-level voltage-sourced
converters (VSC).

The device numbering is different if the power electronic devices are naturally
commutated or forced-commutated. For a naturally commutated three-phase converter
(diode and thyristor), numbering follows the natural order of commutation:

For the case of a two-phase diode or thyristor bridge, and for any other bridge
configuration, the order of commutation is the following:

50
GTO-Diode bridge:

IGBT-Diode bridge:

MOSFET-Diode and Ideal Switch bridges:

51
Parameters

Number of bridge arms

Set to 1 or 2 to get a single-phase converter (two or four switching devices). Set to 3 to

get a three-phase converter connected in Graetz bridge configuration (six switching
devices). Default is 3.

Snubber resistance Rs

The snubber resistance, in ohms (Ω). Default is 1e5. Set the Snubber resistance
Rs parameter to inf to eliminate the snubbers from the model.

Snubber capacitance Cs

The snubber capacitance, in farads (F). Default is inf. Set the Snubber capacitance
Cs parameter to 0 to eliminate the snubbers, or to inf to get a resistive snubber.

When you are using the continuous solver you can eliminate snubbers in all power
electronic devices if you select the Disable snubbers in switching devices option in the
Preference tab of the Powergui block

When your system is discretized, you can simulate power electronic devices with
virtually no snubbers by specifying purely resistive snubbers with a very large resistance,
thus producing negligible leakage currents. The bridge operates satisfactorily with purely
resistive snubbers.

Power electronic device

Select the type of power electronic device to use in the bridge. Default is Thyristors.

When you select Switching-function based VSC, a switching-function voltage source

converter type equivalent model is used, where switches are replaced by two voltage

52
sources on the AC side and a current source on the DC side. This model uses the same
firing pulses as for other power electronic devices and it correctly represents harmonics
normally generated by the bridge.

When you select Average-model based VSC, an average-model type of voltage source
converter is used to represent the power-electronic switches. Unlike the other power
electronic devices, this model uses the reference signals (uref) representing the average
voltages generated at the ABC terminals of the bridge. This model does not represent
harmonics. It can be used with larger sample times while preserving the average voltage
dynamics.

Ron

Internal resistance of the selected device, in ohms (Ω). Default is 1e-3.

Lon

Internal inductance, in henries (H), for the diode or the thyristor device. Default is 0.
When the bridge is discretized, the Lon parameter must be set to zero.

Forward voltage Vf

This parameter is available only when the selected Power electronic

device is Diodes or Thyristors.

Forward voltage, in volts (V), across the device when it is conducting. Default is 0.

Forward voltages [Device Vf, Diode Vfd]

This parameter is available when the selected Power electronic

device is GTO/Diodes or IGBT/Diodes.

Forward voltages, in volts (V), of the forced-commutated devices (GTO, MOSFET, or

IGBT) and of the antiparallel diodes. Default is [ 0 0 ].

53
Measurements

Default is none.

Select Device voltages to measure the voltages across the six power electronic device
terminals.

Select Device currents to measure the currents flowing through the six power electronic
devices. If antiparallel diodes are used, the measured current is the total current in the
forced-commutated device (GTO, MOSFET, or IGBT) and in the antiparallel diode. A
positive current therefore indicates a current flowing in the forced-commutated device
and a negative current indicates a current flowing in the diode. If snubber devices are
defined, the measured currents are the ones flowing through the power electronic devices
only.

Select UAB UBC UCA UDC voltages to measure the terminal voltages (AC and DC) of
the Universal Bridge block.

Select All voltages and currents to measure all voltages and currents defined for the
Universal Bridge block.

Place a Multimeter block in your model to display the selected measurements during the
simulation. In the Available Measurements menu of the Multimeter block, the
measurement is identified by a label followed by the block name.

Measurement Label

Device voltages Usw1:

Branch current Isw1:

Terminal voltages Uab:

54
Inputs and Outputs

The gate input for the controlled switch devices. The pulse ordering in the vector of the
gate signals corresponds to the switch number indicated in the six circuits shown in the
Description section. For the diode and thyristor bridges, the pulse ordering corresponds to
the natural order of commutation. For all other forced-commutated switches, pulses are
sent to upper and lower switches of phases A, B, and C.

Topology Pulse Vector of Input g

one arm [Q1,Q2]

two arms [Q1,Q2,Q3,Q4]

three arms [Q1,Q2,Q3,Q4,Q5,Q6]

5.6 Powergui

Environment block for Simscape Power Systems Specialized Technology models

Library

Fundamental Blocks (powerlib)

Description

The powergui block allows you to choose one of these methods to solve your circuit:

 Continuous, which uses a variable-step solver from Simulink.

55
  Discretization of the electrical system for a solution at fixed time steps.
 Phasor solution.

The powergui block also opens tools for steady-state and simulation results analysis and
for advanced parameter design.

You need the powergui block to simulate any Simulink model containing Simscape
Power Systems Specialized Technology blocks. It stores the equivalent Simulink circuit
that represents the state-space equations of the model. When using one powergui block in
a model:

Place the powergui block in the top-level diagram for optimal performance. Make sure
that the block uses the name powergui.

The powergui block becomes disabled during model update. To ensure proper model
execution, do not restore the library link for the powergui block.

You can use multiple powergui blocks in a system that contains two or more independent
electrical circuits that you want to simulate with different powergui solvers.

For example, this system simulates the upper electrical circuit in discrete mode and the
bottom circuit in continuous mode. The purpose is to compare simulation performance of
the two methods.

To do so, put each circuit in two different subsystem, and then add a powergui block
inside every subsystem.

When you use more than one powergui block in a model:

 Do not place a powergui block in the top-level diagram.

 Place every independent model in a different subsystem.

Place a single powergui block in the top level diagram of every subsystem.

56
Parameters

 Solver
 Tools
 Preferences

Solver

The configuration of the Solver tab depends on the option that you select from
the Simulation type list.

Simulation type

Select Continuous (default) to perform a continuous solution of the model.

Select Discrete to perform a discretization of the model. You specify the sample time in
the Sample time parameter.

Select Phasor to perform phasor simulation of the model, at the frequency specified by
the Phasor frequency parameter.

Sample time (s)

Specify the sample time used to discretize the electrical circuit. This parameter is visible
only when the Simulation type parameter is set to Discrete.

Set the Sample time parameter t to a value greater than 0. The powergui block displays
the value of the sample time. The default value is 50e-6 s.

Phasor frequency (Hz)

Specify the frequency for performing the phasor simulation of the model. This
parameter is enabled only when you set Simulation type to Phasor. The powergui block
displays the value of the phasor frequency. The default value is 60 Hz.

57
Tools

Steady-State

Open the Steady-State Voltages and Currents Tool dialog box to display the steady-state
voltages and currents of the model.

Initial State

Open the Initial States Setting Tool dialog box to display and modify initial capacitor
voltages and inductor currents of the model.

Machine Initialization

Open the Machine Initialization Tool dialog box to initialize three-phase networks
containing three-phase machines so that the simulation starts in steady state. The
Machine Initialization tool offers simplified load flow features but can still initialize
machine initial currents of your models.

Impedance Measurement

Open the Impedance vs Frequency Measurement Tool dialog box to display the
impedance versus frequency defined by the Impedance Measurement blocks.

FFT Analysis

Open the FFT Analysis Tool dialog box to perform Fourier analysis of signals stored in
a structure with time format.

Use Linear System Analyser

Open a window to generate the state-space model of your system (if you have Control
System Toolbox™ software installed) and open the Linear System Analyser interface
for time and frequency domain responses.

58
Hysteresis Design

Open a window to design a hysteresis characteristic for the saturable core of the
Saturable Transformer block and the Three-Phase Transformer blocks (two- and three-
windings).

RLC Line Parameters

Open a window to compute RLC parameters of an overhead transmission line from

conductor characteristics and tower geometry.

Generate Report

Open the Generate Report Tool dialog box to generate a report of steady-state variables,
initial states, and machine load flow for a model.

Customize SPS blocks

Open power customize to create custom Simscape Power Systems Specialized

Technology blocks.

Load Flow

Open the Load Flow Tool dialog box to perform load flow and initialize three-phase
networks and machines so that the simulation starts in steady state.

The Load Flow tool uses the Newton-Raphson method to provide robust and faster
convergence solution compared to the Machine Initialization tool.

The Load Flow tool offers most of the functionality of other tools available in the power
utility industry.

Max iterations

Defines the maximum number of iterations the Load flow tool iterates until the P and Q
powers mismatch at each bus is lower than the PQ tolerance parameter value (in
pu/Pbase). The power mismatch is defined as the difference between the net power

59
injected into the bus by generators and loads and the power transmitted on all links
leaving that bus. For example, if the base power is 100 MVA and PQ tolerance is set
to 1e-4, the maximum power mismatch at all buses does not exceed 0.1 MW or 0.1
MVAR.. The default value is 50.

Frequency (Hz)

Specify the frequency used by the Load Flow tool to compute the normalized Ybus
network admittance matrix of the model and to perform the load flow calculations. The
default value is 60 Hz.

Base power (VA)

Specify the base power used by the Load Flow tool to compute the normalized Ybus
network admittance matrix in pu/Pbase and bus base voltages of the model, at the
frequency specified by the Load flow frequency parameter.

To avoid a badly conditioned Ybus matrix, select the base power value in the range of
nominal powers and loads of the model. For a transmission network with voltages
ranging from 120 kV to 765 kV, a 100 MVA base is usually selected. For a distribution
network or for a small plant consisting of generators, motors, and loads having a
nominal power in the range of hundreds of kilowatts, a 1 MVA base power is better
adapted. The default value is 100e6 VA.

PQ tolerance (pu)

Defines the tolerance between P and Q when the Load flow tool stops to iterate. The
default value is 0.0001.

Voltage units

Determine the voltage units (V, kV) used by the Load Flow tool to display voltages.
The default is kV.

Power units

Determine the power units (W, kW, MW) used by the Load Flow tool to display
powers. The default is MW.

60
Preferences

The load flow parameters are for model initialization only. They do not have an impact
on simulation performance.

Disable Simscape Power Systems ST warnings

When this check box is selected, the Simscape Power Systems warnings do not display
during model analysis and simulation. By default, this option is not selected.

Display Simscape Power Systems ST compilation messages

Select to enable the command-line echo messages during model analysis. By default,
this option is not selected.

Use TLC file when in Accelerator Simulation Mode and for code generation

Select to use TLC state-space S-functions

(sfun_spssw_contc.tlc and sfun_spssw_discc.tlc) in Accelerator mode and for code
generation.

Clear this box if you notice a slowdown in performance when using Accelerator mode,
compared to previous releases. This slowdown occurs if you have the LCC compiler
installed as the default compiler for building external interface (mex). By default, this
option is not selected.

Disable ideal switching

Select this option to model switching devices as current sources. By default, this option
is not selected, which corresponds to the recommended setting for most of your
applications.

Modelling switches, such as circuit breakers or power electronic devices, as current

sources implies that the on-state switch resistance Ron cannot be zero. In this modelling
method, the switches cannot be connected in a series with an inductive circuit or with
another switch or current source.

61
When this option is enabled, you must add a circuit (R or RC snubber) in parallel with
the switches in your model so that their off-state impedance has a finite value. If your
real circuit does not use snubbers, or if you want to simulate ideal switches with no
snubber, you must at least use resistive snubbers with a high resistance value to
introduce a negligible leakage current. The drawback of introducing such high-
impedance snubbers is that the large difference between the on-state and the off-state
switch impedance produces a stiff state-space model.

Disable snubbers in switching devices

Select to disable the snubber devices of the power electronic and breaker blocks in your
model. This parameter is enabled only when the Simulation type parameter is set to
Continuous and the Disable ideal switching option is cleared. By default, this option is
cleared.

Disable Ron resistance in switching devices

Select to disable the internal resistance of switches and power electronic devices and to
force the value to zero ohms. This parameter is enabled only when the Simulation type
parameter is set to Continuous and the Disable ideal switching option is cleared. By
default, this option is cleared.

Disable forward voltage in switching devices (Vf=0)

Select to disable the internal forward voltage of power electronic devices and to force
the value to zero volts. This parameter is enabled only if the Simulation type parameter
is set to Continuous and if the Disable ideal switching option is cleared. By default, this
option is cleared.

Display circuit differential equations

Select to display the differential equations of the model in the Diagnostic Viewer when
the simulation starts. This parameter is enabled only when the Simulation
type parameter is set to Continuous and the Disable ideal switching option is cleared.
By default, this option is cleared.

62
Discrete solver

Set to Tustin/Backward Euler (TBE) to simulate the electrical model using a

combination of Tustin and Backward Euler methods.

Set to Tustin to discretize the electrical model using the Tustin method. If you use this
solver, you need to specify Rs and Cs snubber values to avoid numerical oscillations
when the firing pulses are blocked (bridge operating as a rectifier). In this condition,
you must use appropriate values of Rs and Cs. You can use the following formulas to
compute approximate values of Rs and Cs:

Rs > 2*Ts/Cs

Cs < Pn/(1000*2*pi*f*Vn^2

where

 Pn is the nominal power of single-phase or three-phase converter, in VA.

 Vn is the nominal line-to-line AC voltage, in Vrms.
 f is the fundamental frequency, in Hz.
 Ts is the sample time, in s.

These values are derived from the following two criteria:

 The snubber leakage current at fundamental frequency is less than 0.1% of

nominal current when power electronic devices are not conducting.
 The RC time constant of snubbers is larger than two times the sample time Ts.

Set to Backward Euler to discretize the electrical model using the Backward Euler
method.

The default and recommended method is the Tustin/Backward Euler (TBE) method.
This parameter is enabled only if you set the Simulation Type parameter to Discrete.

Interpolate switching events

This parameter is enabled only when discrete solver is set to Tustin. Select to increase
simulation speed by enabling the solver to interpolate in discrete models using power
electronics. When this option is selected, the solver captures gate transitions of power

63
electronic devices occurring between two sample times, allowing larger sample times
(typically 20×) than you use with the standard solvers. For example, simulating a 5 kHz
PWM converter with Tustin (no interpolation) or Tustin/Backward Euler normally
requires a 1.0 µs sample time (sampling frequency = 200 × PWM frequency) to obtain a
good resolution on pulse generation and guarantee accurate results. With interpolation
enabled, using a sample time as large as 20 µs executes faster while preserving model
accuracy.

When you select this option:

Use a continuous pulse generator to guarantee the best accuracy on pulse generation
(specify sample time = 0 in pulse-generation blocks).

In Simulink Model Configuration Parameters, select a continuous, variable-step

solver (ode45 or ode23tb with default settings). The continuous solver is required by the
interpolation solver to compute the gate signals time delays with respect to discrete
sample times. The solver uses these pulse delays to interpolate between sample times
and produce accurate results.

Use time-stamped gate signals

This option is enabled when the Interpolate switching events option is selected. The
interpolation method computes model outputs at fixed sample times while taking into
account switching events that occur between two sample times. The method receives
pulses at fixed time steps and computes the time delays of gate signals arriving within
each time step. Computing the time delays enables the method to capture the evolution
of states at different switching times.

When Use time-stamped gate signals is cleared, the interpolation method computes the
time delays of gate signal.

When Use time-stamped gate signals is selected, the block does not compute the time
delays of gate signals. You then need to directly provide time-stamped gate signals to
the switching devices in your model. See the power buck example for more information
on the concept of time-stamped gate signals in Simscape Power Systems switching
devices.

64
The Use time-stamped gate signals parameter is enabled only when you set Simulation
type to Discrete, set Solver type to Tustin, and select the Interpolate option. By default,
this option is cleared.

Store switching topologies

Select to increase simulation speed by enabling the solver to store and reuse matrix
computation results. This parameter is enabled only when you set Simulation
type toDiscrete, set Solver type to Tustin, and select the Interpolate option. By default,
this option is not selected.

Buffer Size (MBytes)

Specify the buffer size for saving state-space matrix computations. This parameter is
enabled only when you set Simulation type to Discrete, set Solver type to Tustin, and
select the Interpolate and Store state-space matrices options. The default value
is 100 MB.

Start simulation with initial electrical states from

If you select blocks, initial state values defined in blocks are used for the simulation.

If you select steady, force all initial electrical state values to steady-state values.

If you select zero, force all initial electrical state values to zero.

The default is blocks.

5.7 Injection Transformer

Implement three single-phase, two-winding transformers where all terminals are

accessible

Library

65
Fundamental Blocks/Elements

Description

The Three-Phase Transformer 12 Terminals block implements three single-phase, two-

winding linear transformers where all the 12 winding connectors are accessible.

The block can be used in place of the Three-Phase Transformer (Two Windings) block
to implement a three-phase transformer when primary and secondary are not necessarily
connected in Y or Delta.

Parameters

[Three-phase rated power Frequency]

The total nominal power of the three phases, in volt-amperes (VA), and the nominal
frequency, in hertz (Hz). Default is [ 10e6 60 ].

Winding 1: [phase voltage R X]

The nominal voltage of the three primary windings (labeled 1) in volts RMS (Vrms), the
winding resistances, in pu, and the winding leakage reactances, in pu. Default is [ 10e3
0.002 0.05 ].

66
Winding 2: [phase voltage R X]

The nominal voltage of the three secondary windings (labeled 2) in volts RMS (Vrms),
the winding resistances, in pu, and the winding leakage reactances, in pu. Default is [
25e3 0.002 0.05].

Magnetizing branch: [Rm Xm]

The resistance and reactance simulating the core active and reactive losses, both in pu.
For example, to specify 0.2% of active and reactive core losses, at nominal voltage, use
Rm = 500 pu and Lm = 500 pu. Lm can be set to inf (no reactive core losses), but Rm
must have a finite value. Default is [ 200 200 ].

5.8 Three-Phase Fault

Implement programmable phase-to-phase and phase-to-ground fault breaker system.

Library

Fundamental Blocks/Elements

67
Description

The Three-Phase Fault block implements a three-phase circuit breaker where the
opening and closing times can be controlled either from an external Simulink® signal
(external control mode), or from an internal control timer (internal control mode).

The Three-Phase Fault block uses three Breaker blocks that can be individually
switched on and off to program phase-to-phase faults, phase-to-ground faults, or a
combination of phase-to-phase and ground faults. The arc extinction process of the
Three-Phase Fault block is the same as for the Breaker block. See the Breaker block for
details on the modeling of the single-phase breakers.

Figure. 5.3 Ground Resistance Rg

The ground resistance Rg is automatically set to 106 ohms when the ground fault option
is not programmed. For example, to program a fault between the phases A and B you
need to select the Phase A and Phase B block parameters only. To program a fault
between the phase A and the ground, you need to select the Phase
A and Ground parameters and specify a small value for the ground resistance.

If the Three-Phase Fault block is set in external control mode, a control input appears in
the block icon. The control signal connected to the fourth Simulink input must be
either 0, which opens the breakers, or any positive value, which closes the breakers. For
clarity, a 1 signal is commonly used to close the breakers. If the Three-Phase Fault
block is set in internal control mode, the switching times and status are specified in the
dialog box of the block.

68
Series Rs-Cs snubber circuits are included in the model. They can be optionally
connected to the fault breakers. If the Three-Phase Fault block is in series with an
inductive circuit, an open circuit or a current source, you must use the snubbers.

Parameters

Initial status

The initial status of the fault breaker is usually the default value, 0 (open). However,
you can start the simulation in steady state with the fault initially applied on the system.

Phase A

If selected, the fault switching of phase A is activated. If not selected, the breaker of
phase A stays in the status specified in the Initial status parameter. Default is selected.

Phase B

If selected, the fault switching of phase B is activated. If not selected, the breaker of
phase B stays in the status specified in the Initial status parameter. Default is selected.

Phase C

If selected, the fault switching of phase C is activated. If not selected, the breaker of
phase C stays in the status specified in the Initial status parameter. Default is selected.

Ground

If selected, the fault switching to the ground is activated. A fault to the ground can be
programed for the activated phases. For example, if the Phase C and Ground parameters
are selected, a fault to the ground is applied to the phase C. The ground resistance is set
internally to 1e6 ohms when the Ground parameter is not selected. Default is selected.

Switching times (s)

Specify the vector of switching times when using the Three-Phase Breaker block in
internal control mode. At each transition time the selected fault breakers opens or closes

69
depending to the initial status. This parameter is not available if the External parameter
is selected. Default is [1/60 5/60].

External

If selected, adds a fourth input port to the Three-Phase Fault block for an external
control of the switching times of the fault breakers. The switching times are defined by
a Simulink signal (0 or 1) connected to the fourth input port of the block. Default is
cleared.

Fault resistances Ron

The internal resistance, in ohms (Ω), of the phase fault breakers. This parameter cannot
be set to 0. Default is 0.001.

Ground resistance Rg

This parameter is available only if the Ground parameter is selected. The ground
resistance, in ohms (Ω). This parameter cannot be set to 0. Default is 0.01.

Snubbers resistance Rs

The snubber resistances, in ohms (Ω). Set this parameter to inf to eliminate the snubbers
from the model. Default is 1e6.

Snubbers capacitance Cs

The snubber capacitances, in farads (F). Set this parameter to 0 to eliminate the
snubbers, or to inf to get resistive snubbers. Default is inf.

Inputs and Outputs

The three fault breakers are connected in wye between terminals A, B, and C and the
internal ground resistor. If the Three-Phase Fault block is set to external control mode, a
Simulink input is added to the block to control the opening and closing of the three
internal breakers.

70
The first simulation was done with no DVR and a three phase fault is applied to the

system at point with fault resistance of 0.66 Ω for a time duration of 200 ms. The

second simulation is carried out at the same scenario as above but a DVR is now

introduced at the load side to compensate the voltage sag occurred due to the three

phase fault applied.

Figure 5.1 shows the rms voltage at load point when the system operates with no DVR
and a three phase fault is applied to the system. When the DVR is in operation the
voltage interruption is compensated and almost completely and the rms voltage at the
sensitive load point is maintained at normal condition.

71
Figure. 5.4: Three-phase voltages sag: (a)-Supply voltage, (b)-voltages injected by the

DVR, (c)- voltage at load. VL(p.u.)

72
 Chapter 6

Conclusion
This paper has presented the power quality problems such as voltage dips, swells,

distortions and harmonics. Compensation techniques of custom power electronic

devices DVR was presented. The design and applications of DVR for voltage sags and

comprehensive results were presented. A PWM-based control scheme was

implemented. As opposed to fundamental frequency switching schemes already

available in the MATLAB/ SIMULINK, this PWM control scheme only requires

voltage measurements. This characteristic makes it ideally suitable for low-voltage

custom power applications.

73
References

[1] Bingsen Wang, Giri Venkataramanan and Mahesh Illindala, “Operation and

Control of a Dynamic Voltage Restorer Using Transformer Coupled H-

Bridge Converters”, IEEE transactions on power electronics, VOL. 21, NO.

4, JULY 2006.

[2] Ray Arnold “Solutions to Power Quality Problems” power engineering

journal 2001 pages: 65-73.

[3] John Stones and Alan Collinsion “Introduction to Power Quality” power

engineering journal 2001 pages: 58 -64.

[4] Gregory F. Reed, Masatoshi Takeda, "Improved power quality solutions

using advanced solid-state switching and static compensation technologies,"

Power Engineering Society 1999 Winter Meeting, IEEE.

[5] G. Venkataramanan and B. Johnson, “A pulse width modulated power line

conditioner for sensitive load centers,” IEEE Trans. Power Delivery, vol.

12, pp. 844–849, Apr. 1997.

[6] F. Z. Peng, H. Akagi, and A. Nabae, “Compensation characteristics of the

combined system of shunt passive and series active filters,” IEEE Trans.

Ind. Applicat., vol. 29, pp.

[7] S. S. Choi, B. H. Li, and D. D.Vilathgamuwa, “Dynamic voltage restoration

with minimum energy injection,” IEEE Trans. Power Syst., vol. 15,pp. 51–

57, Feb. 2000.

[8] M. H. J. Bollen, “Understanding Power Quality Problems—Voltage Sags

and Interruptions” Piscataway, New York: IEEE Press, 2000.

74
 [9] N. Mohan, T.M. Undeland, W.P. Robbins, Power Electronics: Converters,

Applications and Design, second ed., John Wiley & Sons, Neywork,1995.,

pp. 471-475.

[10] Mehmet Tümay, Ahmet Teke, K. Çağatay Bayındır, M. Uğraş Cuma,

“Simulation and modeling of a dynamic voltage restorer”.

[11] Singh Mahesh, Tiwari Vaibhav, “ Modeling analysis and solution of Power

Quality Problems”.

[12] J.G Neilsen, F. Blaabjerg, Comparison of system topologies for dynamic

voltage restorer, in: Proceedings of IEEE Industry Applications Conference

2001, vol. 1, pp. 2397-2403.

[13] Norbert EDOMAH, “Effects of voltage sags, swell and other disturbances

on electrical equipment and their economic implications”, Paper 0018, 20th

International Conference on Electricity Distribution, Prague, 8-11 June

2009.

75