Scribd
Upload
40 views23 pages

NMOS

The document describes the process for fabricating an NMOS transistor. Key steps include: 1) Growing a thin layer of silicon dioxide on a p-type silicon substrate then depositing polysilicon to form the gate. 2) Implanting n-type dopants to form the source and drain regions. 3) Depositing a thick silicon dioxide layer and using photolithography to open contacts to the gate, source and drain.

Uploaded by

Sri
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
40 views23 pages

NMOS

The document describes the process for fabricating an NMOS transistor. Key steps include: 1) Growing a thin layer of silicon dioxide on a p-type silicon substrate then depositing polysilicon to form the gate. 2) Implanting n-type dopants to form the source and drain regions. 3) Depositing a thick silicon dioxide layer and using photolithography to open contacts to the gate, source and drain.

Uploaded by

Sri
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 23

NMOS Fabrication

N-MOS Fabrication Process

Si-substrate

Fig. (1) Pure Si single crystal

------------------------
-------------------------
--------------------------
-------------------------

Fig. (2) P-type impurity is lightly


doped
N-MOS Fabrication Process

Thick SiO2
(1 µm)
------------------------
-------------------------
--------------------------
-------------------------

Fig. (3) SiO2 Deposited over si surface

Photoresist
Thick SiO2
(1 µm)
------------------------
-------------------------
--------------------------
-------------------------
Fig. (4) Photoresist is deposited
over SiO2 layer
N-MOS Fabrication Process

UV Light

Mask-1

Photoresist
Thick SiO2
(1 µm)
-------------------------------
----------------------------------
-- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
----------------------------------
Mask-1 is used to expose the SiO2
where S, D and G is to be formed.

Fig. (5) Photoresist layer is


exposed to UV Light through a
mask
N-MOS Fabrication Process

Polymerised
Photoresist

-------------------------------
----------------------------------
Thick SiO2
-- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - (1 µm)
----------------------------------

Fig. (6) Developer removes unpolymerised photoresist. It


will cause no effect on Si surface
N-MOS Fabrication Process

Thick SiO2
(1 µm)
-------------------------------
----------------------------------
-- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
----------------------------------

Fig. (7) Etching [HF acid is used] will remove SiO2 layer
which is in direct contact with etching solution
N-MOS Fabrication Process

Thick SiO2
(1 µm)
-------------------------------
----------------------------------
-- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
----------------------------------

Fig. (7) unpolymerised photoresist is also etched away


[using H2SO4]
N-MOS Fabrication Process

Thin SiO2
(0.1 µm)

Thick SiO2
(1 µm)
-------------------------------
----------------------------------
-- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
----------------------------------

Fig. (8) A thin layer of SiO2 grown over the entire chip surface
N-MOS Fabrication Process

Polysilicon layer
(1 – 2 µm)

-------------------------------
---------------------------------- Thin SiO2
Thick SiO2 (0.1 µm)
-- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
(1 µm)
----------------------------------

Fig. (9) A thin layer of polysilicon is grown over the entire chip
surface to form GATE
N-MOS Fabrication Process

Photoresist

Polysilicon
layer

------------------------------- Thin SiO2


---------------------------------- (0.1 µm)
-- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - Thick SiO2
---------------------------------- (1 µm)

Fig. (10) A layer of photoresist is grown over polysilicon layer


N-MOS Fabrication Process

UV Light

Mask-2

-------------------------------
----------------------------------
-- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
----------------------------------
Mask-2 is used to deposit
Polysilicon to form gate.
Fig. (11) Photoresist is exposed to UV Light
N-MOS Fabrication Process

Polysilicon
Thin SiO2
(0.1 µm)

Thick SiO2
(1 µm)
-------------------------------
----------------------------------
-- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
----------------------------------

Fig. (12) Etching will remove that portion of Thin SiO2 which is
not exposed to UV light
N-MOS Fabrication Process

Polysilicon used as GATE


(1 – 2 µm)

Thin SiO2
(0.1 µm)

Thick SiO2
(1 µm)
-------------------------------
----------------------------------
-- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
----------------------------------

Fig. (13) Polymerised photoresist is also stripped away


N-MOS Fabrication Process

GATE

SOURCE DRAIN

Thin SiO2
(0.1 µm)

Thick SiO2
(1 µm)
- - - - - - - - - - - - -- -- -- - - - -- -- - - - - - - - - - - -
- - - - - - - - - - - - - - - - - - - - -- -- - - - - - - - - - - - -
-- - - - - - - - - - - - - n+
- - - - - - - -n+ ------------
----------------------------------

Fig. (14) n+ Doping to form SOURCE and DRAIN


N-MOS Fabrication Process
Step - Metallization

- - - - - - - - - - - - -- -- -- - - - -- -- - - - - - - - - - - -
- - - - - - - - - - - - - - - - - - - - -- -- - - - - - - - - - - - -
-- - - - - - - - - - - - - n+
- - - - - - - -n+ ------------ Thick SiO2 Thick SiO2
(1 µm) (1 µm)
----------------------------------

Fig. (15) A thick layer of SiO2 (1 µm) is again grown.


N-MOS Fabrication Process
Step - Metallization

UV Light

Mask-3

Mask-3 is used to make contact cuts for S, D and G.


Photoresist

- - - - - - - - - - - - -- -- -- - - - -- -- - - - - - - - - - - -
- - - - - - - - - - - - - - - - - - - - -- -- - - - - - - - - - - - -
-- - - - - - - - - - - - - n+
- - - - - - - -n+ ------------ Thick SiO2 Thick SiO2
(1 µm) (1 µm)
----------------------------------

Fig. (16) Photoresist is grown over thick SiO2. Selected areas of the poly GATE and SOURCE and
DRAIN are exposed where contact cuts are to be made
N-MOS Fabrication Process
Step - Metallization

Mask-3

Photoresist

- - - - - - - - - - - - -- -- -- - - - -- -- - - - - - - - - - - -
- - - - - - - - - - - - - - - - - - - - -- -- - - - - - - - - - - - -
-- - - - - - - - - - - - - n+
- - - - - - - -n+ ------------ Thick SiO2 Thick SiO2
(1 µm) (1 µm)
----------------------------------

Fig. (17) The region of photoresist which is not exposed by UV light will become soft. This
unpolymerised photoresist and SiO2 below it are etched away.
N-MOS Fabrication Process
Step - Metallization

Mask-3

Photoresist

- - - - - - - - - - - - -- -- -- - - - -- -- - - - - - - - - - - -
- - - - - - - - - - - - - - - - - - - - -- -- - - - - - - - - - - - -
-- - - - - - - - - - - - - n+
- - - - - - - -n+ ------------ Thick SiO2 Thick SiO2
(1 µm) (1 µm)
----------------------------------

Fig. (18) The contact cuts are formed for S, D and G (hardened photoresist is stripped away).
N-MOS Fabrication Process
Step - Metallization

Metal (1µm)

- - - - - - - - - - - - -- -- -- - - - -- -- - - - - - - - - - - -
- - - - - - - - - - - - - - - - - - - - -- -- - - - - - - - - - - - -
-- - - - - - - - - - - - - n+
- - - - - - - -n+ ------------ Thick SiO2 Thick SiO2
(1 µm) (1 µm)
----------------------------------

Fig. (19) Metal (aluminium) is deposited over the surface of whole chip (1 µm thickness).
N-MOS Fabrication Process
Step - Metallization

Photoresist

Metal (1µm)

- - - - - - - - - - - - -- -- -- - - - -- -- - - - - - - - - - - -
- - - - - - - - - - - - - - - - - - - - -- -- - - - - - - - - - - - -
-- - - - - - - - - - - - - n+
- - - - - - - -n+ ------------ Thick SiO2 Thick SiO2
(1 µm) (1 µm)
----------------------------------

Fig. (20) Photoresist is deposited over the metal.


N-MOS Fabrication Process
Step - Metallization

UV Light

Mask-4

Photoresist
Metal (1µm)

- - - - - - - - - - - - -- -- -- - - - -- -- - - - - - - - - - - -
- - - - - - - - - - - - - - - - - - - - -- -- - - - - - - - - - - - -
-- - - - - - - - - - - - - n+
- - - - - - - -n+ ------------ Thick SiO2 Thick SiO2
(1 µm) (1 µm)
----------------------------------
Mask-4 is used to deposit metal in contact cuts of S, D and G.

Fig. (21) UV Light is passed through Mask-4 (with a aim of removing all metal other than metal in
contact-cuts).
N-MOS Fabrication Process
Step - Metallization

Mask-4

Photoresist
Metal (1µm)

- - - - - - - - - - - - -- -- -- - - - -- -- - - - - - - - - - - -
- - - - - - - - - - - - - - - - - - - - -- -- - - - - - - - - - - - -
-- - - - - - - - - - - - - n+
- - - - - - - -n+ ------------ Thick SiO2 Thick SiO2
(1 µm) (1 µm)
----------------------------------

Fig. (22) Photoresist and metal which is not exposed to UV light are etched away.
N-MOS Fabrication Process
Step - Metallization

SOURCE DRAIN
GATE

- - - - - - - - - - - - -- -- -- - - - -- -- - - - - - - - - - - -
- - - - - - - - - - - - - - - - - - - - -- -- - - - - - - - - - - - -
-- - - - - - - - - - - - - n+
- - - - - - - -n+ ------------
----------------------------------

Fig. (23) Final n-MOS Transistor

You might also like