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FPGA Based Direct Model Predictive Current

Control of PMSM Drives with 3L-NPC Power
Converters

Conference Paper · May 2016

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FPGA Based Direct Model Predictive Current Control of PMSM
Drives with 3L-NPC Power Converters

Zhenbin, Zhang, Technische Universität München, Germany, [email protected]

Christoph, Hackl, Technische Universität München, Germany, [email protected]
Ralph, Kennel, Technische Universität München, Germany, [email protected]

Abstract

Direct control techniques are interesting alternatives, in particular, for drive systems with multi-
level and/or multi-phase power converters, for which the modulator design becomes rather
complex. This work presents a direct model predictive current control (DMPCC) method for
permanent-magnet synchronous machine (PMSM) drives fed by three level neutral point clamped
(3L-NPC) power converters. The proposed DMPCC method takes the currents, neutral point
voltage balancing and switching frequency regulations as control targets and is implemented
on a FPGA based real-time controller. Its control performances are compared with the conven-
tional direct torque control method with switching table (DTC-TB). Experimental results confirm
that the proposed DMPCC scheme may outperform the conventional DTC-TB technique in
steady-state with reduced tuning efforts.

1. Introduction

Three-level neutral-point (diode) clamped (3L-NPC) power converters are widely used in medium
voltage drives. This topology allows for more than two voltage levels and the required amount
of components is drastically less than for five-level topologies. Permanent-magnet synchronous
machines (PMSM) show nice features such as, high efficiency, compact size and simple con-
trol, hence PMSMS are a viable choice for high performance drives or energy generation.
Fig. 1 depicts the topology of a PMSM drive system with 3L-NPC power converter. Con-
sidering whether a modulator is required or not, control schemes to deal with such systems
are divided into two groups (see [1, 2]): (a) Modulator based (linear) control schemes, such
as: field-oriented control (FOC); direct torque control with modulator, and deadbeat like model
predictive control (DBC); (b) (Nonlinear) direct control methods, such as: direct torque con-
trol with look-up table (DTC-TB) and direct model predictive control (DMPC) with cost-function.
Control methods with modulator (which is usually based on the principle of “timed-average-
approximation” [3]) is straight-forward for two-level power converter based systems. However,
for multi-level power converters (e.g., 3L-NPC power converters), in particular when considering
neutral point voltage balancing or common-mode voltage minimization requirements, modula-
tor design becomes (rather) complex. Moreover, a power conversion/drive system driven by a
multi-level power converter is, in essence, a highly nonlinear and switched system. From the
concept point of view, by approximating such a system as a linear plant and using a modulator
to emulate the continuous commands will constrain the potential dynamics of the system.
On the contrary, direct control methods — such as DMPC — take the switched nature of the
power converter into account and combine modulation and switching sequence decision pro-
cess into one single step, hence no “averaging” approximation of the modulation method is
required and a modulator is obsolete. DMPC can easily include multiple nonlinear constraints
into a customer designed cost function. Its implementation has appealing features, such as:
straight-forward concept, flexible design and fast control dynamics, etc. Therefore, this tech-
nique has been subject to extensive research in the last decade(s). However, high compu-
tational load is regarded the short-coming in comparison with conventional techniques (e.g.,
switching table based DTC). Real-time implementation using FPGA-based systems provides a
(feasible) choice to tackle the heavy computational loads.
This work presents a (nonlinear) direct model predictive current control (DMPCC) method
based on the DMPC concept for a PMSM drive system fed by 3L-NPC power converter. No
extra weightings are required for the targeting set control. The achieved control performance
is compared to conventional DTC-TB techniques by experiments. The presented method is
implemented on a fully FPGA-based real-time system.

A B
Fig. 1: Simplified electrical circuit of a 3L-NPC PMSM(G) drive system

2. Physical system description and system modeling

Fig. 1 illustrates the considered physical system. This section revisits the detailed modeling of
the system in discrete time. A short description for all the symbols used in the figures and the
models are as follows: ~vm abc = (v a , v b , v c )> [V]3 is the output voltage vector of the power con-
m m m
verter, ~iabc a b c > 3
m = (im , im , im ) [A] are the PMSM stator current vectors, ωe , ωm [rad/s] are the rotor
electrical and mechanical rotational speed (ωe = Np ωm , Np is the number of pole pairs), φe [rad]
is the electrical angle (position) of the rotor flux, ψ ~ abc = (ψ a , ψ b , ψ c )> [Vs]3 , ψpm [Vs], Rs [Ω] and
s s s s
Ls [Vs/A] are the stator and permanent-magnet flux linkages, stator resistance and inductance,
respectively, Vd , Vc1 , Vc2 [V] are the DC-link, upper and lower capacitor voltages, respectively;
p,n
Vo := Vc1 − Vc2 , [V] is the neutral point voltage, Is , Im are the source, positive and negative
2
currents of the DC-link (see Fig. 1), Θm , [kgm ] and B, [Nms/rad] are the total moment of inertia
and viscous friction coefficient1 , respectively, Tt[k] , [Nm] is the load side torque. All quantities
in abc frame can be transformed to αβ reference frame by invoking the Clarke transformation
given by (with Clarke transformation matrix TC )
1
−√21
q  
αβ 2 1 −
~x = 3 0
√ 2
3 3 ~xabc . (1)
2 − 2
| {z }
=:T c (Clarke transformation)
1 Note that viscous friction is mostly described by a constant.
2.1. PMSM modeling in αβ frame

Assuming that the rotor flux position θe will not change within a very small control interval
Ts  1 s, i.e., θe[k+1] ≈ θe[k] , applying the Euler-forward method yields the following discrete-
time model of the PMSM in αβ reference frame [4]:
 ! 
~i αβ
 
αβ αβ −ψ ω
pm e[k] sin (θ e[k] )
1 − TLs Rs s ~im[k] + LTss ~vm[k]

m[k+1] = − .


ψpm ωe[k] cos(θe[k] )




| {z } 

αβ

=:~em[k]


  
~
ψ αβ ~ αβ αβ αβ
vm[k] − Rs~im[k] · Ts , . (2)
s[k+1] = ψs[k] + ~ ! 

  

β β

α α
ωe[k+1] = ωe[k] + ΘmTsNp Tt[k] − Np ψs[k] im[k] − ψs[k] im[k] −B · ωm[k] 



| {z } 



=:T
e[k]

2.2. 3L NPC power converter

Considering the 3L-NPC converter depicted in Fig. 1, for x ∈ {a, b, c} and i ∈ {1, 2}, the gate
signals of the upper IGBTs are introduced as Gxi m . Considering the non-shoot-through opera-
tion principle of such a topology, the gate signals of the lower IGBTs shall be complementary
(negated) to the upper ones (see Fig. 1), i.e, given the upper switching state is Gxi m , the lower
shall be Ḡxi . Therefore, neglecting all the uncertain switching combination 2 , we can define the
m
switching state vector by

1(P )
 if : Gx1 x2
m = 1 ∧ Gm = 1
uxm := 0 (0) if : Gx1 x2
m = 0 ∧ Gm = 1 (3)

 x1
−1(N ) if : Gm = 0 ∧ Gm = 0x2

for phase x. Then the switching state vector has the following form ~uabc a b c >
m = [um , um , um ] and
∈ U27 := {NNN, NN0, . . . , PP0, PPP} of 27 admissible switching states. Hence, for DC-link
voltages Vc1 and Vc2 (see Fig. 1), the phase voltages (for only balanced/symmetric situation) of
the converter can be described by [2]:
 a    
vm 2 −1 −1 2 −1 −1
abc b  = 1 · (Vc1 + Vc2 ) −1 1 (Vc1 − Vc2 ) 
~vm = vm 2 −1 ~uabc
m + · −1 2 −1 |~uabc
m |
c 2 3 2 3
vm −1 −1 2 −1 −1 2
| {z } | {z }
:=TSW :=T SW
(4)

2.3. DC-link and neutral point voltage dynamics

For a 3L-NPC power converter, the DC-link modeling includes both the DC-link charging/dis-
charging equation and also the DC-link capacitor voltage difference equation. They are intro-
duced separately in the following.
2 Uncertain switching combination means that the combination which lead to uncertain output voltages

(e.g., Gx1 x2
m = 1 ∧ Gm = 0).
DC-link (charging/discharging) equation:

The DC-link voltage equation, when considering the current flow of the converter (see Fig. 1),
can be modeled in the discrete time as follows
 
Vd[k+1] = Vd[k] + TCs Is[k] − Im[k] , (5)

where Im[k] = ~iabc> uabc

m[k] · ~ m[k] and Is are DC-link current components of the source and load sides,
respectively.

DC-link capacitor voltage difference equation:

To achieve voltage balancing, the difference voltage Vo (t) := Vc1 (t) − Vc2 (t) should be zero (for
all time) and it can be controlled through the power converter. As can be observed in Fig. 1, Vo
depends on the charging state of the two DC-link capacitors C1 and C2 (where C := C1 = C2 )
and will only change when currents Im o (which is the neutral point current, see Fig. 1) is drawn

from it (see Fig. 1), i.e., when ~um contains “zero” elements. For a given phase current vector
~iabc a b c >
m := [im , im , im ] , the positive and negative currents of

p 1 ~abc 1 ~abc
Im = (|~uabc | + ~uabc
m ) im ,
n
Im = (|~uabc | − ~uabc
m ) im (6)
2 m 2 m
can be computed. Therefore, the dynamics of Vo are given by

dVo dVc1 dVc2 1 n p o 1

= − = n
(Im + Im ) = |~uabc |~iabc> (7)
dt dt dt C C m m
Applying the forward Euler approximation yields the voltage difference equation for the DC-link
voltage difference as follows

Ts ~abc> abc
Vo[k+1] = Vo[k] + |i · ~um[k] |. (8)
C m[k]

3. Control Algorithms

3.1. DMPC and the proposed direct model predictive current control

Classical DMPC schemes evaluate a given cost function of the following form
m n
p
X X
∗ ∗
JDMPC (~ui,j ) = γTSi |T Si[k+1] − T Si[k+1] (~ui )| + γCSj |CSj[k+1] − CSj[k+1] (~uj )|, (9)
|i=1 {z } j=1
| {z }
=:JTS =:JCS

which describes the aimed at control objectives consisting in general of two parts: JTSi and
JCSj (with corresponding weighting factors γTSi and γCSj ). JTSi and JCSj represent sub-costs
for the Target Set TSi (such as: reference tracking of current, torque, or power with reference
TS∗i ) and the Constraint Set CSj (such as: current/torque, or power constraints with reference
CS∗j ), respectively. MTSi and MCSj are abbreviations for the prediction model for the Target
Set TSi and the prediction model for the Constraint Set CSj , respectively. For the considered
3L-NPC converter, the control set is ~um ∈ U27 . After evaluating and minimizing cost-function
~ will be applied to the converter.
(9) for ~um ∈ U27 , the optimal gate vector G
The proposed direct model predictive current control takes the stator current tracking as the
target set (i.e., JTSm in (10)) and the DC-link voltage balancing requirement (JVo ) and switching
frequency regulation (Jsfm ) as the constraint set (i.e., JCSm in (10)). DMPCC is designed in
the αβ frame to eliminate the Park transformation. Therefore, the cost function is defined by
JVo
Jsfm
m α∗ α

2 β∗ β
2 z }|
{2 z }| {
JDMPC (~um ) = im − im[k+1] (~um ) + im − im[k+1] (~um ) + γVo Vo[k+1] (~um ) + γsf ∆~um , (10)
| {z } | {z }
=:JTSm =:JCSm

where γVo [1], γsf [1] are the weighting factors, ∆~um is responsible for the switching frequency
regulation, and is defined as

∆~um = |uam[k+1] − uam[k+1] | + |ubm[k+1] − ubm[k] | + |ucm[k+1] − ucm[k] |. (11)

αβ
In Eq. (10) the predicted values of the currents ~im[k+1] (~um ) and the neutral point voltage are
obtained by evaluating the prediction models (2) and (8), respectively, with ~um ∈ U27 . After
evaluating and minimizing cost-function (10), the obtained optimal gate vectors G ~ m will be ap-
plied to the converter. The overview of the proposed control method is depicted in Fig. 2-a.

3.2. Direct torque control with switching table (DTC-TB)

The first direct torque control (DTC) scheme was proposed in the 1970s by Depenbrock [5],
Takahashi and Noguchi [6] for controlling a two-level converter-fed induction machine. Then
the same concept was extended to PMSM in 1995. The extended DTC for 3L-NPC power
converters was firstly reported in [7]. The switching table is designed off-line and is indexed by
the position of the flux vector, the outputs of torque, neutral point voltage difference and flux
hysteresis controllers. It directly outputs the optimal switching vector. In this paper, the basic
idea of DTC schemes are not discussed. For more details please refer to [7] and the reference
therein. For the implementation, the standard switching table for 3L-NPC power converters (as
are introduced in [8, 9]) were adopted. The overall control structure is illustrated in Fig. 2-b.

4. Experimental verification

To verify and compare the control performance of DMPCC and DTC-TB, both schemes are im-
plemented on a NI-FPGA based real-time system and are tested on a self-constructed 3L-NPC
power converter system with DC-link capacitors C := C1 = C2 = 1100e−6 [F] (see Fig. 4). The
relevant state estimations, cost function calculation/minimization procedures are implemented
as subroutines and optimized with the Single-Cycle-Timed-Loop method [10] using the avail-
able NI-FPGA technique. For a fair comparison, both schemes utilize the same outer loop
controllers and a cycle time of Ts = 50e−6 [s]. The upper and lower bandwidths of the DTC-TB
hysteresis controllers are set to 5% and 2.5% of the relevant nominal values; to achieve DC-link
balancing, γVo is set to 0.5, while γsf = 0.03285 to achieve a switching frequency (around 4kHz
during steady-state) similar to that of the DTC-TB method.
Fig. 5 illustrates the overall control performance using the proposed DMPCC method. The
testing scenarios are: a reference speed which changes from 600 rpm to −800 rpm and −300
rpm and then back to 600 rpm, with a slope of 1860 rpm/min, while a rated torque is applied
to the machine. As can be seen, a good steady-state and dynamic control performance is
achieved. The capacitor voltage differences are also quite small during the whole experiment.

DMPCC

(a) Direct model predictive current control.

DTC

(b) Direct torque control with switching table.

Fig. 2: Control structures of the proposed direct model predictive current control scheme and the con-
ventional direct torque control method.

10

5
m [A]

0
~i,-

-5
i,$
m i,m i-$
m i-m
-10
0 0.08 0.16 0.24 0.32
Time [s]
Fig. 3: Current tracking performances of the proposed direct model predictive current control.

Fig. 3 illustrates the current tracking performance of the proposed DMPCC. Good racking per-
formance, smooth waveforms with small currents ripples are obtained for both 10% and 100%
of the rated torque. Fig. 6 shows the performance comparison between the proposed and the
conventional DTC-TB methods during steady- state3 . As can be clearly seen, the proposed
method shows much smaller ripples in the stator currents than the DTC-TB method. The rea-
son is their differing switching patterns: At the same operating point, DMPCC “selects” much
3 Similar dynamic/transient phase performances will be achieved by both methods during to their
similar direct switching vector selection principles.
smoother switching patterns and almost no full voltage pattern (i.e., the “P” position of the
phase switches) is selected; while DTC-TB synthesizes much more “noisy” switching patterns
with lead to higher instantaneous voltage magnitudes (see the last sub-figure in Fig. 6), al-
though the magnitude of the fundamental is the same as for the DMPCC method (i.e., both the
filtered command voltages from DMPCC and DTC-TB have a similar magnitude).

Voltage [V] Current [A] Current [A] Speed [RPM]

C 500:000
0:000

D !500:000
!1000:000 n$ n

i,m i-m
F
10:000
0:000

E !10:000

15:000 idm iqm iq$

m

I 10:000
5:000
0:000

G H
A 300:000
Vd Vd$ Vc1 Vc2
200:000
B 100:000
0 1 2 3 4
Time [s]

Fig. 4: Test-bench for experimental verification. A: Fig. 5: Experimental results: Overall per-
PMSM, B: AC-Drive, C: self-constructed 3L-NPC formances of the proposed DMPCC con-
power converter, D: NI-CRIO FPGA based real-time trol scheme. From top to bottom: Speed,
controller, F: protection devices, H: Variac and I: PC currents in αβ and dq frame and DC-link
for software development and data logging. voltages, respectively.
Current [A]

Current [A]

5:0 5:0

0:0 iam ibm 0:0 iam ibm

!5:0 !5:0
400:0 400:0
Voltage [V]

Voltage [V]

300:0 300:0
200:0 200:0
100:0 Vc1 Vc2 Vd Vd$ 100:0 Vc1 Vc2 Vd Vd$
60:0 60:0
Freq. [100Hz]

Freq. [100Hz]

av
Sfmav Sfm;.trd

40:0 40:0
av
Sfmav Sfm;.trd
20:0 20:0
400:0 $ $
400:0
v
^m v
^m.trd
200:0 200:0
Vol. [V]

Vol. [V]

0:0 0:0
!200:0 !200:0 $ $
v
^m v
^m.trd
!400:0 !400:0
0 0.02 0.04 0.06 0 0.02 0.04 0.06
Time [s] Time [s]

(a) Steady-state control performance with load (b) Steady-state performance with load change us-
change using DMPCC. ing DTC-TB.
Fig. 6: Experimental results: Steady-state performance comparison of the proposed DMPCC control
av ∗
scheme and DTC-TB method, where Sfm , v̂m are the average switching frequency (updated every 10ms)
av ∗
and command voltage (in α-axis); while Sfm,fltrd , v̂mfltrd are their filtered values with cut-off frequencies
of 5Hz and 300Hz, respectively.
 5. Conclusion

This work has presented and experimentally validated a direct model predictive current control
(DMPCC) method for a PMSM drive system fed by a three-level neutral-point clamped (3L-
NPC) power converter. The proposed solution is implemented in the αβ frame. No specially
tuned weighting factors are required for the targeting set, which significantly simplifies the tuning
process. The proposed method belongs to the (nonlinear) direct control class. Its steady-state
control performance was compared with its well-known counter-part, i.e., the switching table
based direct torque control solution (during similar experimental conditions). The comparison
is illustrated by experimental results. Moreover, both schemes have been implemented on a
fully FPGA-based real-time system and validated at a self-constructed test-bench. The results
confirm that better steady-steady control performances are achieved using DMPCC.
Acknowledgment: This work is supported by DFG founding (No.: KE817/32-1). Zhenbin
Zhang is the corresponding author and would like to express his gratefulness to Mr. Marc Back-
meyer from National Instruments and Dr. Martin Schulz from Infineon for their help during his
test-bench construction.

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