UNIT I

INTRODUCTION TO SYSTEM SOFTWARE AND

MACHINE STRUCTURE
1.1 SYSTEM SOFTWARE
 System software consists of a variety of programs that support the operation of a
computer.
 It is a set of programs to perform a variety of system functions as file editing,
resource management, I/O management and storage management.
 The characteristic in which system software differs from application software is
machine dependency.
 An application program is primarily concerned with the solution of some
problem, using the computer as a tool.
 System programs on the other hand are intended to support the operation and use
of the computer itself, rather than any particular application.
 For this reason, they are usually related to the architecture of the machine on
which they are run.
 For example, assemblers translate mnemonic instructions into machine code. The
instruction formats, addressing modes are of direct concern in assembler design.
 There are some aspects of system software that do not directly depend upon the
type of computing system being supported. These are known as machine-
independent features.
 For example, the general design and logic of an assembler is basically the same
on most computers.
TYPES OF SYSTEM SOFTWARE:
1. Operating system
2. Language translators
a. Compilers
b. Interpreters
c. Assemblers
d. Preprocessors
3. Loaders
4. Linkers
5. Macro processors
OPERATING SYSTEM
 It is the most important system program that act as an interface between the users
and the system. It makes the computer easier to use.
 It provides an interface that is more user-friendly than the underlying hardware.
 The functions of OS are:
1. Process management
2. Memory management
3. Resource management
4. I/O operations
5. Data management
6. Providing security to user’s job.
LANGUAGE TRANSLATORS
It is the program that takes an input program in one language and produces an output in
another language.
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 Language
Source Program Object Program
Translator
COMPILERS

 A compiler is a language program that translates programs written in any high-

level language into its equivalent machine language program.
 It bridges the semantic gap between a programming language domain and the
execution domain.
 Two aspects of compilation are:
o Generate code to increment meaning of a source program in the execution
domain.
o Provide diagnostics for violation of programming language, semantics in a
source program.
 The program instructions are taken as a whole.
Compiler
High level language Machine language program

INTERPRETERS:
 It is a translator program that translates a statement of high-level language to
machine language and executes it immediately. The program instructions are
taken line by line.
 The interpreter reads the source program and stores it in memory.
 During interpretation, it takes a source statement, determines its meaning and
performs actions which increments it. This includes computational and I/O
actions.
 Program counter (PC) indicates which statement of the source program is to be
interpreted next. This statement would be subjected to the interpretation cycle.
 The interpretation cycle consists of the following steps:
o Fetch the statement.
o Analyze the statement and determine its meaning.
o Execute the meaning of the statement.
 The following are the characteristics of interpretation:
o The source program is retained in the source form itself, no target program
exists.
o A statement is analyzed during the interpretation.
Interpreter Memory

Source
Program Program
counter

ASSEMBLERS:
 Programmers found it difficult to write or red programs in machine language. In a
quest for a convenient language, they began to use a mnemonic (symbol) for each
machine instructions which would subsequently be translated into machine
language.
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  Such a mnemonic language is called Assembly language.
 Programs known as Assemblers are written to automate the translation of
assembly language into machine language.

Assembler
Assembly language program Machine language program

 Fundamental functions:
1. Translating mnemonic operation codes to their machine language equivalents.
2. Assigning machine addresses to symbolic tables used by the programmers.

1.2 THE SIMPLIFIED INSTRUCTIONAL COMPUTER (SIC):

It is similar to a typical microcomputer. It comes in two versions:
 The standard model
 XE version
SIC Machine Structure:
Memory:
 It consists of bytes(8 bits) ,words (24 bits which are consecutive 3 bytes)
addressed by the location of their lowest numbered byte.
 There are totally 32,768 bytes in memory.
Registers:
There are 5 registers namely
1. Accumulator (A)
2. Index Register(X)
3. Linkage Register(L)
4. Program Counter(PC)
5. Status Word(SW).
 Accumulator is a special purpose register used for arithmetic operations.
 Index register is used for addressing.
 Linkage register stores the return address of the jump of subroutine instructions
(JSUB).
 Program counter contains the address of the current instructions being executed.
 Status word contains a variety of information including the condition code.
Data formats:
 Integers are stored as 24-bit binary numbers: 2’s complement representation is
used for negative values characters are stored using their 8 bit ASCII codes.
 They do not support floating – point data items.
Instruction formats:
All machine instructions are of 24-bits wide
Opcode (8) X (1) Address (15)
 X-flag bit that is used to indicate indexed-addressing mode.

Addressing modes:
 Two types of addressing are available namely,
1. Direct addressing mode
2. Indexed addressing mode or indirect addressing mode

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 Mode Indication Target Address calculation
Direct X=0 TA=Address
Indexed X=1 TA=Address + (X)
 Where(x) represents the contents of the index register(x)
Instruction set:
It includes instructions like:
1. Data movement instruction
Ex: LDA, LDX, STA, STX.
2. Arithmetic operating instructions
Ex: ADD, SUB, MUL, DIB.
This involves register A and a word in memory, with the result being left in the
register.
3. Branching instructions
Ex: JLT, JEQ, TGT.
4. Subroutine linkage instructions
Ex: JSUB, RSUB.
Input and Output:
 I/O is performed by transferring one byte at a time to or from the rightmost 8 bits
of register A.
 Each device is assigned a unique 8-bit code.
 There are 3 I/O instructions,
1) The Test Device (TD) instructions tests whether the addressed device is
ready to send or receive a byte of data.
2) A program must wait until the device is ready, and then execute a Read
Data (RD) or Write Data (WD).
3) The sequence must be repeated for each byte of data to be read or written.
4)
1.3 SIC/XE ARCHITECTURE & SYSTEM SPECIFICATION
Memory:
 1 word = 24 bits (3 8-bit bytes)
 Total (SIC/XE) = 220 (1,048,576) bytes (1Mbyte)
Registers:
 10 x 24 bit registers
MNEMONIC Register Purpose
A 0 Accumulator
X 1 Index register
L 2 Linkage register (JSUB/RSUB)
B 3 Base register
S 4 General register
T 5 General register
F 6 Floating Point Accumulator (48 bits)
PC 8 Program Counter (PC)
SW 9 Status Word (includes Condition Code, CC)

Data Format:
 Integers are stored in 24 bit, 2's complement format
 Characters are stored in 8-bit ASCII format
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  Floating point is stored in 48 bit signed-exponent-fraction format:
s exponent {11} fraction {36}
 The fraction is represented as a 36 bit number and has value between 0 and 1.
 The exponent is represented as a 11 bit unsigned binary number between 0 and
2047.
 The sign of the floating point number is indicated by s : 0=positive, 1=negative.
 Therefore, the absolute floating point number value is: f*2(e-1024)
Instruction Format:
 There are 4 different instruction formats available:

Format 1 (1 byte):

op {8}

Format 2 (2 bytes):

op {8} r1 {4} r2 {4}

Format 3 (3 bytes):

op {6} n i x b p e displacement {12}

Format 4 (4 bytes):

op {6} n i x b p e address {20}

Formats 3 & 4 introduce addressing mode flag bits:

 n=0 & i=1

Immediate addressing - TA is used as an operand value (no memory reference)
 n=1 & i=0
Indirect addressing - word at TA (in memory) is fetched & used as an address to
fetch the operand from
 n=0 & i=0
Simple addressing TA is the location of the operand
 n=1 & i=1
Simple addressing same as n=0 & i=0
Flag x:
x=1 Indexed addressing add contents of X register to TA calculation
Flag b & p (Format 3 only):

 b=0 & p=0

Direct addressing displacement/address field containsTA (Format 4 always uses
direct addressing)
 b=0 & p=1
PC relative addressing - TA=(PC)+disp (-2048<=disp<=2047)*
 b=1 & p=0
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 Base relative addressing - TA=(B)+disp (0<=disp<=4095)**
Flag e:
e=0 use Format 3 e=1
use Format 4
Instructions:

SIC provides 26 instructions, SIC/XE provides an additional 33 instructions (59 total)

SIC/XE has 9 categories of instructions:

 Load/store registers (LDA, LDX, LDCH, STA, STX, STCH, etc.)
 integer arithmetic operations (ADD, SUB, MUL, DIV) these will use register A
and a word in memory, results are placed into register A
 compare (COMP) compares contents of register A with a word in memory and
sets CC (Condition Code) to <, >, or =
 conditional jumps (JLT, JEQ, JGT) - jumps according to setting of CC
 subroutine linkage (JSUB, RSUB) - jumps into/returns from subroutine using
register L
 input & output control (RD, WD, TD) - see next section
 floating point arithmetic operations (ADDF, SUBF, MULF, DIVF)
 register manipulation, operands-from-registers, and register-to-register arithmetics
(RMO, RSUB, COMPR, SHIFTR, SHIFTL, ADDR, SUBR, MULR, DIVR, etc)
Input and Output (I/O):
 28 (256) I/O devices may be attached, each has its own unique 8-bit address
 1 byte of data will be transferred to/from the rightmost 8 bits of register A

Three I/O instructions are provided:

 RD Read Data from I/O device into A
 WD Write data to I/O device from A
 TD Test Device determines if addressed I/O device is ready to send/receive a byte
of data. The CC (Condition Code) gets set with results from this test:
< device is ready to send/receive
= device isn't ready
SIC/XE Has capability for programmed I/O (I/O device may input/output data while CPU
does other work) - 3 additional instructions are provided:
 SIO Start I/O
 HIO Halt I/O
 TIO Test I/O

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SIC, SIC/XE ADDRESSING MODES

Addressing Flag Bits Calculation of

Notation Operand Notes
Type n i x b p e Target Address
Direct-addressing
Simple 1 1 0 0 0 0 op c disp (TA)
Instruction
Format 4 & Direct-
1 1 0 0 0 1 +op m addr (TA)
addressing Instruction
Assembler selects
either base-relative or
1 1 0 0 1 0 op m (PC) + disp (TA)
program-counter
relative mode
Assembler selects
either base-relative or
1 1 0 1 0 0 op m (B) + disp (TA)
program-counter
relative mode
Direct-addressing
1 1 1 0 0 0 op c,X disp + (X) (TA)
Instruction
Format 4 & Direct-
1 1 1 0 0 1 +op m,X addr + (X) (TA)
addressing Instruction
Assembler selects
(PC) + disp + either base-relative or
1 1 1 0 1 0 op m,X (TA)
(X) program-counter
relative mode
Assembler selects
either base-relative or
1 1 1 1 0 0 op m,X (B) + disp + (X) (TA)
program-counter
relative mode
Direct-addressing
0 0 0 - - - op m b/p/e/disp (TA) Instruction; SIC
compatible format.
Direct-addressing
0 0 1 - - - op m,X b/p/e/disp + (X) (TA) Instruction; SIC
compatible format.
Direct-addressing
Indirect 1 0 0 0 0 0 op @c disp ((TA))
Instruction
Format 4 & Direct-
1 0 0 0 0 1 +op @m addr ((TA))
addressing Instruction
Assembler selects
either base-relative or
1 0 0 0 1 0 op @m (PC) + disp ((TA))
program-counter
relative mode
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 1 0 0 1 0 0 op @m (B) + disp ((TA)) Assembler selects
either base-relative or
program-counter
relative mode
Direct-addressing
Immediate 0 1 0 0 0 0 op #c disp TA
Instruction
Format 4 & Direct-
0 1 0 0 0 1 op #m addr TA
addressing Instruction
Assembler selects
either base-relative or
0 1 0 0 1 0 op #m (PC) + disp TA
program-counter
relative mode
Assembler selects
either base-relative or
0 1 0 1 0 0 op #m (B) + disp TA
program-counter
relative mode

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