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Obtain Through Spice Simulation

The document describes simulations of different inverter circuits using SPICE software. It defines resistive load, enhancement load, depletion load, and CMOS inverters, specifying the components, models, and plotting the transfer characteristics for each. SPICE simulations are run to obtain the output voltage characteristics.

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Shinde D Pooja
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44 views5 pages

Obtain Through Spice Simulation

The document describes simulations of different inverter circuits using SPICE software. It defines resistive load, enhancement load, depletion load, and CMOS inverters, specifying the components, models, and plotting the transfer characteristics for each. SPICE simulations are run to obtain the output voltage characteristics.

Uploaded by

Shinde D Pooja
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as RTF, PDF, TXT or read online on Scribd
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Aim: To perform all NMOS inverter and CMOS inverter and observe the transfer characteristic (VTS)

obtain through spice simulation.

Software required: winspice V1.06.00

INPUT

Resistive load inverter

VDD 1 0 DC 5V

VIN 3 0 DC 5V

RL 1 2 20K

CL 2 0 10PF

M1 2 3 0 0 NMOD W = 10U L=10U

.MODEL NMOD NMOS (VTO=1V, KP=100U, GAMMA =0.1, LAMBDA=0.05)

.DC VIN 0 5 0.05

.CONTROL

RUN

PLOT V (2)

.ENDC

.END

OUTPUT:
INPUT

Enhancement load inverter

VDD 1 0 DC 5V

VIN 3 0 DC 5V

CL 2 0 10PF

M1 1 1 2 0 NMOD1 W=10U L=10U

M2 2 3 0 0 NMOD2 W = 10U L=10U

.MODEL NMOD1 NMOS (VTO=1V, KP=100U, GAMMA =0.1, LAMBDA=0.05)

.MODEL NMOD2 NMOS (VTO=1V, KP=100U, GAMMA =0.1, LAMBDA=0.05)

.DC VIN 0 5 0.05

.CONTROL

RUN

PLOT V (2)

.ENDC

.END

OUTPUT:
INPUT

Depletion load inverter

VDD 1 0 DC 5V

VIN 3 0 DC 5V

CL 2 0 10PF

M1 1 2 2 0 NMOD1 W=10U L=10U

M2 2 3 0 0 NMOD2 W = 10U L=10U

.MODEL NMOD1 NMOS (VTO=-1V, KP=100U, GAMMA =0.1, LAMBDA=0.05)

.MODEL NMOD2 NMOS (VTO=1V, KP=100U, GAMMA =0.1, LAMBDA=0.05)

.DC VIN 0 5 0.05

.CONTROL

RUN

PLOT V (2)

.ENDC

.END

OUTPUT:
INPUT

CMOS inverter

VDD 1 0 DC 5V

VIN 3 0 DC 5V

CL 2 0 10PF

M1 2 3 1 1 NMOD1 W=10U L=10U

M2 2 3 0 0 NMOD2 W = 10U L=10U

.MODEL NMOD1 PMOS (VTO=-1V, KP=100U, GAMMA =0.1, LAMBDA=0.05)

.MODEL NMOD2 NMOS (VTO=1V, KP=100U, GAMMA =0.1, LAMBDA=0.05)

.DC VIN 0 5 0.05

.CONTROL

RUN

PLOT V (2)

.ENDC

.END
OUTPUT:

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