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Programming Assignment 5: Encoder: Course Outline

The document describes an online course on hardware modeling using Verilog. It provides instructions for programming assignment 5 which involves writing a Verilog module to implement an 8 to 3 encoder that encodes the position of the single '1' in an 8-bit input. It lists sample test cases and the due date for the assignment.

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56 views2 pages

Programming Assignment 5: Encoder: Course Outline

The document describes an online course on hardware modeling using Verilog. It provides instructions for programming assignment 5 which involves writing a Verilog module to implement an 8 to 3 encoder that encodes the position of the single '1' in an 8-bit input. It lists sample test cases and the due date for the assignment.

Uploaded by

shweta
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Hardware Modeling using Verilog - Course https://onlinecourses.nptel.ac.in/noc18_cs48/pr...

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Programming Assignment 5:
Course
outline
Encoder
Due on 2018-09-20, 23:59 IST
How to Write a Verilog module to implement an 8:3 encoder that takes 8-bit input
access the DATA and returns a 3-bit output CODE indicating the position of the single ‘1’
portal present in the input. In case more number of ‘1’s or no ‘1’ is present in the
input DATA string, the state of output CODE word will be don’t cares.
Week 1

Week 2 module encoder (CODE, DATA);


input [7:0] DATA;
Week 3 output [2:0] CODE;
Lecture 12:
VERILOG Sample Test Cases
DESCRIPTION Input Output
STYLES Test Case 1 1 Pass: for DATA = 00000101, CODE = x
Test Case 2 3 Pass: for DATA = 01000000, CODE = 6
Lecture 13:
PROCEDURAL Test Case 3 6 Pass: for DATA = 10000000, CODE = 7
ASSIGNMENT Test Case 4 7 Pass: for DATA = 11111111, CODE = x
Test Case 5 0 Pass: for DATA = 00000001, CODE = 0
Lecture 14:
Test Case 6 2 Pass: for DATA = 00000100, CODE = 2
PROCEDURAL
ASSIGNMENT Test Case 7 4 Pass: for DATA = 00000000, CODE = x
(Contd.) Test Case 8 5 Pass: for DATA = 01111011, CODE = x

Lecture
15:PROCEDURAL
Due Date Exceeded.
ASSIGNMENT As per our records you have not submitted this assignment.
(EXAMPLES) Sample solutions (Provided by instructor)

Week 3 Select the Language . --


Lecture
Material
End
Programming
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Hardware Modeling using Verilog - Course https://onlinecourses.nptel.ac.in/noc18_cs48/pr...

Assignment
5: Encoder

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6: One
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