Micro Course Pack
Micro Course Pack
Course File
Page 1
COURSE FILE CONTENTS
Part-I
- Syllabus
- Course Outcomes
- Mapping with PO
- Model Lesson Plan
- University question papers
- Internal Question Papers with key
- Assignment Topics
- Tutorial Sheets
- Unit wise-Question Bank
- Gaps & Plans for Add-on programs
- Topics beyond Syllabus-References
- Result Analysis, Remedial/Corrective Action
- Learning Outcome Assessment, Mapping onto PO
- Web References
Part-II
- Lesson Plan, Time Table
- Teacher Log Book/ Attendance Register
- Daily Delivery Recording
- Continuous Evaluation-Marks (Tests, Assignments etc)
- Sample Answer Sheets (of Test Papers)
- Sample Assignment Sheets
- Record of Tutorial Classes
- Record of Remedial Classes
- Makeup Tests
- Guest Lecturers Conducted
- Details of Add-on Programs
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JU Syllabus Copy:
L T P MARKS
3 2 1 Theory
Sessionals
100 40
Section A
8086 Family Assembly Language Programming and Techniques:- Simple Sequence programs.
Flags, Jumps, While- Do, Repeat-Until Implementations, Programs using Procedures.
8086 CPU Hardware Design: - 8086 Signals, Minimum and Maximum Mode of CPU model,
System Bus Timing, 8086 Interrupt Vector Table, Interrupt Service Subroutine,
Applications, Addressing Memory and Ports in Micro Computer System.
Section B
Numerical Data Processor (8087): - NDP’s data types, Processor Architecture, Instruction
set Interfacing with 8086/88.
Digital Interfacing: - Programmable Parallel Ports, Handshake I/P & O/P Interfacing a
microprocessor to keyboard/alphanumeric displays, interfacing with printer, Lathe.
References/Texts:-
1. Microprocessor & Interfacing - Douglas V. Hall
2. Programming & Design - LIU & Gibson
Page 3
3. IBM PC Programming - Peter Afzel
NOTE: There shall be total eight questions, four from each section. Five questions have to be
attempted selecting at least two questions from each section. Use of calculator is
allowed
SYLLABUS:
HOU
UNIT DETAILS
RS
Introduction to Microprocessor 8086
1.1 Pin diagram
1.2 Architecture,
I 1.3 Instruction set 08
1.4 Instruction format
1.5 Addressing modes
Page 4
Math coprocessor
4.1 Introduction to 8087 math coprocessor
4.2 pin diagram
IV 4.3 Architecture 10
4.4Instruction set
4.5 Interfacing with 8086
IO Processor
5.1 Introduction to 8089 IOP
5.2 pin diagram
V 5.3 Architecture 08
5.4 Instruction set
5.5 Interfacing with 8086
TOTAL HOURS 58
Tutorial Classes 10
Remedial Classes/NPTL 04
Page 5
ASSOCIATED LAB
1. Comparison of two strings.
2
2. Conversion of BCD to Binary numbers.
2
3. Multiplication of two 8-bit numbers
2
4. Addition of two 16 bit numbers
2
5. Subtraction of two 16 bit numbers
2
6. BCD addition
2
7. Sum of n numbers
2
8. Average of n numbers
2
9. Counting the number of words in a string
2
10. Calculating the factorial of n number
2
11. Multiplying two numbers without using MUL instruction
2
TOTAL LAB CLASSES
22
RECOMMENDED LAB BOOKS: AUTHOR
Faculty
Microprocessors and Interfacing by A.P Godse Tata McGraw Hill publications, 4th
Book 2
edition (2009)
Reference Books
Microprocessor Architecture Programming & Applications. by Ramesh Gaonkar,
Book 3 Penram international publishing, 6th edition (2014).
Page 6
Microprocessor System by Liu Gibson, Prentice Hall PTR publications, 4 th edition
Book 4 (2008).
Chapters No of
Unit Topic
Book 1 Book 2 Book 3 Book 4 Book 5 Book 6 Classes
I INTRODUCTION TO √ √ √ √ √ √ 08
MICROPROCESSOR 8086
INTRODUCTION TO
II ASSEMBLY LANGUAGE √ √ √ 08
PROGRAMMING
8086 CONNECTIONS √ √ √ √ 08
III
MATH COPROCESSOR √ √ √ √ 10
IV
IO PROCESSOR √ √ √ 08
V
INTERFACING WITH √ √ √ 08
VI
8086
INTRODUCTION TO √ √ √ √ 10
VII
OTHER 8086 PINS
Total Hours 58
Tutorial Classes* 10
Remedial Classes/NPTL 04
Page 7
peripheral devices and also goes on to explain various interrupts, procedure, macros and
configurations of 8086.
PO
S.No. DESCRIPTION
MAPPING
Demonstrate understanding of the concepts and fundamentals of 16 bit and 1,2,3,6
1
32 bit microprocessors and their basic architecture.
Articulate the general interfacing of 16-bit microprocessor with memory 1,2,3,4,5,
2
and peripheral devices involving system design. 6
Analyse and understand various programming skills using microprocessor 1,2,3,4,5,
3
8086. 6,9
Understand and analyze complex design choices on X86 family and 2,3,4,5
4 Pentium processor as well as multi core processors.
PO
S.No. DESCRIPTION
MAPPING
Implement programs related to Searching , sorting and strings. 1,2,3,6
1
2 Design programs using Macro , procedure and files 1,2,3,4,8
.Implement Data conversion , number generation, parity checking. 1,2,3,4
3
4 Interface hardware device to 8086 processor 2,3,4,5
Page 8
No. of Cumulative
Sl.
Name of the Topic Classes number of Teaching AID
No.
required periods
Page 9
35 Special Descriptive Test-1 04 77 Chalk & Talk
36 Special Descriptive Test-2 05 82 Chalk & Talk
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Q4 CO 1, CO 2 Self Conceptual 1
1. Write a program in 8086 assembly language to check whether a string is palindrome or not.
(2)
2. Write an assembly language program in 8086 to add a 5-byte number in an array to a 5-byte
number in another array. Put sum in another array. Put state of carry flag in byte 6 of the array
that contains sum. The first value in each array is least significant byte of that number.
(2)
3. What is minimum and maximum mode of CPU model and compare them? Compare between
Bus Request and Bus Grant timings in Minimum Mode System of 8086. Write functions of ALE
Pin. (2)
4.a)Explain re-entrant and recursive procedures.
b) Compare between 8086 and 8088 microprocessors. (2)
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Q4 CO 1, CO 3 IIT Bombay Programming 4
based
Q2. What is queue status. Compare loose and close coupled multiprocessor configuration. What
are the disadvantages of Pentium IV multiprocessor.
• Co-processor configuration
. Q4. Write 8086 ALP to add 10 non-negative data items using string instructions.
TUTORIAL SHEET- 1
Q1. What are the differences in interfacing RWMs while 8086 is in minimum and maximum
modes?
Page 12
Q2. Sketch and explain the interface of 32K x 16 RWMs using a decoder in minimum mode.
What is the maximum access time of ROMs such that it does not require wait states when 8086
operates at 8 MHz?
Q3. Sketch and explain the timing diagrams in the above interface
Q4. Sketch and explain the 8086 bus activities during write machine cycle b. Interfacing with
peripheral IC’s like 8255 etc,.
Q5. What are the steps in interfacing peripherals with the micro processor?
Q6. Sketch and explain the interface of PPI 8255 to the 8086 microprocessor in minimum mode.
Interface 4 7 segment LEDs to display as a BCD counter
Q7. In the above question Q2 interface two keys UP and DOWN to the PPI. Write an 8086
assembly program segment such that when UP is pressed the counter counts up every second.
Similarly when DOWN key is pressed the counter decrements every second
Q8. Sketch and explain the interface of 8279 to the 8086 microprocessor in minimum mode.
Interface 8x8 key pad and 16x 7 Seg LED display. Write an 8086 assembly program to read the
key codes of keys and display -NPTEL-INDIA Q5. Sketch and explain the interface of PIT 8254
to the 8086 microprocessor in minimum mode. Cascade two counters in the PIT. Write a program
segment two get one minute delay
TUTORIAL SHEET- 2
Page 13
2. __________ processor is first introduced by the Intel in 1971.
a) 8080
b) 4004
c) 8008
d) 8085
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c) 65536
d) None of the mentioned
10. Which of the following registers are not available in 8086 microprocessor?
a) General data register
b) Segment registers
c) Pointer and Index register
d) All of the mentioned
12. _______ register is used as a default counter in case of string and loop instructions.
a) AX
b) BX
c) CX
d) DX
13. ______ register is used as an implicit operand or destination operand in case of arithmetic
instructions and Input-Output instructions.
a) AX
b) BX
c) CX
d) DX
14. _______ is the most important segment and it contains the actual assembly language
instructions to be executed by the microprocessor.
a) Data segment
b) Code segment
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c) Stack segment
d) Extra segment
TUTORIAL SHEET- 3
Page 16
5. Which of the following is not a machine control flag?
a) Direction flag
b) Interrupt flag
c) Overflow flag
d) Trap flag
8. If there is a carry from lowest nibble during addition, ______ flag sets.
a) Carry
b) Auxiliary carry
c) Over flow
d) Sign
9. If_________ flag is set; the processor enters the single step execution mode.
a) Direction
b) Trap
c) Interrupt
d) Zero
10. When one segment starts before the end of another segment then we call them as_______.
a) Non-overlapping segments
b) Overlapping segments
c) Stack area
d) None of these
11. Of the segment addresses are assigned as 0000H to F000H and the offset addresses values are
from 0000H to FFFFH, then the physical addresses range from_____.
a) 0000H to FFFFH
b) 00000H to F0000H
c) 00000H to FFFFF
d) 0000H to FFF0H
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12. If the size of the segment is 64 kb, what will be the starting and ending off set addresses of it
a) 0000H to 7FFFH
b) 0000H to FFFFH
c) 8000H to FFFFH
d) 00000H to FFFFFH
13. In a segment if offset is a 16-bit number, then the maximum possible locations are_____.
a) 1 KB
b) 64 bytes
c) 64 KB
d) 1 MB
14. If segment address = 1005 H, offset address = 5555 H, then the physical address is_____.
a) 655A H
b) 155A5 H
c) 4550 H
d) 56555
15. The length of predecoding instruction byte queue is _______ bytes long.
a) 2
b) 4
c) 6
d) 8
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Q1 Explain the architecture of 8086 in detail?
(2)
Q2 Calculate the physical address from the following data
(3)
(a) AB92:47DA
(b) 64EE:7864
PROPOSED ACTIONS
SNO DESCRIPTION
Introduction to Intel Core processors NPTEL
1
Introduction to Microcontrollers NPTEL
2
Design and circuit of Microcontrollers Chalk and talk
3
Design of Intel processors MOOCS
4
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DELIVERY/INSTRUCTIONAL METHODOLOGIES:
ASSESSMENT METHODOLOGIES-DIRECT
☐ UNIV.
√ ASSIGNMENTS √ STUD. SEMINARS ☐ TESTS/MODEL EXAMS
EXAMINATION
☐STUD. LAB PRACTICES √ STUD. VIVA ☐ MINI/MAJOR PROJECTS ☐ CERTIFICATIONS
ASSESSMENT METHODOLOGIES-INDIRECT
√ ASSESSMENT OF COURSE OUTCOMES (BY FEEDBACK, ONCE) √ STUDENT FEEDBACK ON FACULTY (TWICE)
Prepared by
(Manish Lamba/Rasmeet Kour)
Vision of the Institution [MIET]:
To create a world-class institution
Page 20
PROGRAMME EDUCATIONAL OBJECTIVES (PEO):
Graduates from the Computer Science program at MIET are expected to attain or achieve the
following four Program Educational Objectives (PEOs) within a few years of graduation:
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1. Demonstrate fundamental knowledge in programming, data structures, databases, networks,
operating systems, software engineering, discrete mathematics and possess knowledge of cloud
computing, big data, artificial intelligence and other domains in vogue.
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(0 marks) (5-6 marks) (7-8 marks)
(9-10 marks)
Viva Voice 5 Student not Student able Student able Student able to
Five Questions able to to answer to answer 2-3 answer 4-5
to be asked and answer any only 1-2 Question Questions
1 Mark / Question Question
Question
MON √ √ √
TUE
WED √
THU √ √ √
FRI √
SAT √
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