Digsilent Powerfactory: Technical Reference Documentation
Digsilent Powerfactory: Technical Reference Documentation
Heinrich-Hertz-Str. 9
72810 - Gomaringen
Germany
http://www.digsilent.de
[email protected]
r1168
Copyright ©2013, DIgSILENT GmbH. Copyright of this document belongs to DIgSILENT GmbH.
No part of this document may be reproduced, copied, or transmitted in any form, by any means
electronic or mechanical, without the prior written permission of DIgSILENT GmbH.
Contents
1 General Description 3
2 RMS-Simulation 4
2.1.2 Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.2.2 Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3 EMT-Simulation 8
3.1.2 Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3.2.2 Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4 References 12
List of Figures 13
List of Tables 14
1 General Description
PLLs are widely used for synchronization purposes, controller applications and can also be
used to demodulate frequency-modulated signals. For more information about PLL definition
and applications refer to [1] and [2].
The Phase-Locked Loop element (ElmPhi pll) measures the frequency and phase of a voltage
in the system. The PLL model is supported by the RMS and EMT simulations only.
In the following sections the working and behaviour of the PLL Model Version 2 (parameter
mversion) is presented. The Model Version 2 supports blocking functionality and single-phase
measurement. These features are not available in Model Version 1. Additional difference be-
tween the two versions is that in Model Version 1, a gain of Ki · Ki is used for the integrator
part of the PI controller and in Model Version 2 the gain is, as typical, Ki.
2 RMS-Simulation
The PLL uses as inputs, the voltage at the selected Measurement Point (reference node) in the
input dialogue box of the PLL.
Depending on the selected No. of Phases option (parameter nphase), a three-phase or single-
phase measurement is possible.
The PLL structure is the same for both balanced and unbalanced RMS simulations. Internally,
the input signals to the PLL ur and ui are the real and imaginary part of the positive sequence
voltage (in-quadrature signals).
In the case of balanced network representation, the positive sequence voltage resulting from the
simulation is fed directly to the input signals (uR, uI) of the PLL. In the case of unbalanced net-
work representation, the positive sequence voltage is first being calculated using the symmetri-
cal transformation on the input signals fed to the PLL (uR A, uI A, uR B, uI B, uR C, uI C).
The block diagram of the PLL is presented in Figure 2.1 where the following input parameters
are used (connected automatically):
The blocks shaded in blue colour are enabled if the blocking functionality is being used. Please
refer to Section 2.1.1.
The limits on the integrator part of the PI controller are calculated using the parameters f max
and f min (Upper frequency limit and Lower frequency limit) as follows:
Lower limit = 2 · π · F nom · f min − 2 · π · F nom · f ref − Kp · dphi (1)
U pper limit = 2 · π · F nom · f max − 2 · π · F nom · f ref − Kp · dphi (2)
where:
In real devices, the angle cannot be tracked if the voltage falls below a certain threshold. The
option Enable Blocking can be used to simulate this. When this option is enabled, the blue
colour shaded blocks in Figure 2.1 are considered in the calculation.
The blocking mode uses the parameters Blocking voltage umin (in p.u.) and Blocking filter time
constant T b (in ms).
If the voltage magnitude drops below the user defined umin, the PLL goes into blocking mode
and the signal block is set to 1. If the magnitude of the voltage rises above umin + 5%, the PLL
switches to normal mode and the signal block is set to 0.
The following changes are done when the PLL is in blocking mode:
• The outputs of the two integrators and of the tracking (first-order lag) block are kept con-
stant;
• The frequency is calculated using the angular velocity difference input from the tracking
block.
2.1.2 Signals
The signals used in the case of a balanced network representation are presented in Table 2.1.
The signals used in the case of an unbalanced network representation are presented in Table
2.2.
The calculation parameters used in the three-phase RMS measurement are presented in Table
2.3.
Depending on the Phase Technology of the selected Measurement Point, the single-phase PLL
can measure at phase a, b, c, a − n, b − n or c − n. This can be selected by using the Measured
Phase it2p parameter.
The in-quadrature signals fed to the PLL algorithm are then automatically selected from the
phase voltages depending on the Measured Phase.
The block diagram of the single-phase PLL is equal to the three-phase PLL diagram (presented
in Figure 2.1).
Since the PLL structure of the three-phase PLL and single-phase PLL is the same, please refer
to Section 2.1.1.
2.2.2 Signals
The signals used in the single-phase RMS model are the same as the signals used for the
three-phase measurement in the balanced RMS simulation presented in Table 2.1.
The calculation parameters used for the single-phase measurement in the RMS model are
presented in Table 2.4.
3 EMT-Simulation
Depending on the selected No. of Phases option (parameter nphase), a three-phase or single-
phase PLL measurement is possible.
The phase voltages available from the EMT-simulation are set to the input values of the PLL
u a, u b and u c. The internally used voltages in the PLL, ur and ui (Figure 3.1), are calculated
by using the αβ transformation on the input voltages.
The blocks shaded in blue colour are used when the blocking functionality is being used. Please
refer to Section 3.1.1.
The limits of the integral part of the PI controller are back-calculated using the parameters f max
and f min (Upper frequency limit and Lower frequency limit) as:
where:
The blocking functionality in the EMT model is very similar to the one in the RMS model. When
this option is enabled, the blue colour shaded blocks in Figure 3.1 are enabled.
The following changes are done when the PLL is in blocking mode:
• The outputs of the integrator part of the PI controller of the tracking block are being kept
constant;
• The frequency and the angle are calculated using the angular velocity difference input
from the tracking block.
3.1.2 Signals
The signals used for the three-phase measurement in the EMT model are presented in Table
3.1.
The calculation parameters used for the three-phase measurement in the EMT model are pre-
sented in Table 3.2.
Since the EMT simulation provides only one voltage and the PLL algorithm requires in-quadrature
signals, the second signal has to be constructed. The in-quadrature image of the input single-
phase signal is created using the Inverse Park Transform [3]. The image signal is constructed
by introducing two low-pass filters in a loop consisting of the direct and inverse Park transfor-
mations. The filters use the Low-Pass Filter Time Constant T 1 in ms. The default value of T 1 is
selected for a 50Hz system [3].
The single-phase signal from the EMT-simulation and the constructed image signal are fed to
the PLL algorithm presented in Figure 3.1.
Since the PLL structure of the three-phase PLL and single-phase PLL is the same, please refer
to Section 3.1.1.
3.2.2 Signals
The signals used for the single-phase measurement in the EMT model are presented in Table
3.3.
The calculation parameters used for the single-phase measurement in the EMT model are pre-
sented in Table 3.4.
4 References
[1] R. E. Best. Phase-Locked Loops: Design, Simulation and Applications. McGraw Hill, 6
edition, 2007.
[2] B. K. Bose. Modern Power Electronics and AC Drivers. Prentice Hall of India, 1 edition,
2008.
[3] R. Teodorescu, M. Liserre, and P. Rodriguez. Grid Converters for Photovoltaic and Wind
Power Systems. Wiley, 2011.
List of Figures
List of Tables