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Decodificador de 3 Entradas Y 8 Salidas: Name Partno Date Revision Designer Company Assembly Location Device

This document describes a 3 input, 8 output decoder. It lists the input and output pins, and defines the logic functions that determine the output for each combination of inputs. It also summarizes a 7 segment decimal decoder that can display numbers 0 to 9, defining the input and output pins, and a truth table that maps each 4 bit input to the corresponding 7 segment display output.

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Bruno Mt
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0% found this document useful (0 votes)
59 views2 pages

Decodificador de 3 Entradas Y 8 Salidas: Name Partno Date Revision Designer Company Assembly Location Device

This document describes a 3 input, 8 output decoder. It lists the input and output pins, and defines the logic functions that determine the output for each combination of inputs. It also summarizes a 7 segment decimal decoder that can display numbers 0 to 9, defining the input and output pins, and a truth table that maps each 4 bit input to the corresponding 7 segment display output.

Uploaded by

Bruno Mt
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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DECODIFICADOR DE 3 ENTRADAS Y 8 SALIDAS

Name PLD-DECODER ;
PartNo 00 ;
Date 02/11/2017 ;
Revision 01 ;
Designer Engineer ;
Company WInCupl ;
Assembly None ;
Location UNJFSC ;
Device g16v8a ;

/* *************** INPUT PINS *********************/


PIN 2 = C ; /* */
PIN 3 = B ; /* */
PIN 4 = A ; /* */

/* *************** OUTPUT PINS *********************/


PIN 19 = sega ; /* */
PIN 18 = segb ; /* */
PIN 17 = segc ; /* */
PIN 16 = segd ; /* */
PIN 15 = sege ; /* */
PIN 14 = segf ; /* */
PIN 13 = segg ; /* */
PIN 12 = segh ; /* */

/* *********** FUNCIONES ****** */


sega = (A#!B#C)&(!A#!B#!C) ;
segb = (!A#!B#C) ;
segc = (!A#!B#C) ;
segd = (A#B#!C)&(A#!B#!C)&(!A#B#!C) ;
sege = (!A#!B#!C) ;
segf = (!A&!B&!C)#(!A&!B&C)#(!A&B&!C)#(!A&B&C)#(A&!B&!C)#(A&!B&C)#(A&B&!C)#(A&B&C) ;
segg = (A#!B#C)&(A#!B#!C)&(!A#B#C) ;
segh = (A#!B#C)&(!A#B#C)&(!A#!B#!C) ;
DECODIFICADOR DECIMAL DE 7 SEGMENTOS CON UNA
NUMERACION DE 0 a 9
Name PLD DECODER 7 SEG ;
PartNo 01 ;
Date 02/11/2017 ;
Revision 01 ;
Designer Engineer ;
Company WInCUPL ;
Assembly WINCUPL ;
Location UNJFSC ;
Device G16V8A ;

/* ******** Entradas **********/


PIN [2..5] = [I0..3] ; /* */

/******* Salidas ****/


PIN [12..19] = [Ot0..7] ; /*
*/

/***** DECLARACIONES y DEFINICIONES DE VARIABLES ***/


FIELD input = [I3..0] ; /*
*/
FIELD output = [Ot7..0] ; /*
*/

/**** ECUACIONES LOGICAS **/


Table input=>output {
'd'00 => 'b' 1111110 ; /* */
'd'01 => 'b' 0110000 ; /* */
'd'02 => 'b' 1101101 ; /* */
'd'03 => 'b' 1111001 ; /* */
'd'04 => 'b' 0110011 ; /* */
'd'05 => 'b' 1011011 ; /* */
'd'06 => 'b' 1011111 ; /* */
'd'07 => 'b' 1110000 ;
'd'08 => 'b' 1111111 ;
'd'09 => 'b' 1111011 ;
}

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