0% found this document useful (0 votes)
104 views2 pages

It4t5 PDF

This document outlines a course on computer system architecture. The course is 3 credits and includes lectures, practice sessions, internal assessment, and an exam. The objectives are to understand computer structure, the CPU, addressing modes, memory systems, I/O devices, pipelining, and RISC architecture. The syllabus covers register transfer, basic computer organization, control units, arithmetic, memory hierarchy, I/O organization, and pipelining over 5 units. Recommended textbooks and online resources are also provided.
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
104 views2 pages

It4t5 PDF

This document outlines a course on computer system architecture. The course is 3 credits and includes lectures, practice sessions, internal assessment, and an exam. The objectives are to understand computer structure, the CPU, addressing modes, memory systems, I/O devices, pipelining, and RISC architecture. The syllabus covers register transfer, basic computer organization, control units, arithmetic, memory hierarchy, I/O organization, and pipelining over 5 units. Recommended textbooks and online resources are also provided.
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 2

PRASAD V.

POTLURI SIDDHARTHA INSTITUTE OF TECHNOLOGY

2/4 B.Tech - SECOND SEMESTER

IT4T5 COMPUTER SYSTEM ARCHITECTURE Credits: 3


Lecture: 3 Periods/week Internal assessment: 30 marks
Practice/Interaction: 1Period/week Semester end examination: 70 marks

Objectives:
 To have a thorough understanding of the basic structure and operation of a digital computer.
 To get knowledge on the central processing unit and various instructions formats together
with a variety of addressing modes.
 To discuss in detail about the operation of the arithmetic unit including the algorithms &
Implementation of fixed-point and floating-point addition, subtraction, multiplication & division.
 To study the hierarchical memory system including cache memories and virtual memory
 To study the different ways of communicating with I/O devices, concept of pipelining and the
way it can speed up the processing, Instruction pipelining and RISC pipelining.

Outcomes:
Students will be able to
 Understand the implementation of micro operations.
 Understand the organization of basic computer and its design.
 Understand central processing unit and various instructions formats together with a variety of
addressing modes.
 Understand the organization of the Control unit, Arithmetic and Logical unit, Memory unit.
 Analyze the concepts of I/O communication, pipeline and vector processing.

Prerequisites:
Digital System Design.

Syllabus:

UNIT-I
REGISTER TRANSFER AND MICRO-OPERATIONS: Register Transfer Language, Register
Transfer, Bus and memory Transfers, Arithmetic Micro-operations, Logic Micro-operations, Shift
Micro-operations, Arithmetic Logic Shift Unit.

UNIT-II
BASIC COMPUTER ORGANIZATION AND DESIGN: Instruction codes, Computer Registers,
Computer Instructions, Timing and Control, Instruction cycle, Memory-Reference Instructions, Input-
Output and Interrupt

UNIT-III
MICRO PROGRAMMED CONTROL: Control Memory, Address Sequencing, Micro-Program
example. CENTRAL PROCESSING UNIT: General register Organization, Stack Organization,
Instruction Formats, Addressing Modes, Data Transfer and Manipulation, Program Control

UNIT-IV
COMPUTER ARITHMETIC: Addition and Subtraction, Multiplication Algorithms, Division Algorithms
,Floating-point Arithmetic operations.
DEPARTMENT OF INFORMATION TECHNOLOGY
PRASAD V. POTLURI SIDDHARTHA INSTITUTE OF TECHNOLOGY

MEMORY ORGANIZATION: Memory Hierarchy, Main Memory, Auxiliary memory, Associative


Memory, Cache Memory, Virtual Memory.

UNIT-V
INPUT-OUTPUT ORGANIZATION: Peripheral Devices, Input-output Interface, Asynchronous Data
Transfer, Modes of Transfer, Priority Interrupt, Direct Memory Access (DMA),Input-Output
Processor.
PIPELINE AND VECTOR PROCESSING: Parallel processing, Pipelining, Arithmetic pipeline,
Instruction pipeline, Risc pipeline. Organization of Intel 8085 Micro-Processor.

Text Book:
1. Computer System Architecture, Morris M. Mano, 3rd Edition, Prentice Hall India.

Reference Books:
1. Computer Organization and Architecture, William Stallings, 8th Edition, PHI
2. Computer Organization, Carl Hamachar, Vranesic, McGraw Hill.

e-Learning Resources:
1. http://jntuk-coeerd.in/
2. http://nptel.ac.in/courses.php
3. http://freevideolectures.com/Course/2277/Computer-Organization#

DEPARTMENT OF INFORMATION TECHNOLOGY

You might also like