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100% found this document useful (1 vote)
440 views6 pages

LD Micro

programacion open source de plc
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Programmable Logic Controller: Open Source

Hardware and Software for Massive Training


E. Vishnu Easwaran Nivedita Tigadi Akshay Chipkar Akshai M
[email protected] [email protected] [email protected] [email protected]

Rajesh Kushalkar Kannan M. Moudgalya Alois Zoitl Thiago Alves


[email protected] [email protected] [email protected] [email protected]

Abstract—We have attempted to create affordable pro- [5]. For example, if affordable PLCs can also be used to learn
grammable logical controllers (PLC) that can be used to train standard programming techniques, such as ladder logic [6], [7]
millions of students in developing countries. Version 1 of the PLC and function blocks [8], [9], the student will be ready to face
is based on AtMega16 and costs |600 ($10). Using the free and
open source software (FOSS) LD Micro, one can learn ladder the industry, however expensive the industrial PLCs are.
logic. To enhance the capabilities, using Raspberry PI, Version In this report, we explain how we went about creating open
2 of the PLC, costing |1,500 ($25) is made. We can use this source PLCs that will meet the above mentioned requirements.
device with the FOSS OpenPLC to learn ladder logic. We can This work is a part of a larger activity FOSSEE, funded by
also learn function block based programming using the FOSS the Govt. of India to promote IT training across India [10],
4DIAC. As ladder logic and function block based programming
are industrial standards, students trained using our approach [11]. We have also trained four million students on various IT
will be useful to industry. topics using FOSS and a method called Spoken Tutorial [12].
Index Terms—OpenPLC, 4DIAC, LDmicro, Control systems, Findings by Ibrahim Burhan Et al [2] argued that the
Industrial Automation, Education existing PLC study bench lacked functionality and was also
cumbersome to work with. They redesigned the previously
I. I NTRODUCTION existing setup in a pragmatic way with an off-the-shelf PLC;
Increasing automation in industry, and the requirement to fixed inputs and outputs, onboard switches, actuators and the
have fool-proof hardware based solutions for critical applica- PLC-programmer. This has the shortcoming that it is not open-
tions make Programmable Logical Controllers (PLC) indis- source, which makes it difficult to work with community
pensable. developed software, such as the one reported in this report.
Students across engineering, polytechnic and industrial Secondly, their PLC can only work with certain types of
training institutes, adding up to about a million, need to be inputs, making it very restrictive. In contrast, the PLC reported
educated in PLC every year. If we include re-skilling the in this work can accept many more types of inputs thereby
workforce, the number becomes even larger. In fact, the Indian providing enhanced flexibility. The open-source nature of our
Government has projected skills training for half a billion solution makes it further accessible.
people. This paper is organised as follows: Section II explains the
Most of these students lack hands-on skills as the machin- construction and the use of an inexpensive PLC based on
ery is expensive [1], making it mostly unaffordable for the ATmega16A, running on LDmicro. In Section III, we explain
academic institutions. Even if they are available, students are a more powerful PLC, based on Raspberry PI, used with the
forbidden from using it out of fear that they might get into OpenPLC software and 4DIAC. The last section is devoted to
disrepair. Existing PLC’s are also restricted to predefined set conclusions.
of experiments and thus lack versatility. They are also closed II. AT MEGA 16A BASED I NEXPENSIVE B OARD
and interiors are made inaccessible, making it a black-box [2].
A. Hardware
No wonder, the industry cries foul at the lack of links between
theory and practice [3]. The PLC shown in Fig. 1 is created with the microcon-
Affordable PLCs are the need of the hour in countries like troller ATmega16A, which is an 8-bit microcontroller with an
India [4]. It is important, however, that they follow established advanced RISC architecture.
standards, so that whatever one learns through these PLCs will The system incorporates power management circuits so that
be applicable in the industrial setting, without major changes it can be powered from a Regulated Power Supply (RPS).
This serves useful as RPS would be needed to power high
The first six authors carried out this work for the project Free and Open voltage setups for certain experiments. To emphasise the actual
Source Software for Education (FOSSEE) at IIT Bombay. Kannan is also concept of relays and coils, which are integral when it comes
with the Department of Chemical Engineering. Alois is with fortiss GmbH
and Johannes Kepler University. Thiago is with the Department of Electrical to learning PLCs, the setup also incorporates relays to control
and Computer Engineering at the University Alabama in Huntsville. high voltage setups. Table I provides the pin mapping.

978-1-5090-6684-1/18/$31.00 ©2018 IEEE 2422


TABLE I: Version 1 Pin Mapping
Pin Mapping Version 1.0
Pin Port
Connected Hardware Setup name
No. No.
1 PB0 Switch Floor - 0
2 PB1 Switch Floor - 1
3 PB2 Switch Floor - 2
4 PB3 Switch Floor - 0 up
5 PB4 Switch Floor - 1 up
34 PA6 Switch Floor - 2 down
33 PA7 Switch Floor - 1 down
16 PD2 Floor Sensor 1
17 PD3 Floor Sensor 2
18 PD4 Floor Sensor 3
19 PD5 Motor 1 up Lift/Conveyor
20 PD6 Motor 2 up Belt
40 PA0 Fan Heater/Fan Fig. 2: LDMicro
39 PA1 heater Temp Cont-
38 PA2 Temp-Sensor rol
37 PA3 Red
36 PA4 Yellow
35 PA5 Green Traffic Light

Fig. 3: Representation of control logic

C. Experiments
Fig. 1: Version 1.0 We implemented several experiments, such as emulating
traffic signals using LED, heating and measurement with a
sensor, and that involve relays. We will explain one-way
The base version of this PLC costs |600 ($10). Additional conveyor control experiment now.
experimental setup, including relays, coils, etc., as shown in To make the bogie on the belt move from one station to the
Fig. 1, cost an additional |1,500. other, in one direction. The location of the bogie is detected
by the limit switches placed appropriately near the belt, so as
B. Software Interface: LD Micro to stop it as and when the bogie reaches the end. This then
stays there for a few minutes, for the people to get in. Then it
Ladder Logic is the most popular way to program PLCs. moves the bogie to the other station to drop them, see Fig. 3.
LDmicro is an open source software that helps emulate Ladder The next component to be interfaced is the limit switch.
Logic to code PLCs. LDmicro helps user to generate HEX This is used to detect the presence of the bogie at the station,
code to program specific microcontrollers. The User Interface for it to stop for a nominal amount of time. This can be used
helps create rungs and also simulates the program to view with the normally open and normally closed coils in the ladder
it’s functionality, some of which include PWM, ADC, Relays, diagram. To add the delay, the timers can be appropriately
Coils and Timers. These components can be assigned to incorporated.
various pins in the microcontroller depending on where the In the first rung, there are controls for the motor to run
setup is connected. These functionalities are then implemented in one direction. As mentioned above, the contact is kept
by the core with suitable pins on the controller. The student normally open, as the controller pins are high at +5V, hence
should configure special functionalities, if they exist, when normally open controls shall be true until pulled to ground.
deciding the pin number. Here the L1 and L2 relays are two limit switches placed

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TABLE II: Input pin Mapping: Version 2.0
Input Pins
GND GND -
+24 24V Supply -
+24 24V Supply -
GND -Input Input GND; isolated -
D14 Digital Input GPIO23 of Rpi
D13 Digital Input GPIO22 of Rpi
D12 Digital Input GPIO21 of Rpi
D11 Digital Input GPIO20 of Rpi
AN4 Analog Input A4 of ADS1018
AN3 Analog Input A3 of ADS1018
AN2 Analog Input A2 of ADS1018
AN1 Analog Input A1 of ADS1018

Fig. 4: Ladder Logic representation of the Logic


Output Pins
Relay 1 GPIO24 of Rpi via ULN
Relay 2 GPIO25 of Rpi via ULN
Relay 3 GPIO26 of Rpi via ULN
Relay 4 GPIO27 of Rpi via ULN

TABLE III: Output pin Mapping: Version 2.0

Fig. 5: Input pins

opposite where the belt should stop.


In the next rung, there is a normally closed contact, which
triggers when the controller pins are Grounded, hence then
the controls are sent to the driver IC to turn off the motor
for the amount of time wanted. After the specified time, the
motor resumes control and starts moving. The final logic
implementation can be seen in Fig. 4. Fig. 6: Output pins
III. R ASPBERRY P I BASED P OWERFUL B OARD
In order that the PLC can handle more complicated prob-
lems, we switched over from microcontroller to a complex
system on a chip, based on the Raspberry Pi (RPi) platform.
This change made possible the utilization of two popular
open-source Linux PLC runtimes: 4DIAC-RTE and OpenPLC
Runtime, which do not work with Atmega16A.
A. Hardware
The goal to build a dynamic and modular hardware was
further achieved by moving from a rigid framework to a
platform with generic I/O ports. We made a system that uses Fig. 7: Base board
a Raspberry Pi Zero as the processing core, with 4 digital
and analog inputs and 4 digital outputs, see Fig. 5 to 8 and,
Tables II – III for pin mapping.
The board houses 4 Digital inputs with robust electrical
isolation and 4 digital outputs controlled over relays. As RPi
lacks ADC support, we added an ADS1018, which is a 12-bit
ADC that communicates over SPI interface. It is divided into
two parts, top board and baseboard which plugs together in
that order.
B. Software Interface: Eclipse 4diac
The second iteration saw change from IEC 61131-3’s Lad- Fig. 8: Final Assembly
der logic to the domain specific modeling language defined

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Fig. 11: OpenPLC Runtime Internal Architecture

Fig. 9: Overview on the IEC 61499 Function Block


systems. This allows to run FORTE on PCs for testing but
also directly on different PLCs. For that FORTE’s source has
to be compiled for the specific platform. In our case this is
Linux.

C. Software Interface: OpenPLC Project


The OpenPLC Runtime is part of the OpenPLC Project [7],
which is a complete PLC Development package consisting of
a runtime, a program development environment, and a Human
Machine Interface (HMI) editor, see Fig. 11 - 12. The Open-
PLC Runtime is responsible for executing the programs cre-
ated using the PLCOpen Editor, and also includes support for
popular SCADA protocols such as Modbus/TCP and DNP3.
Figure X shows the architecture of the OpenPLC Runtime and
Fig. 10: Example of IEC 61499 opened with 4diac-ide its internal modules: Web server, MatIEC Compiler, Network
Layer, I/O Image Tables, Hardware Layer, and a Real-time
Library.
in the IEC 61499 [9]. IEC 61499 takes the concepts defined The Webserver is a utility that allows a PLC program to
in IEC 61131-3 and extends them towards networked control be uploaded and compiled. It is constantly running on port
systems. The main element is the Function Block (FB) as 8080 and can be opened in most modern web browsers. The
shown in Fig. 9. An FB encapsulates a control functionality, MatIEC Compiler is responsible for compiling the uploaded
which can be independently developed and tested. In IEC PLC program into an equivalent C program, that later on is
61499 FBs are wired together to applications (see the example compiled into a final binary application using GCC to form
in Fig. 10), which can be distributed to a network of control the PLC Logic block. The Input and Output Image Tables
devices. Anyone who is comfortable with digital logic design are memory regions defined in the OpenPLC application that
can easily understand FB based programming. [13] stores the current state of all inputs and outputs. The contents
We took advantage of the Eclipse 4diac project [14], which inside the input and output image tables are handled by the
provides a set of open-source, well developed and documented Hardware Layer module, which is responsible to read the
stable software tools, as our development environment. Eclipse physical inputs, write their state in the Input Image Table,
4diac consists two main components: an IDE for designing and set the physical outputs according to the Output Image
FBs and control applications, called 4diac-ide (see Fig. 10) and Table.
a run-time environment (RTE) called FORTE (which stands for OpenPLC Runtime also includes a real-time library that
4diac-rte). 4diac-ide is based on the Eclipse platform and lets provides a better real-time response for the OpenPLC process.
its users design control application utilizing the models defined Real-time in Linux is greatly affected by the Linux scheduling
in the IEC 61499. It does that by allowing users to form their policy. OpenPLC’s real-time library improves Linux response
logic by connecting the FBs and also has a comprehensive set on a multicore architecture by isolating OpenPLC process
of predefined FBs. Furthermore, if required, users can develop on a separated core. Since the OpenPLC process is the only
their own user defined FBs in dedicated editors. process constantly running in the isolated core, it can provide
FORTE provides the infrastructure for executing the logic an improved deterministic response, even when the system is
developed in 4diac-ide. FORTE is written in C++ and suitable under heavy load.
for a wide range of embedded control devices. For that it Finally, the last module is the Network Layer, responsible
has been ported to several operating and real-time operating for adding connectivity to the OpenPLC application. Currently

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Fig. 12: PLCOpen Editor

the Network Layer supports two popular industrial protocols: wave signal of time period 10ms. In Fig. 14 you can see the
Modbus/TCP and DNP3. necessary FBs needed and the interconnections.
The PLCOpen Editor is the Development Environment used Now the output Q of the blink LED app is sent to
to create programs for the OpenPLC Runtime. The PLCOpen E R TRIG block. This block produces an output event when
Editor consists of a graphical interface that allows the creation there is a transition in QI from 0 to 1. This event now triggers
of a PLC project with several IEC 61131-3 Program Organi- E RDELAY.DT of E RDELAY is actually responsible to
zation Units (POU). Each POU may be programmed in any change the duty cycle of the wave. EO of this block triggers
of the five programming languages defined in the IEC 61131- the S of E SR block, EO1 of E SWITCH triggers the R of
3 standard. POUs are listed in a tree view in the left pane the E SR block. Q of this block is given to OUT of the QX
along with the PLC Configuration and Resources. By double block. Now DT of R DELAY must be increased from 0 to
clicking a POU, the appropriate language editor opens with 10ms in order to change the duty cycle. When it is changed
the contents of the program. from 5ms to 10ms, duty cycle changes from 100% to 50%.
and when it is changed from 0ms to 5ms intensity changes
D. Experiments from 50% to 0%.
Hence we use an up counter whose CU is triggered every
We now explain an experiment conducted using FB to 500ms using an E CYCLE block. When the counter output
dim LEDs: A gateway application to FB programming - to reaches 10, it is reset to 0 using the E PERMIT. The UINT
continuously glow an LED from its highest intensity to lowest output of the counter is converted into time in seconds and
intensity. In other words produce PWM signals with different is then divided by 1000 to get time in milliseconds. Then the
duty cycles and pass it through an LED to observe the change output is given to DT of E R DELAY. Fig. 13 shows the
in intensity. The final schematic of the program is given in final program. This application is then deployed to Raspberry
Fig. 13, which we explain now. pi EMB.RES with the LED attached to the pin specified in
This experiment requires an LED and a current limiting the PARAMS of the QX block.
resistor of 220 ohm and the OpenPLC. Connect the LED via
the resistor to Digital Output of the PLC. We will first produce IV. C ONCLUSION
a square wave signal of a particular frequency and then change We reported our efforts in creating two versions of PLC,
its ON and OFF times. For doing so, we first build a BLINK one using Atmega16 and the other using Raspberry Pi. As the
LED application with DT as 5ms. This will produce square state of the art open source PLC software OpenPLC Runtime

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Fig. 13: Final Program for the Blinking LED Example

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