1.

Introduction to Microprocessor 8085

Introduction :-
The CPU consists of ALU and control unit. It contains various registers to store data ; ALU perform the
arithmetical and logical operations; instruction decoders and counters as well as control lines.
In the late 1960s, the CPU was designed with discrete components on various boards. Due to advances
in semiconductor technology, it becomes possible to fabricate CPU on a single chip of silicon called the
“Micro-processor”. The Intel corporation is general company, that introduced micro-processor (μP) into
market place in 1971. There various companies as Motorola, Toshiba, Zilog manufactured varieties of μP in
1972. The 8008 has a data bus it could read or write 8 bits at a time. In 1973, first general purpose μP Intel
8080 was introduced, it was the improved version of 8008. At present, a number of 8 bit μPs are available as
Intel 8085, Motorola’s MC-6800, Zilog, Z-80, MOS technology produced IC 8086 , is a 16 bit μP. There are
various processors with the different specifications as
The recent processor are in family of 64 bit products from Intel introduced in 2001 and Intel processor
Pentium in 2003.

8085 Micro-processor :-
The Micro-processor is a multi-purpose programmable logic device, that reads binary instruction from
a storage device, accept a binary data as input and process data according to these instructions and provide
result as output. This Micro-processor can be manufactured by very large scale integration(VLSI) technique. It
is capable of performing various computing functions and making decisions to change the sequence of
program execution. It is a programmable device, designed with register, flip-flops and timing elements. The µP
has a set of instructions, designed internally to manipulate data and communicate with peripherals(I/O) devices
The Micro-processor can be programmed to perform functions on given data according to given
instructions. These instructions are given to the Micro-processor by writing them into its memory. The writing
(entering) of instruction and data is done through a input device like key-board. It reads or transfer one
instruction at a time and perform the data manipulation indicated by the instruction. The result can be stored in
memory or sent to output devices as LED or display.

Features of 8085 :-
The features of 8085 Micro-processor includes
 It is an 8-bit Micro-processor hat can process 8-bit data
 It operates on a single +5V power supply.
 It has on chip clock generator.
 It can operate with 3MHz clock frequency.
 It has 16 address lines and it can access 216 = 64k bytes of memory
 The lower 8- bit AD0 – AD7 are multiplexed to get address bus and data bus, which reduce the pins of
8085.
 It has 74 instructions with different addressing modes
 The ALU performs addition, subtraction and all logical operations
 It has 8-bit accumulator, flag register, general purpose registers, SP and PC .
 It has serial input – output control, which allows serial communication
Pin Configuration of 8085:-
The 8085 is an 8 bit general purpose μP having 40 pins and works on +Vcc power supply. Fig. shows
the pin diagram of 8085 μP.

Fig. Pin diagram of 8085

The functions of each pins as
(1)A0-A15:- High order address bus, these are output, tri-state signals.These signals are unidirectional
meaning that address given by μP to select memory location.
2) ADo-AD7:- Multiplexed address / data bus, these are input–output, tri-state signals having address and data.
The low order 8 bits of 16 bit address is multiplexed with data bus.
(3) ALE:- Address latch enable, is output signal, used to give information regarding AD0-AD7 content, when
ALE=1, ADo-AD7 contents as address Ao-A7 and when ALE=0, ADo-AD7 contents as data D0-D7.
(4) I/O M:- Input, output/memory, used to select I/O device interfacing or memory interfacing when I/O M=0
then memory chip is selected, when I/OM=1 devices are interfaced.
(5)So/S1:- Status signal So & S1, these signals are used to give information of operation performed by μP.

So S1 Operation
0 0 Halt
0 1 Read
1 0 Write
1 1 Op-code
(6) RD:- Read, is an active low output signal used to read data from memory or I/O device.
(7)WR:-Write is an active low output signal used to write data in memory or in I/O device.
(8)READY- It is active high i/p control signal. It used by μP to detect whether μP is ready to transfer data.
(9) TRAP :- This is active high with highest priority interrupt, when this pin is active then μP stop running the
main program and program counter address to 00 to 24 H.
(10) RST7.5, 6.5, 5.5:- Restart interrupt, these are active high vectored, maskable interrupt, when signals are
received to interrupt priority is given to RST7.5, RST6.5, RST5.5 then PC goes to location 003C, 0034, 002C.
(11) INTR and INTA :- Interrupt request and acknowledge . The INTR is an active high interrupt. When μP
receives the interrupt signal, it sends the active low interrupt acknowledge i.e INTA & it have least priority.
(12) HOLD and HLDA :- HOLD is active high input signal used by other controller to request μP about use
of address lines when μP receives this signal it sends HLDA as acknowledgement signal.
(13) RESET IN:- It is active low signal, which is input to μP, which reset the μP and PC becomes 0000 H.
(14) RESET OUT :- It is active high output signal used to indicate that μP is reset.
(15) SID and SOD :- Serial data input and serial data output , when data is to be loaded or given out serially
i.e. bit by bit these SID and SOD pins are used.
(16) X1/X2:- These are pins where tuned circuit/quartz may be connected which is used to generate clock.
(17) Supply/Ground:- These are pins to which the output and ground terminals of the battery is connected.
(18) CLOCK OUT :- It is output signal where the internal operating frequency is available.

Architecture of 8085 micro-processor:-

The internal functional block diagram/ architecture of 8085 μP is shown in fig.

(1) Timing and control block :-

 The crystal connected at pin 1 and 2, to generator clock pulses. These cock pulses are used for timing
the occurrence of other pulses. A clock out is provided for external peripheral. The control signals are
generated for reading the data from peripheral (RD) and also writing the data in peripheral (WR ). ALE
(Address latch enable) is used to indicate address on ADo to AD7 lines.The I/O M indicates the signals for I/ O
operation or memory operation .

(2) Arithmetic Logic Unit (ALU) :-

This does the arithmetic and logic operations. It has flip-flop which keeps record of the status of ALU,
temporary 8 bit register is used for holding data during ALU operation. Accumulator is Reg A which is 8 bit
and here the arithmetic and logical operations are done. The result is stored in Reg A after this logical or
arithmetic operation the status of flag changes the bit position reserved in flag register are as follows.
D7 D6 D5 D4 D3 D2 D1 D0
S Z AC P CY
S- sign Flag :- If D7 bit is 1, the sign flag is set when the number in accumulator is input.
Z- Flag:- When D6 bit is set to 1 then numbering accumulator is zero or after the instructions any register
becomes zero then flag is set.
AC-Auxiliary Carry:- In arithmetic operation the carry is generated by D3, which passes to D4 at the end of
1st nibble then this flag set.
P- Parity Flag :- When D2 bit set it means after the arithmetic operation/ logical operation the result has even
number of 1s and if odd number of 1s is present this flag reset.
CY- Carry flag :- If arithmetic operation result in a carry this flag set.

(3) Instruction Decoder :-

This decodes instruction which has made available in instruction register. The instruction decoded ,
cause a sequence of related operations to be performed either internal or externally.

(4) Programmable Register:-

In this 6 general purpose registers Reg. B, Reg. C, Reg. D, Reg. E, Reg. H, Reg. L are used and they
are 8 bit registers, but BC, DE and HL may be used as pair for 16 bit operations. Reg. A is accumulator, Reg. F
is flag register. The (Program Counter) PC is 16 bit used to point memory location from where instruction/data
to be fetched. A stack pointer (SP) is a 16 bit reg. used to store address of memory for structure as PUSH and
POP. The decrementer/incrementer is used to change contents of registers by 1.

(5)Interrupt Controls:-
Five interrupt signals as, TRAP is highest priority non-maskable interrupt, RST7.5,RST6.5, RST5.5 are
maskable vector interrupt & INTR is interrupt request. It can change sequence of operation.

(6) Serial I/O controls :

If data available is serial i.e. bit by bit then SID and SOD is used.

(7) BUS:-
It is transfer the address/ data or controlling signals, so there are three buses as Address bus, Data bus
and control bus.
8086 Micro-processor :-
The 8086 is a 16-bit microprocessor chip designed by Intel between early 1976 and June 8, 1978, when
it was released.
Features of 8086
 It was the first 16-bit processor having 16-bit ALU, 16-bit registers, internal data bus, and 16-bit
external data bus resulting in faster processing
 It has an instruction queue, which is capable of storing six instruction bytes from the memory resulting
in faster processing.
 It has 16 data lines.
 It has 20 address lines
 It can access upto 1Mbytes of memory (220=1Mbytes)
 It is available in 3 versions based on the frequency of operation −
o 8086 → 5MHz
o 8086-2 → 8MHz
o (c)8086-1 → 10 MHz
 It uses two stages of pipelining, i.e. Fetch Stage and Execute Stage, which improves performance.
 Fetch stage can prefetch up to 6 bytes of instructions and stores them in the queue.
 Execute Unit (EU) executes these instructions.
 It consists of 29,000 transistors.
Architecture of 8086 Microprocessor:
The following diagram shows the architecture of a 8086 Microprocessor −
 8086 Microprocessor is divided into two functional units, i.e. BIU (Bus Interface Unit) &
EU (Execution Unit).
I) BIU (Bus Interface Unit):
It has the following functional parts.
1) Instruction queue − BIU contains the 6 bytes instruction queue.BIU gets up to 6 bytes of next
instructions and stores them in the instruction queue.When EU executes instructions and is ready for its next
instruction, then it simply reads the instruction from this instruction queue resulting in increased execution
speed. Fetching the next instruction while the current instruction executes is called pipelining.
2) Segment register − BIU has 4 segment buses, i.e. CS, DS, SS& ES. It holds the addresses of
instructions and data in memory, which are used by the processor to access memory locations. It also contains
1 pointer register IP, which holds the address of the next instruction to execute by the EU.
o CS − It stands for Code Segment. It is used for addressing a memory location in the code
segment of the memory, where the executable program is stored.
o DS − It stands for Data Segment. It consists of data used by the program and is accessed in the
data segment by an offset address or the content of other register that holds the offset address.
o SS − It stands for Stack Segment. It handles memory to store data and addresses during
execution.
o ES − It stands for Extra Segment. ES is additional data segment, which is used by the string to
hold the extra destination data.
3) Instruction pointer − It is a 16-bit register used to hold the address of the next instruction to be
executed.
II) EU (Execution Unit):
Execution unit gives instructions to BIU stating from where to fetch the data and then decode and
execute those instructions. Its function is to control operations on data using the instruction decoder & ALU.
1) ALU:
It handles all arithmetic and logical operations, like +, −, ×, /, OR, AND, NOT operations.
2) Flag Register:
It is a 16-bit register that behaves like a flip-flop, i.e. it changes its status according to the result stored
in the accumulator. It has 9 flags and they are divided into 2 groups − Conditional Flags and Control Flags.
3) General purpose registers:
There are 8 general purpose registers, i.e., AH, AL, BH, BL, CH, CL, DH, and DL. These registers can
be used individually to store 8-bit data and can be used in pairs to store 16bit data. The valid register pairs are
AH and AL, BH and BL, CH and CL, and DH and DL. It is referred to the AX, BX, CX, and DX
respectively.
 AX register − It is also known as accumulator register. It is used to store operands for arithmetic
operations.
 BX register − It is used as a base register. It is used to store the starting base address of the memory
area within the data segment.
 CX register − It is referred to as counter. It is used in loop instruction to store the loop counter.
 DX register − This register is used to hold I/O port address for I/O instruction.
4) Stack pointer register
It is a 16-bit register, which holds the address from the start of the segment to the memory location,
where a word was most recently stored on the stack.

Comparison between 8085 & 8086 Microprocessor :-

 Size − 8085 is 8-bit microprocessor, whereas 8086 is 16-bit microprocessor.
 Address Bus − 8085 has 16-bit address bus while 8086 has 20-bit address bus.
 Memory − 8085 can access up to 64Kb, whereas 8086 can access up to 1 Mb of memory.
 Instruction − 8085 doesn’t have an instruction queue, whereas 8086 has an instruction queue.
 Pipelining − 8085 doesn’t support a pipelined architecture while 8086 supports a pipelined
architecture.
 I/O − 8085 can address 28 = 256 I/O's, whereas 8086 can access 216 = 65,536 I/O's.
 Cost − The cost of 8085 is low whereas that of 8086 is high.
 2. Instruction Set of 8085
►Introduction :-
The Micro-processor can understand only the language of 0’s and 1’s , to write the program with the
help of these 0’s and 1’s called the machine language. The particular sequence of these binary data called the
instruction. When CPU fetches or decode these instruction from the memory, in the form of binary data and
after deciding the data, the instructions can be executed. Each instruction is available in two forms (1) The first
form is a sequence of binary data 0 and 1’s , that the μP can understand i.e. machine language.
(2) Second form of instruction has two parts; op-code and operand. The op-code gives idea as, what task is to
be performed; whereas operand fives data to be operated on. This 2nd form of instruction are in symbolic name,
called the assembly language. All the data and addresses are in hexadecimal number system for 8085 μP.
Using this assembly and machine language, the program on data is translate from human level
mnemonics into machine level .

► Instruction format :-
The instruction is an command to the μP to perform the given task on specified data. Each instruction
has two parts, one is called opcode and second called the operand.
According to the size of word; 8085 μP instructions are 3 byte.

(1) One byte instruction ( one word in length ):-

It includes the op-code and operand in the same byte e.g. ADD B
Sr. No. Op-code Operand Machine (binary) code Hex code
1 MOV B, D 0100 0010 42
2 ADD B 1000 0000 80
These instructions requires one memory location to store in memory.

(2) Two byte instruction :-

In which the 1st byte is use to specify op-code and second byte is use to specify the operand
Sr. No Op-code Operand Machine (binary) code Hex code
1 MVI A,30 H 0011 1110 3E (operator) 1st byte
30 (data) 2nd byte
(3) Three byte Instruction :-
In which the 1st byte specifies opcode and 2nd , 3rd bytes are used to specify the operand or 16 bit
address e.g.
Sr. No Op-code Operand Machine (binary) code Hex code
STA 8000 H 0011 0010 32 1st byte
0000 0000 00 2nd byte
1000 0000 80 3rd byte

The 8085 Addressing Modes:-

The various formats for specifying data are called the addressing modes. For 8085 these are Immediate
addressing, Register addressing, Direct addressing, Indirect addressing etc.

1) Immediate addressing:- Data is present in the instruction. Load the immediate data into the destination
provided, i.e. immediate data is transfer to address or register. Example: MVI R,data

2) Register addressing :-Data is provided through the registers, data is transfer from source registor to
destination registors. Example: MOV Rd, Rs
3) Direct addressing:- Used to accept data from outside devices to store in the accumulator or send the data
stored in the accumulator to the outside device. Accept the data from the port 00H and store them into
accumulator or Send the data from the accumulator to the port 01H. Example: IN 00H or OUT 01H

4) Indirect Addressing:- This means that the Effective Address is calculated by the processor and the contents
of the address (and the one following) is used to form a second address. The second address is where the data
is stored. Note that this requires several memory accesses; two accesses to retrieve the 16-bit address and a
further access (or accesses) to retrieve the data which is to be loaded into the register. Ex MOV A, M.

► Classification of Instruction Set :-

It is generally classified into five group as 1) Data transfer 2) Arithmetic 3) Logical 4) Branch
5) machine control instruction
1) Data transfer Instruction :- This gives the movement of data from register to register, register to memory,
memory to register or input device to register and register to output devices. The data is copies from source to
destination.
Mnemonics Task
(1) a) MOV Rd, Rs ; Copy data from source reg Rs to destination reg Rd
e.g MOV A,B ; if A= 5 and B = 0A After execution, A= 0A and B = 0A

b) MOV Rd, M :-
MOV B, M :Copies data from memory M to reg B
e.g. MOV B, M ;The pairs are 2002 H reg B = 20 H; Memory content are 40 H; after execution B= 40 ; M= 40.

(2) MOV M , Rd ; It can copies data from reg to memory in HL pairs.

e.g. MOV M, C i.e. C= 40 and HL = 2001 = XX H After execution L= 40 H and M = HL = 40 H

(3) MVI R, data ; It can move immediate data in register.

e.g. MVI D, 05 H i.e. before execution D=XX H; after execution D = 05H

(4) MVI M, data : It can immediate move the data into memory.
e.g. MVI M ,05 i.e. M= HL = 05 after execution.

(5) LXI Rp, data 16 bit ; To load 16 bit data into reg pair(Rp) . The
e.g. LXI B, 60FF H ; pair as HL, BC, E or SP

(6) LDA 16 bit address ; The accumulator directly load from memory.
It can copies the data from memory, whose address is given in instruction. It is 3 byte instruction.

(7) STA 16 bit add ; Memory direct store data from Acc.
e.g. STA 6050 H; It can copies content of Acc to memory whose add is part of instruction.It is 3 byte instruction.

(8) LHLD 16 bit add : ; To load HL pair from memory;

e.g LHLD 6050 H; It can copies content of memory to H and L register.

(9) SHLD 16 bit add ;To store HL pair content directly in memory,
 e.g. SHLD 6050 H i.e. it copies content of register H and L to memory locations. It is 3 byte instruction.

(10) LDAX Rp:-To load Acc. Indirect by using memory into Acc.
e.g. LDAX B ;It copies content of memory into Acc, the address of memory is loaded into reg. pair.

(11) STAX Rp:- To store indirect by using memory pointer; e.g. STAX B, i.e. it copies data from Acc to
memory whose address is given in BC pair or DE pair; it is one byte instruction.

(12) XCHG :_Exchange the content of HL and DE. e.g. XCHG , i.e. it can exchange content of H to D and L
to E and vice-versa. It is one byte instruction. Before execution H = 01 , L = 02 , D = 03 and E = 04. After
execution H = 03, L = 04 and D = 01 and E = 02.

(13) IN 8 bit:-The 8 bit data is in to Acc from ports; e.g. IN 20 H , i.e. the μP reads data from inputport whose
address is 20 H and data from that device is copied in Acc.. It is two byte instruction.

(14) OUT 8 bit add:-The output data to output port from Acc .
e.g. OUT 30 H i.e. data transfer from Acc to output port . The Address of this device is given in instruction
and address for this port is 8 bit . It is two byte instruction.

►Arithmetic Operation group :-

This arithmetic group of instructions consists the instructions for addition, subtraction, Increment and
Decrement. All these operation of addition and subtraction are carried with the data in accumulator. After
executing these instruction; the status of flag register will change, that depends on the data.

1) ADD, R:- Add the content of register to Acc and store result in Acc. When it exe.
e.g. ADD B i.e A= 04 , B= 06 and its result is 0A H will be stored in Acc.
A = 0000 0100 = 04
B = 0000 0110 = 06
0000 1010 = 10 = 0A .: Acc content 0A H
Other Examples. ADDA; ADD C, ADD D, ADD F, ADD H, ADD L. It is 1byte instruction.

2) ADD M:- Add content of memory to Acc A. The content of memory, whose
Address is stored in HL pair. If addition is greater than FF the carry flag is set. It is one byte instruction e.g.
ADD M , as A = AA ; H = 60 ; L = 50 H and data in memory is 2 at 6050 = 02 , after execution .

3) ) ADC R:- Add the reg. R and carry flag content into acc. i.e. it is the addition of
reg. content, carry flag contents and acc. It is one byte instruction.
e.g. ADC D as A= 06, D= 05 and CY is set. After execution A= 0C H.

4) ADC M:- Add content of memory, carry flag to acc. and add memory is in HL pair . It is one byte
instruction. e.g. ADC M.

5) ADI 8 bit data :- Add the immediate data into acc. and result is store in acc. It is two by instruction.
e.g. ADI, 04 i.e. A = 06 and data 04. After. Execution A = 0A.
6) ACI 8 bit data: Add immediate data with carry into acc and result in acc. It is two byte instruction.
e.g. ACI 0BH ; as A= B1 and data 0B ; carry flag is set then after execution A = B0 + 0B + 1 = BC.

7) DAD Rd: To add the content of specified pair (CB, OE, HL, SP) into the HL pair content and result is store
in HL pair. It is one byte instruction, in which acc doesn’t play any role. e.g. DAD B.

8) SUB R: To subtract reg. content from acc and result in acc. It is one byte instruction,
e.g. SUB B Let A= 09, B=03, after execution A= 06 and B = 03.
The other instructions are SUB B, SUB C, SUB D, SUB E, SUB H, SUB L.

9) SUB M:- The subtraction of memory from acc. It subtract content of memory from acc, memory address is
in HL pair. e.g. SUB M as A=0FF H, H = 60 H, and L 50 H and data in 6050 H memory is 01 H.
After execution this instruction A = FE and H = 60 H, L= 50 H and memory contents remains same. It is
one instruction and the flag reg. is change depending on data

10) SBB R:-Subtract reg. and borrow flag from acc e.g. SBB C.
Let A = FF H, C= 02 H and carry flag is set then after executing SBB C, i.e. FF-02-01 = FC H and A = FC H .
This is one byte instruction.

11) SBB M:-Subtract memory and borrow from acc and address of memory will be in HL pair e.g. SSB M,
Let A= 0F H, H = 60 H , L= 50 H and carry flag is set, memory location 6050 H contents are 02 H. After
execution of SBB M, A = 0C H, H=60, L=50 and memory M= 02 H .

12) SUI data :- The subtract immediate from acc. i.e. it subtract the data, which is given in the instruction from
acc e.g. SUI 50 H. Let A = 5A H, after execution SUI 50 H Result is 5A -50 = 0A will be stored in acc after
A= 0A. This is two byte instruction.

13) SBI data:- subtract immediate with borrow from acc e.g. SBI 50 , Let A = 5A, flag is set , After executing
of SBI 50 H i.e. 5A-50 -01 = 09 H. i.e Reg. A = 09 H. this is two byte instruction.

14) INR R:-The increment reg. content by 1. if contents are 00 H, after 1 is added i.e. 01H.
It is one byte instruction and other examples are INR A, INR B, INR C, INR D, INR E, INR H and INR L etc.

15) DCR R:- :The decrement the content reg. by 1. e.g. DCR B, Suppose reg. B = 08 H. If B= 00H decrement
by 01 H means, it becomes FF H. This is one byte instruction.

16) INX Rp :- The increment of reg. pair by one . e.g. INX B, suppose B=00 H , C=02 H After INX B the
content of BC pair i.e. 0002 H will change to 0003H and hence B=00 H , C=03 H .
It is one byte instruction. The other eg as INX B, INX D , INX H, INX H, INX SD

17) DCX Rp :-The decrement of reg. pair by one e.g. DCX B, B=00 H, C=03 H, After the executing DCX B,
B= 00 H, C =02 H i.e. 0003-01 =0002 H. It is one byte inst.
18) INR M :- The increment the content of memory by one .whose address is in HL pair. e.g. H= 60 H L= 50
H the content of the memory location 6050 H is 03 H . After execution the H= 60 and L = 50 H and data of the
memory 6050 H is 02 H. This is one byte instruction.

19) DCR M :- The decrement of the memory by one. whose address is in HL pair. This is one byte
instruction, the flag reg. are affected. e.g. DCR M, suppose H=C0 H and L= 00 H and the content of the
memory location C000 H is 03 H. After execution the data in memory location C000 H becomes 02 H.

► Logical group :-
The instructions gives logical operation like ANDing, ORing, EX-ORing , Complements etc.

1) ANA R :- The registers content are logically ANDed with acc and result is placed in acc Ex. ANA B
let A= 85 H and reg. B = 03 H. After execution result is 01 H in A as A = 85 H
It is one byte instruction, its other examples are ANA A, ANA B, ANA D,ANA E, ANA H, ANA L etc.

2) ANA M:-ANDed the content of memory with acc. This instruction AND the content of the memory,
whose address is in HL with acc. E.g. ANA M. Let reg. A= 40 H , H = 60 H and memory location 6085 H
contents 07 H. After execution of AND M result is 05 H
A = 05 H = 0000 0101
Memory = 07 H = 0000 0111 ANDing
--------------
Thus Reg. A = 05 H = 0000 0101
The content of memory will not be changed. The status of the flag will affect.

3) ANI 8 bit data :- AND immediate data with acc. In this instruction data is given in the instruction. Ex. ANI
0F H; Let A = F3 H After ANDing this data in result is 03 H in acc. It is two byte instruction.
i.e. Reg A = F3 H = 1111 0011
Data = 0F H = 0000 1111 AND operation
----- --------------
Result = 03 H = 0000 0011

4) ORA R :- ORing the content of reg. with acc. This perform logical OR operation bitwise. i.e. Do bit of
reg. ORed with Do bit of acc. Similarly other bits and result is stored in acc. Ex. ORA B, suppose reg. A=F3H
and reg. B=0F H. The ORing these two result is FF stored in A=F3H. This status of flag affect, this instruction
is one byte instruction , the other examples are ORA A, ORA B, ORA C, ORA D, ORA E , ORA H, ORA L.
A= F3 = 1 1 1 1 0 0 1 1
B= 0F= 0 0 0 0 1 1 1 1

A = FF= 1 1 1 1 1 1 1 1

5) ORA M :- OR the content of memory with acc. This instruction address of memory is in HL pair, e.g. ORA
M suppose R = 07 H, reg. H =C0 H and reg. L= 00 H, the data of memory location C000 H is F1 H. After
executing this instruction, reg. A = F7 H It is one byte instruction.
.: Reg. A = 07 H = 0000 0111
Memory = F1 H = 1111 0001 ORing
------ -----------------
Result = F7 H = 1111 0111
6) ORI 8 bit :- The logically OR immediate data with acc. and result is stored in acc. Ex. ORI 09 H i.e. A
=05 H. After execution this instruction, the result is 0D stores in A. It is two byte instruction.
.: A = 05 H = 0000 0111
Memory = 09 H = 0000 1001 ORing
------- ---------------
Result = 0D H = 0000 1101

7) XRA R :- :The Exclusive OR register with acc and result in acc.

e.g. XRA B, Let A = F3 H, B = 0F H, EX-ORing these two result is FC in A. It is one byte instruction,
other Ex. as XRA A, XRA B, XRA C, XRA D, XRA E, XRA H, XRA L.

8) XRA M :- :The EX-Or the content of memory with acc. This instruction is EX-ORing the content of
memory with content of accumulator and this is one byte instruction.The addition of memory is in HL pair .
Ex. XRA M , Let A = 07 H , H = 60 H , L = 00 H ; the data of memory location 6000 is F1 H. After execution
XRA M, the answer in A = F6 H.

9) XRI data :- It is two byte instructions, the logical EX-OR immediate data with acc, the content of acc are
EX-OR with 8 bit data, specified along with instruction and result in acc. Ex. XRI 09 H, Let A= 05 after
execution, acc store result as A = 05 H =0000 0101
Data = 09 H= 0000 1001
---- ---------------
A= 0C 0000 1100
10) CMP R :- :The compare register with acc .The result of comparison are indicated by setting the flags as
A> R :- CY flag set and Z flag
A= R :- Z flag set
A<R :- CY flag set
Examples :(a) CMP B :- A=20 , B=10 . After execution A=20 and B =10 only flags are changed CY=Rest,
Z=P=S=AC=Reset.

11)CMP M:- To compare memory with acc. Result are indicated by status of CY and Z flag

12)CPI data:-Compare immediate data with acc. Result is shown by status of flag. It is two byte instruction

13) CMA :- To complement of acc and result is also places in acc. i.e. NOT operation as 1 replaced by 08 H.
Ex. CMA; A = AA H, after execution AA = 10101010=0101 0101 =55

14) CMC :- To complement copy flag, if CY =1 after execution CY = 0, It is one byte inst.

15) STC :- Set carry flag instruction, it does not consider previous carry flag status. It is one byte instruction.

16 ) RAL :- Rotate acc to left, it rotate the acc left by 1 bit. i.e shift the bits left by one position
D0,D1,D2,D3,D4,D5,D6,D7 etc.
CY

D7 D6 D5 D4 D3 D2 D1 D0

Ex. RAL : reg. A =1F H and RAL is executed then the

0 0 0 1 1 1 1 1 Reg. A 3E and CY = 0. It is one byte inst.

17) RAR :- Rotate acc to right :- It rotates the acc right by 1 bit i.e. it shifts bit right by one position D1 to Do,
D2 to D1, D3 to D2, D4 to D3,-------- D7 to D6 and Do to D7.
CY

D7 D6 D5 D4 D3 D2 D1 D0

Ex. RAR as reg. A = 1F and RAR is executed the 0 0 0 1 1 1 1 1

After execution 1 0 0 0 1 1 1 1 acc. Becomes A = 8F H . It is one byte instruction.

18) RLC :- Rotate acc. Left through carry, it rotates the content of acc left by one bit, but with one execution
than RLC as Do D1, D2 D1------- D6 D7, but D7 is copied in carry flag and CY is shift to D0. Ex.
RLC, A = 1F and CY is set then RLC
0 0 0 1 1 1 1 1.
CY

D7 D6 D5 D4 D3 D2 D1 D0
Result is 0 0 0 1 1 1 1 1; CY = 0.
.: A = 3 F H and CY = 0. It is one byte instruction.

19) RRC :- Rotate acc to right through carry. It rotates the contents of acc right by one bit, but with one
execution than RRC. In this case D1 D0, D2 D1------- D7 D6, but Do to CY and carry flag to D7.
CY

D7 D6 D5 D4 D3 D2 D1 D0
Ex. RRC let A=1F H and CY is set then executing RRC

0 0 0 1 1 1 1 1 1 0 0 0 1 1 1 1
CY = 1 CY = 1
Reg. A = 8F H and CY =1. This is one byte instruction.

► Branch group :-
The branch instructions are most powerful instructions because they allow the μP to change the
sequence of a program either conditionality or un-conditionality. It instruct the μP to go to a different memory
location.
The branch instructions are classified in three groups as (1) Jump Instruction (2) Call and Return
Instruction (3) Restart Instructions.
1) JUMP Instruction :-
The Jump instructions are 3 byte instruction, these instructions causes 8085 to deviate from main
program. There are two types of JMP instruction:-

a) Unconditional jump: - JMP 16 bit address

e.g. JMP C100 ; it tells to the μP to continue the program from memory location C100.
This instruction is loaded in main program from
C010 – op-code C3
C01A = - 00
C01B - - C1
Instead of continuing the next instruction at C01C μP jump to location C100 and whatever instruction written
in that location, it starts operating. (This is called subroutine program). When JMP instruction is review, the
program counter is loaded with data C100(next address).

b) Conditional JUMP :- The condition jump instruction check the flag and makes the decisions to change or
not change the sequence of program. Thus the different conditional jumps are :
1) JC - Jump if carry flag is set
2) JNC - Jump if carry flag is reset
3) JZ - Jump if zero flag is set
4) JNZ – Jump if zero flag is reset
5) JP - Jump if positive i.e. sign flag reset.
6) JM - Jump if minus or negative i.e. parity flag set.
7) JPE – Jump if parity even i.e. parity flag set
8) JPO – Jump if parity odd i.e. parity flag reset
If condition is true then PC will go to new address, if condition is not satisfied then main program is continued.

2) CALL Instructions:-
The 8085 has two instructions to implement subroutine CALL and RET . The CALL instruction is used
in the main program to call the subroutine.
There are two type of call instructions as conditional CALL and un-conditional CALL. In any program
(main) when CALL instruction is used then it is necessary to use the RET (return) instruction at the end of
subroutine, so that μP once again come to main program.
For the remembering the memory location stack pointer is used and then address of the memory is
store . These instructions are 3 byte. Ex. CALL 2034H or CALL XYZ

a) Unconditional call : e.g: CALL 16-bit address

When this instruction is executed the program sequence is transferred to the address specified in the
instruction. Before transferring the sequence, the PC contents are stored on the. The call instruction is used to
call a subroutine. To return back from subroutine the PC contents are stored stack. e.g. CALL 6050 suppose
thisinstruction is stored at location.
6006 op-code
6007 50
6008 60
6009 New instruction
When this instruction is executed, program counter 6009 will be stored on to a stack and the μP starts
executing instructions from 6050 onward.

b) Conditional CALL: In conditional call instruction when the condition is true then call at address is made.
If the condition is false it will not have a call and will proceed for next instruction after it. Such different
conditional call instructions are
1) CC : Call if carry is set.
2) CNC : Call if carry flag is reset
3) CP : Call if positive i.e. sign flag reset
4) CM : Call if minus i.e. sign flag set
5) CPE : Call if parity is even i.e. parity flag set
6) CPO : Call if parity is odd i.e. parity flag reset
7) CZ : Call if zero flag is set
8) CNZ : Call if zero flag is reset
When call instruction is used. Then RET instruction is also used at the end of subroutine program.
c) RET : Return from subroutine:- When this instruction is executed program sequence is transferred from
the subroutine to main program(calling) program. The return address is taken from stack, this address is loaded
in PC and program execution begins from this address. e.g. RET

Machine control Instruction :-

This group consists of following six simple instructions :
1) NOP 2) HLT 3) EI 4) DI 5) SIN 6) RIM
1)NOP : - No Operation :
When it is executed μP will not perform any operation only 4T time it will laps and PC goes to next
location for new instruction. This is one byte instruction.
2) HLT :- Halt and enter wait state :-
When it is executed, the μP enters the half acknowledge machine cycle and enter into wait state and
remains there for every clock pulse. The address and data bus are placed in high impedance state. The contents
of registers will not be changed. No come out of this state the μP must be interrupted or Rested . When Reset is
applied PC loaded with 0000 and execution start from this location.
3) EI : Enable Interrupt:-
When it is executed, the interrupt enable flip-flop is set and all hardware interrupts (Trap, RST7.5, RST
6.5, RST 5.5, INTR ) are enabled. No flags are affected and this is one byte instruction.
4) DI : Disable Interrupt :-
When this is executed, the interrupt enable flip-flips are reset and all the interrupt except Trap are
disabled. No flags are affected. This is one byte instruction.
5) RIM: Read Interrupt Mask:- It is multipurpose instruction used to read status of interrupts RST7.5,
RST6.5, RST5.5, and read serial data inputpin. Usinmg this instruction, it is possible to read status of interrupt
lines and find if there are any pending interrupts.
Programminig of 8085
In the writing a program, the programmer :
1) Define the problem to be solved . 2) Determine the feasible solution plan.
3) Draw a flow chart, to identifying the sequence of operation 4) Write the program, step by step to
perform the operations with help of instruction.

► 1) Assembly language Program :-

Assembly language program(ALP) usually written in a standard format such format consists four fields as
Label Field Op-code field Operand field Comment field
REPEAT INC C ;Increment reg. C content by one
a) Label Field : In which, the symbol or group of symbols used to represent address i.e not specifically known.
This field is terminates with colon (:).
b) Op-code Field :- It contains mnemonics for the instruction to be performed, the mnemonics are also called
Op-code
c) Operand field :- It contains reg. data or address on which the instruction is to be performed.
d) Comment Field :- It is started with semicolons(;), it is not a part of machine program ; but it only represent
the explanation of instruction.
2) Flow chart :- It is nothing but the diagrammatically representation of various action and computations that
are taken to perform any task. It is similar to block diagram representing a structure of program. It is used for
(a1) To assists and clarify the thinking process (2) To communicate program logic to others. The symbols are
used in flow chart is shown in fig1 (a)
Arrow :- Indicates the direction of flow of program

Parallelogram :- It is used for input and output operation

Rectangle :- Indicate the process operation

Double Sided rectangle:- Predetermined process ( Sub Program)

? Diamond :- Decision Making unit

Oval :- Start and Stop Unit

Circle with arrow :- To continuation or connecting (end) Symbol

Fig 1(b) Flow chart symbols

► Program of Addition :-
The IC - 8085 is eight bit μP, used to add two eight bit numbers using ADD or ADI instruction. Ex. (1)
Addition of 8 bit data :-
Problem 1 :- Write a program to load register B with 50 H and register C with 20 H add these data, place the
result in register D.
Flow chart : Start

Load data 50 H in reg. B

Load data 20 H in reg. C

Add Content of B into contents of Acc. A

Transfer A Content to D reg.

Stop
Program :-
Memory Addr. Mnemonics Hex.Code Comments
6000 MIV B, 50H 06 ; load register B with data 50 H
6001 50
6002 MVI C, 20H 0E ; load reg. C with data 2
6003 20
6004 MOV A, C 79 ; Data from C to A
6005 ADD ,B 80 ;Add data 1 to Acc.
6006 MOV D, A 57 ; transfer result to D reg.
6007 HLT 76 ; end

► Program of Subtraction :-
Problem 1:- Write ALP to subtract 8 bit numbers stored in memory location 6000 H and 6001 H. Store the
result of subtraction at location 6002 H.
Program :-
Memory Add Mnemonics Operands Comments
2000 LXI H, 6000 ;Address of 1st number
2003 MOV A, M ;1st number in acc.
2004 INX H ;Increment pointer
2005 SUB M ;1st number – 2nd number
20046 INX H ;Incremented the HL pair
2007 MOV M,A ;Result is stored at M
2008 HLT Terminates the program execution
►Program of Multiplication :-
The multiplication is a process of repetitive addition. e.g. 8 bit X 8 bit multiplication.
Problem 1:- Write ALP to multiply 8 bit data stored in two memory location 4050 H, 4051 H, Store upper
byte of result in 4053 H and lower byte of result in 4052 H
Program :-
Label Mnemonics Operand Comments
MVI D, 00 H ; D = 0 to store carry
LDA 4050 H ;1st data byte in acc
MOV B, A ;Transfer 1st byte in reg. B
LDA 4051 H ;2nd byte in acc
MOV C, A ;Transfer 2nd byte of reg. C
XRA A ;clear the acc.
UP ADD B
CC SUB ROUTINE ;carry store in D reg.
DCR C ;if multiplicand is not zero, then go up
JNZ UP
STA 4052 H ;Store lower byte of result
MOV A , D
STA 4053 H ;Store upper byte of result
RST 1 End
SUB ROUTINE
INR D ;Increase reg. by 1
RET ;back to main program

Problem 2:- 8 bit by 16 bit multiplication. i.e. 16 bit data is stored in DE pair and 8 bit data in C reg. Result of
multiplication is stored in HL pair and carry is in reg. B
Program :
Label Memory Addr Mnemonics Hex Code Comments
START 4000 LXI H , 6000 21 ; HL pair is cleared
4001 00
4002 60
4003 LXI D, 6300 11 ;load 16 bit data 6300 into DE pair
4004 00
4005 63
4006 MVI C, A2 0E ;load 8 bit data A2 in reg. C
4007 A2
4008 MVI B, 00 H 06 ;reg. B = 00 to store carry
4009 JNC DOWN 00
UP 400A 19 ;Add DE pair to HL pair
400B D2 ;Jump if carry is not zero
400C 0F
400D 40
400E INR B 04 ;Reg. B is incremented by one
DOWN 400F DCR C 0D
4010 JNZ UP C2 ;Multiplication is over
4011 0A
4012 40
4013 HLT 76 ; Stop the execution of program
►Program of Division :- The process of division is carried by subtraction method.
Problem 1:- 8 bit X 8 bit division Program :
Label Memory Addr Mnemonics Hex Code Comments
START 4000 LDA 4050 3A ;load divisor in acc.
4001 50
4002 40
4003 MOV B, A 47 ;division transferred in B reg.
4004 LDA 4051 3A ;obtain acc
4005 51
4006 40
4007 MVI C FF ;load 8 bit data in to reg C
UP 4008 INC C 0C ; decreament reg C by one
4009 SUB B 90 ;subtract divisor
400A JNC UP D2 ;if carry flag set stop subtraction
400B 08
400C 40
400D ADD B 80 ; round off remainder
400E STA 4053 32,53,40 ;store remainder
4011 MOV A, C
4012 STA 4052 32, 52,40 ;store answer
4015 RST 1 CF ; Stop the execution of program
Data in 4050 02
4051 0A
4052 05 ( Ans = 0A / 02 = 05)
4053 00

Problem 2:- Division of 16 bit by 8 bit : Write ALP program for division of 16 bit by 8 bit
Program :
Label Mnemonics Operand Comments
START LXI H FFFF ; load the HL pair with FFFF
LXI B,xxxx H ; ; load the BC pair with XXXX
MVI D zz H ; load 8 bit data zz into reg D
UP1: MOV A, C ; transfer content of reg C into Acc.
UP 2: INX H ; increament to HL pair by one
SUB B ; subtract the content of reg B from Acc
JNC UP2 ;take jump to UP2 if carry flag is not set
MOV CA ; transfer content of reg Acc into C.
DCR B ; decreament reg B by one
MVI A, FF H ;load 8 bit data FF H in to reg Acc
CMP B ;compare the content of reg B with Acc content
JNZ UP1 ;take jump to UP1 if zero flag is not set
MOV A,C ; transfer content of reg Acc into C
ADD D ; Add content of reg D into Acc. contents
RST ; Stop the execution of program
The problem XXXX / zz
The answer is in HL pair and remainder is in acc.
►Program for Data Transfer :-
Problem 1: - Write ALP program to transfer the block of data. The length of block is in memory location 6100
H and block itself begins in memory location 6120 H transfer entire block of data byte to new memory location
starting 6150 H.
Flow chart for data transfer :- Start

Setup pointer for source setup pointer for destination setup

byte carrier

Get 2nd number in reg. B

Get 2nd number in reg. B

Source pointer = source pointer + 1

Destination pointer = Dest. Pointer +1

Counter = counter - 1

No Is Counter = 0
?

yes
Stop
Program for Data Transfer :
Label Mnemonics Operand Comments
START LDA 6100 H ; Get length of block
MOV CA ;set counter
LXI H, 6120 H ;set source pointer
LXI D, 6150 H ;set destination pointer;
COUNT MOV A, M Get data byte
STAX D Store data at destination
INX H Source pointer incremented by 1
INX D Source pointer incremented by 1
DCR C ;Destination pointer incremented by 1
JNZ COUNT ;if counter = 0 ; stop
HLT ; Stop the execution of program
Problem 2:- Program for exchange of content of block :- Write a program to a program, to exchange the
contents of two blocks located at 6200 H and 6300 H the length of block is 09
Solution:- Data between 6200 and 6300 to be exchanged for2 memory pointers are required
Label Mnemonics Operand Comments
START LXI H 6200 H ; HL pair is cleared
LXI B 6300 H ; BC pair is cleared
MVI D, 09 ;load 8 bit data 09 in reg. D
UP MOV E, M ; transfer content of reg Memory M into C
LDAX B ;Load 16 bit data into BC pair
MOV M, A ;transfer the content of reg A into memory M
MOV A, E ; ;transfer the content of reg E into Acc
STAX B ;Store result from Acc into reg pair BC
INX H ;Increament to HL pair by one
INX B ; Increament to BC pair by one
DCR C ; Increament to reg C by one
JNZ UP ; ;take jump to UP if zero flag is not set
HLT ; Stop the execution of program